1a91eb199SMark Brown /* 2a91eb199SMark Brown * wm8904.c -- WM8904 ALSA SoC Audio driver 3a91eb199SMark Brown * 4656baaebSMark Brown * Copyright 2009-12 Wolfson Microelectronics plc 5a91eb199SMark Brown * 6a91eb199SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7a91eb199SMark Brown * 8a91eb199SMark Brown * 9a91eb199SMark Brown * This program is free software; you can redistribute it and/or modify 10a91eb199SMark Brown * it under the terms of the GNU General Public License version 2 as 11a91eb199SMark Brown * published by the Free Software Foundation. 12a91eb199SMark Brown */ 13a91eb199SMark Brown 14a91eb199SMark Brown #include <linux/module.h> 15a91eb199SMark Brown #include <linux/moduleparam.h> 16a91eb199SMark Brown #include <linux/init.h> 17a91eb199SMark Brown #include <linux/delay.h> 18a91eb199SMark Brown #include <linux/pm.h> 19a91eb199SMark Brown #include <linux/i2c.h> 2084d0d831SMark Brown #include <linux/regmap.h> 21a91eb199SMark Brown #include <linux/regulator/consumer.h> 225a0e3ad6STejun Heo #include <linux/slab.h> 23a91eb199SMark Brown #include <sound/core.h> 24a91eb199SMark Brown #include <sound/pcm.h> 25a91eb199SMark Brown #include <sound/pcm_params.h> 26a91eb199SMark Brown #include <sound/soc.h> 27a91eb199SMark Brown #include <sound/initval.h> 28a91eb199SMark Brown #include <sound/tlv.h> 29a91eb199SMark Brown #include <sound/wm8904.h> 30a91eb199SMark Brown 31a91eb199SMark Brown #include "wm8904.h" 32a91eb199SMark Brown 338c126474SMark Brown enum wm8904_type { 348c126474SMark Brown WM8904, 358c126474SMark Brown WM8912, 368c126474SMark Brown }; 378c126474SMark Brown 38a91eb199SMark Brown #define WM8904_NUM_DCS_CHANNELS 4 39a91eb199SMark Brown 40a91eb199SMark Brown #define WM8904_NUM_SUPPLIES 5 41a91eb199SMark Brown static const char *wm8904_supply_names[WM8904_NUM_SUPPLIES] = { 42a91eb199SMark Brown "DCVDD", 43a91eb199SMark Brown "DBVDD", 44a91eb199SMark Brown "AVDD", 45a91eb199SMark Brown "CPVDD", 46a91eb199SMark Brown "MICVDD", 47a91eb199SMark Brown }; 48a91eb199SMark Brown 49a91eb199SMark Brown /* codec private data */ 50a91eb199SMark Brown struct wm8904_priv { 5184d0d831SMark Brown struct regmap *regmap; 52f0fba2adSLiam Girdwood 538c126474SMark Brown enum wm8904_type devtype; 548c126474SMark Brown 55a91eb199SMark Brown struct regulator_bulk_data supplies[WM8904_NUM_SUPPLIES]; 56a91eb199SMark Brown 57a91eb199SMark Brown struct wm8904_pdata *pdata; 58a91eb199SMark Brown 59a91eb199SMark Brown int deemph; 60a91eb199SMark Brown 61a91eb199SMark Brown /* Platform provided DRC configuration */ 62a91eb199SMark Brown const char **drc_texts; 63a91eb199SMark Brown int drc_cfg; 64a91eb199SMark Brown struct soc_enum drc_enum; 65a91eb199SMark Brown 66a91eb199SMark Brown /* Platform provided ReTune mobile configuration */ 67a91eb199SMark Brown int num_retune_mobile_texts; 68a91eb199SMark Brown const char **retune_mobile_texts; 69a91eb199SMark Brown int retune_mobile_cfg; 70a91eb199SMark Brown struct soc_enum retune_mobile_enum; 71a91eb199SMark Brown 72a91eb199SMark Brown /* FLL setup */ 73a91eb199SMark Brown int fll_src; 74a91eb199SMark Brown int fll_fref; 75a91eb199SMark Brown int fll_fout; 76a91eb199SMark Brown 77a91eb199SMark Brown /* Clocking configuration */ 78a91eb199SMark Brown unsigned int mclk_rate; 79a91eb199SMark Brown int sysclk_src; 80a91eb199SMark Brown unsigned int sysclk_rate; 81a91eb199SMark Brown 82a91eb199SMark Brown int tdm_width; 83a91eb199SMark Brown int tdm_slots; 84a91eb199SMark Brown int bclk; 85a91eb199SMark Brown int fs; 86a91eb199SMark Brown 87a91eb199SMark Brown /* DC servo configuration - cached offset values */ 88a91eb199SMark Brown int dcs_state[WM8904_NUM_DCS_CHANNELS]; 89a91eb199SMark Brown }; 90a91eb199SMark Brown 9184d0d831SMark Brown static const struct reg_default wm8904_reg_defaults[] = { 9284d0d831SMark Brown { 4, 0x0018 }, /* R4 - Bias Control 0 */ 9384d0d831SMark Brown { 5, 0x0000 }, /* R5 - VMID Control 0 */ 9484d0d831SMark Brown { 6, 0x0000 }, /* R6 - Mic Bias Control 0 */ 9584d0d831SMark Brown { 7, 0x0000 }, /* R7 - Mic Bias Control 1 */ 9684d0d831SMark Brown { 8, 0x0001 }, /* R8 - Analogue DAC 0 */ 9784d0d831SMark Brown { 9, 0x9696 }, /* R9 - mic Filter Control */ 9884d0d831SMark Brown { 10, 0x0001 }, /* R10 - Analogue ADC 0 */ 9984d0d831SMark Brown { 12, 0x0000 }, /* R12 - Power Management 0 */ 10084d0d831SMark Brown { 14, 0x0000 }, /* R14 - Power Management 2 */ 10184d0d831SMark Brown { 15, 0x0000 }, /* R15 - Power Management 3 */ 10284d0d831SMark Brown { 18, 0x0000 }, /* R18 - Power Management 6 */ 10384d0d831SMark Brown { 19, 0x945E }, /* R20 - Clock Rates 0 */ 10484d0d831SMark Brown { 21, 0x0C05 }, /* R21 - Clock Rates 1 */ 10584d0d831SMark Brown { 22, 0x0006 }, /* R22 - Clock Rates 2 */ 10684d0d831SMark Brown { 24, 0x0050 }, /* R24 - Audio Interface 0 */ 10784d0d831SMark Brown { 25, 0x000A }, /* R25 - Audio Interface 1 */ 10884d0d831SMark Brown { 26, 0x00E4 }, /* R26 - Audio Interface 2 */ 10984d0d831SMark Brown { 27, 0x0040 }, /* R27 - Audio Interface 3 */ 11084d0d831SMark Brown { 30, 0x00C0 }, /* R30 - DAC Digital Volume Left */ 11184d0d831SMark Brown { 31, 0x00C0 }, /* R31 - DAC Digital Volume Right */ 11284d0d831SMark Brown { 32, 0x0000 }, /* R32 - DAC Digital 0 */ 11384d0d831SMark Brown { 33, 0x0008 }, /* R33 - DAC Digital 1 */ 11484d0d831SMark Brown { 36, 0x00C0 }, /* R36 - ADC Digital Volume Left */ 11584d0d831SMark Brown { 37, 0x00C0 }, /* R37 - ADC Digital Volume Right */ 11684d0d831SMark Brown { 38, 0x0010 }, /* R38 - ADC Digital 0 */ 11784d0d831SMark Brown { 39, 0x0000 }, /* R39 - Digital Microphone 0 */ 11884d0d831SMark Brown { 40, 0x01AF }, /* R40 - DRC 0 */ 11984d0d831SMark Brown { 41, 0x3248 }, /* R41 - DRC 1 */ 12084d0d831SMark Brown { 42, 0x0000 }, /* R42 - DRC 2 */ 12184d0d831SMark Brown { 43, 0x0000 }, /* R43 - DRC 3 */ 12284d0d831SMark Brown { 44, 0x0085 }, /* R44 - Analogue Left Input 0 */ 12384d0d831SMark Brown { 45, 0x0085 }, /* R45 - Analogue Right Input 0 */ 12484d0d831SMark Brown { 46, 0x0044 }, /* R46 - Analogue Left Input 1 */ 12584d0d831SMark Brown { 47, 0x0044 }, /* R47 - Analogue Right Input 1 */ 12684d0d831SMark Brown { 57, 0x002D }, /* R57 - Analogue OUT1 Left */ 12784d0d831SMark Brown { 58, 0x002D }, /* R58 - Analogue OUT1 Right */ 12884d0d831SMark Brown { 59, 0x0039 }, /* R59 - Analogue OUT2 Left */ 12984d0d831SMark Brown { 60, 0x0039 }, /* R60 - Analogue OUT2 Right */ 13084d0d831SMark Brown { 61, 0x0000 }, /* R61 - Analogue OUT12 ZC */ 13184d0d831SMark Brown { 67, 0x0000 }, /* R67 - DC Servo 0 */ 13284d0d831SMark Brown { 69, 0xAAAA }, /* R69 - DC Servo 2 */ 13384d0d831SMark Brown { 71, 0xAAAA }, /* R71 - DC Servo 4 */ 13484d0d831SMark Brown { 72, 0xAAAA }, /* R72 - DC Servo 5 */ 13584d0d831SMark Brown { 90, 0x0000 }, /* R90 - Analogue HP 0 */ 13684d0d831SMark Brown { 94, 0x0000 }, /* R94 - Analogue Lineout 0 */ 13784d0d831SMark Brown { 98, 0x0000 }, /* R98 - Charge Pump 0 */ 13884d0d831SMark Brown { 104, 0x0004 }, /* R104 - Class W 0 */ 13984d0d831SMark Brown { 108, 0x0000 }, /* R108 - Write Sequencer 0 */ 14084d0d831SMark Brown { 109, 0x0000 }, /* R109 - Write Sequencer 1 */ 14184d0d831SMark Brown { 110, 0x0000 }, /* R110 - Write Sequencer 2 */ 14284d0d831SMark Brown { 111, 0x0000 }, /* R111 - Write Sequencer 3 */ 14384d0d831SMark Brown { 112, 0x0000 }, /* R112 - Write Sequencer 4 */ 14484d0d831SMark Brown { 116, 0x0000 }, /* R116 - FLL Control 1 */ 14584d0d831SMark Brown { 117, 0x0007 }, /* R117 - FLL Control 2 */ 14684d0d831SMark Brown { 118, 0x0000 }, /* R118 - FLL Control 3 */ 14784d0d831SMark Brown { 119, 0x2EE0 }, /* R119 - FLL Control 4 */ 14884d0d831SMark Brown { 120, 0x0004 }, /* R120 - FLL Control 5 */ 14984d0d831SMark Brown { 121, 0x0014 }, /* R121 - GPIO Control 1 */ 15084d0d831SMark Brown { 122, 0x0010 }, /* R122 - GPIO Control 2 */ 15184d0d831SMark Brown { 123, 0x0010 }, /* R123 - GPIO Control 3 */ 15284d0d831SMark Brown { 124, 0x0000 }, /* R124 - GPIO Control 4 */ 15384d0d831SMark Brown { 126, 0x0000 }, /* R126 - Digital Pulls */ 15484d0d831SMark Brown { 128, 0xFFFF }, /* R128 - Interrupt Status Mask */ 15584d0d831SMark Brown { 129, 0x0000 }, /* R129 - Interrupt Polarity */ 15684d0d831SMark Brown { 130, 0x0000 }, /* R130 - Interrupt Debounce */ 15784d0d831SMark Brown { 134, 0x0000 }, /* R134 - EQ1 */ 15884d0d831SMark Brown { 135, 0x000C }, /* R135 - EQ2 */ 15984d0d831SMark Brown { 136, 0x000C }, /* R136 - EQ3 */ 16084d0d831SMark Brown { 137, 0x000C }, /* R137 - EQ4 */ 16184d0d831SMark Brown { 138, 0x000C }, /* R138 - EQ5 */ 16284d0d831SMark Brown { 139, 0x000C }, /* R139 - EQ6 */ 16384d0d831SMark Brown { 140, 0x0FCA }, /* R140 - EQ7 */ 16484d0d831SMark Brown { 141, 0x0400 }, /* R141 - EQ8 */ 16584d0d831SMark Brown { 142, 0x00D8 }, /* R142 - EQ9 */ 16684d0d831SMark Brown { 143, 0x1EB5 }, /* R143 - EQ10 */ 16784d0d831SMark Brown { 144, 0xF145 }, /* R144 - EQ11 */ 16884d0d831SMark Brown { 145, 0x0B75 }, /* R145 - EQ12 */ 16984d0d831SMark Brown { 146, 0x01C5 }, /* R146 - EQ13 */ 17084d0d831SMark Brown { 147, 0x1C58 }, /* R147 - EQ14 */ 17184d0d831SMark Brown { 148, 0xF373 }, /* R148 - EQ15 */ 17284d0d831SMark Brown { 149, 0x0A54 }, /* R149 - EQ16 */ 17384d0d831SMark Brown { 150, 0x0558 }, /* R150 - EQ17 */ 17484d0d831SMark Brown { 151, 0x168E }, /* R151 - EQ18 */ 17584d0d831SMark Brown { 152, 0xF829 }, /* R152 - EQ19 */ 17684d0d831SMark Brown { 153, 0x07AD }, /* R153 - EQ20 */ 17784d0d831SMark Brown { 154, 0x1103 }, /* R154 - EQ21 */ 17884d0d831SMark Brown { 155, 0x0564 }, /* R155 - EQ22 */ 17984d0d831SMark Brown { 156, 0x0559 }, /* R156 - EQ23 */ 18084d0d831SMark Brown { 157, 0x4000 }, /* R157 - EQ24 */ 18184d0d831SMark Brown { 161, 0x0000 }, /* R161 - Control Interface Test 1 */ 18284d0d831SMark Brown { 204, 0x0000 }, /* R204 - Analogue Output Bias 0 */ 18384d0d831SMark Brown { 247, 0x0000 }, /* R247 - FLL NCO Test 0 */ 18484d0d831SMark Brown { 248, 0x0019 }, /* R248 - FLL NCO Test 1 */ 185a91eb199SMark Brown }; 186a91eb199SMark Brown 18784d0d831SMark Brown static bool wm8904_volatile_register(struct device *dev, unsigned int reg) 188a91eb199SMark Brown { 18984d0d831SMark Brown switch (reg) { 19084d0d831SMark Brown case WM8904_SW_RESET_AND_ID: 19184d0d831SMark Brown case WM8904_REVISION: 19284d0d831SMark Brown case WM8904_DC_SERVO_1: 19384d0d831SMark Brown case WM8904_DC_SERVO_6: 19484d0d831SMark Brown case WM8904_DC_SERVO_7: 19584d0d831SMark Brown case WM8904_DC_SERVO_8: 19684d0d831SMark Brown case WM8904_DC_SERVO_9: 19784d0d831SMark Brown case WM8904_DC_SERVO_READBACK_0: 19884d0d831SMark Brown case WM8904_INTERRUPT_STATUS: 19984d0d831SMark Brown return true; 20084d0d831SMark Brown default: 20184d0d831SMark Brown return false; 20284d0d831SMark Brown } 20384d0d831SMark Brown } 20484d0d831SMark Brown 20584d0d831SMark Brown static bool wm8904_readable_register(struct device *dev, unsigned int reg) 20684d0d831SMark Brown { 20784d0d831SMark Brown switch (reg) { 20884d0d831SMark Brown case WM8904_SW_RESET_AND_ID: 20984d0d831SMark Brown case WM8904_REVISION: 21084d0d831SMark Brown case WM8904_BIAS_CONTROL_0: 21184d0d831SMark Brown case WM8904_VMID_CONTROL_0: 21284d0d831SMark Brown case WM8904_MIC_BIAS_CONTROL_0: 21384d0d831SMark Brown case WM8904_MIC_BIAS_CONTROL_1: 21484d0d831SMark Brown case WM8904_ANALOGUE_DAC_0: 21584d0d831SMark Brown case WM8904_MIC_FILTER_CONTROL: 21684d0d831SMark Brown case WM8904_ANALOGUE_ADC_0: 21784d0d831SMark Brown case WM8904_POWER_MANAGEMENT_0: 21884d0d831SMark Brown case WM8904_POWER_MANAGEMENT_2: 21984d0d831SMark Brown case WM8904_POWER_MANAGEMENT_3: 22084d0d831SMark Brown case WM8904_POWER_MANAGEMENT_6: 22184d0d831SMark Brown case WM8904_CLOCK_RATES_0: 22284d0d831SMark Brown case WM8904_CLOCK_RATES_1: 22384d0d831SMark Brown case WM8904_CLOCK_RATES_2: 22484d0d831SMark Brown case WM8904_AUDIO_INTERFACE_0: 22584d0d831SMark Brown case WM8904_AUDIO_INTERFACE_1: 22684d0d831SMark Brown case WM8904_AUDIO_INTERFACE_2: 22784d0d831SMark Brown case WM8904_AUDIO_INTERFACE_3: 22884d0d831SMark Brown case WM8904_DAC_DIGITAL_VOLUME_LEFT: 22984d0d831SMark Brown case WM8904_DAC_DIGITAL_VOLUME_RIGHT: 23084d0d831SMark Brown case WM8904_DAC_DIGITAL_0: 23184d0d831SMark Brown case WM8904_DAC_DIGITAL_1: 23284d0d831SMark Brown case WM8904_ADC_DIGITAL_VOLUME_LEFT: 23384d0d831SMark Brown case WM8904_ADC_DIGITAL_VOLUME_RIGHT: 23484d0d831SMark Brown case WM8904_ADC_DIGITAL_0: 23584d0d831SMark Brown case WM8904_DIGITAL_MICROPHONE_0: 23684d0d831SMark Brown case WM8904_DRC_0: 23784d0d831SMark Brown case WM8904_DRC_1: 23884d0d831SMark Brown case WM8904_DRC_2: 23984d0d831SMark Brown case WM8904_DRC_3: 24084d0d831SMark Brown case WM8904_ANALOGUE_LEFT_INPUT_0: 24184d0d831SMark Brown case WM8904_ANALOGUE_RIGHT_INPUT_0: 24284d0d831SMark Brown case WM8904_ANALOGUE_LEFT_INPUT_1: 24384d0d831SMark Brown case WM8904_ANALOGUE_RIGHT_INPUT_1: 24484d0d831SMark Brown case WM8904_ANALOGUE_OUT1_LEFT: 24584d0d831SMark Brown case WM8904_ANALOGUE_OUT1_RIGHT: 24684d0d831SMark Brown case WM8904_ANALOGUE_OUT2_LEFT: 24784d0d831SMark Brown case WM8904_ANALOGUE_OUT2_RIGHT: 24884d0d831SMark Brown case WM8904_ANALOGUE_OUT12_ZC: 24984d0d831SMark Brown case WM8904_DC_SERVO_0: 25084d0d831SMark Brown case WM8904_DC_SERVO_1: 25184d0d831SMark Brown case WM8904_DC_SERVO_2: 25284d0d831SMark Brown case WM8904_DC_SERVO_4: 25384d0d831SMark Brown case WM8904_DC_SERVO_5: 25484d0d831SMark Brown case WM8904_DC_SERVO_6: 25584d0d831SMark Brown case WM8904_DC_SERVO_7: 25684d0d831SMark Brown case WM8904_DC_SERVO_8: 25784d0d831SMark Brown case WM8904_DC_SERVO_9: 25884d0d831SMark Brown case WM8904_DC_SERVO_READBACK_0: 25984d0d831SMark Brown case WM8904_ANALOGUE_HP_0: 26084d0d831SMark Brown case WM8904_ANALOGUE_LINEOUT_0: 26184d0d831SMark Brown case WM8904_CHARGE_PUMP_0: 26284d0d831SMark Brown case WM8904_CLASS_W_0: 26384d0d831SMark Brown case WM8904_WRITE_SEQUENCER_0: 26484d0d831SMark Brown case WM8904_WRITE_SEQUENCER_1: 26584d0d831SMark Brown case WM8904_WRITE_SEQUENCER_2: 26684d0d831SMark Brown case WM8904_WRITE_SEQUENCER_3: 26784d0d831SMark Brown case WM8904_WRITE_SEQUENCER_4: 26884d0d831SMark Brown case WM8904_FLL_CONTROL_1: 26984d0d831SMark Brown case WM8904_FLL_CONTROL_2: 27084d0d831SMark Brown case WM8904_FLL_CONTROL_3: 27184d0d831SMark Brown case WM8904_FLL_CONTROL_4: 27284d0d831SMark Brown case WM8904_FLL_CONTROL_5: 27384d0d831SMark Brown case WM8904_GPIO_CONTROL_1: 27484d0d831SMark Brown case WM8904_GPIO_CONTROL_2: 27584d0d831SMark Brown case WM8904_GPIO_CONTROL_3: 27684d0d831SMark Brown case WM8904_GPIO_CONTROL_4: 27784d0d831SMark Brown case WM8904_DIGITAL_PULLS: 27884d0d831SMark Brown case WM8904_INTERRUPT_STATUS: 27984d0d831SMark Brown case WM8904_INTERRUPT_STATUS_MASK: 28084d0d831SMark Brown case WM8904_INTERRUPT_POLARITY: 28184d0d831SMark Brown case WM8904_INTERRUPT_DEBOUNCE: 28284d0d831SMark Brown case WM8904_EQ1: 28384d0d831SMark Brown case WM8904_EQ2: 28484d0d831SMark Brown case WM8904_EQ3: 28584d0d831SMark Brown case WM8904_EQ4: 28684d0d831SMark Brown case WM8904_EQ5: 28784d0d831SMark Brown case WM8904_EQ6: 28884d0d831SMark Brown case WM8904_EQ7: 28984d0d831SMark Brown case WM8904_EQ8: 29084d0d831SMark Brown case WM8904_EQ9: 29184d0d831SMark Brown case WM8904_EQ10: 29284d0d831SMark Brown case WM8904_EQ11: 29384d0d831SMark Brown case WM8904_EQ12: 29484d0d831SMark Brown case WM8904_EQ13: 29584d0d831SMark Brown case WM8904_EQ14: 29684d0d831SMark Brown case WM8904_EQ15: 29784d0d831SMark Brown case WM8904_EQ16: 29884d0d831SMark Brown case WM8904_EQ17: 29984d0d831SMark Brown case WM8904_EQ18: 30084d0d831SMark Brown case WM8904_EQ19: 30184d0d831SMark Brown case WM8904_EQ20: 30284d0d831SMark Brown case WM8904_EQ21: 30384d0d831SMark Brown case WM8904_EQ22: 30484d0d831SMark Brown case WM8904_EQ23: 30584d0d831SMark Brown case WM8904_EQ24: 30684d0d831SMark Brown case WM8904_CONTROL_INTERFACE_TEST_1: 3079b85fc90SMark Brown case WM8904_ADC_TEST_0: 30884d0d831SMark Brown case WM8904_ANALOGUE_OUTPUT_BIAS_0: 30984d0d831SMark Brown case WM8904_FLL_NCO_TEST_0: 31084d0d831SMark Brown case WM8904_FLL_NCO_TEST_1: 31184d0d831SMark Brown return true; 31284d0d831SMark Brown default: 31384d0d831SMark Brown return true; 31484d0d831SMark Brown } 315a91eb199SMark Brown } 316a91eb199SMark Brown 317a91eb199SMark Brown static int wm8904_configure_clocking(struct snd_soc_codec *codec) 318a91eb199SMark Brown { 319b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 320a91eb199SMark Brown unsigned int clock0, clock2, rate; 321a91eb199SMark Brown 322a91eb199SMark Brown /* Gate the clock while we're updating to avoid misclocking */ 323a91eb199SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 324a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 325a91eb199SMark Brown WM8904_SYSCLK_SRC, 0); 326a91eb199SMark Brown 327a91eb199SMark Brown /* This should be done on init() for bypass paths */ 328a91eb199SMark Brown switch (wm8904->sysclk_src) { 329a91eb199SMark Brown case WM8904_CLK_MCLK: 330a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8904->mclk_rate); 331a91eb199SMark Brown 332a91eb199SMark Brown clock2 &= ~WM8904_SYSCLK_SRC; 333a91eb199SMark Brown rate = wm8904->mclk_rate; 334a91eb199SMark Brown 335a91eb199SMark Brown /* Ensure the FLL is stopped */ 336a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 337a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 338a91eb199SMark Brown break; 339a91eb199SMark Brown 340a91eb199SMark Brown case WM8904_CLK_FLL: 341a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz FLL clock\n", 342a91eb199SMark Brown wm8904->fll_fout); 343a91eb199SMark Brown 344a91eb199SMark Brown clock2 |= WM8904_SYSCLK_SRC; 345a91eb199SMark Brown rate = wm8904->fll_fout; 346a91eb199SMark Brown break; 347a91eb199SMark Brown 348a91eb199SMark Brown default: 349a91eb199SMark Brown dev_err(codec->dev, "System clock not configured\n"); 350a91eb199SMark Brown return -EINVAL; 351a91eb199SMark Brown } 352a91eb199SMark Brown 353a91eb199SMark Brown /* SYSCLK shouldn't be over 13.5MHz */ 354a91eb199SMark Brown if (rate > 13500000) { 355a91eb199SMark Brown clock0 = WM8904_MCLK_DIV; 356a91eb199SMark Brown wm8904->sysclk_rate = rate / 2; 357a91eb199SMark Brown } else { 358a91eb199SMark Brown clock0 = 0; 359a91eb199SMark Brown wm8904->sysclk_rate = rate; 360a91eb199SMark Brown } 361a91eb199SMark Brown 362a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_0, WM8904_MCLK_DIV, 363a91eb199SMark Brown clock0); 364a91eb199SMark Brown 365a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 366a91eb199SMark Brown WM8904_CLK_SYS_ENA | WM8904_SYSCLK_SRC, clock2); 367a91eb199SMark Brown 368a91eb199SMark Brown dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8904->sysclk_rate); 369a91eb199SMark Brown 370a91eb199SMark Brown return 0; 371a91eb199SMark Brown } 372a91eb199SMark Brown 373a91eb199SMark Brown static void wm8904_set_drc(struct snd_soc_codec *codec) 374a91eb199SMark Brown { 375b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 376a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 377a91eb199SMark Brown int save, i; 378a91eb199SMark Brown 379a91eb199SMark Brown /* Save any enables; the configuration should clear them. */ 380a91eb199SMark Brown save = snd_soc_read(codec, WM8904_DRC_0); 381a91eb199SMark Brown 382a91eb199SMark Brown for (i = 0; i < WM8904_DRC_REGS; i++) 383a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0 + i, 0xffff, 384a91eb199SMark Brown pdata->drc_cfgs[wm8904->drc_cfg].regs[i]); 385a91eb199SMark Brown 386a91eb199SMark Brown /* Reenable the DRC */ 387a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0, 388a91eb199SMark Brown WM8904_DRC_ENA | WM8904_DRC_DAC_PATH, save); 389a91eb199SMark Brown } 390a91eb199SMark Brown 391a91eb199SMark Brown static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol, 392a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 393a91eb199SMark Brown { 394a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 395b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 396a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 397a91eb199SMark Brown int value = ucontrol->value.integer.value[0]; 398a91eb199SMark Brown 399a91eb199SMark Brown if (value >= pdata->num_drc_cfgs) 400a91eb199SMark Brown return -EINVAL; 401a91eb199SMark Brown 402a91eb199SMark Brown wm8904->drc_cfg = value; 403a91eb199SMark Brown 404a91eb199SMark Brown wm8904_set_drc(codec); 405a91eb199SMark Brown 406a91eb199SMark Brown return 0; 407a91eb199SMark Brown } 408a91eb199SMark Brown 409a91eb199SMark Brown static int wm8904_get_drc_enum(struct snd_kcontrol *kcontrol, 410a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 411a91eb199SMark Brown { 412a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 413b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 414a91eb199SMark Brown 415a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->drc_cfg; 416a91eb199SMark Brown 417a91eb199SMark Brown return 0; 418a91eb199SMark Brown } 419a91eb199SMark Brown 420a91eb199SMark Brown static void wm8904_set_retune_mobile(struct snd_soc_codec *codec) 421a91eb199SMark Brown { 422b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 423a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 424a91eb199SMark Brown int best, best_val, save, i, cfg; 425a91eb199SMark Brown 426a91eb199SMark Brown if (!pdata || !wm8904->num_retune_mobile_texts) 427a91eb199SMark Brown return; 428a91eb199SMark Brown 429a91eb199SMark Brown /* Find the version of the currently selected configuration 430a91eb199SMark Brown * with the nearest sample rate. */ 431a91eb199SMark Brown cfg = wm8904->retune_mobile_cfg; 432a91eb199SMark Brown best = 0; 433a91eb199SMark Brown best_val = INT_MAX; 434a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 435a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 436a91eb199SMark Brown wm8904->retune_mobile_texts[cfg]) == 0 && 437a91eb199SMark Brown abs(pdata->retune_mobile_cfgs[i].rate 438a91eb199SMark Brown - wm8904->fs) < best_val) { 439a91eb199SMark Brown best = i; 440a91eb199SMark Brown best_val = abs(pdata->retune_mobile_cfgs[i].rate 441a91eb199SMark Brown - wm8904->fs); 442a91eb199SMark Brown } 443a91eb199SMark Brown } 444a91eb199SMark Brown 445a91eb199SMark Brown dev_dbg(codec->dev, "ReTune Mobile %s/%dHz for %dHz sample rate\n", 446a91eb199SMark Brown pdata->retune_mobile_cfgs[best].name, 447a91eb199SMark Brown pdata->retune_mobile_cfgs[best].rate, 448a91eb199SMark Brown wm8904->fs); 449a91eb199SMark Brown 450a91eb199SMark Brown /* The EQ will be disabled while reconfiguring it, remember the 451a91eb199SMark Brown * current configuration. 452a91eb199SMark Brown */ 453a91eb199SMark Brown save = snd_soc_read(codec, WM8904_EQ1); 454a91eb199SMark Brown 455a91eb199SMark Brown for (i = 0; i < WM8904_EQ_REGS; i++) 456a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1 + i, 0xffff, 457a91eb199SMark Brown pdata->retune_mobile_cfgs[best].regs[i]); 458a91eb199SMark Brown 459a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1, WM8904_EQ_ENA, save); 460a91eb199SMark Brown } 461a91eb199SMark Brown 462a91eb199SMark Brown static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 463a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 464a91eb199SMark Brown { 465a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 466b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 467a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 468a91eb199SMark Brown int value = ucontrol->value.integer.value[0]; 469a91eb199SMark Brown 470a91eb199SMark Brown if (value >= pdata->num_retune_mobile_cfgs) 471a91eb199SMark Brown return -EINVAL; 472a91eb199SMark Brown 473a91eb199SMark Brown wm8904->retune_mobile_cfg = value; 474a91eb199SMark Brown 475a91eb199SMark Brown wm8904_set_retune_mobile(codec); 476a91eb199SMark Brown 477a91eb199SMark Brown return 0; 478a91eb199SMark Brown } 479a91eb199SMark Brown 480a91eb199SMark Brown static int wm8904_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 481a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 482a91eb199SMark Brown { 483a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 484b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 485a91eb199SMark Brown 486a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->retune_mobile_cfg; 487a91eb199SMark Brown 488a91eb199SMark Brown return 0; 489a91eb199SMark Brown } 490a91eb199SMark Brown 491a91eb199SMark Brown static int deemph_settings[] = { 0, 32000, 44100, 48000 }; 492a91eb199SMark Brown 493a91eb199SMark Brown static int wm8904_set_deemph(struct snd_soc_codec *codec) 494a91eb199SMark Brown { 495b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 496a91eb199SMark Brown int val, i, best; 497a91eb199SMark Brown 498a91eb199SMark Brown /* If we're using deemphasis select the nearest available sample 499a91eb199SMark Brown * rate. 500a91eb199SMark Brown */ 501a91eb199SMark Brown if (wm8904->deemph) { 502a91eb199SMark Brown best = 1; 503a91eb199SMark Brown for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { 504a91eb199SMark Brown if (abs(deemph_settings[i] - wm8904->fs) < 505a91eb199SMark Brown abs(deemph_settings[best] - wm8904->fs)) 506a91eb199SMark Brown best = i; 507a91eb199SMark Brown } 508a91eb199SMark Brown 509a91eb199SMark Brown val = best << WM8904_DEEMPH_SHIFT; 510a91eb199SMark Brown } else { 511a91eb199SMark Brown val = 0; 512a91eb199SMark Brown } 513a91eb199SMark Brown 514a91eb199SMark Brown dev_dbg(codec->dev, "Set deemphasis %d\n", val); 515a91eb199SMark Brown 516a91eb199SMark Brown return snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 517a91eb199SMark Brown WM8904_DEEMPH_MASK, val); 518a91eb199SMark Brown } 519a91eb199SMark Brown 520a91eb199SMark Brown static int wm8904_get_deemph(struct snd_kcontrol *kcontrol, 521a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 522a91eb199SMark Brown { 523a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 524b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 525a91eb199SMark Brown 5263f343f85SDmitry Artamonow ucontrol->value.enumerated.item[0] = wm8904->deemph; 5273f343f85SDmitry Artamonow return 0; 528a91eb199SMark Brown } 529a91eb199SMark Brown 530a91eb199SMark Brown static int wm8904_put_deemph(struct snd_kcontrol *kcontrol, 531a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 532a91eb199SMark Brown { 533a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 534b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 535a91eb199SMark Brown int deemph = ucontrol->value.enumerated.item[0]; 536a91eb199SMark Brown 537a91eb199SMark Brown if (deemph > 1) 538a91eb199SMark Brown return -EINVAL; 539a91eb199SMark Brown 540a91eb199SMark Brown wm8904->deemph = deemph; 541a91eb199SMark Brown 542a91eb199SMark Brown return wm8904_set_deemph(codec); 543a91eb199SMark Brown } 544a91eb199SMark Brown 545a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0); 546a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); 547a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); 548a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0); 549a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); 550a91eb199SMark Brown 551a91eb199SMark Brown static const char *input_mode_text[] = { 552a91eb199SMark Brown "Single-Ended", "Differential Line", "Differential Mic" 553a91eb199SMark Brown }; 554a91eb199SMark Brown 555a91eb199SMark Brown static const struct soc_enum lin_mode = 556a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 0, 3, input_mode_text); 557a91eb199SMark Brown 558a91eb199SMark Brown static const struct soc_enum rin_mode = 559a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 0, 3, input_mode_text); 560a91eb199SMark Brown 561a91eb199SMark Brown static const char *hpf_mode_text[] = { 562a91eb199SMark Brown "Hi-fi", "Voice 1", "Voice 2", "Voice 3" 563a91eb199SMark Brown }; 564a91eb199SMark Brown 565a91eb199SMark Brown static const struct soc_enum hpf_mode = 566a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ADC_DIGITAL_0, 5, 4, hpf_mode_text); 567a91eb199SMark Brown 5689b85fc90SMark Brown static int wm8904_adc_osr_put(struct snd_kcontrol *kcontrol, 5699b85fc90SMark Brown struct snd_ctl_elem_value *ucontrol) 5709b85fc90SMark Brown { 5719b85fc90SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 5729b85fc90SMark Brown unsigned int val; 5739b85fc90SMark Brown int ret; 5749b85fc90SMark Brown 5759b85fc90SMark Brown ret = snd_soc_put_volsw(kcontrol, ucontrol); 5769b85fc90SMark Brown if (ret < 0) 5779b85fc90SMark Brown return ret; 5789b85fc90SMark Brown 5799b85fc90SMark Brown if (ucontrol->value.integer.value[0]) 5809b85fc90SMark Brown val = 0; 5819b85fc90SMark Brown else 5829b85fc90SMark Brown val = WM8904_ADC_128_OSR_TST_MODE | WM8904_ADC_BIASX1P5; 5839b85fc90SMark Brown 5849b85fc90SMark Brown snd_soc_update_bits(codec, WM8904_ADC_TEST_0, 5859b85fc90SMark Brown WM8904_ADC_128_OSR_TST_MODE | WM8904_ADC_BIASX1P5, 5869b85fc90SMark Brown val); 5879b85fc90SMark Brown 5889b85fc90SMark Brown return ret; 5899b85fc90SMark Brown } 5909b85fc90SMark Brown 591a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_adc_snd_controls[] = { 592a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8904_ADC_DIGITAL_VOLUME_LEFT, 593a91eb199SMark Brown WM8904_ADC_DIGITAL_VOLUME_RIGHT, 1, 119, 0, digital_tlv), 594a91eb199SMark Brown 595a91eb199SMark Brown SOC_ENUM("Left Caputure Mode", lin_mode), 596a91eb199SMark Brown SOC_ENUM("Right Capture Mode", rin_mode), 597a91eb199SMark Brown 598a91eb199SMark Brown /* No TLV since it depends on mode */ 599a91eb199SMark Brown SOC_DOUBLE_R("Capture Volume", WM8904_ANALOGUE_LEFT_INPUT_0, 600a91eb199SMark Brown WM8904_ANALOGUE_RIGHT_INPUT_0, 0, 31, 0), 601a91eb199SMark Brown SOC_DOUBLE_R("Capture Switch", WM8904_ANALOGUE_LEFT_INPUT_0, 6025a7c5f26SHong Xu WM8904_ANALOGUE_RIGHT_INPUT_0, 7, 1, 1), 603a91eb199SMark Brown 604a91eb199SMark Brown SOC_SINGLE("High Pass Filter Switch", WM8904_ADC_DIGITAL_0, 4, 1, 0), 605a91eb199SMark Brown SOC_ENUM("High Pass Filter Mode", hpf_mode), 606a91eb199SMark Brown 6079b85fc90SMark Brown { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 6089b85fc90SMark Brown .name = "ADC 128x OSR Switch", 6099b85fc90SMark Brown .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, 6109b85fc90SMark Brown .put = wm8904_adc_osr_put, 6119b85fc90SMark Brown .private_value = SOC_SINGLE_VALUE(WM8904_ANALOGUE_ADC_0, 0, 1, 0), 6129b85fc90SMark Brown }, 613a91eb199SMark Brown }; 614a91eb199SMark Brown 615a91eb199SMark Brown static const char *drc_path_text[] = { 616a91eb199SMark Brown "ADC", "DAC" 617a91eb199SMark Brown }; 618a91eb199SMark Brown 619a91eb199SMark Brown static const struct soc_enum drc_path = 620a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DRC_0, 14, 2, drc_path_text); 621a91eb199SMark Brown 622a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_dac_snd_controls[] = { 623a91eb199SMark Brown SOC_SINGLE_TLV("Digital Playback Boost Volume", 624a91eb199SMark Brown WM8904_AUDIO_INTERFACE_0, 9, 3, 0, dac_boost_tlv), 625a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8904_DAC_DIGITAL_VOLUME_LEFT, 626a91eb199SMark Brown WM8904_DAC_DIGITAL_VOLUME_RIGHT, 1, 96, 0, digital_tlv), 627a91eb199SMark Brown 628a91eb199SMark Brown SOC_DOUBLE_R_TLV("Headphone Volume", WM8904_ANALOGUE_OUT1_LEFT, 629a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 0, 63, 0, out_tlv), 630a91eb199SMark Brown SOC_DOUBLE_R("Headphone Switch", WM8904_ANALOGUE_OUT1_LEFT, 631a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 8, 1, 1), 632a91eb199SMark Brown SOC_DOUBLE_R("Headphone ZC Switch", WM8904_ANALOGUE_OUT1_LEFT, 633a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 6, 1, 0), 634a91eb199SMark Brown 635a91eb199SMark Brown SOC_DOUBLE_R_TLV("Line Output Volume", WM8904_ANALOGUE_OUT2_LEFT, 636a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 0, 63, 0, out_tlv), 637a91eb199SMark Brown SOC_DOUBLE_R("Line Output Switch", WM8904_ANALOGUE_OUT2_LEFT, 638a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 8, 1, 1), 639a91eb199SMark Brown SOC_DOUBLE_R("Line Output ZC Switch", WM8904_ANALOGUE_OUT2_LEFT, 640a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 6, 1, 0), 641a91eb199SMark Brown 642a91eb199SMark Brown SOC_SINGLE("EQ Switch", WM8904_EQ1, 0, 1, 0), 643a91eb199SMark Brown SOC_SINGLE("DRC Switch", WM8904_DRC_0, 15, 1, 0), 644a91eb199SMark Brown SOC_ENUM("DRC Path", drc_path), 645a91eb199SMark Brown SOC_SINGLE("DAC OSRx2 Switch", WM8904_DAC_DIGITAL_1, 6, 1, 0), 646a91eb199SMark Brown SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0, 647a91eb199SMark Brown wm8904_get_deemph, wm8904_put_deemph), 648a91eb199SMark Brown }; 649a91eb199SMark Brown 650a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_snd_controls[] = { 651a91eb199SMark Brown SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8904_DAC_DIGITAL_0, 4, 8, 15, 0, 652a91eb199SMark Brown sidetone_tlv), 653a91eb199SMark Brown }; 654a91eb199SMark Brown 655a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_eq_controls[] = { 656a91eb199SMark Brown SOC_SINGLE_TLV("EQ1 Volume", WM8904_EQ2, 0, 24, 0, eq_tlv), 657a91eb199SMark Brown SOC_SINGLE_TLV("EQ2 Volume", WM8904_EQ3, 0, 24, 0, eq_tlv), 658a91eb199SMark Brown SOC_SINGLE_TLV("EQ3 Volume", WM8904_EQ4, 0, 24, 0, eq_tlv), 659a91eb199SMark Brown SOC_SINGLE_TLV("EQ4 Volume", WM8904_EQ5, 0, 24, 0, eq_tlv), 660a91eb199SMark Brown SOC_SINGLE_TLV("EQ5 Volume", WM8904_EQ6, 0, 24, 0, eq_tlv), 661a91eb199SMark Brown }; 662a91eb199SMark Brown 663a91eb199SMark Brown static int cp_event(struct snd_soc_dapm_widget *w, 664a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 665a91eb199SMark Brown { 666a91eb199SMark Brown BUG_ON(event != SND_SOC_DAPM_POST_PMU); 667a91eb199SMark Brown 668a91eb199SMark Brown /* Maximum startup time */ 669a91eb199SMark Brown udelay(500); 670a91eb199SMark Brown 671a91eb199SMark Brown return 0; 672a91eb199SMark Brown } 673a91eb199SMark Brown 674a91eb199SMark Brown static int sysclk_event(struct snd_soc_dapm_widget *w, 675a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 676a91eb199SMark Brown { 677a91eb199SMark Brown struct snd_soc_codec *codec = w->codec; 678b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 679a91eb199SMark Brown 680a91eb199SMark Brown switch (event) { 681a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMU: 682a91eb199SMark Brown /* If we're using the FLL then we only start it when 683a91eb199SMark Brown * required; we assume that the configuration has been 684a91eb199SMark Brown * done previously and all we need to do is kick it 685a91eb199SMark Brown * off. 686a91eb199SMark Brown */ 687a91eb199SMark Brown switch (wm8904->sysclk_src) { 688a91eb199SMark Brown case WM8904_CLK_FLL: 689a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 690a91eb199SMark Brown WM8904_FLL_OSC_ENA, 691a91eb199SMark Brown WM8904_FLL_OSC_ENA); 692a91eb199SMark Brown 693a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 694a91eb199SMark Brown WM8904_FLL_ENA, 695a91eb199SMark Brown WM8904_FLL_ENA); 696a91eb199SMark Brown break; 697a91eb199SMark Brown 698a91eb199SMark Brown default: 699a91eb199SMark Brown break; 700a91eb199SMark Brown } 701a91eb199SMark Brown break; 702a91eb199SMark Brown 703a91eb199SMark Brown case SND_SOC_DAPM_POST_PMD: 704a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 705a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 706a91eb199SMark Brown break; 707a91eb199SMark Brown } 708a91eb199SMark Brown 709a91eb199SMark Brown return 0; 710a91eb199SMark Brown } 711a91eb199SMark Brown 712a91eb199SMark Brown static int out_pga_event(struct snd_soc_dapm_widget *w, 713a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 714a91eb199SMark Brown { 715a91eb199SMark Brown struct snd_soc_codec *codec = w->codec; 716b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 717a91eb199SMark Brown int reg, val; 718a91eb199SMark Brown int dcs_mask; 719a91eb199SMark Brown int dcs_l, dcs_r; 720a91eb199SMark Brown int dcs_l_reg, dcs_r_reg; 721a91eb199SMark Brown int timeout; 722e4bc6696SMark Brown int pwr_reg; 723a91eb199SMark Brown 724a91eb199SMark Brown /* This code is shared between HP and LINEOUT; we do all our 725a91eb199SMark Brown * power management in stereo pairs to avoid latency issues so 726a91eb199SMark Brown * we reuse shift to identify which rather than strcmp() the 727a91eb199SMark Brown * name. */ 728a91eb199SMark Brown reg = w->shift; 729a91eb199SMark Brown 730a91eb199SMark Brown switch (reg) { 731a91eb199SMark Brown case WM8904_ANALOGUE_HP_0: 732e4bc6696SMark Brown pwr_reg = WM8904_POWER_MANAGEMENT_2; 733a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_0 | WM8904_DCS_ENA_CHAN_1; 734a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_8; 735a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_9; 736a91eb199SMark Brown dcs_l = 0; 737a91eb199SMark Brown dcs_r = 1; 738a91eb199SMark Brown break; 739a91eb199SMark Brown case WM8904_ANALOGUE_LINEOUT_0: 740e4bc6696SMark Brown pwr_reg = WM8904_POWER_MANAGEMENT_3; 741a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_2 | WM8904_DCS_ENA_CHAN_3; 742a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_6; 743a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_7; 744a91eb199SMark Brown dcs_l = 2; 745a91eb199SMark Brown dcs_r = 3; 746a91eb199SMark Brown break; 747a91eb199SMark Brown default: 748a91eb199SMark Brown BUG(); 749a91eb199SMark Brown return -EINVAL; 750a91eb199SMark Brown } 751a91eb199SMark Brown 752a91eb199SMark Brown switch (event) { 753e4bc6696SMark Brown case SND_SOC_DAPM_PRE_PMU: 754e4bc6696SMark Brown /* Power on the PGAs */ 755e4bc6696SMark Brown snd_soc_update_bits(codec, pwr_reg, 756e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA, 757e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA); 758e4bc6696SMark Brown 759a91eb199SMark Brown /* Power on the amplifier */ 760a91eb199SMark Brown snd_soc_update_bits(codec, reg, 761a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA, 762a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA); 763a91eb199SMark Brown 764e4bc6696SMark Brown 765a91eb199SMark Brown /* Enable the first stage */ 766a91eb199SMark Brown snd_soc_update_bits(codec, reg, 767a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY, 768a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY); 769a91eb199SMark Brown 770a91eb199SMark Brown /* Power up the DC servo */ 771a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 772a91eb199SMark Brown dcs_mask, dcs_mask); 773a91eb199SMark Brown 774a91eb199SMark Brown /* Either calibrate the DC servo or restore cached state 775a91eb199SMark Brown * if we have that. 776a91eb199SMark Brown */ 777a91eb199SMark Brown if (wm8904->dcs_state[dcs_l] || wm8904->dcs_state[dcs_r]) { 778a91eb199SMark Brown dev_dbg(codec->dev, "Restoring DC servo state\n"); 779a91eb199SMark Brown 780a91eb199SMark Brown snd_soc_write(codec, dcs_l_reg, 781a91eb199SMark Brown wm8904->dcs_state[dcs_l]); 782a91eb199SMark Brown snd_soc_write(codec, dcs_r_reg, 783a91eb199SMark Brown wm8904->dcs_state[dcs_r]); 784a91eb199SMark Brown 785a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, dcs_mask); 786a91eb199SMark Brown 787a91eb199SMark Brown timeout = 20; 788a91eb199SMark Brown } else { 789a91eb199SMark Brown dev_dbg(codec->dev, "Calibrating DC servo\n"); 790a91eb199SMark Brown 791a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, 792a91eb199SMark Brown dcs_mask << WM8904_DCS_TRIG_STARTUP_0_SHIFT); 793a91eb199SMark Brown 794a91eb199SMark Brown timeout = 500; 795a91eb199SMark Brown } 796a91eb199SMark Brown 797a91eb199SMark Brown /* Wait for DC servo to complete */ 798a91eb199SMark Brown dcs_mask <<= WM8904_DCS_CAL_COMPLETE_SHIFT; 799a91eb199SMark Brown do { 800a91eb199SMark Brown val = snd_soc_read(codec, WM8904_DC_SERVO_READBACK_0); 801a91eb199SMark Brown if ((val & dcs_mask) == dcs_mask) 802a91eb199SMark Brown break; 803a91eb199SMark Brown 804a91eb199SMark Brown msleep(1); 805a91eb199SMark Brown } while (--timeout); 806a91eb199SMark Brown 807a91eb199SMark Brown if ((val & dcs_mask) != dcs_mask) 808a91eb199SMark Brown dev_warn(codec->dev, "DC servo timed out\n"); 809a91eb199SMark Brown else 810a91eb199SMark Brown dev_dbg(codec->dev, "DC servo ready\n"); 811a91eb199SMark Brown 812a91eb199SMark Brown /* Enable the output stage */ 813a91eb199SMark Brown snd_soc_update_bits(codec, reg, 814a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 815a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP); 816e4bc6696SMark Brown break; 817a91eb199SMark Brown 818e4bc6696SMark Brown case SND_SOC_DAPM_POST_PMU: 819a91eb199SMark Brown /* Unshort the output itself */ 820a91eb199SMark Brown snd_soc_update_bits(codec, reg, 821a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 822a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 823a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 824a91eb199SMark Brown WM8904_HPR_RMV_SHORT); 825a91eb199SMark Brown 826a91eb199SMark Brown break; 827a91eb199SMark Brown 828a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMD: 829a91eb199SMark Brown /* Short the output */ 830a91eb199SMark Brown snd_soc_update_bits(codec, reg, 831a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 832a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 0); 833e4bc6696SMark Brown break; 834a91eb199SMark Brown 835e4bc6696SMark Brown case SND_SOC_DAPM_POST_PMD: 836a91eb199SMark Brown /* Cache the DC servo configuration; this will be 837a91eb199SMark Brown * invalidated if we change the configuration. */ 838a91eb199SMark Brown wm8904->dcs_state[dcs_l] = snd_soc_read(codec, dcs_l_reg); 839a91eb199SMark Brown wm8904->dcs_state[dcs_r] = snd_soc_read(codec, dcs_r_reg); 840a91eb199SMark Brown 841a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 842a91eb199SMark Brown dcs_mask, 0); 843a91eb199SMark Brown 844a91eb199SMark Brown /* Disable the amplifier input and output stages */ 845a91eb199SMark Brown snd_soc_update_bits(codec, reg, 846a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA | 847a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY | 848a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 849a91eb199SMark Brown 0); 850e4bc6696SMark Brown 851e4bc6696SMark Brown /* PGAs too */ 852e4bc6696SMark Brown snd_soc_update_bits(codec, pwr_reg, 853e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA, 854e4bc6696SMark Brown 0); 855a91eb199SMark Brown break; 856a91eb199SMark Brown } 857a91eb199SMark Brown 858a91eb199SMark Brown return 0; 859a91eb199SMark Brown } 860a91eb199SMark Brown 861a91eb199SMark Brown static const char *lin_text[] = { 862a91eb199SMark Brown "IN1L", "IN2L", "IN3L" 863a91eb199SMark Brown }; 864a91eb199SMark Brown 865a91eb199SMark Brown static const struct soc_enum lin_enum = 866a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 2, 3, lin_text); 867a91eb199SMark Brown 868a91eb199SMark Brown static const struct snd_kcontrol_new lin_mux = 869a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Mux", lin_enum); 870a91eb199SMark Brown 871a91eb199SMark Brown static const struct soc_enum lin_inv_enum = 872a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 4, 3, lin_text); 873a91eb199SMark Brown 874a91eb199SMark Brown static const struct snd_kcontrol_new lin_inv_mux = 875a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Inveting Mux", lin_inv_enum); 876a91eb199SMark Brown 877a91eb199SMark Brown static const char *rin_text[] = { 878a91eb199SMark Brown "IN1R", "IN2R", "IN3R" 879a91eb199SMark Brown }; 880a91eb199SMark Brown 881a91eb199SMark Brown static const struct soc_enum rin_enum = 882a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 2, 3, rin_text); 883a91eb199SMark Brown 884a91eb199SMark Brown static const struct snd_kcontrol_new rin_mux = 885a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Mux", rin_enum); 886a91eb199SMark Brown 887a91eb199SMark Brown static const struct soc_enum rin_inv_enum = 888a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 4, 3, rin_text); 889a91eb199SMark Brown 890a91eb199SMark Brown static const struct snd_kcontrol_new rin_inv_mux = 891a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Inveting Mux", rin_inv_enum); 892a91eb199SMark Brown 893a91eb199SMark Brown static const char *aif_text[] = { 894a91eb199SMark Brown "Left", "Right" 895a91eb199SMark Brown }; 896a91eb199SMark Brown 897a91eb199SMark Brown static const struct soc_enum aifoutl_enum = 898a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 7, 2, aif_text); 899a91eb199SMark Brown 900a91eb199SMark Brown static const struct snd_kcontrol_new aifoutl_mux = 901a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum); 902a91eb199SMark Brown 903a91eb199SMark Brown static const struct soc_enum aifoutr_enum = 904a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 6, 2, aif_text); 905a91eb199SMark Brown 906a91eb199SMark Brown static const struct snd_kcontrol_new aifoutr_mux = 907a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum); 908a91eb199SMark Brown 909a91eb199SMark Brown static const struct soc_enum aifinl_enum = 910a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 5, 2, aif_text); 911a91eb199SMark Brown 912a91eb199SMark Brown static const struct snd_kcontrol_new aifinl_mux = 913a91eb199SMark Brown SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum); 914a91eb199SMark Brown 915a91eb199SMark Brown static const struct soc_enum aifinr_enum = 916a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 4, 2, aif_text); 917a91eb199SMark Brown 918a91eb199SMark Brown static const struct snd_kcontrol_new aifinr_mux = 919a91eb199SMark Brown SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum); 920a91eb199SMark Brown 921a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_core_dapm_widgets[] = { 922a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("SYSCLK", WM8904_CLOCK_RATES_2, 2, 0, sysclk_event, 923a91eb199SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 924a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8904_CLOCK_RATES_2, 1, 0, NULL, 0), 925a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("TOCLK", WM8904_CLOCK_RATES_2, 0, 0, NULL, 0), 926a91eb199SMark Brown }; 927a91eb199SMark Brown 928a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_adc_dapm_widgets[] = { 929a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1L"), 930a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1R"), 931a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2L"), 932a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2R"), 933a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3L"), 934a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3R"), 935a91eb199SMark Brown 936dcd658c5SMark Brown SND_SOC_DAPM_SUPPLY("MICBIAS", WM8904_MIC_BIAS_CONTROL_0, 0, 0, NULL, 0), 937a91eb199SMark Brown 938a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Mux", SND_SOC_NOPM, 0, 0, &lin_mux), 939a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 940a91eb199SMark Brown &lin_inv_mux), 941a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Mux", SND_SOC_NOPM, 0, 0, &rin_mux), 942a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 943a91eb199SMark Brown &rin_inv_mux), 944a91eb199SMark Brown 945a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Capture PGA", WM8904_POWER_MANAGEMENT_0, 1, 0, 946a91eb199SMark Brown NULL, 0), 947a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Capture PGA", WM8904_POWER_MANAGEMENT_0, 0, 0, 948a91eb199SMark Brown NULL, 0), 949a91eb199SMark Brown 950a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCL", NULL, WM8904_POWER_MANAGEMENT_6, 1, 0), 951a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCR", NULL, WM8904_POWER_MANAGEMENT_6, 0, 0), 952a91eb199SMark Brown 953a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux), 954a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux), 955a91eb199SMark Brown 956a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), 957a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), 958a91eb199SMark Brown }; 959a91eb199SMark Brown 960a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dac_dapm_widgets[] = { 961a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0), 962a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0), 963a91eb199SMark Brown 964a91eb199SMark Brown SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux), 965a91eb199SMark Brown SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux), 966a91eb199SMark Brown 967a91eb199SMark Brown SND_SOC_DAPM_DAC("DACL", NULL, WM8904_POWER_MANAGEMENT_6, 3, 0), 968a91eb199SMark Brown SND_SOC_DAPM_DAC("DACR", NULL, WM8904_POWER_MANAGEMENT_6, 2, 0), 969a91eb199SMark Brown 970a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Charge pump", WM8904_CHARGE_PUMP_0, 0, 0, cp_event, 971a91eb199SMark Brown SND_SOC_DAPM_POST_PMU), 972a91eb199SMark Brown 973e4bc6696SMark Brown SND_SOC_DAPM_PGA("HPL PGA", SND_SOC_NOPM, 1, 0, NULL, 0), 974e4bc6696SMark Brown SND_SOC_DAPM_PGA("HPR PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 975a91eb199SMark Brown 976e4bc6696SMark Brown SND_SOC_DAPM_PGA("LINEL PGA", SND_SOC_NOPM, 1, 0, NULL, 0), 977e4bc6696SMark Brown SND_SOC_DAPM_PGA("LINER PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 978a91eb199SMark Brown 979a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Headphone Output", SND_SOC_NOPM, WM8904_ANALOGUE_HP_0, 980a91eb199SMark Brown 0, NULL, 0, out_pga_event, 981e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | 982e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), 983a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Line Output", SND_SOC_NOPM, WM8904_ANALOGUE_LINEOUT_0, 984a91eb199SMark Brown 0, NULL, 0, out_pga_event, 985e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | 986e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), 987a91eb199SMark Brown 988a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTL"), 989a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTR"), 990a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTL"), 991a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTR"), 992a91eb199SMark Brown }; 993a91eb199SMark Brown 994a91eb199SMark Brown static const char *out_mux_text[] = { 995a91eb199SMark Brown "DAC", "Bypass" 996a91eb199SMark Brown }; 997a91eb199SMark Brown 998a91eb199SMark Brown static const struct soc_enum hpl_enum = 999a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 3, 2, out_mux_text); 1000a91eb199SMark Brown 1001a91eb199SMark Brown static const struct snd_kcontrol_new hpl_mux = 1002a91eb199SMark Brown SOC_DAPM_ENUM("HPL Mux", hpl_enum); 1003a91eb199SMark Brown 1004a91eb199SMark Brown static const struct soc_enum hpr_enum = 1005a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 2, 2, out_mux_text); 1006a91eb199SMark Brown 1007a91eb199SMark Brown static const struct snd_kcontrol_new hpr_mux = 1008a91eb199SMark Brown SOC_DAPM_ENUM("HPR Mux", hpr_enum); 1009a91eb199SMark Brown 1010a91eb199SMark Brown static const struct soc_enum linel_enum = 1011a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 1, 2, out_mux_text); 1012a91eb199SMark Brown 1013a91eb199SMark Brown static const struct snd_kcontrol_new linel_mux = 1014a91eb199SMark Brown SOC_DAPM_ENUM("LINEL Mux", linel_enum); 1015a91eb199SMark Brown 1016a91eb199SMark Brown static const struct soc_enum liner_enum = 1017a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 0, 2, out_mux_text); 1018a91eb199SMark Brown 1019a91eb199SMark Brown static const struct snd_kcontrol_new liner_mux = 1020a91eb199SMark Brown SOC_DAPM_ENUM("LINEL Mux", liner_enum); 1021a91eb199SMark Brown 1022a91eb199SMark Brown static const char *sidetone_text[] = { 1023a91eb199SMark Brown "None", "Left", "Right" 1024a91eb199SMark Brown }; 1025a91eb199SMark Brown 1026a91eb199SMark Brown static const struct soc_enum dacl_sidetone_enum = 1027a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DAC_DIGITAL_0, 2, 3, sidetone_text); 1028a91eb199SMark Brown 1029a91eb199SMark Brown static const struct snd_kcontrol_new dacl_sidetone_mux = 1030a91eb199SMark Brown SOC_DAPM_ENUM("Left Sidetone Mux", dacl_sidetone_enum); 1031a91eb199SMark Brown 1032a91eb199SMark Brown static const struct soc_enum dacr_sidetone_enum = 1033a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DAC_DIGITAL_0, 0, 3, sidetone_text); 1034a91eb199SMark Brown 1035a91eb199SMark Brown static const struct snd_kcontrol_new dacr_sidetone_mux = 1036a91eb199SMark Brown SOC_DAPM_ENUM("Right Sidetone Mux", dacr_sidetone_enum); 1037a91eb199SMark Brown 1038a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dapm_widgets[] = { 1039a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Class G", WM8904_CLASS_W_0, 0, 1, NULL, 0), 1040a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1041a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1042a91eb199SMark Brown 1043a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &dacl_sidetone_mux), 1044a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &dacr_sidetone_mux), 1045a91eb199SMark Brown 1046a91eb199SMark Brown SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), 1047a91eb199SMark Brown SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), 1048a91eb199SMark Brown SND_SOC_DAPM_MUX("LINEL Mux", SND_SOC_NOPM, 0, 0, &linel_mux), 1049a91eb199SMark Brown SND_SOC_DAPM_MUX("LINER Mux", SND_SOC_NOPM, 0, 0, &liner_mux), 1050a91eb199SMark Brown }; 1051a91eb199SMark Brown 1052a91eb199SMark Brown static const struct snd_soc_dapm_route core_intercon[] = { 1053a91eb199SMark Brown { "CLK_DSP", NULL, "SYSCLK" }, 1054a91eb199SMark Brown { "TOCLK", NULL, "SYSCLK" }, 1055a91eb199SMark Brown }; 1056a91eb199SMark Brown 1057a91eb199SMark Brown static const struct snd_soc_dapm_route adc_intercon[] = { 1058a91eb199SMark Brown { "Left Capture Mux", "IN1L", "IN1L" }, 1059a91eb199SMark Brown { "Left Capture Mux", "IN2L", "IN2L" }, 1060a91eb199SMark Brown { "Left Capture Mux", "IN3L", "IN3L" }, 1061a91eb199SMark Brown 1062a91eb199SMark Brown { "Left Capture Inverting Mux", "IN1L", "IN1L" }, 1063a91eb199SMark Brown { "Left Capture Inverting Mux", "IN2L", "IN2L" }, 1064a91eb199SMark Brown { "Left Capture Inverting Mux", "IN3L", "IN3L" }, 1065a91eb199SMark Brown 1066a91eb199SMark Brown { "Right Capture Mux", "IN1R", "IN1R" }, 1067a91eb199SMark Brown { "Right Capture Mux", "IN2R", "IN2R" }, 1068a91eb199SMark Brown { "Right Capture Mux", "IN3R", "IN3R" }, 1069a91eb199SMark Brown 1070a91eb199SMark Brown { "Right Capture Inverting Mux", "IN1R", "IN1R" }, 1071a91eb199SMark Brown { "Right Capture Inverting Mux", "IN2R", "IN2R" }, 1072a91eb199SMark Brown { "Right Capture Inverting Mux", "IN3R", "IN3R" }, 1073a91eb199SMark Brown 1074a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Mux" }, 1075a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Inverting Mux" }, 1076a91eb199SMark Brown 1077a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Mux" }, 1078a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Inverting Mux" }, 1079a91eb199SMark Brown 1080a91eb199SMark Brown { "AIFOUTL", "Left", "ADCL" }, 1081a91eb199SMark Brown { "AIFOUTL", "Right", "ADCR" }, 1082a91eb199SMark Brown { "AIFOUTR", "Left", "ADCL" }, 1083a91eb199SMark Brown { "AIFOUTR", "Right", "ADCR" }, 1084a91eb199SMark Brown 1085a91eb199SMark Brown { "ADCL", NULL, "CLK_DSP" }, 1086a91eb199SMark Brown { "ADCL", NULL, "Left Capture PGA" }, 1087a91eb199SMark Brown 1088a91eb199SMark Brown { "ADCR", NULL, "CLK_DSP" }, 1089a91eb199SMark Brown { "ADCR", NULL, "Right Capture PGA" }, 1090a91eb199SMark Brown }; 1091a91eb199SMark Brown 1092a91eb199SMark Brown static const struct snd_soc_dapm_route dac_intercon[] = { 1093a91eb199SMark Brown { "DACL", "Right", "AIFINR" }, 1094a91eb199SMark Brown { "DACL", "Left", "AIFINL" }, 1095a91eb199SMark Brown { "DACL", NULL, "CLK_DSP" }, 1096a91eb199SMark Brown 1097a91eb199SMark Brown { "DACR", "Right", "AIFINR" }, 1098a91eb199SMark Brown { "DACR", "Left", "AIFINL" }, 1099a91eb199SMark Brown { "DACR", NULL, "CLK_DSP" }, 1100a91eb199SMark Brown 1101a91eb199SMark Brown { "Charge pump", NULL, "SYSCLK" }, 1102a91eb199SMark Brown 1103a91eb199SMark Brown { "Headphone Output", NULL, "HPL PGA" }, 1104a91eb199SMark Brown { "Headphone Output", NULL, "HPR PGA" }, 1105a91eb199SMark Brown { "Headphone Output", NULL, "Charge pump" }, 1106a91eb199SMark Brown { "Headphone Output", NULL, "TOCLK" }, 1107a91eb199SMark Brown 1108a91eb199SMark Brown { "Line Output", NULL, "LINEL PGA" }, 1109a91eb199SMark Brown { "Line Output", NULL, "LINER PGA" }, 1110a91eb199SMark Brown { "Line Output", NULL, "Charge pump" }, 1111a91eb199SMark Brown { "Line Output", NULL, "TOCLK" }, 1112a91eb199SMark Brown 1113a91eb199SMark Brown { "HPOUTL", NULL, "Headphone Output" }, 1114a91eb199SMark Brown { "HPOUTR", NULL, "Headphone Output" }, 1115a91eb199SMark Brown 1116a91eb199SMark Brown { "LINEOUTL", NULL, "Line Output" }, 1117a91eb199SMark Brown { "LINEOUTR", NULL, "Line Output" }, 1118a91eb199SMark Brown }; 1119a91eb199SMark Brown 1120a91eb199SMark Brown static const struct snd_soc_dapm_route wm8904_intercon[] = { 1121a91eb199SMark Brown { "Left Sidetone", "Left", "ADCL" }, 1122a91eb199SMark Brown { "Left Sidetone", "Right", "ADCR" }, 1123a91eb199SMark Brown { "DACL", NULL, "Left Sidetone" }, 1124a91eb199SMark Brown 1125a91eb199SMark Brown { "Right Sidetone", "Left", "ADCL" }, 1126a91eb199SMark Brown { "Right Sidetone", "Right", "ADCR" }, 1127a91eb199SMark Brown { "DACR", NULL, "Right Sidetone" }, 1128a91eb199SMark Brown 1129a91eb199SMark Brown { "Left Bypass", NULL, "Class G" }, 1130a91eb199SMark Brown { "Left Bypass", NULL, "Left Capture PGA" }, 1131a91eb199SMark Brown 1132a91eb199SMark Brown { "Right Bypass", NULL, "Class G" }, 1133a91eb199SMark Brown { "Right Bypass", NULL, "Right Capture PGA" }, 1134a91eb199SMark Brown 1135a91eb199SMark Brown { "HPL Mux", "DAC", "DACL" }, 1136a91eb199SMark Brown { "HPL Mux", "Bypass", "Left Bypass" }, 1137a91eb199SMark Brown 1138a91eb199SMark Brown { "HPR Mux", "DAC", "DACR" }, 1139a91eb199SMark Brown { "HPR Mux", "Bypass", "Right Bypass" }, 1140a91eb199SMark Brown 1141a91eb199SMark Brown { "LINEL Mux", "DAC", "DACL" }, 1142a91eb199SMark Brown { "LINEL Mux", "Bypass", "Left Bypass" }, 1143a91eb199SMark Brown 1144a91eb199SMark Brown { "LINER Mux", "DAC", "DACR" }, 1145a91eb199SMark Brown { "LINER Mux", "Bypass", "Right Bypass" }, 1146a91eb199SMark Brown 1147a91eb199SMark Brown { "HPL PGA", NULL, "HPL Mux" }, 1148a91eb199SMark Brown { "HPR PGA", NULL, "HPR Mux" }, 1149a91eb199SMark Brown 1150a91eb199SMark Brown { "LINEL PGA", NULL, "LINEL Mux" }, 1151a91eb199SMark Brown { "LINER PGA", NULL, "LINER Mux" }, 1152a91eb199SMark Brown }; 1153a91eb199SMark Brown 11548c126474SMark Brown static const struct snd_soc_dapm_route wm8912_intercon[] = { 11558c126474SMark Brown { "HPL PGA", NULL, "DACL" }, 11568c126474SMark Brown { "HPR PGA", NULL, "DACR" }, 11578c126474SMark Brown 11588c126474SMark Brown { "LINEL PGA", NULL, "DACL" }, 11598c126474SMark Brown { "LINER PGA", NULL, "DACR" }, 11608c126474SMark Brown }; 11618c126474SMark Brown 1162a91eb199SMark Brown static int wm8904_add_widgets(struct snd_soc_codec *codec) 1163a91eb199SMark Brown { 1164b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1165ce6120ccSLiam Girdwood struct snd_soc_dapm_context *dapm = &codec->dapm; 11668c126474SMark Brown 1167ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_core_dapm_widgets, 11688c126474SMark Brown ARRAY_SIZE(wm8904_core_dapm_widgets)); 1169ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, core_intercon, 11708c126474SMark Brown ARRAY_SIZE(core_intercon)); 11718c126474SMark Brown 11728c126474SMark Brown switch (wm8904->devtype) { 11738c126474SMark Brown case WM8904: 1174022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_adc_snd_controls, 1175a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_snd_controls)); 1176022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_dac_snd_controls, 1177a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_snd_controls)); 1178022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_snd_controls, 1179a91eb199SMark Brown ARRAY_SIZE(wm8904_snd_controls)); 1180a91eb199SMark Brown 1181ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_adc_dapm_widgets, 1182a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_dapm_widgets)); 1183ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_dac_dapm_widgets, 1184a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_dapm_widgets)); 1185ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_dapm_widgets, 1186a91eb199SMark Brown ARRAY_SIZE(wm8904_dapm_widgets)); 1187a91eb199SMark Brown 1188ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, core_intercon, 1189a91eb199SMark Brown ARRAY_SIZE(core_intercon)); 1190ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, adc_intercon, 11918c126474SMark Brown ARRAY_SIZE(adc_intercon)); 1192ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, dac_intercon, 11938c126474SMark Brown ARRAY_SIZE(dac_intercon)); 1194ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, wm8904_intercon, 1195a91eb199SMark Brown ARRAY_SIZE(wm8904_intercon)); 11968c126474SMark Brown break; 11978c126474SMark Brown 11988c126474SMark Brown case WM8912: 1199022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_dac_snd_controls, 12008c126474SMark Brown ARRAY_SIZE(wm8904_dac_snd_controls)); 12018c126474SMark Brown 1202ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_dac_dapm_widgets, 12038c126474SMark Brown ARRAY_SIZE(wm8904_dac_dapm_widgets)); 12048c126474SMark Brown 1205ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, dac_intercon, 12068c126474SMark Brown ARRAY_SIZE(dac_intercon)); 1207ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, wm8912_intercon, 12088c126474SMark Brown ARRAY_SIZE(wm8912_intercon)); 12098c126474SMark Brown break; 12108c126474SMark Brown } 1211a91eb199SMark Brown 1212ce6120ccSLiam Girdwood snd_soc_dapm_new_widgets(dapm); 1213a91eb199SMark Brown return 0; 1214a91eb199SMark Brown } 1215a91eb199SMark Brown 1216a91eb199SMark Brown static struct { 1217a91eb199SMark Brown int ratio; 1218a91eb199SMark Brown unsigned int clk_sys_rate; 1219a91eb199SMark Brown } clk_sys_rates[] = { 1220a91eb199SMark Brown { 64, 0 }, 1221a91eb199SMark Brown { 128, 1 }, 1222a91eb199SMark Brown { 192, 2 }, 1223a91eb199SMark Brown { 256, 3 }, 1224a91eb199SMark Brown { 384, 4 }, 1225a91eb199SMark Brown { 512, 5 }, 1226a91eb199SMark Brown { 786, 6 }, 1227a91eb199SMark Brown { 1024, 7 }, 1228a91eb199SMark Brown { 1408, 8 }, 1229a91eb199SMark Brown { 1536, 9 }, 1230a91eb199SMark Brown }; 1231a91eb199SMark Brown 1232a91eb199SMark Brown static struct { 1233a91eb199SMark Brown int rate; 1234a91eb199SMark Brown int sample_rate; 1235a91eb199SMark Brown } sample_rates[] = { 1236a91eb199SMark Brown { 8000, 0 }, 1237a91eb199SMark Brown { 11025, 1 }, 1238a91eb199SMark Brown { 12000, 1 }, 1239a91eb199SMark Brown { 16000, 2 }, 1240a91eb199SMark Brown { 22050, 3 }, 1241a91eb199SMark Brown { 24000, 3 }, 1242a91eb199SMark Brown { 32000, 4 }, 1243a91eb199SMark Brown { 44100, 5 }, 1244a91eb199SMark Brown { 48000, 5 }, 1245a91eb199SMark Brown }; 1246a91eb199SMark Brown 1247a91eb199SMark Brown static struct { 1248a91eb199SMark Brown int div; /* *10 due to .5s */ 1249a91eb199SMark Brown int bclk_div; 1250a91eb199SMark Brown } bclk_divs[] = { 1251a91eb199SMark Brown { 10, 0 }, 1252a91eb199SMark Brown { 15, 1 }, 1253a91eb199SMark Brown { 20, 2 }, 1254a91eb199SMark Brown { 30, 3 }, 1255a91eb199SMark Brown { 40, 4 }, 1256a91eb199SMark Brown { 50, 5 }, 1257a91eb199SMark Brown { 55, 6 }, 1258a91eb199SMark Brown { 60, 7 }, 1259a91eb199SMark Brown { 80, 8 }, 1260a91eb199SMark Brown { 100, 9 }, 1261a91eb199SMark Brown { 110, 10 }, 1262a91eb199SMark Brown { 120, 11 }, 1263a91eb199SMark Brown { 160, 12 }, 1264a91eb199SMark Brown { 200, 13 }, 1265a91eb199SMark Brown { 220, 14 }, 1266a91eb199SMark Brown { 240, 16 }, 1267a91eb199SMark Brown { 200, 17 }, 1268a91eb199SMark Brown { 320, 18 }, 1269a91eb199SMark Brown { 440, 19 }, 1270a91eb199SMark Brown { 480, 20 }, 1271a91eb199SMark Brown }; 1272a91eb199SMark Brown 1273a91eb199SMark Brown 1274a91eb199SMark Brown static int wm8904_hw_params(struct snd_pcm_substream *substream, 1275a91eb199SMark Brown struct snd_pcm_hw_params *params, 1276a91eb199SMark Brown struct snd_soc_dai *dai) 1277a91eb199SMark Brown { 1278a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1279b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1280a91eb199SMark Brown int ret, i, best, best_val, cur_val; 1281a91eb199SMark Brown unsigned int aif1 = 0; 1282a91eb199SMark Brown unsigned int aif2 = 0; 1283a91eb199SMark Brown unsigned int aif3 = 0; 1284a91eb199SMark Brown unsigned int clock1 = 0; 1285a91eb199SMark Brown unsigned int dac_digital1 = 0; 1286a91eb199SMark Brown 1287a91eb199SMark Brown /* What BCLK do we need? */ 1288a91eb199SMark Brown wm8904->fs = params_rate(params); 1289a91eb199SMark Brown if (wm8904->tdm_slots) { 1290a91eb199SMark Brown dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n", 1291a91eb199SMark Brown wm8904->tdm_slots, wm8904->tdm_width); 1292a91eb199SMark Brown wm8904->bclk = snd_soc_calc_bclk(wm8904->fs, 1293a91eb199SMark Brown wm8904->tdm_width, 2, 1294a91eb199SMark Brown wm8904->tdm_slots); 1295a91eb199SMark Brown } else { 1296a91eb199SMark Brown wm8904->bclk = snd_soc_params_to_bclk(params); 1297a91eb199SMark Brown } 1298a91eb199SMark Brown 129956927eb0SMark Brown switch (params_format(params)) { 130056927eb0SMark Brown case SNDRV_PCM_FORMAT_S16_LE: 130156927eb0SMark Brown break; 130256927eb0SMark Brown case SNDRV_PCM_FORMAT_S20_3LE: 130356927eb0SMark Brown aif1 |= 0x40; 130456927eb0SMark Brown break; 130556927eb0SMark Brown case SNDRV_PCM_FORMAT_S24_LE: 130656927eb0SMark Brown aif1 |= 0x80; 130756927eb0SMark Brown break; 130856927eb0SMark Brown case SNDRV_PCM_FORMAT_S32_LE: 130956927eb0SMark Brown aif1 |= 0xc0; 131056927eb0SMark Brown break; 131156927eb0SMark Brown default: 131256927eb0SMark Brown return -EINVAL; 131356927eb0SMark Brown } 131456927eb0SMark Brown 131556927eb0SMark Brown 1316a91eb199SMark Brown dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8904->bclk); 1317a91eb199SMark Brown 1318a91eb199SMark Brown ret = wm8904_configure_clocking(codec); 1319a91eb199SMark Brown if (ret != 0) 1320a91eb199SMark Brown return ret; 1321a91eb199SMark Brown 1322a91eb199SMark Brown /* Select nearest CLK_SYS_RATE */ 1323a91eb199SMark Brown best = 0; 1324a91eb199SMark Brown best_val = abs((wm8904->sysclk_rate / clk_sys_rates[0].ratio) 1325a91eb199SMark Brown - wm8904->fs); 1326a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) { 1327a91eb199SMark Brown cur_val = abs((wm8904->sysclk_rate / 1328ef995e3aSJoe Perches clk_sys_rates[i].ratio) - wm8904->fs); 1329a91eb199SMark Brown if (cur_val < best_val) { 1330a91eb199SMark Brown best = i; 1331a91eb199SMark Brown best_val = cur_val; 1332a91eb199SMark Brown } 1333a91eb199SMark Brown } 1334a91eb199SMark Brown dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n", 1335a91eb199SMark Brown clk_sys_rates[best].ratio); 1336a91eb199SMark Brown clock1 |= (clk_sys_rates[best].clk_sys_rate 1337a91eb199SMark Brown << WM8904_CLK_SYS_RATE_SHIFT); 1338a91eb199SMark Brown 1339a91eb199SMark Brown /* SAMPLE_RATE */ 1340a91eb199SMark Brown best = 0; 1341a91eb199SMark Brown best_val = abs(wm8904->fs - sample_rates[0].rate); 1342a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 1343a91eb199SMark Brown /* Closest match */ 1344a91eb199SMark Brown cur_val = abs(wm8904->fs - sample_rates[i].rate); 1345a91eb199SMark Brown if (cur_val < best_val) { 1346a91eb199SMark Brown best = i; 1347a91eb199SMark Brown best_val = cur_val; 1348a91eb199SMark Brown } 1349a91eb199SMark Brown } 1350a91eb199SMark Brown dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n", 1351a91eb199SMark Brown sample_rates[best].rate); 1352a91eb199SMark Brown clock1 |= (sample_rates[best].sample_rate 1353a91eb199SMark Brown << WM8904_SAMPLE_RATE_SHIFT); 1354a91eb199SMark Brown 1355a91eb199SMark Brown /* Enable sloping stopband filter for low sample rates */ 1356a91eb199SMark Brown if (wm8904->fs <= 24000) 1357a91eb199SMark Brown dac_digital1 |= WM8904_DAC_SB_FILT; 1358a91eb199SMark Brown 1359a91eb199SMark Brown /* BCLK_DIV */ 1360a91eb199SMark Brown best = 0; 1361a91eb199SMark Brown best_val = INT_MAX; 1362a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { 1363a91eb199SMark Brown cur_val = ((wm8904->sysclk_rate * 10) / bclk_divs[i].div) 1364a91eb199SMark Brown - wm8904->bclk; 1365a91eb199SMark Brown if (cur_val < 0) /* Table is sorted */ 1366a91eb199SMark Brown break; 1367a91eb199SMark Brown if (cur_val < best_val) { 1368a91eb199SMark Brown best = i; 1369a91eb199SMark Brown best_val = cur_val; 1370a91eb199SMark Brown } 1371a91eb199SMark Brown } 1372a91eb199SMark Brown wm8904->bclk = (wm8904->sysclk_rate * 10) / bclk_divs[best].div; 1373a91eb199SMark Brown dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n", 1374a91eb199SMark Brown bclk_divs[best].div, wm8904->bclk); 1375a91eb199SMark Brown aif2 |= bclk_divs[best].bclk_div; 1376a91eb199SMark Brown 1377a91eb199SMark Brown /* LRCLK is a simple fraction of BCLK */ 1378a91eb199SMark Brown dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8904->bclk / wm8904->fs); 1379a91eb199SMark Brown aif3 |= wm8904->bclk / wm8904->fs; 1380a91eb199SMark Brown 1381a91eb199SMark Brown /* Apply the settings */ 1382a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 1383a91eb199SMark Brown WM8904_DAC_SB_FILT, dac_digital1); 1384a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1385a91eb199SMark Brown WM8904_AIF_WL_MASK, aif1); 1386a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_2, 1387a91eb199SMark Brown WM8904_BCLK_DIV_MASK, aif2); 1388a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1389a91eb199SMark Brown WM8904_LRCLK_RATE_MASK, aif3); 1390a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_1, 1391a91eb199SMark Brown WM8904_SAMPLE_RATE_MASK | 1392a91eb199SMark Brown WM8904_CLK_SYS_RATE_MASK, clock1); 1393a91eb199SMark Brown 1394a91eb199SMark Brown /* Update filters for the new settings */ 1395a91eb199SMark Brown wm8904_set_retune_mobile(codec); 1396a91eb199SMark Brown wm8904_set_deemph(codec); 1397a91eb199SMark Brown 1398a91eb199SMark Brown return 0; 1399a91eb199SMark Brown } 1400a91eb199SMark Brown 1401a91eb199SMark Brown 1402a91eb199SMark Brown static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id, 1403a91eb199SMark Brown unsigned int freq, int dir) 1404a91eb199SMark Brown { 1405a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1406b2c812e2SMark Brown struct wm8904_priv *priv = snd_soc_codec_get_drvdata(codec); 1407a91eb199SMark Brown 1408a91eb199SMark Brown switch (clk_id) { 1409a91eb199SMark Brown case WM8904_CLK_MCLK: 1410a91eb199SMark Brown priv->sysclk_src = clk_id; 1411a91eb199SMark Brown priv->mclk_rate = freq; 1412a91eb199SMark Brown break; 1413a91eb199SMark Brown 1414a91eb199SMark Brown case WM8904_CLK_FLL: 1415a91eb199SMark Brown priv->sysclk_src = clk_id; 1416a91eb199SMark Brown break; 1417a91eb199SMark Brown 1418a91eb199SMark Brown default: 1419a91eb199SMark Brown return -EINVAL; 1420a91eb199SMark Brown } 1421a91eb199SMark Brown 1422a91eb199SMark Brown dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq); 1423a91eb199SMark Brown 1424a91eb199SMark Brown wm8904_configure_clocking(codec); 1425a91eb199SMark Brown 1426a91eb199SMark Brown return 0; 1427a91eb199SMark Brown } 1428a91eb199SMark Brown 1429a91eb199SMark Brown static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1430a91eb199SMark Brown { 1431a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1432a91eb199SMark Brown unsigned int aif1 = 0; 1433a91eb199SMark Brown unsigned int aif3 = 0; 1434a91eb199SMark Brown 1435a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1436a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 1437a91eb199SMark Brown break; 1438a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFM: 1439a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1440a91eb199SMark Brown break; 1441a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFS: 1442a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1443a91eb199SMark Brown break; 1444a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 1445a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1446a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1447a91eb199SMark Brown break; 1448a91eb199SMark Brown default: 1449a91eb199SMark Brown return -EINVAL; 1450a91eb199SMark Brown } 1451a91eb199SMark Brown 1452a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1453a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1454a91eb199SMark Brown aif1 |= WM8904_AIF_LRCLK_INV; 1455a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1456a91eb199SMark Brown aif1 |= 0x3; 1457a91eb199SMark Brown break; 1458a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1459a91eb199SMark Brown aif1 |= 0x2; 1460a91eb199SMark Brown break; 1461a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1462a91eb199SMark Brown break; 1463a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1464a91eb199SMark Brown aif1 |= 0x1; 1465a91eb199SMark Brown break; 1466a91eb199SMark Brown default: 1467a91eb199SMark Brown return -EINVAL; 1468a91eb199SMark Brown } 1469a91eb199SMark Brown 1470a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1471a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1472a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1473a91eb199SMark Brown /* frame inversion not valid for DSP modes */ 1474a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1475a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1476a91eb199SMark Brown break; 1477a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1478a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1479a91eb199SMark Brown break; 1480a91eb199SMark Brown default: 1481a91eb199SMark Brown return -EINVAL; 1482a91eb199SMark Brown } 1483a91eb199SMark Brown break; 1484a91eb199SMark Brown 1485a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1486a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1487a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1488a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1489a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1490a91eb199SMark Brown break; 1491a91eb199SMark Brown case SND_SOC_DAIFMT_IB_IF: 1492a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV; 1493a91eb199SMark Brown break; 1494a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1495a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1496a91eb199SMark Brown break; 1497a91eb199SMark Brown case SND_SOC_DAIFMT_NB_IF: 1498a91eb199SMark Brown aif1 |= WM8904_AIF_LRCLK_INV; 1499a91eb199SMark Brown break; 1500a91eb199SMark Brown default: 1501a91eb199SMark Brown return -EINVAL; 1502a91eb199SMark Brown } 1503a91eb199SMark Brown break; 1504a91eb199SMark Brown default: 1505a91eb199SMark Brown return -EINVAL; 1506a91eb199SMark Brown } 1507a91eb199SMark Brown 1508a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1509a91eb199SMark Brown WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV | 1510a91eb199SMark Brown WM8904_AIF_FMT_MASK | WM8904_BCLK_DIR, aif1); 1511a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1512a91eb199SMark Brown WM8904_LRCLK_DIR, aif3); 1513a91eb199SMark Brown 1514a91eb199SMark Brown return 0; 1515a91eb199SMark Brown } 1516a91eb199SMark Brown 1517a91eb199SMark Brown 1518a91eb199SMark Brown static int wm8904_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 1519a91eb199SMark Brown unsigned int rx_mask, int slots, int slot_width) 1520a91eb199SMark Brown { 1521a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1522b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1523a91eb199SMark Brown int aif1 = 0; 1524a91eb199SMark Brown 1525a91eb199SMark Brown /* Don't need to validate anything if we're turning off TDM */ 1526a91eb199SMark Brown if (slots == 0) 1527a91eb199SMark Brown goto out; 1528a91eb199SMark Brown 1529a91eb199SMark Brown /* Note that we allow configurations we can't handle ourselves - 1530a91eb199SMark Brown * for example, we can generate clocks for slots 2 and up even if 1531a91eb199SMark Brown * we can't use those slots ourselves. 1532a91eb199SMark Brown */ 1533a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM | WM8904_AIFDAC_TDM; 1534a91eb199SMark Brown 1535a91eb199SMark Brown switch (rx_mask) { 1536a91eb199SMark Brown case 3: 1537a91eb199SMark Brown break; 1538a91eb199SMark Brown case 0xc: 1539a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM_CHAN; 1540a91eb199SMark Brown break; 1541a91eb199SMark Brown default: 1542a91eb199SMark Brown return -EINVAL; 1543a91eb199SMark Brown } 1544a91eb199SMark Brown 1545a91eb199SMark Brown 1546a91eb199SMark Brown switch (tx_mask) { 1547a91eb199SMark Brown case 3: 1548a91eb199SMark Brown break; 1549a91eb199SMark Brown case 0xc: 1550a91eb199SMark Brown aif1 |= WM8904_AIFDAC_TDM_CHAN; 1551a91eb199SMark Brown break; 1552a91eb199SMark Brown default: 1553a91eb199SMark Brown return -EINVAL; 1554a91eb199SMark Brown } 1555a91eb199SMark Brown 1556a91eb199SMark Brown out: 1557a91eb199SMark Brown wm8904->tdm_width = slot_width; 1558a91eb199SMark Brown wm8904->tdm_slots = slots / 2; 1559a91eb199SMark Brown 1560a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1561a91eb199SMark Brown WM8904_AIFADC_TDM | WM8904_AIFADC_TDM_CHAN | 1562a91eb199SMark Brown WM8904_AIFDAC_TDM | WM8904_AIFDAC_TDM_CHAN, aif1); 1563a91eb199SMark Brown 1564a91eb199SMark Brown return 0; 1565a91eb199SMark Brown } 1566a91eb199SMark Brown 1567a91eb199SMark Brown struct _fll_div { 1568a91eb199SMark Brown u16 fll_fratio; 1569a91eb199SMark Brown u16 fll_outdiv; 1570a91eb199SMark Brown u16 fll_clk_ref_div; 1571a91eb199SMark Brown u16 n; 1572a91eb199SMark Brown u16 k; 1573a91eb199SMark Brown }; 1574a91eb199SMark Brown 1575a91eb199SMark Brown /* The size in bits of the FLL divide multiplied by 10 1576a91eb199SMark Brown * to allow rounding later */ 1577a91eb199SMark Brown #define FIXED_FLL_SIZE ((1 << 16) * 10) 1578a91eb199SMark Brown 1579a91eb199SMark Brown static struct { 1580a91eb199SMark Brown unsigned int min; 1581a91eb199SMark Brown unsigned int max; 1582a91eb199SMark Brown u16 fll_fratio; 1583a91eb199SMark Brown int ratio; 1584a91eb199SMark Brown } fll_fratios[] = { 1585a91eb199SMark Brown { 0, 64000, 4, 16 }, 1586a91eb199SMark Brown { 64000, 128000, 3, 8 }, 1587a91eb199SMark Brown { 128000, 256000, 2, 4 }, 1588a91eb199SMark Brown { 256000, 1000000, 1, 2 }, 1589a91eb199SMark Brown { 1000000, 13500000, 0, 1 }, 1590a91eb199SMark Brown }; 1591a91eb199SMark Brown 1592a91eb199SMark Brown static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, 1593a91eb199SMark Brown unsigned int Fout) 1594a91eb199SMark Brown { 1595a91eb199SMark Brown u64 Kpart; 1596a91eb199SMark Brown unsigned int K, Ndiv, Nmod, target; 1597a91eb199SMark Brown unsigned int div; 1598a91eb199SMark Brown int i; 1599a91eb199SMark Brown 1600a91eb199SMark Brown /* Fref must be <=13.5MHz */ 1601a91eb199SMark Brown div = 1; 1602a91eb199SMark Brown fll_div->fll_clk_ref_div = 0; 1603a91eb199SMark Brown while ((Fref / div) > 13500000) { 1604a91eb199SMark Brown div *= 2; 1605a91eb199SMark Brown fll_div->fll_clk_ref_div++; 1606a91eb199SMark Brown 1607a91eb199SMark Brown if (div > 8) { 1608a91eb199SMark Brown pr_err("Can't scale %dMHz input down to <=13.5MHz\n", 1609a91eb199SMark Brown Fref); 1610a91eb199SMark Brown return -EINVAL; 1611a91eb199SMark Brown } 1612a91eb199SMark Brown } 1613a91eb199SMark Brown 1614a91eb199SMark Brown pr_debug("Fref=%u Fout=%u\n", Fref, Fout); 1615a91eb199SMark Brown 1616a91eb199SMark Brown /* Apply the division for our remaining calculations */ 1617a91eb199SMark Brown Fref /= div; 1618a91eb199SMark Brown 1619a91eb199SMark Brown /* Fvco should be 90-100MHz; don't check the upper bound */ 1620a91eb199SMark Brown div = 4; 1621a91eb199SMark Brown while (Fout * div < 90000000) { 1622a91eb199SMark Brown div++; 1623a91eb199SMark Brown if (div > 64) { 1624a91eb199SMark Brown pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n", 1625a91eb199SMark Brown Fout); 1626a91eb199SMark Brown return -EINVAL; 1627a91eb199SMark Brown } 1628a91eb199SMark Brown } 1629a91eb199SMark Brown target = Fout * div; 1630a91eb199SMark Brown fll_div->fll_outdiv = div - 1; 1631a91eb199SMark Brown 1632a91eb199SMark Brown pr_debug("Fvco=%dHz\n", target); 1633a91eb199SMark Brown 163425985edcSLucas De Marchi /* Find an appropriate FLL_FRATIO and factor it out of the target */ 1635a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { 1636a91eb199SMark Brown if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { 1637a91eb199SMark Brown fll_div->fll_fratio = fll_fratios[i].fll_fratio; 1638a91eb199SMark Brown target /= fll_fratios[i].ratio; 1639a91eb199SMark Brown break; 1640a91eb199SMark Brown } 1641a91eb199SMark Brown } 1642a91eb199SMark Brown if (i == ARRAY_SIZE(fll_fratios)) { 1643a91eb199SMark Brown pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref); 1644a91eb199SMark Brown return -EINVAL; 1645a91eb199SMark Brown } 1646a91eb199SMark Brown 1647a91eb199SMark Brown /* Now, calculate N.K */ 1648a91eb199SMark Brown Ndiv = target / Fref; 1649a91eb199SMark Brown 1650a91eb199SMark Brown fll_div->n = Ndiv; 1651a91eb199SMark Brown Nmod = target % Fref; 1652a91eb199SMark Brown pr_debug("Nmod=%d\n", Nmod); 1653a91eb199SMark Brown 1654a91eb199SMark Brown /* Calculate fractional part - scale up so we can round. */ 1655a91eb199SMark Brown Kpart = FIXED_FLL_SIZE * (long long)Nmod; 1656a91eb199SMark Brown 1657a91eb199SMark Brown do_div(Kpart, Fref); 1658a91eb199SMark Brown 1659a91eb199SMark Brown K = Kpart & 0xFFFFFFFF; 1660a91eb199SMark Brown 1661a91eb199SMark Brown if ((K % 10) >= 5) 1662a91eb199SMark Brown K += 5; 1663a91eb199SMark Brown 1664a91eb199SMark Brown /* Move down to proper range now rounding is done */ 1665a91eb199SMark Brown fll_div->k = K / 10; 1666a91eb199SMark Brown 1667a91eb199SMark Brown pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n", 1668a91eb199SMark Brown fll_div->n, fll_div->k, 1669a91eb199SMark Brown fll_div->fll_fratio, fll_div->fll_outdiv, 1670a91eb199SMark Brown fll_div->fll_clk_ref_div); 1671a91eb199SMark Brown 1672a91eb199SMark Brown return 0; 1673a91eb199SMark Brown } 1674a91eb199SMark Brown 1675a91eb199SMark Brown static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source, 1676a91eb199SMark Brown unsigned int Fref, unsigned int Fout) 1677a91eb199SMark Brown { 1678a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1679b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1680a91eb199SMark Brown struct _fll_div fll_div; 1681a91eb199SMark Brown int ret, val; 1682a91eb199SMark Brown int clock2, fll1; 1683a91eb199SMark Brown 1684a91eb199SMark Brown /* Any change? */ 1685a91eb199SMark Brown if (source == wm8904->fll_src && Fref == wm8904->fll_fref && 1686a91eb199SMark Brown Fout == wm8904->fll_fout) 1687a91eb199SMark Brown return 0; 1688a91eb199SMark Brown 168918240b67SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 169018240b67SMark Brown 1691a91eb199SMark Brown if (Fout == 0) { 1692a91eb199SMark Brown dev_dbg(codec->dev, "FLL disabled\n"); 1693a91eb199SMark Brown 1694a91eb199SMark Brown wm8904->fll_fref = 0; 1695a91eb199SMark Brown wm8904->fll_fout = 0; 1696a91eb199SMark Brown 1697a91eb199SMark Brown /* Gate SYSCLK to avoid glitches */ 1698a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1699a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 1700a91eb199SMark Brown 1701a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1702a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 1703a91eb199SMark Brown 1704a91eb199SMark Brown goto out; 1705a91eb199SMark Brown } 1706a91eb199SMark Brown 1707a91eb199SMark Brown /* Validate the FLL ID */ 1708a91eb199SMark Brown switch (source) { 1709a91eb199SMark Brown case WM8904_FLL_MCLK: 1710a91eb199SMark Brown case WM8904_FLL_LRCLK: 1711a91eb199SMark Brown case WM8904_FLL_BCLK: 1712a91eb199SMark Brown ret = fll_factors(&fll_div, Fref, Fout); 1713a91eb199SMark Brown if (ret != 0) 1714a91eb199SMark Brown return ret; 1715a91eb199SMark Brown break; 1716a91eb199SMark Brown 1717a91eb199SMark Brown case WM8904_FLL_FREE_RUNNING: 1718a91eb199SMark Brown dev_dbg(codec->dev, "Using free running FLL\n"); 1719a91eb199SMark Brown /* Force 12MHz and output/4 for now */ 1720a91eb199SMark Brown Fout = 12000000; 1721a91eb199SMark Brown Fref = 12000000; 1722a91eb199SMark Brown 1723a91eb199SMark Brown memset(&fll_div, 0, sizeof(fll_div)); 1724a91eb199SMark Brown fll_div.fll_outdiv = 3; 1725a91eb199SMark Brown break; 1726a91eb199SMark Brown 1727a91eb199SMark Brown default: 1728a91eb199SMark Brown dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id); 1729a91eb199SMark Brown return -EINVAL; 1730a91eb199SMark Brown } 1731a91eb199SMark Brown 1732a91eb199SMark Brown /* Save current state then disable the FLL and SYSCLK to avoid 1733a91eb199SMark Brown * misclocking */ 1734a91eb199SMark Brown fll1 = snd_soc_read(codec, WM8904_FLL_CONTROL_1); 1735a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1736a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 1737a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1738a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 1739a91eb199SMark Brown 1740a91eb199SMark Brown /* Unlock forced oscilator control to switch it on/off */ 1741a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 1742a91eb199SMark Brown WM8904_USER_KEY, WM8904_USER_KEY); 1743a91eb199SMark Brown 1744a91eb199SMark Brown if (fll_id == WM8904_FLL_FREE_RUNNING) { 1745a91eb199SMark Brown val = WM8904_FLL_FRC_NCO; 1746a91eb199SMark Brown } else { 1747a91eb199SMark Brown val = 0; 1748a91eb199SMark Brown } 1749a91eb199SMark Brown 1750a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_NCO_TEST_1, WM8904_FLL_FRC_NCO, 1751a91eb199SMark Brown val); 1752a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 1753a91eb199SMark Brown WM8904_USER_KEY, 0); 1754a91eb199SMark Brown 1755a91eb199SMark Brown switch (fll_id) { 1756a91eb199SMark Brown case WM8904_FLL_MCLK: 1757a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1758a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 0); 1759a91eb199SMark Brown break; 1760a91eb199SMark Brown 1761a91eb199SMark Brown case WM8904_FLL_LRCLK: 1762a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1763a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 1); 1764a91eb199SMark Brown break; 1765a91eb199SMark Brown 1766a91eb199SMark Brown case WM8904_FLL_BCLK: 1767a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1768a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 2); 1769a91eb199SMark Brown break; 1770a91eb199SMark Brown } 1771a91eb199SMark Brown 1772a91eb199SMark Brown if (fll_div.k) 1773a91eb199SMark Brown val = WM8904_FLL_FRACN_ENA; 1774a91eb199SMark Brown else 1775a91eb199SMark Brown val = 0; 1776a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1777a91eb199SMark Brown WM8904_FLL_FRACN_ENA, val); 1778a91eb199SMark Brown 1779a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_2, 1780a91eb199SMark Brown WM8904_FLL_OUTDIV_MASK | WM8904_FLL_FRATIO_MASK, 1781a91eb199SMark Brown (fll_div.fll_outdiv << WM8904_FLL_OUTDIV_SHIFT) | 1782a91eb199SMark Brown (fll_div.fll_fratio << WM8904_FLL_FRATIO_SHIFT)); 1783a91eb199SMark Brown 1784a91eb199SMark Brown snd_soc_write(codec, WM8904_FLL_CONTROL_3, fll_div.k); 1785a91eb199SMark Brown 1786a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_4, WM8904_FLL_N_MASK, 1787a91eb199SMark Brown fll_div.n << WM8904_FLL_N_SHIFT); 1788a91eb199SMark Brown 1789a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1790a91eb199SMark Brown WM8904_FLL_CLK_REF_DIV_MASK, 1791a91eb199SMark Brown fll_div.fll_clk_ref_div 1792a91eb199SMark Brown << WM8904_FLL_CLK_REF_DIV_SHIFT); 1793a91eb199SMark Brown 1794a91eb199SMark Brown dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); 1795a91eb199SMark Brown 1796a91eb199SMark Brown wm8904->fll_fref = Fref; 1797a91eb199SMark Brown wm8904->fll_fout = Fout; 1798a91eb199SMark Brown wm8904->fll_src = source; 1799a91eb199SMark Brown 1800a91eb199SMark Brown /* Enable the FLL if it was previously active */ 1801a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1802a91eb199SMark Brown WM8904_FLL_OSC_ENA, fll1); 1803a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1804a91eb199SMark Brown WM8904_FLL_ENA, fll1); 1805a91eb199SMark Brown 1806a91eb199SMark Brown out: 1807a91eb199SMark Brown /* Reenable SYSCLK if it was previously active */ 1808a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1809a91eb199SMark Brown WM8904_CLK_SYS_ENA, clock2); 1810a91eb199SMark Brown 1811a91eb199SMark Brown return 0; 1812a91eb199SMark Brown } 1813a91eb199SMark Brown 1814a91eb199SMark Brown static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute) 1815a91eb199SMark Brown { 1816a91eb199SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1817a91eb199SMark Brown int val; 1818a91eb199SMark Brown 1819a91eb199SMark Brown if (mute) 1820a91eb199SMark Brown val = WM8904_DAC_MUTE; 1821a91eb199SMark Brown else 1822a91eb199SMark Brown val = 0; 1823a91eb199SMark Brown 1824a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, WM8904_DAC_MUTE, val); 1825a91eb199SMark Brown 1826a91eb199SMark Brown return 0; 1827a91eb199SMark Brown } 1828a91eb199SMark Brown 1829a91eb199SMark Brown static int wm8904_set_bias_level(struct snd_soc_codec *codec, 1830a91eb199SMark Brown enum snd_soc_bias_level level) 1831a91eb199SMark Brown { 1832b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1833c1334218SMark Brown int ret; 1834a91eb199SMark Brown 1835a91eb199SMark Brown switch (level) { 1836a91eb199SMark Brown case SND_SOC_BIAS_ON: 1837a91eb199SMark Brown break; 1838a91eb199SMark Brown 1839a91eb199SMark Brown case SND_SOC_BIAS_PREPARE: 1840a91eb199SMark Brown /* VMID resistance 2*50k */ 1841a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1842a91eb199SMark Brown WM8904_VMID_RES_MASK, 1843a91eb199SMark Brown 0x1 << WM8904_VMID_RES_SHIFT); 1844a91eb199SMark Brown 1845a91eb199SMark Brown /* Normal bias current */ 1846a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1847a91eb199SMark Brown WM8904_ISEL_MASK, 2 << WM8904_ISEL_SHIFT); 1848a91eb199SMark Brown break; 1849a91eb199SMark Brown 1850a91eb199SMark Brown case SND_SOC_BIAS_STANDBY: 1851ce6120ccSLiam Girdwood if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 1852a91eb199SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 1853a91eb199SMark Brown wm8904->supplies); 1854a91eb199SMark Brown if (ret != 0) { 1855a91eb199SMark Brown dev_err(codec->dev, 1856a91eb199SMark Brown "Failed to enable supplies: %d\n", 1857a91eb199SMark Brown ret); 1858a91eb199SMark Brown return ret; 1859a91eb199SMark Brown } 1860a91eb199SMark Brown 1861c1b88ee2SMark Brown regcache_cache_only(wm8904->regmap, false); 186284d0d831SMark Brown regcache_sync(wm8904->regmap); 1863a91eb199SMark Brown 1864a91eb199SMark Brown /* Enable bias */ 1865a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1866a91eb199SMark Brown WM8904_BIAS_ENA, WM8904_BIAS_ENA); 1867a91eb199SMark Brown 1868a91eb199SMark Brown /* Enable VMID, VMID buffering, 2*5k resistance */ 1869a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1870a91eb199SMark Brown WM8904_VMID_ENA | 1871a91eb199SMark Brown WM8904_VMID_RES_MASK, 1872a91eb199SMark Brown WM8904_VMID_ENA | 1873a91eb199SMark Brown 0x3 << WM8904_VMID_RES_SHIFT); 1874a91eb199SMark Brown 1875a91eb199SMark Brown /* Let VMID ramp */ 1876a91eb199SMark Brown msleep(1); 1877a91eb199SMark Brown } 1878a91eb199SMark Brown 1879a91eb199SMark Brown /* Maintain VMID with 2*250k */ 1880a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1881a91eb199SMark Brown WM8904_VMID_RES_MASK, 1882a91eb199SMark Brown 0x2 << WM8904_VMID_RES_SHIFT); 1883a91eb199SMark Brown 1884a91eb199SMark Brown /* Bias current *0.5 */ 1885a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1886a91eb199SMark Brown WM8904_ISEL_MASK, 0); 1887a91eb199SMark Brown break; 1888a91eb199SMark Brown 1889a91eb199SMark Brown case SND_SOC_BIAS_OFF: 1890a91eb199SMark Brown /* Turn off VMID */ 1891a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1892a91eb199SMark Brown WM8904_VMID_RES_MASK | WM8904_VMID_ENA, 0); 1893a91eb199SMark Brown 1894a91eb199SMark Brown /* Stop bias generation */ 1895a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1896a91eb199SMark Brown WM8904_BIAS_ENA, 0); 1897a91eb199SMark Brown 1898c1b88ee2SMark Brown regcache_cache_only(wm8904->regmap, true); 1899c1b88ee2SMark Brown regcache_mark_dirty(wm8904->regmap); 1900c1334218SMark Brown 1901a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), 1902a91eb199SMark Brown wm8904->supplies); 1903a91eb199SMark Brown break; 1904a91eb199SMark Brown } 1905ce6120ccSLiam Girdwood codec->dapm.bias_level = level; 1906a91eb199SMark Brown return 0; 1907a91eb199SMark Brown } 1908a91eb199SMark Brown 1909a91eb199SMark Brown #define WM8904_RATES SNDRV_PCM_RATE_8000_96000 1910a91eb199SMark Brown 1911a91eb199SMark Brown #define WM8904_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1912a91eb199SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1913a91eb199SMark Brown 191485e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8904_dai_ops = { 1915a91eb199SMark Brown .set_sysclk = wm8904_set_sysclk, 1916a91eb199SMark Brown .set_fmt = wm8904_set_fmt, 1917a91eb199SMark Brown .set_tdm_slot = wm8904_set_tdm_slot, 1918a91eb199SMark Brown .set_pll = wm8904_set_fll, 1919a91eb199SMark Brown .hw_params = wm8904_hw_params, 1920a91eb199SMark Brown .digital_mute = wm8904_digital_mute, 1921a91eb199SMark Brown }; 1922a91eb199SMark Brown 1923f0fba2adSLiam Girdwood static struct snd_soc_dai_driver wm8904_dai = { 1924f0fba2adSLiam Girdwood .name = "wm8904-hifi", 1925a91eb199SMark Brown .playback = { 1926a91eb199SMark Brown .stream_name = "Playback", 1927a91eb199SMark Brown .channels_min = 2, 1928a91eb199SMark Brown .channels_max = 2, 1929a91eb199SMark Brown .rates = WM8904_RATES, 1930a91eb199SMark Brown .formats = WM8904_FORMATS, 1931a91eb199SMark Brown }, 1932a91eb199SMark Brown .capture = { 1933a91eb199SMark Brown .stream_name = "Capture", 1934a91eb199SMark Brown .channels_min = 2, 1935a91eb199SMark Brown .channels_max = 2, 1936a91eb199SMark Brown .rates = WM8904_RATES, 1937a91eb199SMark Brown .formats = WM8904_FORMATS, 1938a91eb199SMark Brown }, 1939a91eb199SMark Brown .ops = &wm8904_dai_ops, 1940a91eb199SMark Brown .symmetric_rates = 1, 1941a91eb199SMark Brown }; 1942a91eb199SMark Brown 1943f0fba2adSLiam Girdwood static void wm8904_handle_retune_mobile_pdata(struct snd_soc_codec *codec) 1944a91eb199SMark Brown { 1945f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1946a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 1947a91eb199SMark Brown struct snd_kcontrol_new control = 1948a91eb199SMark Brown SOC_ENUM_EXT("EQ Mode", 1949a91eb199SMark Brown wm8904->retune_mobile_enum, 1950a91eb199SMark Brown wm8904_get_retune_mobile_enum, 1951a91eb199SMark Brown wm8904_put_retune_mobile_enum); 1952a91eb199SMark Brown int ret, i, j; 1953a91eb199SMark Brown const char **t; 1954a91eb199SMark Brown 1955a91eb199SMark Brown /* We need an array of texts for the enum API but the number 1956a91eb199SMark Brown * of texts is likely to be less than the number of 1957a91eb199SMark Brown * configurations due to the sample rate dependency of the 1958a91eb199SMark Brown * configurations. */ 1959a91eb199SMark Brown wm8904->num_retune_mobile_texts = 0; 1960a91eb199SMark Brown wm8904->retune_mobile_texts = NULL; 1961a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 1962a91eb199SMark Brown for (j = 0; j < wm8904->num_retune_mobile_texts; j++) { 1963a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 1964a91eb199SMark Brown wm8904->retune_mobile_texts[j]) == 0) 1965a91eb199SMark Brown break; 1966a91eb199SMark Brown } 1967a91eb199SMark Brown 1968a91eb199SMark Brown if (j != wm8904->num_retune_mobile_texts) 1969a91eb199SMark Brown continue; 1970a91eb199SMark Brown 1971a91eb199SMark Brown /* Expand the array... */ 1972a91eb199SMark Brown t = krealloc(wm8904->retune_mobile_texts, 1973a91eb199SMark Brown sizeof(char *) * 1974a91eb199SMark Brown (wm8904->num_retune_mobile_texts + 1), 1975a91eb199SMark Brown GFP_KERNEL); 1976a91eb199SMark Brown if (t == NULL) 1977a91eb199SMark Brown continue; 1978a91eb199SMark Brown 1979a91eb199SMark Brown /* ...store the new entry... */ 1980a91eb199SMark Brown t[wm8904->num_retune_mobile_texts] = 1981a91eb199SMark Brown pdata->retune_mobile_cfgs[i].name; 1982a91eb199SMark Brown 1983a91eb199SMark Brown /* ...and remember the new version. */ 1984a91eb199SMark Brown wm8904->num_retune_mobile_texts++; 1985a91eb199SMark Brown wm8904->retune_mobile_texts = t; 1986a91eb199SMark Brown } 1987a91eb199SMark Brown 1988a91eb199SMark Brown dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n", 1989a91eb199SMark Brown wm8904->num_retune_mobile_texts); 1990a91eb199SMark Brown 1991a91eb199SMark Brown wm8904->retune_mobile_enum.max = wm8904->num_retune_mobile_texts; 1992a91eb199SMark Brown wm8904->retune_mobile_enum.texts = wm8904->retune_mobile_texts; 1993a91eb199SMark Brown 1994022658beSLiam Girdwood ret = snd_soc_add_codec_controls(codec, &control, 1); 1995a91eb199SMark Brown if (ret != 0) 1996f0fba2adSLiam Girdwood dev_err(codec->dev, 1997a91eb199SMark Brown "Failed to add ReTune Mobile control: %d\n", ret); 1998a91eb199SMark Brown } 1999a91eb199SMark Brown 2000f0fba2adSLiam Girdwood static void wm8904_handle_pdata(struct snd_soc_codec *codec) 2001a91eb199SMark Brown { 2002f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2003a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2004a91eb199SMark Brown int ret, i; 2005a91eb199SMark Brown 2006a91eb199SMark Brown if (!pdata) { 2007022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_eq_controls, 2008a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2009a91eb199SMark Brown return; 2010a91eb199SMark Brown } 2011a91eb199SMark Brown 2012a91eb199SMark Brown dev_dbg(codec->dev, "%d DRC configurations\n", pdata->num_drc_cfgs); 2013a91eb199SMark Brown 2014a91eb199SMark Brown if (pdata->num_drc_cfgs) { 2015a91eb199SMark Brown struct snd_kcontrol_new control = 2016a91eb199SMark Brown SOC_ENUM_EXT("DRC Mode", wm8904->drc_enum, 2017a91eb199SMark Brown wm8904_get_drc_enum, wm8904_put_drc_enum); 2018a91eb199SMark Brown 2019a91eb199SMark Brown /* We need an array of texts for the enum API */ 2020a91eb199SMark Brown wm8904->drc_texts = kmalloc(sizeof(char *) 2021a91eb199SMark Brown * pdata->num_drc_cfgs, GFP_KERNEL); 2022a91eb199SMark Brown if (!wm8904->drc_texts) { 2023f0fba2adSLiam Girdwood dev_err(codec->dev, 2024a91eb199SMark Brown "Failed to allocate %d DRC config texts\n", 2025a91eb199SMark Brown pdata->num_drc_cfgs); 2026a91eb199SMark Brown return; 2027a91eb199SMark Brown } 2028a91eb199SMark Brown 2029a91eb199SMark Brown for (i = 0; i < pdata->num_drc_cfgs; i++) 2030a91eb199SMark Brown wm8904->drc_texts[i] = pdata->drc_cfgs[i].name; 2031a91eb199SMark Brown 2032a91eb199SMark Brown wm8904->drc_enum.max = pdata->num_drc_cfgs; 2033a91eb199SMark Brown wm8904->drc_enum.texts = wm8904->drc_texts; 2034a91eb199SMark Brown 2035022658beSLiam Girdwood ret = snd_soc_add_codec_controls(codec, &control, 1); 2036a91eb199SMark Brown if (ret != 0) 2037f0fba2adSLiam Girdwood dev_err(codec->dev, 2038a91eb199SMark Brown "Failed to add DRC mode control: %d\n", ret); 2039a91eb199SMark Brown 2040a91eb199SMark Brown wm8904_set_drc(codec); 2041a91eb199SMark Brown } 2042a91eb199SMark Brown 2043a91eb199SMark Brown dev_dbg(codec->dev, "%d ReTune Mobile configurations\n", 2044a91eb199SMark Brown pdata->num_retune_mobile_cfgs); 2045a91eb199SMark Brown 2046a91eb199SMark Brown if (pdata->num_retune_mobile_cfgs) 2047f0fba2adSLiam Girdwood wm8904_handle_retune_mobile_pdata(codec); 2048a91eb199SMark Brown else 2049022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8904_eq_controls, 2050a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2051a91eb199SMark Brown } 2052a91eb199SMark Brown 2053f0fba2adSLiam Girdwood 2054f0fba2adSLiam Girdwood static int wm8904_probe(struct snd_soc_codec *codec) 2055a91eb199SMark Brown { 2056f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2057cdce4e9bSMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2058f0fba2adSLiam Girdwood int ret, i; 2059a91eb199SMark Brown 206084d0d831SMark Brown codec->control_data = wm8904->regmap; 2061a91eb199SMark Brown 20628c126474SMark Brown switch (wm8904->devtype) { 20638c126474SMark Brown case WM8904: 20648c126474SMark Brown break; 20658c126474SMark Brown case WM8912: 20668c126474SMark Brown memset(&wm8904_dai.capture, 0, sizeof(wm8904_dai.capture)); 20678c126474SMark Brown break; 20688c126474SMark Brown default: 20698c126474SMark Brown dev_err(codec->dev, "Unknown device type %d\n", 20708c126474SMark Brown wm8904->devtype); 2071f0fba2adSLiam Girdwood return -EINVAL; 20728c126474SMark Brown } 20738c126474SMark Brown 207484d0d831SMark Brown ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP); 2075a91eb199SMark Brown if (ret != 0) { 2076a91eb199SMark Brown dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 2077f0fba2adSLiam Girdwood return ret; 2078a91eb199SMark Brown } 2079a91eb199SMark Brown 2080a91eb199SMark Brown /* Change some default settings - latch VU and enable ZC */ 2081a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ADC_DIGITAL_VOLUME_LEFT, 2082a1b3b5eeSMark Brown WM8904_ADC_VU, WM8904_ADC_VU); 2083a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ADC_DIGITAL_VOLUME_RIGHT, 2084a1b3b5eeSMark Brown WM8904_ADC_VU, WM8904_ADC_VU); 2085a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_VOLUME_LEFT, 2086a1b3b5eeSMark Brown WM8904_DAC_VU, WM8904_DAC_VU); 2087a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_VOLUME_RIGHT, 2088a1b3b5eeSMark Brown WM8904_DAC_VU, WM8904_DAC_VU); 2089a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ANALOGUE_OUT1_LEFT, 2090a1b3b5eeSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTLZC, 2091a1b3b5eeSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTLZC); 2092a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ANALOGUE_OUT1_RIGHT, 2093a1b3b5eeSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTRZC, 2094a1b3b5eeSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTRZC); 2095a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ANALOGUE_OUT2_LEFT, 2096a1b3b5eeSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTLZC, 2097a1b3b5eeSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTLZC); 2098a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ANALOGUE_OUT2_RIGHT, 2099a1b3b5eeSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTRZC, 2100a1b3b5eeSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTRZC); 2101a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_0, 2102a1b3b5eeSMark Brown WM8904_SR_MODE, 0); 2103a91eb199SMark Brown 2104cdce4e9bSMark Brown /* Apply configuration from the platform data. */ 2105cdce4e9bSMark Brown if (wm8904->pdata) { 2106cdce4e9bSMark Brown for (i = 0; i < WM8904_GPIO_REGS; i++) { 2107cdce4e9bSMark Brown if (!pdata->gpio_cfg[i]) 2108cdce4e9bSMark Brown continue; 2109cdce4e9bSMark Brown 2110433897f7SMark Brown regmap_update_bits(wm8904->regmap, 2111433897f7SMark Brown WM8904_GPIO_CONTROL_1 + i, 2112433897f7SMark Brown 0xffff, 2113433897f7SMark Brown pdata->gpio_cfg[i]); 2114cdce4e9bSMark Brown } 2115fbc2dae8SMark Brown 2116fbc2dae8SMark Brown /* Zero is the default value for these anyway */ 2117fbc2dae8SMark Brown for (i = 0; i < WM8904_MIC_REGS; i++) 2118433897f7SMark Brown regmap_update_bits(wm8904->regmap, 2119433897f7SMark Brown WM8904_MIC_BIAS_CONTROL_0 + i, 2120433897f7SMark Brown 0xffff, 2121433897f7SMark Brown pdata->mic_cfg[i]); 2122cdce4e9bSMark Brown } 2123cdce4e9bSMark Brown 2124a91eb199SMark Brown /* Set Class W by default - this will be managed by the Class 2125a91eb199SMark Brown * G widget at runtime where bypass paths are available. 2126a91eb199SMark Brown */ 2127a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_CLASS_W_0, 2128a1b3b5eeSMark Brown WM8904_CP_DYN_PWR, WM8904_CP_DYN_PWR); 2129a91eb199SMark Brown 2130a91eb199SMark Brown /* Use normal bias source */ 2131a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2132a1b3b5eeSMark Brown WM8904_POBCTRL, 0); 2133a91eb199SMark Brown 2134f0fba2adSLiam Girdwood wm8904_handle_pdata(codec); 2135a91eb199SMark Brown 2136f0fba2adSLiam Girdwood wm8904_add_widgets(codec); 2137a91eb199SMark Brown 2138a91eb199SMark Brown return 0; 2139a91eb199SMark Brown } 2140a91eb199SMark Brown 2141f0fba2adSLiam Girdwood static int wm8904_remove(struct snd_soc_codec *codec) 2142a91eb199SMark Brown { 2143f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2144f0fba2adSLiam Girdwood 2145cd70978cSAxel Lin kfree(wm8904->retune_mobile_texts); 2146cd70978cSAxel Lin kfree(wm8904->drc_texts); 2147f0fba2adSLiam Girdwood 2148f0fba2adSLiam Girdwood return 0; 2149a91eb199SMark Brown } 2150a91eb199SMark Brown 2151f0fba2adSLiam Girdwood static struct snd_soc_codec_driver soc_codec_dev_wm8904 = { 2152f0fba2adSLiam Girdwood .probe = wm8904_probe, 2153f0fba2adSLiam Girdwood .remove = wm8904_remove, 2154f0fba2adSLiam Girdwood .set_bias_level = wm8904_set_bias_level, 2155eb3032f8SAxel Lin .idle_bias_off = true, 215684d0d831SMark Brown }; 215784d0d831SMark Brown 215884d0d831SMark Brown static const struct regmap_config wm8904_regmap = { 215984d0d831SMark Brown .reg_bits = 8, 216084d0d831SMark Brown .val_bits = 16, 216184d0d831SMark Brown 216284d0d831SMark Brown .max_register = WM8904_MAX_REGISTER, 216384d0d831SMark Brown .volatile_reg = wm8904_volatile_register, 216484d0d831SMark Brown .readable_reg = wm8904_readable_register, 216584d0d831SMark Brown 216684d0d831SMark Brown .cache_type = REGCACHE_RBTREE, 216784d0d831SMark Brown .reg_defaults = wm8904_reg_defaults, 216884d0d831SMark Brown .num_reg_defaults = ARRAY_SIZE(wm8904_reg_defaults), 2169f0fba2adSLiam Girdwood }; 2170f0fba2adSLiam Girdwood 2171a91eb199SMark Brown static __devinit int wm8904_i2c_probe(struct i2c_client *i2c, 2172a91eb199SMark Brown const struct i2c_device_id *id) 2173a91eb199SMark Brown { 2174a91eb199SMark Brown struct wm8904_priv *wm8904; 2175*03862cf6SMark Brown unsigned int val; 2176*03862cf6SMark Brown int ret, i; 2177a91eb199SMark Brown 217893e26d4eSMark Brown wm8904 = devm_kzalloc(&i2c->dev, sizeof(struct wm8904_priv), 217993e26d4eSMark Brown GFP_KERNEL); 2180a91eb199SMark Brown if (wm8904 == NULL) 2181a91eb199SMark Brown return -ENOMEM; 2182a91eb199SMark Brown 2183d633edd9SMark Brown wm8904->regmap = devm_regmap_init_i2c(i2c, &wm8904_regmap); 218484d0d831SMark Brown if (IS_ERR(wm8904->regmap)) { 218584d0d831SMark Brown ret = PTR_ERR(wm8904->regmap); 218684d0d831SMark Brown dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 218784d0d831SMark Brown ret); 218884d0d831SMark Brown return ret; 218984d0d831SMark Brown } 219084d0d831SMark Brown 21918c126474SMark Brown wm8904->devtype = id->driver_data; 2192a91eb199SMark Brown i2c_set_clientdata(i2c, wm8904); 2193a91eb199SMark Brown wm8904->pdata = i2c->dev.platform_data; 2194a91eb199SMark Brown 2195*03862cf6SMark Brown for (i = 0; i < ARRAY_SIZE(wm8904->supplies); i++) 2196*03862cf6SMark Brown wm8904->supplies[i].supply = wm8904_supply_names[i]; 2197*03862cf6SMark Brown 2198*03862cf6SMark Brown ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8904->supplies), 2199*03862cf6SMark Brown wm8904->supplies); 2200*03862cf6SMark Brown if (ret != 0) { 2201*03862cf6SMark Brown dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); 2202*03862cf6SMark Brown return ret; 2203*03862cf6SMark Brown } 2204*03862cf6SMark Brown 2205*03862cf6SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 2206*03862cf6SMark Brown wm8904->supplies); 2207*03862cf6SMark Brown if (ret != 0) { 2208*03862cf6SMark Brown dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); 2209*03862cf6SMark Brown return ret; 2210*03862cf6SMark Brown } 2211*03862cf6SMark Brown 2212*03862cf6SMark Brown ret = regmap_read(wm8904->regmap, WM8904_SW_RESET_AND_ID, &val); 2213*03862cf6SMark Brown if (ret < 0) { 2214*03862cf6SMark Brown dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret); 2215*03862cf6SMark Brown goto err_enable; 2216*03862cf6SMark Brown } 2217*03862cf6SMark Brown if (val != 0x8904) { 2218*03862cf6SMark Brown dev_err(&i2c->dev, "Device is not a WM8904, ID is %x\n", val); 2219*03862cf6SMark Brown ret = -EINVAL; 2220*03862cf6SMark Brown goto err_enable; 2221*03862cf6SMark Brown } 2222*03862cf6SMark Brown 2223*03862cf6SMark Brown ret = regmap_read(wm8904->regmap, WM8904_REVISION, &val); 2224*03862cf6SMark Brown if (ret < 0) { 2225*03862cf6SMark Brown dev_err(&i2c->dev, "Failed to read device revision: %d\n", 2226*03862cf6SMark Brown ret); 2227*03862cf6SMark Brown goto err_enable; 2228*03862cf6SMark Brown } 2229*03862cf6SMark Brown dev_info(&i2c->dev, "revision %c\n", val + 'A'); 2230*03862cf6SMark Brown 2231*03862cf6SMark Brown ret = regmap_write(wm8904->regmap, WM8904_SW_RESET_AND_ID, 0); 2232*03862cf6SMark Brown if (ret < 0) { 2233*03862cf6SMark Brown dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret); 2234*03862cf6SMark Brown goto err_enable; 2235*03862cf6SMark Brown } 2236*03862cf6SMark Brown 2237*03862cf6SMark Brown /* Can leave the device powered off until we need it */ 2238*03862cf6SMark Brown regcache_cache_only(wm8904->regmap, true); 2239*03862cf6SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2240*03862cf6SMark Brown 2241f0fba2adSLiam Girdwood ret = snd_soc_register_codec(&i2c->dev, 2242f0fba2adSLiam Girdwood &soc_codec_dev_wm8904, &wm8904_dai, 1); 224384d0d831SMark Brown if (ret != 0) 2244*03862cf6SMark Brown return ret; 224593e26d4eSMark Brown 224684d0d831SMark Brown return 0; 224784d0d831SMark Brown 2248*03862cf6SMark Brown err_enable: 2249*03862cf6SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2250f0fba2adSLiam Girdwood return ret; 2251a91eb199SMark Brown } 2252a91eb199SMark Brown 2253a91eb199SMark Brown static __devexit int wm8904_i2c_remove(struct i2c_client *client) 2254a91eb199SMark Brown { 2255f0fba2adSLiam Girdwood snd_soc_unregister_codec(&client->dev); 2256a91eb199SMark Brown return 0; 2257a91eb199SMark Brown } 2258a91eb199SMark Brown 2259a91eb199SMark Brown static const struct i2c_device_id wm8904_i2c_id[] = { 22608c126474SMark Brown { "wm8904", WM8904 }, 22618c126474SMark Brown { "wm8912", WM8912 }, 2262df1553c8SMark Brown { "wm8918", WM8904 }, /* Actually a subset, updates to follow */ 2263a91eb199SMark Brown { } 2264a91eb199SMark Brown }; 2265a91eb199SMark Brown MODULE_DEVICE_TABLE(i2c, wm8904_i2c_id); 2266a91eb199SMark Brown 2267a91eb199SMark Brown static struct i2c_driver wm8904_i2c_driver = { 2268a91eb199SMark Brown .driver = { 2269091edccfSMark Brown .name = "wm8904", 2270a91eb199SMark Brown .owner = THIS_MODULE, 2271a91eb199SMark Brown }, 2272a91eb199SMark Brown .probe = wm8904_i2c_probe, 2273a91eb199SMark Brown .remove = __devexit_p(wm8904_i2c_remove), 2274a91eb199SMark Brown .id_table = wm8904_i2c_id, 2275a91eb199SMark Brown }; 2276a91eb199SMark Brown 22778cb28fd6SMark Brown module_i2c_driver(wm8904_i2c_driver); 2278a91eb199SMark Brown 2279a91eb199SMark Brown MODULE_DESCRIPTION("ASoC WM8904 driver"); 2280a91eb199SMark Brown MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 2281a91eb199SMark Brown MODULE_LICENSE("GPL"); 2282