1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 26d4baf08SMark Brown /* 36d4baf08SMark Brown * wm5100.h -- WM5100 ALSA SoC Audio driver 46d4baf08SMark Brown * 56d4baf08SMark Brown * Copyright 2011 Wolfson Microelectronics plc 66d4baf08SMark Brown * 76d4baf08SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 86d4baf08SMark Brown */ 96d4baf08SMark Brown 106d4baf08SMark Brown #ifndef WM5100_ASOC_H 116d4baf08SMark Brown #define WM5100_ASOC_H 126d4baf08SMark Brown 136d4baf08SMark Brown #include <sound/soc.h> 14bd132ec5SMark Brown #include <linux/regmap.h> 156d4baf08SMark Brown 1661195838SKuninori Morimoto int wm5100_detect(struct snd_soc_component *component, struct snd_soc_jack *jack); 17ba896edeSMark Brown 186d4baf08SMark Brown #define WM5100_CLK_AIF1 1 196d4baf08SMark Brown #define WM5100_CLK_AIF2 2 206d4baf08SMark Brown #define WM5100_CLK_AIF3 3 216d4baf08SMark Brown #define WM5100_CLK_SYSCLK 4 226d4baf08SMark Brown #define WM5100_CLK_ASYNCCLK 5 236d4baf08SMark Brown #define WM5100_CLK_32KHZ 6 246d4baf08SMark Brown #define WM5100_CLK_OPCLK 7 256d4baf08SMark Brown 266d4baf08SMark Brown #define WM5100_CLKSRC_MCLK1 0 276d4baf08SMark Brown #define WM5100_CLKSRC_MCLK2 1 286d4baf08SMark Brown #define WM5100_CLKSRC_SYSCLK 2 296d4baf08SMark Brown #define WM5100_CLKSRC_FLL1 4 306d4baf08SMark Brown #define WM5100_CLKSRC_FLL2 5 316d4baf08SMark Brown #define WM5100_CLKSRC_AIF1BCLK 8 326d4baf08SMark Brown #define WM5100_CLKSRC_AIF2BCLK 9 336d4baf08SMark Brown #define WM5100_CLKSRC_AIF3BCLK 10 346d4baf08SMark Brown #define WM5100_CLKSRC_ASYNCCLK 0x100 356d4baf08SMark Brown 366d4baf08SMark Brown #define WM5100_FLL1 1 376d4baf08SMark Brown #define WM5100_FLL2 2 386d4baf08SMark Brown 396d4baf08SMark Brown #define WM5100_FLL_SRC_MCLK1 0x0 406d4baf08SMark Brown #define WM5100_FLL_SRC_MCLK2 0x1 416d4baf08SMark Brown #define WM5100_FLL_SRC_FLL1 0x4 426d4baf08SMark Brown #define WM5100_FLL_SRC_FLL2 0x5 436d4baf08SMark Brown #define WM5100_FLL_SRC_AIF1BCLK 0x8 446d4baf08SMark Brown #define WM5100_FLL_SRC_AIF2BCLK 0x9 456d4baf08SMark Brown #define WM5100_FLL_SRC_AIF3BCLK 0xa 466d4baf08SMark Brown 476d4baf08SMark Brown /* 486d4baf08SMark Brown * Register values. 496d4baf08SMark Brown */ 506d4baf08SMark Brown #define WM5100_SOFTWARE_RESET 0x00 516d4baf08SMark Brown #define WM5100_DEVICE_REVISION 0x01 526d4baf08SMark Brown #define WM5100_CTRL_IF_1 0x10 536d4baf08SMark Brown #define WM5100_TONE_GENERATOR_1 0x20 546d4baf08SMark Brown #define WM5100_PWM_DRIVE_1 0x30 556d4baf08SMark Brown #define WM5100_PWM_DRIVE_2 0x31 566d4baf08SMark Brown #define WM5100_PWM_DRIVE_3 0x32 576d4baf08SMark Brown #define WM5100_CLOCKING_1 0x100 586d4baf08SMark Brown #define WM5100_CLOCKING_3 0x101 596d4baf08SMark Brown #define WM5100_CLOCKING_4 0x102 606d4baf08SMark Brown #define WM5100_CLOCKING_5 0x103 616d4baf08SMark Brown #define WM5100_CLOCKING_6 0x104 626d4baf08SMark Brown #define WM5100_CLOCKING_7 0x107 636d4baf08SMark Brown #define WM5100_CLOCKING_8 0x108 646d4baf08SMark Brown #define WM5100_ASRC_ENABLE 0x120 656d4baf08SMark Brown #define WM5100_ASRC_STATUS 0x121 666d4baf08SMark Brown #define WM5100_ASRC_RATE1 0x122 676d4baf08SMark Brown #define WM5100_ISRC_1_CTRL_1 0x141 686d4baf08SMark Brown #define WM5100_ISRC_1_CTRL_2 0x142 696d4baf08SMark Brown #define WM5100_ISRC_2_CTRL1 0x143 706d4baf08SMark Brown #define WM5100_ISRC_2_CTRL_2 0x144 716d4baf08SMark Brown #define WM5100_FLL1_CONTROL_1 0x182 726d4baf08SMark Brown #define WM5100_FLL1_CONTROL_2 0x183 736d4baf08SMark Brown #define WM5100_FLL1_CONTROL_3 0x184 746d4baf08SMark Brown #define WM5100_FLL1_CONTROL_5 0x186 756d4baf08SMark Brown #define WM5100_FLL1_CONTROL_6 0x187 766d4baf08SMark Brown #define WM5100_FLL1_EFS_1 0x188 776d4baf08SMark Brown #define WM5100_FLL2_CONTROL_1 0x1A2 786d4baf08SMark Brown #define WM5100_FLL2_CONTROL_2 0x1A3 796d4baf08SMark Brown #define WM5100_FLL2_CONTROL_3 0x1A4 806d4baf08SMark Brown #define WM5100_FLL2_CONTROL_5 0x1A6 816d4baf08SMark Brown #define WM5100_FLL2_CONTROL_6 0x1A7 826d4baf08SMark Brown #define WM5100_FLL2_EFS_1 0x1A8 836d4baf08SMark Brown #define WM5100_MIC_CHARGE_PUMP_1 0x200 846d4baf08SMark Brown #define WM5100_MIC_CHARGE_PUMP_2 0x201 856d4baf08SMark Brown #define WM5100_HP_CHARGE_PUMP_1 0x202 866d4baf08SMark Brown #define WM5100_LDO1_CONTROL 0x211 876d4baf08SMark Brown #define WM5100_MIC_BIAS_CTRL_1 0x215 886d4baf08SMark Brown #define WM5100_MIC_BIAS_CTRL_2 0x216 896d4baf08SMark Brown #define WM5100_MIC_BIAS_CTRL_3 0x217 906d4baf08SMark Brown #define WM5100_ACCESSORY_DETECT_MODE_1 0x280 916d4baf08SMark Brown #define WM5100_HEADPHONE_DETECT_1 0x288 926d4baf08SMark Brown #define WM5100_HEADPHONE_DETECT_2 0x289 936d4baf08SMark Brown #define WM5100_MIC_DETECT_1 0x290 946d4baf08SMark Brown #define WM5100_MIC_DETECT_2 0x291 956d4baf08SMark Brown #define WM5100_MIC_DETECT_3 0x292 961cba77c1SMark Brown #define WM5100_MISC_CONTROL 0x2BB 976d4baf08SMark Brown #define WM5100_INPUT_ENABLES 0x301 986d4baf08SMark Brown #define WM5100_INPUT_ENABLES_STATUS 0x302 996d4baf08SMark Brown #define WM5100_IN1L_CONTROL 0x310 1006d4baf08SMark Brown #define WM5100_IN1R_CONTROL 0x311 1016d4baf08SMark Brown #define WM5100_IN2L_CONTROL 0x312 1026d4baf08SMark Brown #define WM5100_IN2R_CONTROL 0x313 1036d4baf08SMark Brown #define WM5100_IN3L_CONTROL 0x314 1046d4baf08SMark Brown #define WM5100_IN3R_CONTROL 0x315 1056d4baf08SMark Brown #define WM5100_IN4L_CONTROL 0x316 1066d4baf08SMark Brown #define WM5100_IN4R_CONTROL 0x317 1076d4baf08SMark Brown #define WM5100_RXANC_SRC 0x318 1086d4baf08SMark Brown #define WM5100_INPUT_VOLUME_RAMP 0x319 1096d4baf08SMark Brown #define WM5100_ADC_DIGITAL_VOLUME_1L 0x320 1106d4baf08SMark Brown #define WM5100_ADC_DIGITAL_VOLUME_1R 0x321 1116d4baf08SMark Brown #define WM5100_ADC_DIGITAL_VOLUME_2L 0x322 1126d4baf08SMark Brown #define WM5100_ADC_DIGITAL_VOLUME_2R 0x323 1136d4baf08SMark Brown #define WM5100_ADC_DIGITAL_VOLUME_3L 0x324 1146d4baf08SMark Brown #define WM5100_ADC_DIGITAL_VOLUME_3R 0x325 1156d4baf08SMark Brown #define WM5100_ADC_DIGITAL_VOLUME_4L 0x326 1166d4baf08SMark Brown #define WM5100_ADC_DIGITAL_VOLUME_4R 0x327 1176d4baf08SMark Brown #define WM5100_OUTPUT_ENABLES_2 0x401 1186d4baf08SMark Brown #define WM5100_OUTPUT_STATUS_1 0x402 1196d4baf08SMark Brown #define WM5100_OUTPUT_STATUS_2 0x403 1206d4baf08SMark Brown #define WM5100_CHANNEL_ENABLES_1 0x408 1216d4baf08SMark Brown #define WM5100_OUT_VOLUME_1L 0x410 1226d4baf08SMark Brown #define WM5100_OUT_VOLUME_1R 0x411 1236d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_1L 0x412 1246d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_1R 0x413 1256d4baf08SMark Brown #define WM5100_OUT_VOLUME_2L 0x414 1266d4baf08SMark Brown #define WM5100_OUT_VOLUME_2R 0x415 1276d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_2L 0x416 1286d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_2R 0x417 1296d4baf08SMark Brown #define WM5100_OUT_VOLUME_3L 0x418 1306d4baf08SMark Brown #define WM5100_OUT_VOLUME_3R 0x419 1316d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_3L 0x41A 1326d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_3R 0x41B 1336d4baf08SMark Brown #define WM5100_OUT_VOLUME_4L 0x41C 1346d4baf08SMark Brown #define WM5100_OUT_VOLUME_4R 0x41D 1356d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_5L 0x41E 1366d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_5R 0x41F 1376d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_6L 0x420 1386d4baf08SMark Brown #define WM5100_DAC_VOLUME_LIMIT_6R 0x421 1396d4baf08SMark Brown #define WM5100_DAC_AEC_CONTROL_1 0x440 1406d4baf08SMark Brown #define WM5100_OUTPUT_VOLUME_RAMP 0x441 1416d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_1L 0x480 1426d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_1R 0x481 1436d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_2L 0x482 1446d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_2R 0x483 1456d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_3L 0x484 1466d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_3R 0x485 1476d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_4L 0x486 1486d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_4R 0x487 1496d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_5L 0x488 1506d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_5R 0x489 1516d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_6L 0x48A 1526d4baf08SMark Brown #define WM5100_DAC_DIGITAL_VOLUME_6R 0x48B 1536d4baf08SMark Brown #define WM5100_PDM_SPK1_CTRL_1 0x4C0 1546d4baf08SMark Brown #define WM5100_PDM_SPK1_CTRL_2 0x4C1 1556d4baf08SMark Brown #define WM5100_PDM_SPK2_CTRL_1 0x4C2 1566d4baf08SMark Brown #define WM5100_PDM_SPK2_CTRL_2 0x4C3 1576d4baf08SMark Brown #define WM5100_AUDIO_IF_1_1 0x500 1586d4baf08SMark Brown #define WM5100_AUDIO_IF_1_2 0x501 1596d4baf08SMark Brown #define WM5100_AUDIO_IF_1_3 0x502 1606d4baf08SMark Brown #define WM5100_AUDIO_IF_1_4 0x503 1616d4baf08SMark Brown #define WM5100_AUDIO_IF_1_5 0x504 1626d4baf08SMark Brown #define WM5100_AUDIO_IF_1_6 0x505 1636d4baf08SMark Brown #define WM5100_AUDIO_IF_1_7 0x506 1646d4baf08SMark Brown #define WM5100_AUDIO_IF_1_8 0x507 1656d4baf08SMark Brown #define WM5100_AUDIO_IF_1_9 0x508 1666d4baf08SMark Brown #define WM5100_AUDIO_IF_1_10 0x509 1676d4baf08SMark Brown #define WM5100_AUDIO_IF_1_11 0x50A 1686d4baf08SMark Brown #define WM5100_AUDIO_IF_1_12 0x50B 1696d4baf08SMark Brown #define WM5100_AUDIO_IF_1_13 0x50C 1706d4baf08SMark Brown #define WM5100_AUDIO_IF_1_14 0x50D 1716d4baf08SMark Brown #define WM5100_AUDIO_IF_1_15 0x50E 1726d4baf08SMark Brown #define WM5100_AUDIO_IF_1_16 0x50F 1736d4baf08SMark Brown #define WM5100_AUDIO_IF_1_17 0x510 1746d4baf08SMark Brown #define WM5100_AUDIO_IF_1_18 0x511 1756d4baf08SMark Brown #define WM5100_AUDIO_IF_1_19 0x512 1766d4baf08SMark Brown #define WM5100_AUDIO_IF_1_20 0x513 1776d4baf08SMark Brown #define WM5100_AUDIO_IF_1_21 0x514 1786d4baf08SMark Brown #define WM5100_AUDIO_IF_1_22 0x515 1796d4baf08SMark Brown #define WM5100_AUDIO_IF_1_23 0x516 1806d4baf08SMark Brown #define WM5100_AUDIO_IF_1_24 0x517 1816d4baf08SMark Brown #define WM5100_AUDIO_IF_1_25 0x518 1826d4baf08SMark Brown #define WM5100_AUDIO_IF_1_26 0x519 1836d4baf08SMark Brown #define WM5100_AUDIO_IF_1_27 0x51A 1846d4baf08SMark Brown #define WM5100_AUDIO_IF_2_1 0x540 1856d4baf08SMark Brown #define WM5100_AUDIO_IF_2_2 0x541 1866d4baf08SMark Brown #define WM5100_AUDIO_IF_2_3 0x542 1876d4baf08SMark Brown #define WM5100_AUDIO_IF_2_4 0x543 1886d4baf08SMark Brown #define WM5100_AUDIO_IF_2_5 0x544 1896d4baf08SMark Brown #define WM5100_AUDIO_IF_2_6 0x545 1906d4baf08SMark Brown #define WM5100_AUDIO_IF_2_7 0x546 1916d4baf08SMark Brown #define WM5100_AUDIO_IF_2_8 0x547 1926d4baf08SMark Brown #define WM5100_AUDIO_IF_2_9 0x548 1936d4baf08SMark Brown #define WM5100_AUDIO_IF_2_10 0x549 1946d4baf08SMark Brown #define WM5100_AUDIO_IF_2_11 0x54A 1956d4baf08SMark Brown #define WM5100_AUDIO_IF_2_18 0x551 1966d4baf08SMark Brown #define WM5100_AUDIO_IF_2_19 0x552 1976d4baf08SMark Brown #define WM5100_AUDIO_IF_2_26 0x559 1986d4baf08SMark Brown #define WM5100_AUDIO_IF_2_27 0x55A 1996d4baf08SMark Brown #define WM5100_AUDIO_IF_3_1 0x580 2006d4baf08SMark Brown #define WM5100_AUDIO_IF_3_2 0x581 2016d4baf08SMark Brown #define WM5100_AUDIO_IF_3_3 0x582 2026d4baf08SMark Brown #define WM5100_AUDIO_IF_3_4 0x583 2036d4baf08SMark Brown #define WM5100_AUDIO_IF_3_5 0x584 2046d4baf08SMark Brown #define WM5100_AUDIO_IF_3_6 0x585 2056d4baf08SMark Brown #define WM5100_AUDIO_IF_3_7 0x586 2066d4baf08SMark Brown #define WM5100_AUDIO_IF_3_8 0x587 2076d4baf08SMark Brown #define WM5100_AUDIO_IF_3_9 0x588 2086d4baf08SMark Brown #define WM5100_AUDIO_IF_3_10 0x589 2096d4baf08SMark Brown #define WM5100_AUDIO_IF_3_11 0x58A 2106d4baf08SMark Brown #define WM5100_AUDIO_IF_3_18 0x591 2116d4baf08SMark Brown #define WM5100_AUDIO_IF_3_19 0x592 2126d4baf08SMark Brown #define WM5100_AUDIO_IF_3_26 0x599 2136d4baf08SMark Brown #define WM5100_AUDIO_IF_3_27 0x59A 2146d4baf08SMark Brown #define WM5100_PWM1MIX_INPUT_1_SOURCE 0x640 2156d4baf08SMark Brown #define WM5100_PWM1MIX_INPUT_1_VOLUME 0x641 2166d4baf08SMark Brown #define WM5100_PWM1MIX_INPUT_2_SOURCE 0x642 2176d4baf08SMark Brown #define WM5100_PWM1MIX_INPUT_2_VOLUME 0x643 2186d4baf08SMark Brown #define WM5100_PWM1MIX_INPUT_3_SOURCE 0x644 2196d4baf08SMark Brown #define WM5100_PWM1MIX_INPUT_3_VOLUME 0x645 2206d4baf08SMark Brown #define WM5100_PWM1MIX_INPUT_4_SOURCE 0x646 2216d4baf08SMark Brown #define WM5100_PWM1MIX_INPUT_4_VOLUME 0x647 2226d4baf08SMark Brown #define WM5100_PWM2MIX_INPUT_1_SOURCE 0x648 2236d4baf08SMark Brown #define WM5100_PWM2MIX_INPUT_1_VOLUME 0x649 2246d4baf08SMark Brown #define WM5100_PWM2MIX_INPUT_2_SOURCE 0x64A 2256d4baf08SMark Brown #define WM5100_PWM2MIX_INPUT_2_VOLUME 0x64B 2266d4baf08SMark Brown #define WM5100_PWM2MIX_INPUT_3_SOURCE 0x64C 2276d4baf08SMark Brown #define WM5100_PWM2MIX_INPUT_3_VOLUME 0x64D 2286d4baf08SMark Brown #define WM5100_PWM2MIX_INPUT_4_SOURCE 0x64E 2296d4baf08SMark Brown #define WM5100_PWM2MIX_INPUT_4_VOLUME 0x64F 2306d4baf08SMark Brown #define WM5100_OUT1LMIX_INPUT_1_SOURCE 0x680 2316d4baf08SMark Brown #define WM5100_OUT1LMIX_INPUT_1_VOLUME 0x681 2326d4baf08SMark Brown #define WM5100_OUT1LMIX_INPUT_2_SOURCE 0x682 2336d4baf08SMark Brown #define WM5100_OUT1LMIX_INPUT_2_VOLUME 0x683 2346d4baf08SMark Brown #define WM5100_OUT1LMIX_INPUT_3_SOURCE 0x684 2356d4baf08SMark Brown #define WM5100_OUT1LMIX_INPUT_3_VOLUME 0x685 2366d4baf08SMark Brown #define WM5100_OUT1LMIX_INPUT_4_SOURCE 0x686 2376d4baf08SMark Brown #define WM5100_OUT1LMIX_INPUT_4_VOLUME 0x687 2386d4baf08SMark Brown #define WM5100_OUT1RMIX_INPUT_1_SOURCE 0x688 2396d4baf08SMark Brown #define WM5100_OUT1RMIX_INPUT_1_VOLUME 0x689 2406d4baf08SMark Brown #define WM5100_OUT1RMIX_INPUT_2_SOURCE 0x68A 2416d4baf08SMark Brown #define WM5100_OUT1RMIX_INPUT_2_VOLUME 0x68B 2426d4baf08SMark Brown #define WM5100_OUT1RMIX_INPUT_3_SOURCE 0x68C 2436d4baf08SMark Brown #define WM5100_OUT1RMIX_INPUT_3_VOLUME 0x68D 2446d4baf08SMark Brown #define WM5100_OUT1RMIX_INPUT_4_SOURCE 0x68E 2456d4baf08SMark Brown #define WM5100_OUT1RMIX_INPUT_4_VOLUME 0x68F 2466d4baf08SMark Brown #define WM5100_OUT2LMIX_INPUT_1_SOURCE 0x690 2476d4baf08SMark Brown #define WM5100_OUT2LMIX_INPUT_1_VOLUME 0x691 2486d4baf08SMark Brown #define WM5100_OUT2LMIX_INPUT_2_SOURCE 0x692 2496d4baf08SMark Brown #define WM5100_OUT2LMIX_INPUT_2_VOLUME 0x693 2506d4baf08SMark Brown #define WM5100_OUT2LMIX_INPUT_3_SOURCE 0x694 2516d4baf08SMark Brown #define WM5100_OUT2LMIX_INPUT_3_VOLUME 0x695 2526d4baf08SMark Brown #define WM5100_OUT2LMIX_INPUT_4_SOURCE 0x696 2536d4baf08SMark Brown #define WM5100_OUT2LMIX_INPUT_4_VOLUME 0x697 2546d4baf08SMark Brown #define WM5100_OUT2RMIX_INPUT_1_SOURCE 0x698 2556d4baf08SMark Brown #define WM5100_OUT2RMIX_INPUT_1_VOLUME 0x699 2566d4baf08SMark Brown #define WM5100_OUT2RMIX_INPUT_2_SOURCE 0x69A 2576d4baf08SMark Brown #define WM5100_OUT2RMIX_INPUT_2_VOLUME 0x69B 2586d4baf08SMark Brown #define WM5100_OUT2RMIX_INPUT_3_SOURCE 0x69C 2596d4baf08SMark Brown #define WM5100_OUT2RMIX_INPUT_3_VOLUME 0x69D 2606d4baf08SMark Brown #define WM5100_OUT2RMIX_INPUT_4_SOURCE 0x69E 2616d4baf08SMark Brown #define WM5100_OUT2RMIX_INPUT_4_VOLUME 0x69F 2626d4baf08SMark Brown #define WM5100_OUT3LMIX_INPUT_1_SOURCE 0x6A0 2636d4baf08SMark Brown #define WM5100_OUT3LMIX_INPUT_1_VOLUME 0x6A1 2646d4baf08SMark Brown #define WM5100_OUT3LMIX_INPUT_2_SOURCE 0x6A2 2656d4baf08SMark Brown #define WM5100_OUT3LMIX_INPUT_2_VOLUME 0x6A3 2666d4baf08SMark Brown #define WM5100_OUT3LMIX_INPUT_3_SOURCE 0x6A4 2676d4baf08SMark Brown #define WM5100_OUT3LMIX_INPUT_3_VOLUME 0x6A5 2686d4baf08SMark Brown #define WM5100_OUT3LMIX_INPUT_4_SOURCE 0x6A6 2696d4baf08SMark Brown #define WM5100_OUT3LMIX_INPUT_4_VOLUME 0x6A7 2706d4baf08SMark Brown #define WM5100_OUT3RMIX_INPUT_1_SOURCE 0x6A8 2716d4baf08SMark Brown #define WM5100_OUT3RMIX_INPUT_1_VOLUME 0x6A9 2726d4baf08SMark Brown #define WM5100_OUT3RMIX_INPUT_2_SOURCE 0x6AA 2736d4baf08SMark Brown #define WM5100_OUT3RMIX_INPUT_2_VOLUME 0x6AB 2746d4baf08SMark Brown #define WM5100_OUT3RMIX_INPUT_3_SOURCE 0x6AC 2756d4baf08SMark Brown #define WM5100_OUT3RMIX_INPUT_3_VOLUME 0x6AD 2766d4baf08SMark Brown #define WM5100_OUT3RMIX_INPUT_4_SOURCE 0x6AE 2776d4baf08SMark Brown #define WM5100_OUT3RMIX_INPUT_4_VOLUME 0x6AF 2786d4baf08SMark Brown #define WM5100_OUT4LMIX_INPUT_1_SOURCE 0x6B0 2796d4baf08SMark Brown #define WM5100_OUT4LMIX_INPUT_1_VOLUME 0x6B1 2806d4baf08SMark Brown #define WM5100_OUT4LMIX_INPUT_2_SOURCE 0x6B2 2816d4baf08SMark Brown #define WM5100_OUT4LMIX_INPUT_2_VOLUME 0x6B3 2826d4baf08SMark Brown #define WM5100_OUT4LMIX_INPUT_3_SOURCE 0x6B4 2836d4baf08SMark Brown #define WM5100_OUT4LMIX_INPUT_3_VOLUME 0x6B5 2846d4baf08SMark Brown #define WM5100_OUT4LMIX_INPUT_4_SOURCE 0x6B6 2856d4baf08SMark Brown #define WM5100_OUT4LMIX_INPUT_4_VOLUME 0x6B7 2866d4baf08SMark Brown #define WM5100_OUT4RMIX_INPUT_1_SOURCE 0x6B8 2876d4baf08SMark Brown #define WM5100_OUT4RMIX_INPUT_1_VOLUME 0x6B9 2886d4baf08SMark Brown #define WM5100_OUT4RMIX_INPUT_2_SOURCE 0x6BA 2896d4baf08SMark Brown #define WM5100_OUT4RMIX_INPUT_2_VOLUME 0x6BB 2906d4baf08SMark Brown #define WM5100_OUT4RMIX_INPUT_3_SOURCE 0x6BC 2916d4baf08SMark Brown #define WM5100_OUT4RMIX_INPUT_3_VOLUME 0x6BD 2926d4baf08SMark Brown #define WM5100_OUT4RMIX_INPUT_4_SOURCE 0x6BE 2936d4baf08SMark Brown #define WM5100_OUT4RMIX_INPUT_4_VOLUME 0x6BF 2946d4baf08SMark Brown #define WM5100_OUT5LMIX_INPUT_1_SOURCE 0x6C0 2956d4baf08SMark Brown #define WM5100_OUT5LMIX_INPUT_1_VOLUME 0x6C1 2966d4baf08SMark Brown #define WM5100_OUT5LMIX_INPUT_2_SOURCE 0x6C2 2976d4baf08SMark Brown #define WM5100_OUT5LMIX_INPUT_2_VOLUME 0x6C3 2986d4baf08SMark Brown #define WM5100_OUT5LMIX_INPUT_3_SOURCE 0x6C4 2996d4baf08SMark Brown #define WM5100_OUT5LMIX_INPUT_3_VOLUME 0x6C5 3006d4baf08SMark Brown #define WM5100_OUT5LMIX_INPUT_4_SOURCE 0x6C6 3016d4baf08SMark Brown #define WM5100_OUT5LMIX_INPUT_4_VOLUME 0x6C7 3026d4baf08SMark Brown #define WM5100_OUT5RMIX_INPUT_1_SOURCE 0x6C8 3036d4baf08SMark Brown #define WM5100_OUT5RMIX_INPUT_1_VOLUME 0x6C9 3046d4baf08SMark Brown #define WM5100_OUT5RMIX_INPUT_2_SOURCE 0x6CA 3056d4baf08SMark Brown #define WM5100_OUT5RMIX_INPUT_2_VOLUME 0x6CB 3066d4baf08SMark Brown #define WM5100_OUT5RMIX_INPUT_3_SOURCE 0x6CC 3076d4baf08SMark Brown #define WM5100_OUT5RMIX_INPUT_3_VOLUME 0x6CD 3086d4baf08SMark Brown #define WM5100_OUT5RMIX_INPUT_4_SOURCE 0x6CE 3096d4baf08SMark Brown #define WM5100_OUT5RMIX_INPUT_4_VOLUME 0x6CF 3106d4baf08SMark Brown #define WM5100_OUT6LMIX_INPUT_1_SOURCE 0x6D0 3116d4baf08SMark Brown #define WM5100_OUT6LMIX_INPUT_1_VOLUME 0x6D1 3126d4baf08SMark Brown #define WM5100_OUT6LMIX_INPUT_2_SOURCE 0x6D2 3136d4baf08SMark Brown #define WM5100_OUT6LMIX_INPUT_2_VOLUME 0x6D3 3146d4baf08SMark Brown #define WM5100_OUT6LMIX_INPUT_3_SOURCE 0x6D4 3156d4baf08SMark Brown #define WM5100_OUT6LMIX_INPUT_3_VOLUME 0x6D5 3166d4baf08SMark Brown #define WM5100_OUT6LMIX_INPUT_4_SOURCE 0x6D6 3176d4baf08SMark Brown #define WM5100_OUT6LMIX_INPUT_4_VOLUME 0x6D7 3186d4baf08SMark Brown #define WM5100_OUT6RMIX_INPUT_1_SOURCE 0x6D8 3196d4baf08SMark Brown #define WM5100_OUT6RMIX_INPUT_1_VOLUME 0x6D9 3206d4baf08SMark Brown #define WM5100_OUT6RMIX_INPUT_2_SOURCE 0x6DA 3216d4baf08SMark Brown #define WM5100_OUT6RMIX_INPUT_2_VOLUME 0x6DB 3226d4baf08SMark Brown #define WM5100_OUT6RMIX_INPUT_3_SOURCE 0x6DC 3236d4baf08SMark Brown #define WM5100_OUT6RMIX_INPUT_3_VOLUME 0x6DD 3246d4baf08SMark Brown #define WM5100_OUT6RMIX_INPUT_4_SOURCE 0x6DE 3256d4baf08SMark Brown #define WM5100_OUT6RMIX_INPUT_4_VOLUME 0x6DF 3266d4baf08SMark Brown #define WM5100_AIF1TX1MIX_INPUT_1_SOURCE 0x700 3276d4baf08SMark Brown #define WM5100_AIF1TX1MIX_INPUT_1_VOLUME 0x701 3286d4baf08SMark Brown #define WM5100_AIF1TX1MIX_INPUT_2_SOURCE 0x702 3296d4baf08SMark Brown #define WM5100_AIF1TX1MIX_INPUT_2_VOLUME 0x703 3306d4baf08SMark Brown #define WM5100_AIF1TX1MIX_INPUT_3_SOURCE 0x704 3316d4baf08SMark Brown #define WM5100_AIF1TX1MIX_INPUT_3_VOLUME 0x705 3326d4baf08SMark Brown #define WM5100_AIF1TX1MIX_INPUT_4_SOURCE 0x706 3336d4baf08SMark Brown #define WM5100_AIF1TX1MIX_INPUT_4_VOLUME 0x707 3346d4baf08SMark Brown #define WM5100_AIF1TX2MIX_INPUT_1_SOURCE 0x708 3356d4baf08SMark Brown #define WM5100_AIF1TX2MIX_INPUT_1_VOLUME 0x709 3366d4baf08SMark Brown #define WM5100_AIF1TX2MIX_INPUT_2_SOURCE 0x70A 3376d4baf08SMark Brown #define WM5100_AIF1TX2MIX_INPUT_2_VOLUME 0x70B 3386d4baf08SMark Brown #define WM5100_AIF1TX2MIX_INPUT_3_SOURCE 0x70C 3396d4baf08SMark Brown #define WM5100_AIF1TX2MIX_INPUT_3_VOLUME 0x70D 3406d4baf08SMark Brown #define WM5100_AIF1TX2MIX_INPUT_4_SOURCE 0x70E 3416d4baf08SMark Brown #define WM5100_AIF1TX2MIX_INPUT_4_VOLUME 0x70F 3426d4baf08SMark Brown #define WM5100_AIF1TX3MIX_INPUT_1_SOURCE 0x710 3436d4baf08SMark Brown #define WM5100_AIF1TX3MIX_INPUT_1_VOLUME 0x711 3446d4baf08SMark Brown #define WM5100_AIF1TX3MIX_INPUT_2_SOURCE 0x712 3456d4baf08SMark Brown #define WM5100_AIF1TX3MIX_INPUT_2_VOLUME 0x713 3466d4baf08SMark Brown #define WM5100_AIF1TX3MIX_INPUT_3_SOURCE 0x714 3476d4baf08SMark Brown #define WM5100_AIF1TX3MIX_INPUT_3_VOLUME 0x715 3486d4baf08SMark Brown #define WM5100_AIF1TX3MIX_INPUT_4_SOURCE 0x716 3496d4baf08SMark Brown #define WM5100_AIF1TX3MIX_INPUT_4_VOLUME 0x717 3506d4baf08SMark Brown #define WM5100_AIF1TX4MIX_INPUT_1_SOURCE 0x718 3516d4baf08SMark Brown #define WM5100_AIF1TX4MIX_INPUT_1_VOLUME 0x719 3526d4baf08SMark Brown #define WM5100_AIF1TX4MIX_INPUT_2_SOURCE 0x71A 3536d4baf08SMark Brown #define WM5100_AIF1TX4MIX_INPUT_2_VOLUME 0x71B 3546d4baf08SMark Brown #define WM5100_AIF1TX4MIX_INPUT_3_SOURCE 0x71C 3556d4baf08SMark Brown #define WM5100_AIF1TX4MIX_INPUT_3_VOLUME 0x71D 3566d4baf08SMark Brown #define WM5100_AIF1TX4MIX_INPUT_4_SOURCE 0x71E 3576d4baf08SMark Brown #define WM5100_AIF1TX4MIX_INPUT_4_VOLUME 0x71F 3586d4baf08SMark Brown #define WM5100_AIF1TX5MIX_INPUT_1_SOURCE 0x720 3596d4baf08SMark Brown #define WM5100_AIF1TX5MIX_INPUT_1_VOLUME 0x721 3606d4baf08SMark Brown #define WM5100_AIF1TX5MIX_INPUT_2_SOURCE 0x722 3616d4baf08SMark Brown #define WM5100_AIF1TX5MIX_INPUT_2_VOLUME 0x723 3626d4baf08SMark Brown #define WM5100_AIF1TX5MIX_INPUT_3_SOURCE 0x724 3636d4baf08SMark Brown #define WM5100_AIF1TX5MIX_INPUT_3_VOLUME 0x725 3646d4baf08SMark Brown #define WM5100_AIF1TX5MIX_INPUT_4_SOURCE 0x726 3656d4baf08SMark Brown #define WM5100_AIF1TX5MIX_INPUT_4_VOLUME 0x727 3666d4baf08SMark Brown #define WM5100_AIF1TX6MIX_INPUT_1_SOURCE 0x728 3676d4baf08SMark Brown #define WM5100_AIF1TX6MIX_INPUT_1_VOLUME 0x729 3686d4baf08SMark Brown #define WM5100_AIF1TX6MIX_INPUT_2_SOURCE 0x72A 3696d4baf08SMark Brown #define WM5100_AIF1TX6MIX_INPUT_2_VOLUME 0x72B 3706d4baf08SMark Brown #define WM5100_AIF1TX6MIX_INPUT_3_SOURCE 0x72C 3716d4baf08SMark Brown #define WM5100_AIF1TX6MIX_INPUT_3_VOLUME 0x72D 3726d4baf08SMark Brown #define WM5100_AIF1TX6MIX_INPUT_4_SOURCE 0x72E 3736d4baf08SMark Brown #define WM5100_AIF1TX6MIX_INPUT_4_VOLUME 0x72F 3746d4baf08SMark Brown #define WM5100_AIF1TX7MIX_INPUT_1_SOURCE 0x730 3756d4baf08SMark Brown #define WM5100_AIF1TX7MIX_INPUT_1_VOLUME 0x731 3766d4baf08SMark Brown #define WM5100_AIF1TX7MIX_INPUT_2_SOURCE 0x732 3776d4baf08SMark Brown #define WM5100_AIF1TX7MIX_INPUT_2_VOLUME 0x733 3786d4baf08SMark Brown #define WM5100_AIF1TX7MIX_INPUT_3_SOURCE 0x734 3796d4baf08SMark Brown #define WM5100_AIF1TX7MIX_INPUT_3_VOLUME 0x735 3806d4baf08SMark Brown #define WM5100_AIF1TX7MIX_INPUT_4_SOURCE 0x736 3816d4baf08SMark Brown #define WM5100_AIF1TX7MIX_INPUT_4_VOLUME 0x737 3826d4baf08SMark Brown #define WM5100_AIF1TX8MIX_INPUT_1_SOURCE 0x738 3836d4baf08SMark Brown #define WM5100_AIF1TX8MIX_INPUT_1_VOLUME 0x739 3846d4baf08SMark Brown #define WM5100_AIF1TX8MIX_INPUT_2_SOURCE 0x73A 3856d4baf08SMark Brown #define WM5100_AIF1TX8MIX_INPUT_2_VOLUME 0x73B 3866d4baf08SMark Brown #define WM5100_AIF1TX8MIX_INPUT_3_SOURCE 0x73C 3876d4baf08SMark Brown #define WM5100_AIF1TX8MIX_INPUT_3_VOLUME 0x73D 3886d4baf08SMark Brown #define WM5100_AIF1TX8MIX_INPUT_4_SOURCE 0x73E 3896d4baf08SMark Brown #define WM5100_AIF1TX8MIX_INPUT_4_VOLUME 0x73F 3906d4baf08SMark Brown #define WM5100_AIF2TX1MIX_INPUT_1_SOURCE 0x740 3916d4baf08SMark Brown #define WM5100_AIF2TX1MIX_INPUT_1_VOLUME 0x741 3926d4baf08SMark Brown #define WM5100_AIF2TX1MIX_INPUT_2_SOURCE 0x742 3936d4baf08SMark Brown #define WM5100_AIF2TX1MIX_INPUT_2_VOLUME 0x743 3946d4baf08SMark Brown #define WM5100_AIF2TX1MIX_INPUT_3_SOURCE 0x744 3956d4baf08SMark Brown #define WM5100_AIF2TX1MIX_INPUT_3_VOLUME 0x745 3966d4baf08SMark Brown #define WM5100_AIF2TX1MIX_INPUT_4_SOURCE 0x746 3976d4baf08SMark Brown #define WM5100_AIF2TX1MIX_INPUT_4_VOLUME 0x747 3986d4baf08SMark Brown #define WM5100_AIF2TX2MIX_INPUT_1_SOURCE 0x748 3996d4baf08SMark Brown #define WM5100_AIF2TX2MIX_INPUT_1_VOLUME 0x749 4006d4baf08SMark Brown #define WM5100_AIF2TX2MIX_INPUT_2_SOURCE 0x74A 4016d4baf08SMark Brown #define WM5100_AIF2TX2MIX_INPUT_2_VOLUME 0x74B 4026d4baf08SMark Brown #define WM5100_AIF2TX2MIX_INPUT_3_SOURCE 0x74C 4036d4baf08SMark Brown #define WM5100_AIF2TX2MIX_INPUT_3_VOLUME 0x74D 4046d4baf08SMark Brown #define WM5100_AIF2TX2MIX_INPUT_4_SOURCE 0x74E 4056d4baf08SMark Brown #define WM5100_AIF2TX2MIX_INPUT_4_VOLUME 0x74F 4066d4baf08SMark Brown #define WM5100_AIF3TX1MIX_INPUT_1_SOURCE 0x780 4076d4baf08SMark Brown #define WM5100_AIF3TX1MIX_INPUT_1_VOLUME 0x781 4086d4baf08SMark Brown #define WM5100_AIF3TX1MIX_INPUT_2_SOURCE 0x782 4096d4baf08SMark Brown #define WM5100_AIF3TX1MIX_INPUT_2_VOLUME 0x783 4106d4baf08SMark Brown #define WM5100_AIF3TX1MIX_INPUT_3_SOURCE 0x784 4116d4baf08SMark Brown #define WM5100_AIF3TX1MIX_INPUT_3_VOLUME 0x785 4126d4baf08SMark Brown #define WM5100_AIF3TX1MIX_INPUT_4_SOURCE 0x786 4136d4baf08SMark Brown #define WM5100_AIF3TX1MIX_INPUT_4_VOLUME 0x787 4146d4baf08SMark Brown #define WM5100_AIF3TX2MIX_INPUT_1_SOURCE 0x788 4156d4baf08SMark Brown #define WM5100_AIF3TX2MIX_INPUT_1_VOLUME 0x789 4166d4baf08SMark Brown #define WM5100_AIF3TX2MIX_INPUT_2_SOURCE 0x78A 4176d4baf08SMark Brown #define WM5100_AIF3TX2MIX_INPUT_2_VOLUME 0x78B 4186d4baf08SMark Brown #define WM5100_AIF3TX2MIX_INPUT_3_SOURCE 0x78C 4196d4baf08SMark Brown #define WM5100_AIF3TX2MIX_INPUT_3_VOLUME 0x78D 4206d4baf08SMark Brown #define WM5100_AIF3TX2MIX_INPUT_4_SOURCE 0x78E 4216d4baf08SMark Brown #define WM5100_AIF3TX2MIX_INPUT_4_VOLUME 0x78F 4226d4baf08SMark Brown #define WM5100_EQ1MIX_INPUT_1_SOURCE 0x880 4236d4baf08SMark Brown #define WM5100_EQ1MIX_INPUT_1_VOLUME 0x881 4246d4baf08SMark Brown #define WM5100_EQ1MIX_INPUT_2_SOURCE 0x882 4256d4baf08SMark Brown #define WM5100_EQ1MIX_INPUT_2_VOLUME 0x883 4266d4baf08SMark Brown #define WM5100_EQ1MIX_INPUT_3_SOURCE 0x884 4276d4baf08SMark Brown #define WM5100_EQ1MIX_INPUT_3_VOLUME 0x885 4286d4baf08SMark Brown #define WM5100_EQ1MIX_INPUT_4_SOURCE 0x886 4296d4baf08SMark Brown #define WM5100_EQ1MIX_INPUT_4_VOLUME 0x887 4306d4baf08SMark Brown #define WM5100_EQ2MIX_INPUT_1_SOURCE 0x888 4316d4baf08SMark Brown #define WM5100_EQ2MIX_INPUT_1_VOLUME 0x889 4326d4baf08SMark Brown #define WM5100_EQ2MIX_INPUT_2_SOURCE 0x88A 4336d4baf08SMark Brown #define WM5100_EQ2MIX_INPUT_2_VOLUME 0x88B 4346d4baf08SMark Brown #define WM5100_EQ2MIX_INPUT_3_SOURCE 0x88C 4356d4baf08SMark Brown #define WM5100_EQ2MIX_INPUT_3_VOLUME 0x88D 4366d4baf08SMark Brown #define WM5100_EQ2MIX_INPUT_4_SOURCE 0x88E 4376d4baf08SMark Brown #define WM5100_EQ2MIX_INPUT_4_VOLUME 0x88F 4386d4baf08SMark Brown #define WM5100_EQ3MIX_INPUT_1_SOURCE 0x890 4396d4baf08SMark Brown #define WM5100_EQ3MIX_INPUT_1_VOLUME 0x891 4406d4baf08SMark Brown #define WM5100_EQ3MIX_INPUT_2_SOURCE 0x892 4416d4baf08SMark Brown #define WM5100_EQ3MIX_INPUT_2_VOLUME 0x893 4426d4baf08SMark Brown #define WM5100_EQ3MIX_INPUT_3_SOURCE 0x894 4436d4baf08SMark Brown #define WM5100_EQ3MIX_INPUT_3_VOLUME 0x895 4446d4baf08SMark Brown #define WM5100_EQ3MIX_INPUT_4_SOURCE 0x896 4456d4baf08SMark Brown #define WM5100_EQ3MIX_INPUT_4_VOLUME 0x897 4466d4baf08SMark Brown #define WM5100_EQ4MIX_INPUT_1_SOURCE 0x898 4476d4baf08SMark Brown #define WM5100_EQ4MIX_INPUT_1_VOLUME 0x899 4486d4baf08SMark Brown #define WM5100_EQ4MIX_INPUT_2_SOURCE 0x89A 4496d4baf08SMark Brown #define WM5100_EQ4MIX_INPUT_2_VOLUME 0x89B 4506d4baf08SMark Brown #define WM5100_EQ4MIX_INPUT_3_SOURCE 0x89C 4516d4baf08SMark Brown #define WM5100_EQ4MIX_INPUT_3_VOLUME 0x89D 4526d4baf08SMark Brown #define WM5100_EQ4MIX_INPUT_4_SOURCE 0x89E 4536d4baf08SMark Brown #define WM5100_EQ4MIX_INPUT_4_VOLUME 0x89F 4546d4baf08SMark Brown #define WM5100_DRC1LMIX_INPUT_1_SOURCE 0x8C0 4556d4baf08SMark Brown #define WM5100_DRC1LMIX_INPUT_1_VOLUME 0x8C1 4566d4baf08SMark Brown #define WM5100_DRC1LMIX_INPUT_2_SOURCE 0x8C2 4576d4baf08SMark Brown #define WM5100_DRC1LMIX_INPUT_2_VOLUME 0x8C3 4586d4baf08SMark Brown #define WM5100_DRC1LMIX_INPUT_3_SOURCE 0x8C4 4596d4baf08SMark Brown #define WM5100_DRC1LMIX_INPUT_3_VOLUME 0x8C5 4606d4baf08SMark Brown #define WM5100_DRC1LMIX_INPUT_4_SOURCE 0x8C6 4616d4baf08SMark Brown #define WM5100_DRC1LMIX_INPUT_4_VOLUME 0x8C7 4626d4baf08SMark Brown #define WM5100_DRC1RMIX_INPUT_1_SOURCE 0x8C8 4636d4baf08SMark Brown #define WM5100_DRC1RMIX_INPUT_1_VOLUME 0x8C9 4646d4baf08SMark Brown #define WM5100_DRC1RMIX_INPUT_2_SOURCE 0x8CA 4656d4baf08SMark Brown #define WM5100_DRC1RMIX_INPUT_2_VOLUME 0x8CB 4666d4baf08SMark Brown #define WM5100_DRC1RMIX_INPUT_3_SOURCE 0x8CC 4676d4baf08SMark Brown #define WM5100_DRC1RMIX_INPUT_3_VOLUME 0x8CD 4686d4baf08SMark Brown #define WM5100_DRC1RMIX_INPUT_4_SOURCE 0x8CE 4696d4baf08SMark Brown #define WM5100_DRC1RMIX_INPUT_4_VOLUME 0x8CF 4706d4baf08SMark Brown #define WM5100_HPLP1MIX_INPUT_1_SOURCE 0x900 4716d4baf08SMark Brown #define WM5100_HPLP1MIX_INPUT_1_VOLUME 0x901 4726d4baf08SMark Brown #define WM5100_HPLP1MIX_INPUT_2_SOURCE 0x902 4736d4baf08SMark Brown #define WM5100_HPLP1MIX_INPUT_2_VOLUME 0x903 4746d4baf08SMark Brown #define WM5100_HPLP1MIX_INPUT_3_SOURCE 0x904 4756d4baf08SMark Brown #define WM5100_HPLP1MIX_INPUT_3_VOLUME 0x905 4766d4baf08SMark Brown #define WM5100_HPLP1MIX_INPUT_4_SOURCE 0x906 4776d4baf08SMark Brown #define WM5100_HPLP1MIX_INPUT_4_VOLUME 0x907 4786d4baf08SMark Brown #define WM5100_HPLP2MIX_INPUT_1_SOURCE 0x908 4796d4baf08SMark Brown #define WM5100_HPLP2MIX_INPUT_1_VOLUME 0x909 4806d4baf08SMark Brown #define WM5100_HPLP2MIX_INPUT_2_SOURCE 0x90A 4816d4baf08SMark Brown #define WM5100_HPLP2MIX_INPUT_2_VOLUME 0x90B 4826d4baf08SMark Brown #define WM5100_HPLP2MIX_INPUT_3_SOURCE 0x90C 4836d4baf08SMark Brown #define WM5100_HPLP2MIX_INPUT_3_VOLUME 0x90D 4846d4baf08SMark Brown #define WM5100_HPLP2MIX_INPUT_4_SOURCE 0x90E 4856d4baf08SMark Brown #define WM5100_HPLP2MIX_INPUT_4_VOLUME 0x90F 4866d4baf08SMark Brown #define WM5100_HPLP3MIX_INPUT_1_SOURCE 0x910 4876d4baf08SMark Brown #define WM5100_HPLP3MIX_INPUT_1_VOLUME 0x911 4886d4baf08SMark Brown #define WM5100_HPLP3MIX_INPUT_2_SOURCE 0x912 4896d4baf08SMark Brown #define WM5100_HPLP3MIX_INPUT_2_VOLUME 0x913 4906d4baf08SMark Brown #define WM5100_HPLP3MIX_INPUT_3_SOURCE 0x914 4916d4baf08SMark Brown #define WM5100_HPLP3MIX_INPUT_3_VOLUME 0x915 4926d4baf08SMark Brown #define WM5100_HPLP3MIX_INPUT_4_SOURCE 0x916 4936d4baf08SMark Brown #define WM5100_HPLP3MIX_INPUT_4_VOLUME 0x917 4946d4baf08SMark Brown #define WM5100_HPLP4MIX_INPUT_1_SOURCE 0x918 4956d4baf08SMark Brown #define WM5100_HPLP4MIX_INPUT_1_VOLUME 0x919 4966d4baf08SMark Brown #define WM5100_HPLP4MIX_INPUT_2_SOURCE 0x91A 4976d4baf08SMark Brown #define WM5100_HPLP4MIX_INPUT_2_VOLUME 0x91B 4986d4baf08SMark Brown #define WM5100_HPLP4MIX_INPUT_3_SOURCE 0x91C 4996d4baf08SMark Brown #define WM5100_HPLP4MIX_INPUT_3_VOLUME 0x91D 5006d4baf08SMark Brown #define WM5100_HPLP4MIX_INPUT_4_SOURCE 0x91E 5016d4baf08SMark Brown #define WM5100_HPLP4MIX_INPUT_4_VOLUME 0x91F 5026d4baf08SMark Brown #define WM5100_DSP1LMIX_INPUT_1_SOURCE 0x940 5036d4baf08SMark Brown #define WM5100_DSP1LMIX_INPUT_1_VOLUME 0x941 5046d4baf08SMark Brown #define WM5100_DSP1LMIX_INPUT_2_SOURCE 0x942 5056d4baf08SMark Brown #define WM5100_DSP1LMIX_INPUT_2_VOLUME 0x943 5066d4baf08SMark Brown #define WM5100_DSP1LMIX_INPUT_3_SOURCE 0x944 5076d4baf08SMark Brown #define WM5100_DSP1LMIX_INPUT_3_VOLUME 0x945 5086d4baf08SMark Brown #define WM5100_DSP1LMIX_INPUT_4_SOURCE 0x946 5096d4baf08SMark Brown #define WM5100_DSP1LMIX_INPUT_4_VOLUME 0x947 5106d4baf08SMark Brown #define WM5100_DSP1RMIX_INPUT_1_SOURCE 0x948 5116d4baf08SMark Brown #define WM5100_DSP1RMIX_INPUT_1_VOLUME 0x949 5126d4baf08SMark Brown #define WM5100_DSP1RMIX_INPUT_2_SOURCE 0x94A 5136d4baf08SMark Brown #define WM5100_DSP1RMIX_INPUT_2_VOLUME 0x94B 5146d4baf08SMark Brown #define WM5100_DSP1RMIX_INPUT_3_SOURCE 0x94C 5156d4baf08SMark Brown #define WM5100_DSP1RMIX_INPUT_3_VOLUME 0x94D 5166d4baf08SMark Brown #define WM5100_DSP1RMIX_INPUT_4_SOURCE 0x94E 5176d4baf08SMark Brown #define WM5100_DSP1RMIX_INPUT_4_VOLUME 0x94F 5186d4baf08SMark Brown #define WM5100_DSP1AUX1MIX_INPUT_1_SOURCE 0x950 5196d4baf08SMark Brown #define WM5100_DSP1AUX2MIX_INPUT_1_SOURCE 0x958 5206d4baf08SMark Brown #define WM5100_DSP1AUX3MIX_INPUT_1_SOURCE 0x960 5216d4baf08SMark Brown #define WM5100_DSP1AUX4MIX_INPUT_1_SOURCE 0x968 5226d4baf08SMark Brown #define WM5100_DSP1AUX5MIX_INPUT_1_SOURCE 0x970 5236d4baf08SMark Brown #define WM5100_DSP1AUX6MIX_INPUT_1_SOURCE 0x978 5246d4baf08SMark Brown #define WM5100_DSP2LMIX_INPUT_1_SOURCE 0x980 5256d4baf08SMark Brown #define WM5100_DSP2LMIX_INPUT_1_VOLUME 0x981 5266d4baf08SMark Brown #define WM5100_DSP2LMIX_INPUT_2_SOURCE 0x982 5276d4baf08SMark Brown #define WM5100_DSP2LMIX_INPUT_2_VOLUME 0x983 5286d4baf08SMark Brown #define WM5100_DSP2LMIX_INPUT_3_SOURCE 0x984 5296d4baf08SMark Brown #define WM5100_DSP2LMIX_INPUT_3_VOLUME 0x985 5306d4baf08SMark Brown #define WM5100_DSP2LMIX_INPUT_4_SOURCE 0x986 5316d4baf08SMark Brown #define WM5100_DSP2LMIX_INPUT_4_VOLUME 0x987 5326d4baf08SMark Brown #define WM5100_DSP2RMIX_INPUT_1_SOURCE 0x988 5336d4baf08SMark Brown #define WM5100_DSP2RMIX_INPUT_1_VOLUME 0x989 5346d4baf08SMark Brown #define WM5100_DSP2RMIX_INPUT_2_SOURCE 0x98A 5356d4baf08SMark Brown #define WM5100_DSP2RMIX_INPUT_2_VOLUME 0x98B 5366d4baf08SMark Brown #define WM5100_DSP2RMIX_INPUT_3_SOURCE 0x98C 5376d4baf08SMark Brown #define WM5100_DSP2RMIX_INPUT_3_VOLUME 0x98D 5386d4baf08SMark Brown #define WM5100_DSP2RMIX_INPUT_4_SOURCE 0x98E 5396d4baf08SMark Brown #define WM5100_DSP2RMIX_INPUT_4_VOLUME 0x98F 5406d4baf08SMark Brown #define WM5100_DSP2AUX1MIX_INPUT_1_SOURCE 0x990 5416d4baf08SMark Brown #define WM5100_DSP2AUX2MIX_INPUT_1_SOURCE 0x998 5426d4baf08SMark Brown #define WM5100_DSP2AUX3MIX_INPUT_1_SOURCE 0x9A0 5436d4baf08SMark Brown #define WM5100_DSP2AUX4MIX_INPUT_1_SOURCE 0x9A8 5446d4baf08SMark Brown #define WM5100_DSP2AUX5MIX_INPUT_1_SOURCE 0x9B0 5456d4baf08SMark Brown #define WM5100_DSP2AUX6MIX_INPUT_1_SOURCE 0x9B8 5466d4baf08SMark Brown #define WM5100_DSP3LMIX_INPUT_1_SOURCE 0x9C0 5476d4baf08SMark Brown #define WM5100_DSP3LMIX_INPUT_1_VOLUME 0x9C1 5486d4baf08SMark Brown #define WM5100_DSP3LMIX_INPUT_2_SOURCE 0x9C2 5496d4baf08SMark Brown #define WM5100_DSP3LMIX_INPUT_2_VOLUME 0x9C3 5506d4baf08SMark Brown #define WM5100_DSP3LMIX_INPUT_3_SOURCE 0x9C4 5516d4baf08SMark Brown #define WM5100_DSP3LMIX_INPUT_3_VOLUME 0x9C5 5526d4baf08SMark Brown #define WM5100_DSP3LMIX_INPUT_4_SOURCE 0x9C6 5536d4baf08SMark Brown #define WM5100_DSP3LMIX_INPUT_4_VOLUME 0x9C7 5546d4baf08SMark Brown #define WM5100_DSP3RMIX_INPUT_1_SOURCE 0x9C8 5556d4baf08SMark Brown #define WM5100_DSP3RMIX_INPUT_1_VOLUME 0x9C9 5566d4baf08SMark Brown #define WM5100_DSP3RMIX_INPUT_2_SOURCE 0x9CA 5576d4baf08SMark Brown #define WM5100_DSP3RMIX_INPUT_2_VOLUME 0x9CB 5586d4baf08SMark Brown #define WM5100_DSP3RMIX_INPUT_3_SOURCE 0x9CC 5596d4baf08SMark Brown #define WM5100_DSP3RMIX_INPUT_3_VOLUME 0x9CD 5606d4baf08SMark Brown #define WM5100_DSP3RMIX_INPUT_4_SOURCE 0x9CE 5616d4baf08SMark Brown #define WM5100_DSP3RMIX_INPUT_4_VOLUME 0x9CF 5626d4baf08SMark Brown #define WM5100_DSP3AUX1MIX_INPUT_1_SOURCE 0x9D0 5636d4baf08SMark Brown #define WM5100_DSP3AUX2MIX_INPUT_1_SOURCE 0x9D8 5646d4baf08SMark Brown #define WM5100_DSP3AUX3MIX_INPUT_1_SOURCE 0x9E0 5656d4baf08SMark Brown #define WM5100_DSP3AUX4MIX_INPUT_1_SOURCE 0x9E8 5666d4baf08SMark Brown #define WM5100_DSP3AUX5MIX_INPUT_1_SOURCE 0x9F0 5676d4baf08SMark Brown #define WM5100_DSP3AUX6MIX_INPUT_1_SOURCE 0x9F8 5686d4baf08SMark Brown #define WM5100_ASRC1LMIX_INPUT_1_SOURCE 0xA80 5696d4baf08SMark Brown #define WM5100_ASRC1RMIX_INPUT_1_SOURCE 0xA88 5706d4baf08SMark Brown #define WM5100_ASRC2LMIX_INPUT_1_SOURCE 0xA90 5716d4baf08SMark Brown #define WM5100_ASRC2RMIX_INPUT_1_SOURCE 0xA98 5726d4baf08SMark Brown #define WM5100_ISRC1DEC1MIX_INPUT_1_SOURCE 0xB00 5736d4baf08SMark Brown #define WM5100_ISRC1DEC2MIX_INPUT_1_SOURCE 0xB08 5746d4baf08SMark Brown #define WM5100_ISRC1DEC3MIX_INPUT_1_SOURCE 0xB10 5756d4baf08SMark Brown #define WM5100_ISRC1DEC4MIX_INPUT_1_SOURCE 0xB18 5766d4baf08SMark Brown #define WM5100_ISRC1INT1MIX_INPUT_1_SOURCE 0xB20 5776d4baf08SMark Brown #define WM5100_ISRC1INT2MIX_INPUT_1_SOURCE 0xB28 5786d4baf08SMark Brown #define WM5100_ISRC1INT3MIX_INPUT_1_SOURCE 0xB30 5796d4baf08SMark Brown #define WM5100_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38 5806d4baf08SMark Brown #define WM5100_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40 5816d4baf08SMark Brown #define WM5100_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48 5826d4baf08SMark Brown #define WM5100_ISRC2DEC3MIX_INPUT_1_SOURCE 0xB50 5836d4baf08SMark Brown #define WM5100_ISRC2DEC4MIX_INPUT_1_SOURCE 0xB58 5846d4baf08SMark Brown #define WM5100_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60 5856d4baf08SMark Brown #define WM5100_ISRC2INT2MIX_INPUT_1_SOURCE 0xB68 5866d4baf08SMark Brown #define WM5100_ISRC2INT3MIX_INPUT_1_SOURCE 0xB70 5876d4baf08SMark Brown #define WM5100_ISRC2INT4MIX_INPUT_1_SOURCE 0xB78 5886d4baf08SMark Brown #define WM5100_GPIO_CTRL_1 0xC00 5896d4baf08SMark Brown #define WM5100_GPIO_CTRL_2 0xC01 5906d4baf08SMark Brown #define WM5100_GPIO_CTRL_3 0xC02 5916d4baf08SMark Brown #define WM5100_GPIO_CTRL_4 0xC03 5926d4baf08SMark Brown #define WM5100_GPIO_CTRL_5 0xC04 5936d4baf08SMark Brown #define WM5100_GPIO_CTRL_6 0xC05 5946d4baf08SMark Brown #define WM5100_MISC_PAD_CTRL_1 0xC23 5956d4baf08SMark Brown #define WM5100_MISC_PAD_CTRL_2 0xC24 5966d4baf08SMark Brown #define WM5100_MISC_PAD_CTRL_3 0xC25 5976d4baf08SMark Brown #define WM5100_MISC_PAD_CTRL_4 0xC26 5986d4baf08SMark Brown #define WM5100_MISC_PAD_CTRL_5 0xC27 5996d4baf08SMark Brown #define WM5100_MISC_GPIO_1 0xC28 6006d4baf08SMark Brown #define WM5100_INTERRUPT_STATUS_1 0xD00 6016d4baf08SMark Brown #define WM5100_INTERRUPT_STATUS_2 0xD01 6026d4baf08SMark Brown #define WM5100_INTERRUPT_STATUS_3 0xD02 6036d4baf08SMark Brown #define WM5100_INTERRUPT_STATUS_4 0xD03 6046d4baf08SMark Brown #define WM5100_INTERRUPT_RAW_STATUS_2 0xD04 6056d4baf08SMark Brown #define WM5100_INTERRUPT_RAW_STATUS_3 0xD05 6066d4baf08SMark Brown #define WM5100_INTERRUPT_RAW_STATUS_4 0xD06 6076d4baf08SMark Brown #define WM5100_INTERRUPT_STATUS_1_MASK 0xD07 6086d4baf08SMark Brown #define WM5100_INTERRUPT_STATUS_2_MASK 0xD08 6096d4baf08SMark Brown #define WM5100_INTERRUPT_STATUS_3_MASK 0xD09 6106d4baf08SMark Brown #define WM5100_INTERRUPT_STATUS_4_MASK 0xD0A 6116d4baf08SMark Brown #define WM5100_INTERRUPT_CONTROL 0xD1F 6126d4baf08SMark Brown #define WM5100_IRQ_DEBOUNCE_1 0xD20 6136d4baf08SMark Brown #define WM5100_IRQ_DEBOUNCE_2 0xD21 6146d4baf08SMark Brown #define WM5100_FX_CTRL 0xE00 6156d4baf08SMark Brown #define WM5100_EQ1_1 0xE10 6166d4baf08SMark Brown #define WM5100_EQ1_2 0xE11 6176d4baf08SMark Brown #define WM5100_EQ1_3 0xE12 6186d4baf08SMark Brown #define WM5100_EQ1_4 0xE13 6196d4baf08SMark Brown #define WM5100_EQ1_5 0xE14 6206d4baf08SMark Brown #define WM5100_EQ1_6 0xE15 6216d4baf08SMark Brown #define WM5100_EQ1_7 0xE16 6226d4baf08SMark Brown #define WM5100_EQ1_8 0xE17 6236d4baf08SMark Brown #define WM5100_EQ1_9 0xE18 6246d4baf08SMark Brown #define WM5100_EQ1_10 0xE19 6256d4baf08SMark Brown #define WM5100_EQ1_11 0xE1A 6266d4baf08SMark Brown #define WM5100_EQ1_12 0xE1B 6276d4baf08SMark Brown #define WM5100_EQ1_13 0xE1C 6286d4baf08SMark Brown #define WM5100_EQ1_14 0xE1D 6296d4baf08SMark Brown #define WM5100_EQ1_15 0xE1E 6306d4baf08SMark Brown #define WM5100_EQ1_16 0xE1F 6316d4baf08SMark Brown #define WM5100_EQ1_17 0xE20 6326d4baf08SMark Brown #define WM5100_EQ1_18 0xE21 6336d4baf08SMark Brown #define WM5100_EQ1_19 0xE22 6346d4baf08SMark Brown #define WM5100_EQ1_20 0xE23 6356d4baf08SMark Brown #define WM5100_EQ2_1 0xE26 6366d4baf08SMark Brown #define WM5100_EQ2_2 0xE27 6376d4baf08SMark Brown #define WM5100_EQ2_3 0xE28 6386d4baf08SMark Brown #define WM5100_EQ2_4 0xE29 6396d4baf08SMark Brown #define WM5100_EQ2_5 0xE2A 6406d4baf08SMark Brown #define WM5100_EQ2_6 0xE2B 6416d4baf08SMark Brown #define WM5100_EQ2_7 0xE2C 6426d4baf08SMark Brown #define WM5100_EQ2_8 0xE2D 6436d4baf08SMark Brown #define WM5100_EQ2_9 0xE2E 6446d4baf08SMark Brown #define WM5100_EQ2_10 0xE2F 6456d4baf08SMark Brown #define WM5100_EQ2_11 0xE30 6466d4baf08SMark Brown #define WM5100_EQ2_12 0xE31 6476d4baf08SMark Brown #define WM5100_EQ2_13 0xE32 6486d4baf08SMark Brown #define WM5100_EQ2_14 0xE33 6496d4baf08SMark Brown #define WM5100_EQ2_15 0xE34 6506d4baf08SMark Brown #define WM5100_EQ2_16 0xE35 6516d4baf08SMark Brown #define WM5100_EQ2_17 0xE36 6526d4baf08SMark Brown #define WM5100_EQ2_18 0xE37 6536d4baf08SMark Brown #define WM5100_EQ2_19 0xE38 6546d4baf08SMark Brown #define WM5100_EQ2_20 0xE39 6556d4baf08SMark Brown #define WM5100_EQ3_1 0xE3C 6566d4baf08SMark Brown #define WM5100_EQ3_2 0xE3D 6576d4baf08SMark Brown #define WM5100_EQ3_3 0xE3E 6586d4baf08SMark Brown #define WM5100_EQ3_4 0xE3F 6596d4baf08SMark Brown #define WM5100_EQ3_5 0xE40 6606d4baf08SMark Brown #define WM5100_EQ3_6 0xE41 6616d4baf08SMark Brown #define WM5100_EQ3_7 0xE42 6626d4baf08SMark Brown #define WM5100_EQ3_8 0xE43 6636d4baf08SMark Brown #define WM5100_EQ3_9 0xE44 6646d4baf08SMark Brown #define WM5100_EQ3_10 0xE45 6656d4baf08SMark Brown #define WM5100_EQ3_11 0xE46 6666d4baf08SMark Brown #define WM5100_EQ3_12 0xE47 6676d4baf08SMark Brown #define WM5100_EQ3_13 0xE48 6686d4baf08SMark Brown #define WM5100_EQ3_14 0xE49 6696d4baf08SMark Brown #define WM5100_EQ3_15 0xE4A 6706d4baf08SMark Brown #define WM5100_EQ3_16 0xE4B 6716d4baf08SMark Brown #define WM5100_EQ3_17 0xE4C 6726d4baf08SMark Brown #define WM5100_EQ3_18 0xE4D 6736d4baf08SMark Brown #define WM5100_EQ3_19 0xE4E 6746d4baf08SMark Brown #define WM5100_EQ3_20 0xE4F 6756d4baf08SMark Brown #define WM5100_EQ4_1 0xE52 6766d4baf08SMark Brown #define WM5100_EQ4_2 0xE53 6776d4baf08SMark Brown #define WM5100_EQ4_3 0xE54 6786d4baf08SMark Brown #define WM5100_EQ4_4 0xE55 6796d4baf08SMark Brown #define WM5100_EQ4_5 0xE56 6806d4baf08SMark Brown #define WM5100_EQ4_6 0xE57 6816d4baf08SMark Brown #define WM5100_EQ4_7 0xE58 6826d4baf08SMark Brown #define WM5100_EQ4_8 0xE59 6836d4baf08SMark Brown #define WM5100_EQ4_9 0xE5A 6846d4baf08SMark Brown #define WM5100_EQ4_10 0xE5B 6856d4baf08SMark Brown #define WM5100_EQ4_11 0xE5C 6866d4baf08SMark Brown #define WM5100_EQ4_12 0xE5D 6876d4baf08SMark Brown #define WM5100_EQ4_13 0xE5E 6886d4baf08SMark Brown #define WM5100_EQ4_14 0xE5F 6896d4baf08SMark Brown #define WM5100_EQ4_15 0xE60 6906d4baf08SMark Brown #define WM5100_EQ4_16 0xE61 6916d4baf08SMark Brown #define WM5100_EQ4_17 0xE62 6926d4baf08SMark Brown #define WM5100_EQ4_18 0xE63 6936d4baf08SMark Brown #define WM5100_EQ4_19 0xE64 6946d4baf08SMark Brown #define WM5100_EQ4_20 0xE65 6956d4baf08SMark Brown #define WM5100_DRC1_CTRL1 0xE80 6966d4baf08SMark Brown #define WM5100_DRC1_CTRL2 0xE81 6976d4baf08SMark Brown #define WM5100_DRC1_CTRL3 0xE82 6986d4baf08SMark Brown #define WM5100_DRC1_CTRL4 0xE83 6996d4baf08SMark Brown #define WM5100_DRC1_CTRL5 0xE84 7006d4baf08SMark Brown #define WM5100_HPLPF1_1 0xEC0 7016d4baf08SMark Brown #define WM5100_HPLPF1_2 0xEC1 7026d4baf08SMark Brown #define WM5100_HPLPF2_1 0xEC4 7036d4baf08SMark Brown #define WM5100_HPLPF2_2 0xEC5 7046d4baf08SMark Brown #define WM5100_HPLPF3_1 0xEC8 7056d4baf08SMark Brown #define WM5100_HPLPF3_2 0xEC9 7066d4baf08SMark Brown #define WM5100_HPLPF4_1 0xECC 7076d4baf08SMark Brown #define WM5100_HPLPF4_2 0xECD 708fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_1 0xF00 709fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_2 0xF02 710fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_3 0xF03 711fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_4 0xF04 712fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_5 0xF06 713fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_6 0xF07 714fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_7 0xF08 715fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_8 0xF09 716fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_9 0xF0A 717fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_10 0xF0B 718fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_11 0xF0C 719fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_12 0xF0D 720fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_13 0xF0F 721fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_14 0xF10 722fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_15 0xF11 723fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_16 0xF12 724fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_17 0xF13 725fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_18 0xF14 726fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_19 0xF16 727fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_20 0xF17 728fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_21 0xF18 729fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_22 0xF1A 730fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_23 0xF1B 731fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_24 0xF1C 732fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_25 0xF1E 733fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_26 0xF20 734fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_27 0xF21 735fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_28 0xF22 736fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_29 0xF23 737fbe5c580SMark Brown #define WM5100_DSP1_CONTROL_30 0xF24 738fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_1 0x1000 739fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_2 0x1002 740fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_3 0x1003 741fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_4 0x1004 742fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_5 0x1006 743fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_6 0x1007 744fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_7 0x1008 745fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_8 0x1009 746fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_9 0x100A 747fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_10 0x100B 748fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_11 0x100C 749fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_12 0x100D 750fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_13 0x100F 751fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_14 0x1010 752fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_15 0x1011 753fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_16 0x1012 754fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_17 0x1013 755fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_18 0x1014 756fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_19 0x1016 757fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_20 0x1017 758fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_21 0x1018 759fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_22 0x101A 760fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_23 0x101B 761fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_24 0x101C 762fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_25 0x101E 763fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_26 0x1020 764fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_27 0x1021 765fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_28 0x1022 766fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_29 0x1023 767fbe5c580SMark Brown #define WM5100_DSP2_CONTROL_30 0x1024 768fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_1 0x1100 769fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_2 0x1102 770fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_3 0x1103 771fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_4 0x1104 772fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_5 0x1106 773fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_6 0x1107 774fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_7 0x1108 775fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_8 0x1109 776fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_9 0x110A 777fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_10 0x110B 778fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_11 0x110C 779fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_12 0x110D 780fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_13 0x110F 781fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_14 0x1110 782fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_15 0x1111 783fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_16 0x1112 784fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_17 0x1113 785fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_18 0x1114 786fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_19 0x1116 787fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_20 0x1117 788fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_21 0x1118 789fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_22 0x111A 790fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_23 0x111B 791fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_24 0x111C 792fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_25 0x111E 793fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_26 0x1120 794fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_27 0x1121 795fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_28 0x1122 796fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_29 0x1123 797fbe5c580SMark Brown #define WM5100_DSP3_CONTROL_30 0x1124 7986d4baf08SMark Brown #define WM5100_DSP1_DM_0 0x4000 7996d4baf08SMark Brown #define WM5100_DSP1_DM_1 0x4001 8006d4baf08SMark Brown #define WM5100_DSP1_DM_2 0x4002 8016d4baf08SMark Brown #define WM5100_DSP1_DM_3 0x4003 8026d4baf08SMark Brown #define WM5100_DSP1_DM_508 0x41FC 8036d4baf08SMark Brown #define WM5100_DSP1_DM_509 0x41FD 8046d4baf08SMark Brown #define WM5100_DSP1_DM_510 0x41FE 8056d4baf08SMark Brown #define WM5100_DSP1_DM_511 0x41FF 8066d4baf08SMark Brown #define WM5100_DSP1_PM_0 0x4800 8076d4baf08SMark Brown #define WM5100_DSP1_PM_1 0x4801 8086d4baf08SMark Brown #define WM5100_DSP1_PM_2 0x4802 8096d4baf08SMark Brown #define WM5100_DSP1_PM_3 0x4803 8106d4baf08SMark Brown #define WM5100_DSP1_PM_4 0x4804 8116d4baf08SMark Brown #define WM5100_DSP1_PM_5 0x4805 8126d4baf08SMark Brown #define WM5100_DSP1_PM_1530 0x4DFA 8136d4baf08SMark Brown #define WM5100_DSP1_PM_1531 0x4DFB 8146d4baf08SMark Brown #define WM5100_DSP1_PM_1532 0x4DFC 8156d4baf08SMark Brown #define WM5100_DSP1_PM_1533 0x4DFD 8166d4baf08SMark Brown #define WM5100_DSP1_PM_1534 0x4DFE 8176d4baf08SMark Brown #define WM5100_DSP1_PM_1535 0x4DFF 8186d4baf08SMark Brown #define WM5100_DSP1_ZM_0 0x5000 8196d4baf08SMark Brown #define WM5100_DSP1_ZM_1 0x5001 8206d4baf08SMark Brown #define WM5100_DSP1_ZM_2 0x5002 8216d4baf08SMark Brown #define WM5100_DSP1_ZM_3 0x5003 8226d4baf08SMark Brown #define WM5100_DSP1_ZM_2044 0x57FC 8236d4baf08SMark Brown #define WM5100_DSP1_ZM_2045 0x57FD 8246d4baf08SMark Brown #define WM5100_DSP1_ZM_2046 0x57FE 8256d4baf08SMark Brown #define WM5100_DSP1_ZM_2047 0x57FF 8266d4baf08SMark Brown #define WM5100_DSP2_DM_0 0x6000 8276d4baf08SMark Brown #define WM5100_DSP2_DM_1 0x6001 8286d4baf08SMark Brown #define WM5100_DSP2_DM_2 0x6002 8296d4baf08SMark Brown #define WM5100_DSP2_DM_3 0x6003 8306d4baf08SMark Brown #define WM5100_DSP2_DM_508 0x61FC 8316d4baf08SMark Brown #define WM5100_DSP2_DM_509 0x61FD 8326d4baf08SMark Brown #define WM5100_DSP2_DM_510 0x61FE 8336d4baf08SMark Brown #define WM5100_DSP2_DM_511 0x61FF 8346d4baf08SMark Brown #define WM5100_DSP2_PM_0 0x6800 8356d4baf08SMark Brown #define WM5100_DSP2_PM_1 0x6801 8366d4baf08SMark Brown #define WM5100_DSP2_PM_2 0x6802 8376d4baf08SMark Brown #define WM5100_DSP2_PM_3 0x6803 8386d4baf08SMark Brown #define WM5100_DSP2_PM_4 0x6804 8396d4baf08SMark Brown #define WM5100_DSP2_PM_5 0x6805 8406d4baf08SMark Brown #define WM5100_DSP2_PM_1530 0x6DFA 8416d4baf08SMark Brown #define WM5100_DSP2_PM_1531 0x6DFB 8426d4baf08SMark Brown #define WM5100_DSP2_PM_1532 0x6DFC 8436d4baf08SMark Brown #define WM5100_DSP2_PM_1533 0x6DFD 8446d4baf08SMark Brown #define WM5100_DSP2_PM_1534 0x6DFE 8456d4baf08SMark Brown #define WM5100_DSP2_PM_1535 0x6DFF 8466d4baf08SMark Brown #define WM5100_DSP2_ZM_0 0x7000 8476d4baf08SMark Brown #define WM5100_DSP2_ZM_1 0x7001 8486d4baf08SMark Brown #define WM5100_DSP2_ZM_2 0x7002 8496d4baf08SMark Brown #define WM5100_DSP2_ZM_3 0x7003 8506d4baf08SMark Brown #define WM5100_DSP2_ZM_2044 0x77FC 8516d4baf08SMark Brown #define WM5100_DSP2_ZM_2045 0x77FD 8526d4baf08SMark Brown #define WM5100_DSP2_ZM_2046 0x77FE 8536d4baf08SMark Brown #define WM5100_DSP2_ZM_2047 0x77FF 8546d4baf08SMark Brown #define WM5100_DSP3_DM_0 0x8000 8556d4baf08SMark Brown #define WM5100_DSP3_DM_1 0x8001 8566d4baf08SMark Brown #define WM5100_DSP3_DM_2 0x8002 8576d4baf08SMark Brown #define WM5100_DSP3_DM_3 0x8003 8586d4baf08SMark Brown #define WM5100_DSP3_DM_508 0x81FC 8596d4baf08SMark Brown #define WM5100_DSP3_DM_509 0x81FD 8606d4baf08SMark Brown #define WM5100_DSP3_DM_510 0x81FE 8616d4baf08SMark Brown #define WM5100_DSP3_DM_511 0x81FF 8626d4baf08SMark Brown #define WM5100_DSP3_PM_0 0x8800 8636d4baf08SMark Brown #define WM5100_DSP3_PM_1 0x8801 8646d4baf08SMark Brown #define WM5100_DSP3_PM_2 0x8802 8656d4baf08SMark Brown #define WM5100_DSP3_PM_3 0x8803 8666d4baf08SMark Brown #define WM5100_DSP3_PM_4 0x8804 8676d4baf08SMark Brown #define WM5100_DSP3_PM_5 0x8805 8686d4baf08SMark Brown #define WM5100_DSP3_PM_1530 0x8DFA 8696d4baf08SMark Brown #define WM5100_DSP3_PM_1531 0x8DFB 8706d4baf08SMark Brown #define WM5100_DSP3_PM_1532 0x8DFC 8716d4baf08SMark Brown #define WM5100_DSP3_PM_1533 0x8DFD 8726d4baf08SMark Brown #define WM5100_DSP3_PM_1534 0x8DFE 8736d4baf08SMark Brown #define WM5100_DSP3_PM_1535 0x8DFF 8746d4baf08SMark Brown #define WM5100_DSP3_ZM_0 0x9000 8756d4baf08SMark Brown #define WM5100_DSP3_ZM_1 0x9001 8766d4baf08SMark Brown #define WM5100_DSP3_ZM_2 0x9002 8776d4baf08SMark Brown #define WM5100_DSP3_ZM_3 0x9003 8786d4baf08SMark Brown #define WM5100_DSP3_ZM_2044 0x97FC 8796d4baf08SMark Brown #define WM5100_DSP3_ZM_2045 0x97FD 8806d4baf08SMark Brown #define WM5100_DSP3_ZM_2046 0x97FE 8816d4baf08SMark Brown #define WM5100_DSP3_ZM_2047 0x97FF 8826d4baf08SMark Brown 8836d4baf08SMark Brown #define WM5100_REGISTER_COUNT 1435 8846d4baf08SMark Brown #define WM5100_MAX_REGISTER 0x97FF 8856d4baf08SMark Brown 8866d4baf08SMark Brown /* 8876d4baf08SMark Brown * Field Definitions. 8886d4baf08SMark Brown */ 8896d4baf08SMark Brown 8906d4baf08SMark Brown /* 8916d4baf08SMark Brown * R0 (0x00) - software reset 8926d4baf08SMark Brown */ 8936d4baf08SMark Brown #define WM5100_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */ 8946d4baf08SMark Brown #define WM5100_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */ 8956d4baf08SMark Brown #define WM5100_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */ 8966d4baf08SMark Brown 8976d4baf08SMark Brown /* 8986d4baf08SMark Brown * R1 (0x01) - Device Revision 8996d4baf08SMark Brown */ 9006d4baf08SMark Brown #define WM5100_DEVICE_REVISION_MASK 0x000F /* DEVICE_REVISION - [3:0] */ 9016d4baf08SMark Brown #define WM5100_DEVICE_REVISION_SHIFT 0 /* DEVICE_REVISION - [3:0] */ 9026d4baf08SMark Brown #define WM5100_DEVICE_REVISION_WIDTH 4 /* DEVICE_REVISION - [3:0] */ 9036d4baf08SMark Brown 9046d4baf08SMark Brown /* 9056d4baf08SMark Brown * R16 (0x10) - Ctrl IF 1 9066d4baf08SMark Brown */ 9076d4baf08SMark Brown #define WM5100_AUTO_INC 0x0001 /* AUTO_INC */ 9086d4baf08SMark Brown #define WM5100_AUTO_INC_MASK 0x0001 /* AUTO_INC */ 9096d4baf08SMark Brown #define WM5100_AUTO_INC_SHIFT 0 /* AUTO_INC */ 9106d4baf08SMark Brown #define WM5100_AUTO_INC_WIDTH 1 /* AUTO_INC */ 9116d4baf08SMark Brown 9126d4baf08SMark Brown /* 9136d4baf08SMark Brown * R32 (0x20) - Tone Generator 1 9146d4baf08SMark Brown */ 9156d4baf08SMark Brown #define WM5100_TONE_RATE_MASK 0x3000 /* TONE_RATE - [13:12] */ 9166d4baf08SMark Brown #define WM5100_TONE_RATE_SHIFT 12 /* TONE_RATE - [13:12] */ 9176d4baf08SMark Brown #define WM5100_TONE_RATE_WIDTH 2 /* TONE_RATE - [13:12] */ 9186d4baf08SMark Brown #define WM5100_TONE_OFFSET_MASK 0x0300 /* TONE_OFFSET - [9:8] */ 9196d4baf08SMark Brown #define WM5100_TONE_OFFSET_SHIFT 8 /* TONE_OFFSET - [9:8] */ 9206d4baf08SMark Brown #define WM5100_TONE_OFFSET_WIDTH 2 /* TONE_OFFSET - [9:8] */ 9216d4baf08SMark Brown #define WM5100_TONE2_ENA 0x0002 /* TONE2_ENA */ 9226d4baf08SMark Brown #define WM5100_TONE2_ENA_MASK 0x0002 /* TONE2_ENA */ 9236d4baf08SMark Brown #define WM5100_TONE2_ENA_SHIFT 1 /* TONE2_ENA */ 9246d4baf08SMark Brown #define WM5100_TONE2_ENA_WIDTH 1 /* TONE2_ENA */ 9256d4baf08SMark Brown #define WM5100_TONE1_ENA 0x0001 /* TONE1_ENA */ 9266d4baf08SMark Brown #define WM5100_TONE1_ENA_MASK 0x0001 /* TONE1_ENA */ 9276d4baf08SMark Brown #define WM5100_TONE1_ENA_SHIFT 0 /* TONE1_ENA */ 9286d4baf08SMark Brown #define WM5100_TONE1_ENA_WIDTH 1 /* TONE1_ENA */ 9296d4baf08SMark Brown 9306d4baf08SMark Brown /* 9316d4baf08SMark Brown * R48 (0x30) - PWM Drive 1 9326d4baf08SMark Brown */ 9336d4baf08SMark Brown #define WM5100_PWM_RATE_MASK 0x3000 /* PWM_RATE - [13:12] */ 9346d4baf08SMark Brown #define WM5100_PWM_RATE_SHIFT 12 /* PWM_RATE - [13:12] */ 9356d4baf08SMark Brown #define WM5100_PWM_RATE_WIDTH 2 /* PWM_RATE - [13:12] */ 9366d4baf08SMark Brown #define WM5100_PWM_CLK_SEL_MASK 0x0300 /* PWM_CLK_SEL - [9:8] */ 9376d4baf08SMark Brown #define WM5100_PWM_CLK_SEL_SHIFT 8 /* PWM_CLK_SEL - [9:8] */ 9386d4baf08SMark Brown #define WM5100_PWM_CLK_SEL_WIDTH 2 /* PWM_CLK_SEL - [9:8] */ 9396d4baf08SMark Brown #define WM5100_PWM2_OVD 0x0020 /* PWM2_OVD */ 9406d4baf08SMark Brown #define WM5100_PWM2_OVD_MASK 0x0020 /* PWM2_OVD */ 9416d4baf08SMark Brown #define WM5100_PWM2_OVD_SHIFT 5 /* PWM2_OVD */ 9426d4baf08SMark Brown #define WM5100_PWM2_OVD_WIDTH 1 /* PWM2_OVD */ 9436d4baf08SMark Brown #define WM5100_PWM1_OVD 0x0010 /* PWM1_OVD */ 9446d4baf08SMark Brown #define WM5100_PWM1_OVD_MASK 0x0010 /* PWM1_OVD */ 9456d4baf08SMark Brown #define WM5100_PWM1_OVD_SHIFT 4 /* PWM1_OVD */ 9466d4baf08SMark Brown #define WM5100_PWM1_OVD_WIDTH 1 /* PWM1_OVD */ 9476d4baf08SMark Brown #define WM5100_PWM2_ENA 0x0002 /* PWM2_ENA */ 9486d4baf08SMark Brown #define WM5100_PWM2_ENA_MASK 0x0002 /* PWM2_ENA */ 9496d4baf08SMark Brown #define WM5100_PWM2_ENA_SHIFT 1 /* PWM2_ENA */ 9506d4baf08SMark Brown #define WM5100_PWM2_ENA_WIDTH 1 /* PWM2_ENA */ 9516d4baf08SMark Brown #define WM5100_PWM1_ENA 0x0001 /* PWM1_ENA */ 9526d4baf08SMark Brown #define WM5100_PWM1_ENA_MASK 0x0001 /* PWM1_ENA */ 9536d4baf08SMark Brown #define WM5100_PWM1_ENA_SHIFT 0 /* PWM1_ENA */ 9546d4baf08SMark Brown #define WM5100_PWM1_ENA_WIDTH 1 /* PWM1_ENA */ 9556d4baf08SMark Brown 9566d4baf08SMark Brown /* 9576d4baf08SMark Brown * R49 (0x31) - PWM Drive 2 9586d4baf08SMark Brown */ 9596d4baf08SMark Brown #define WM5100_PWM1_LVL_MASK 0x03FF /* PWM1_LVL - [9:0] */ 9606d4baf08SMark Brown #define WM5100_PWM1_LVL_SHIFT 0 /* PWM1_LVL - [9:0] */ 9616d4baf08SMark Brown #define WM5100_PWM1_LVL_WIDTH 10 /* PWM1_LVL - [9:0] */ 9626d4baf08SMark Brown 9636d4baf08SMark Brown /* 9646d4baf08SMark Brown * R50 (0x32) - PWM Drive 3 9656d4baf08SMark Brown */ 9666d4baf08SMark Brown #define WM5100_PWM2_LVL_MASK 0x03FF /* PWM2_LVL - [9:0] */ 9676d4baf08SMark Brown #define WM5100_PWM2_LVL_SHIFT 0 /* PWM2_LVL - [9:0] */ 9686d4baf08SMark Brown #define WM5100_PWM2_LVL_WIDTH 10 /* PWM2_LVL - [9:0] */ 9696d4baf08SMark Brown 9706d4baf08SMark Brown /* 9716d4baf08SMark Brown * R256 (0x100) - Clocking 1 9726d4baf08SMark Brown */ 9736d4baf08SMark Brown #define WM5100_CLK_32K_SRC_MASK 0x000F /* CLK_32K_SRC - [3:0] */ 9746d4baf08SMark Brown #define WM5100_CLK_32K_SRC_SHIFT 0 /* CLK_32K_SRC - [3:0] */ 9756d4baf08SMark Brown #define WM5100_CLK_32K_SRC_WIDTH 4 /* CLK_32K_SRC - [3:0] */ 9766d4baf08SMark Brown 9776d4baf08SMark Brown /* 9786d4baf08SMark Brown * R257 (0x101) - Clocking 3 9796d4baf08SMark Brown */ 9806d4baf08SMark Brown #define WM5100_SYSCLK_FREQ_MASK 0x0700 /* SYSCLK_FREQ - [10:8] */ 9816d4baf08SMark Brown #define WM5100_SYSCLK_FREQ_SHIFT 8 /* SYSCLK_FREQ - [10:8] */ 9826d4baf08SMark Brown #define WM5100_SYSCLK_FREQ_WIDTH 3 /* SYSCLK_FREQ - [10:8] */ 9836d4baf08SMark Brown #define WM5100_SYSCLK_ENA 0x0040 /* SYSCLK_ENA */ 9846d4baf08SMark Brown #define WM5100_SYSCLK_ENA_MASK 0x0040 /* SYSCLK_ENA */ 9856d4baf08SMark Brown #define WM5100_SYSCLK_ENA_SHIFT 6 /* SYSCLK_ENA */ 9866d4baf08SMark Brown #define WM5100_SYSCLK_ENA_WIDTH 1 /* SYSCLK_ENA */ 9876d4baf08SMark Brown #define WM5100_SYSCLK_SRC_MASK 0x000F /* SYSCLK_SRC - [3:0] */ 9886d4baf08SMark Brown #define WM5100_SYSCLK_SRC_SHIFT 0 /* SYSCLK_SRC - [3:0] */ 9896d4baf08SMark Brown #define WM5100_SYSCLK_SRC_WIDTH 4 /* SYSCLK_SRC - [3:0] */ 9906d4baf08SMark Brown 9916d4baf08SMark Brown /* 9926d4baf08SMark Brown * R258 (0x102) - Clocking 4 9936d4baf08SMark Brown */ 9946d4baf08SMark Brown #define WM5100_SAMPLE_RATE_1_MASK 0x001F /* SAMPLE_RATE_1 - [4:0] */ 9956d4baf08SMark Brown #define WM5100_SAMPLE_RATE_1_SHIFT 0 /* SAMPLE_RATE_1 - [4:0] */ 9966d4baf08SMark Brown #define WM5100_SAMPLE_RATE_1_WIDTH 5 /* SAMPLE_RATE_1 - [4:0] */ 9976d4baf08SMark Brown 9986d4baf08SMark Brown /* 9996d4baf08SMark Brown * R259 (0x103) - Clocking 5 10006d4baf08SMark Brown */ 10016d4baf08SMark Brown #define WM5100_SAMPLE_RATE_2_MASK 0x001F /* SAMPLE_RATE_2 - [4:0] */ 10026d4baf08SMark Brown #define WM5100_SAMPLE_RATE_2_SHIFT 0 /* SAMPLE_RATE_2 - [4:0] */ 10036d4baf08SMark Brown #define WM5100_SAMPLE_RATE_2_WIDTH 5 /* SAMPLE_RATE_2 - [4:0] */ 10046d4baf08SMark Brown 10056d4baf08SMark Brown /* 10066d4baf08SMark Brown * R260 (0x104) - Clocking 6 10076d4baf08SMark Brown */ 10086d4baf08SMark Brown #define WM5100_SAMPLE_RATE_3_MASK 0x001F /* SAMPLE_RATE_3 - [4:0] */ 10096d4baf08SMark Brown #define WM5100_SAMPLE_RATE_3_SHIFT 0 /* SAMPLE_RATE_3 - [4:0] */ 10106d4baf08SMark Brown #define WM5100_SAMPLE_RATE_3_WIDTH 5 /* SAMPLE_RATE_3 - [4:0] */ 10116d4baf08SMark Brown 10126d4baf08SMark Brown /* 10136d4baf08SMark Brown * R263 (0x107) - Clocking 7 10146d4baf08SMark Brown */ 10156d4baf08SMark Brown #define WM5100_ASYNC_CLK_FREQ_MASK 0x0700 /* ASYNC_CLK_FREQ - [10:8] */ 10166d4baf08SMark Brown #define WM5100_ASYNC_CLK_FREQ_SHIFT 8 /* ASYNC_CLK_FREQ - [10:8] */ 10176d4baf08SMark Brown #define WM5100_ASYNC_CLK_FREQ_WIDTH 3 /* ASYNC_CLK_FREQ - [10:8] */ 10186d4baf08SMark Brown #define WM5100_ASYNC_CLK_ENA 0x0040 /* ASYNC_CLK_ENA */ 10196d4baf08SMark Brown #define WM5100_ASYNC_CLK_ENA_MASK 0x0040 /* ASYNC_CLK_ENA */ 10206d4baf08SMark Brown #define WM5100_ASYNC_CLK_ENA_SHIFT 6 /* ASYNC_CLK_ENA */ 10216d4baf08SMark Brown #define WM5100_ASYNC_CLK_ENA_WIDTH 1 /* ASYNC_CLK_ENA */ 10226d4baf08SMark Brown #define WM5100_ASYNC_CLK_SRC_MASK 0x000F /* ASYNC_CLK_SRC - [3:0] */ 10236d4baf08SMark Brown #define WM5100_ASYNC_CLK_SRC_SHIFT 0 /* ASYNC_CLK_SRC - [3:0] */ 10246d4baf08SMark Brown #define WM5100_ASYNC_CLK_SRC_WIDTH 4 /* ASYNC_CLK_SRC - [3:0] */ 10256d4baf08SMark Brown 10266d4baf08SMark Brown /* 10276d4baf08SMark Brown * R264 (0x108) - Clocking 8 10286d4baf08SMark Brown */ 10296d4baf08SMark Brown #define WM5100_ASYNC_SAMPLE_RATE_MASK 0x001F /* ASYNC_SAMPLE_RATE - [4:0] */ 10306d4baf08SMark Brown #define WM5100_ASYNC_SAMPLE_RATE_SHIFT 0 /* ASYNC_SAMPLE_RATE - [4:0] */ 10316d4baf08SMark Brown #define WM5100_ASYNC_SAMPLE_RATE_WIDTH 5 /* ASYNC_SAMPLE_RATE - [4:0] */ 10326d4baf08SMark Brown 10336d4baf08SMark Brown /* 10346d4baf08SMark Brown * R288 (0x120) - ASRC_ENABLE 10356d4baf08SMark Brown */ 10366d4baf08SMark Brown #define WM5100_ASRC2L_ENA 0x0008 /* ASRC2L_ENA */ 10376d4baf08SMark Brown #define WM5100_ASRC2L_ENA_MASK 0x0008 /* ASRC2L_ENA */ 10386d4baf08SMark Brown #define WM5100_ASRC2L_ENA_SHIFT 3 /* ASRC2L_ENA */ 10396d4baf08SMark Brown #define WM5100_ASRC2L_ENA_WIDTH 1 /* ASRC2L_ENA */ 10406d4baf08SMark Brown #define WM5100_ASRC2R_ENA 0x0004 /* ASRC2R_ENA */ 10416d4baf08SMark Brown #define WM5100_ASRC2R_ENA_MASK 0x0004 /* ASRC2R_ENA */ 10426d4baf08SMark Brown #define WM5100_ASRC2R_ENA_SHIFT 2 /* ASRC2R_ENA */ 10436d4baf08SMark Brown #define WM5100_ASRC2R_ENA_WIDTH 1 /* ASRC2R_ENA */ 10446d4baf08SMark Brown #define WM5100_ASRC1L_ENA 0x0002 /* ASRC1L_ENA */ 10456d4baf08SMark Brown #define WM5100_ASRC1L_ENA_MASK 0x0002 /* ASRC1L_ENA */ 10466d4baf08SMark Brown #define WM5100_ASRC1L_ENA_SHIFT 1 /* ASRC1L_ENA */ 10476d4baf08SMark Brown #define WM5100_ASRC1L_ENA_WIDTH 1 /* ASRC1L_ENA */ 10486d4baf08SMark Brown #define WM5100_ASRC1R_ENA 0x0001 /* ASRC1R_ENA */ 10496d4baf08SMark Brown #define WM5100_ASRC1R_ENA_MASK 0x0001 /* ASRC1R_ENA */ 10506d4baf08SMark Brown #define WM5100_ASRC1R_ENA_SHIFT 0 /* ASRC1R_ENA */ 10516d4baf08SMark Brown #define WM5100_ASRC1R_ENA_WIDTH 1 /* ASRC1R_ENA */ 10526d4baf08SMark Brown 10536d4baf08SMark Brown /* 10546d4baf08SMark Brown * R289 (0x121) - ASRC_STATUS 10556d4baf08SMark Brown */ 10566d4baf08SMark Brown #define WM5100_ASRC2L_ENA_STS 0x0008 /* ASRC2L_ENA_STS */ 10576d4baf08SMark Brown #define WM5100_ASRC2L_ENA_STS_MASK 0x0008 /* ASRC2L_ENA_STS */ 10586d4baf08SMark Brown #define WM5100_ASRC2L_ENA_STS_SHIFT 3 /* ASRC2L_ENA_STS */ 10596d4baf08SMark Brown #define WM5100_ASRC2L_ENA_STS_WIDTH 1 /* ASRC2L_ENA_STS */ 10606d4baf08SMark Brown #define WM5100_ASRC2R_ENA_STS 0x0004 /* ASRC2R_ENA_STS */ 10616d4baf08SMark Brown #define WM5100_ASRC2R_ENA_STS_MASK 0x0004 /* ASRC2R_ENA_STS */ 10626d4baf08SMark Brown #define WM5100_ASRC2R_ENA_STS_SHIFT 2 /* ASRC2R_ENA_STS */ 10636d4baf08SMark Brown #define WM5100_ASRC2R_ENA_STS_WIDTH 1 /* ASRC2R_ENA_STS */ 10646d4baf08SMark Brown #define WM5100_ASRC1L_ENA_STS 0x0002 /* ASRC1L_ENA_STS */ 10656d4baf08SMark Brown #define WM5100_ASRC1L_ENA_STS_MASK 0x0002 /* ASRC1L_ENA_STS */ 10666d4baf08SMark Brown #define WM5100_ASRC1L_ENA_STS_SHIFT 1 /* ASRC1L_ENA_STS */ 10676d4baf08SMark Brown #define WM5100_ASRC1L_ENA_STS_WIDTH 1 /* ASRC1L_ENA_STS */ 10686d4baf08SMark Brown #define WM5100_ASRC1R_ENA_STS 0x0001 /* ASRC1R_ENA_STS */ 10696d4baf08SMark Brown #define WM5100_ASRC1R_ENA_STS_MASK 0x0001 /* ASRC1R_ENA_STS */ 10706d4baf08SMark Brown #define WM5100_ASRC1R_ENA_STS_SHIFT 0 /* ASRC1R_ENA_STS */ 10716d4baf08SMark Brown #define WM5100_ASRC1R_ENA_STS_WIDTH 1 /* ASRC1R_ENA_STS */ 10726d4baf08SMark Brown 10736d4baf08SMark Brown /* 10746d4baf08SMark Brown * R290 (0x122) - ASRC_RATE1 10756d4baf08SMark Brown */ 10766d4baf08SMark Brown #define WM5100_ASRC_RATE1_MASK 0x0006 /* ASRC_RATE1 - [2:1] */ 10776d4baf08SMark Brown #define WM5100_ASRC_RATE1_SHIFT 1 /* ASRC_RATE1 - [2:1] */ 10786d4baf08SMark Brown #define WM5100_ASRC_RATE1_WIDTH 2 /* ASRC_RATE1 - [2:1] */ 10796d4baf08SMark Brown 10806d4baf08SMark Brown /* 10816d4baf08SMark Brown * R321 (0x141) - ISRC 1 CTRL 1 10826d4baf08SMark Brown */ 10836d4baf08SMark Brown #define WM5100_ISRC1_DFS_ENA 0x2000 /* ISRC1_DFS_ENA */ 10846d4baf08SMark Brown #define WM5100_ISRC1_DFS_ENA_MASK 0x2000 /* ISRC1_DFS_ENA */ 10856d4baf08SMark Brown #define WM5100_ISRC1_DFS_ENA_SHIFT 13 /* ISRC1_DFS_ENA */ 10866d4baf08SMark Brown #define WM5100_ISRC1_DFS_ENA_WIDTH 1 /* ISRC1_DFS_ENA */ 10876d4baf08SMark Brown #define WM5100_ISRC1_CLK_SEL_MASK 0x0300 /* ISRC1_CLK_SEL - [9:8] */ 10886d4baf08SMark Brown #define WM5100_ISRC1_CLK_SEL_SHIFT 8 /* ISRC1_CLK_SEL - [9:8] */ 10896d4baf08SMark Brown #define WM5100_ISRC1_CLK_SEL_WIDTH 2 /* ISRC1_CLK_SEL - [9:8] */ 10906d4baf08SMark Brown #define WM5100_ISRC1_FSH_MASK 0x000C /* ISRC1_FSH - [3:2] */ 10916d4baf08SMark Brown #define WM5100_ISRC1_FSH_SHIFT 2 /* ISRC1_FSH - [3:2] */ 10926d4baf08SMark Brown #define WM5100_ISRC1_FSH_WIDTH 2 /* ISRC1_FSH - [3:2] */ 10936d4baf08SMark Brown #define WM5100_ISRC1_FSL_MASK 0x0003 /* ISRC1_FSL - [1:0] */ 10946d4baf08SMark Brown #define WM5100_ISRC1_FSL_SHIFT 0 /* ISRC1_FSL - [1:0] */ 10956d4baf08SMark Brown #define WM5100_ISRC1_FSL_WIDTH 2 /* ISRC1_FSL - [1:0] */ 10966d4baf08SMark Brown 10976d4baf08SMark Brown /* 10986d4baf08SMark Brown * R322 (0x142) - ISRC 1 CTRL 2 10996d4baf08SMark Brown */ 11006d4baf08SMark Brown #define WM5100_ISRC1_INT1_ENA 0x8000 /* ISRC1_INT1_ENA */ 11016d4baf08SMark Brown #define WM5100_ISRC1_INT1_ENA_MASK 0x8000 /* ISRC1_INT1_ENA */ 11026d4baf08SMark Brown #define WM5100_ISRC1_INT1_ENA_SHIFT 15 /* ISRC1_INT1_ENA */ 11036d4baf08SMark Brown #define WM5100_ISRC1_INT1_ENA_WIDTH 1 /* ISRC1_INT1_ENA */ 11046d4baf08SMark Brown #define WM5100_ISRC1_INT2_ENA 0x4000 /* ISRC1_INT2_ENA */ 11056d4baf08SMark Brown #define WM5100_ISRC1_INT2_ENA_MASK 0x4000 /* ISRC1_INT2_ENA */ 11066d4baf08SMark Brown #define WM5100_ISRC1_INT2_ENA_SHIFT 14 /* ISRC1_INT2_ENA */ 11076d4baf08SMark Brown #define WM5100_ISRC1_INT2_ENA_WIDTH 1 /* ISRC1_INT2_ENA */ 11086d4baf08SMark Brown #define WM5100_ISRC1_INT3_ENA 0x2000 /* ISRC1_INT3_ENA */ 11096d4baf08SMark Brown #define WM5100_ISRC1_INT3_ENA_MASK 0x2000 /* ISRC1_INT3_ENA */ 11106d4baf08SMark Brown #define WM5100_ISRC1_INT3_ENA_SHIFT 13 /* ISRC1_INT3_ENA */ 11116d4baf08SMark Brown #define WM5100_ISRC1_INT3_ENA_WIDTH 1 /* ISRC1_INT3_ENA */ 11126d4baf08SMark Brown #define WM5100_ISRC1_INT4_ENA 0x1000 /* ISRC1_INT4_ENA */ 11136d4baf08SMark Brown #define WM5100_ISRC1_INT4_ENA_MASK 0x1000 /* ISRC1_INT4_ENA */ 11146d4baf08SMark Brown #define WM5100_ISRC1_INT4_ENA_SHIFT 12 /* ISRC1_INT4_ENA */ 11156d4baf08SMark Brown #define WM5100_ISRC1_INT4_ENA_WIDTH 1 /* ISRC1_INT4_ENA */ 11166d4baf08SMark Brown #define WM5100_ISRC1_DEC1_ENA 0x0200 /* ISRC1_DEC1_ENA */ 11176d4baf08SMark Brown #define WM5100_ISRC1_DEC1_ENA_MASK 0x0200 /* ISRC1_DEC1_ENA */ 11186d4baf08SMark Brown #define WM5100_ISRC1_DEC1_ENA_SHIFT 9 /* ISRC1_DEC1_ENA */ 11196d4baf08SMark Brown #define WM5100_ISRC1_DEC1_ENA_WIDTH 1 /* ISRC1_DEC1_ENA */ 11206d4baf08SMark Brown #define WM5100_ISRC1_DEC2_ENA 0x0100 /* ISRC1_DEC2_ENA */ 11216d4baf08SMark Brown #define WM5100_ISRC1_DEC2_ENA_MASK 0x0100 /* ISRC1_DEC2_ENA */ 11226d4baf08SMark Brown #define WM5100_ISRC1_DEC2_ENA_SHIFT 8 /* ISRC1_DEC2_ENA */ 11236d4baf08SMark Brown #define WM5100_ISRC1_DEC2_ENA_WIDTH 1 /* ISRC1_DEC2_ENA */ 11246d4baf08SMark Brown #define WM5100_ISRC1_DEC3_ENA 0x0080 /* ISRC1_DEC3_ENA */ 11256d4baf08SMark Brown #define WM5100_ISRC1_DEC3_ENA_MASK 0x0080 /* ISRC1_DEC3_ENA */ 11266d4baf08SMark Brown #define WM5100_ISRC1_DEC3_ENA_SHIFT 7 /* ISRC1_DEC3_ENA */ 11276d4baf08SMark Brown #define WM5100_ISRC1_DEC3_ENA_WIDTH 1 /* ISRC1_DEC3_ENA */ 11286d4baf08SMark Brown #define WM5100_ISRC1_DEC4_ENA 0x0040 /* ISRC1_DEC4_ENA */ 11296d4baf08SMark Brown #define WM5100_ISRC1_DEC4_ENA_MASK 0x0040 /* ISRC1_DEC4_ENA */ 11306d4baf08SMark Brown #define WM5100_ISRC1_DEC4_ENA_SHIFT 6 /* ISRC1_DEC4_ENA */ 11316d4baf08SMark Brown #define WM5100_ISRC1_DEC4_ENA_WIDTH 1 /* ISRC1_DEC4_ENA */ 11326d4baf08SMark Brown #define WM5100_ISRC1_NOTCH_ENA 0x0001 /* ISRC1_NOTCH_ENA */ 11336d4baf08SMark Brown #define WM5100_ISRC1_NOTCH_ENA_MASK 0x0001 /* ISRC1_NOTCH_ENA */ 11346d4baf08SMark Brown #define WM5100_ISRC1_NOTCH_ENA_SHIFT 0 /* ISRC1_NOTCH_ENA */ 11356d4baf08SMark Brown #define WM5100_ISRC1_NOTCH_ENA_WIDTH 1 /* ISRC1_NOTCH_ENA */ 11366d4baf08SMark Brown 11376d4baf08SMark Brown /* 11386d4baf08SMark Brown * R323 (0x143) - ISRC 2 CTRL1 11396d4baf08SMark Brown */ 11406d4baf08SMark Brown #define WM5100_ISRC2_DFS_ENA 0x2000 /* ISRC2_DFS_ENA */ 11416d4baf08SMark Brown #define WM5100_ISRC2_DFS_ENA_MASK 0x2000 /* ISRC2_DFS_ENA */ 11426d4baf08SMark Brown #define WM5100_ISRC2_DFS_ENA_SHIFT 13 /* ISRC2_DFS_ENA */ 11436d4baf08SMark Brown #define WM5100_ISRC2_DFS_ENA_WIDTH 1 /* ISRC2_DFS_ENA */ 11446d4baf08SMark Brown #define WM5100_ISRC2_CLK_SEL_MASK 0x0300 /* ISRC2_CLK_SEL - [9:8] */ 11456d4baf08SMark Brown #define WM5100_ISRC2_CLK_SEL_SHIFT 8 /* ISRC2_CLK_SEL - [9:8] */ 11466d4baf08SMark Brown #define WM5100_ISRC2_CLK_SEL_WIDTH 2 /* ISRC2_CLK_SEL - [9:8] */ 11476d4baf08SMark Brown #define WM5100_ISRC2_FSH_MASK 0x000C /* ISRC2_FSH - [3:2] */ 11486d4baf08SMark Brown #define WM5100_ISRC2_FSH_SHIFT 2 /* ISRC2_FSH - [3:2] */ 11496d4baf08SMark Brown #define WM5100_ISRC2_FSH_WIDTH 2 /* ISRC2_FSH - [3:2] */ 11506d4baf08SMark Brown #define WM5100_ISRC2_FSL_MASK 0x0003 /* ISRC2_FSL - [1:0] */ 11516d4baf08SMark Brown #define WM5100_ISRC2_FSL_SHIFT 0 /* ISRC2_FSL - [1:0] */ 11526d4baf08SMark Brown #define WM5100_ISRC2_FSL_WIDTH 2 /* ISRC2_FSL - [1:0] */ 11536d4baf08SMark Brown 11546d4baf08SMark Brown /* 11556d4baf08SMark Brown * R324 (0x144) - ISRC 2 CTRL 2 11566d4baf08SMark Brown */ 11576d4baf08SMark Brown #define WM5100_ISRC2_INT1_ENA 0x8000 /* ISRC2_INT1_ENA */ 11586d4baf08SMark Brown #define WM5100_ISRC2_INT1_ENA_MASK 0x8000 /* ISRC2_INT1_ENA */ 11596d4baf08SMark Brown #define WM5100_ISRC2_INT1_ENA_SHIFT 15 /* ISRC2_INT1_ENA */ 11606d4baf08SMark Brown #define WM5100_ISRC2_INT1_ENA_WIDTH 1 /* ISRC2_INT1_ENA */ 11616d4baf08SMark Brown #define WM5100_ISRC2_INT2_ENA 0x4000 /* ISRC2_INT2_ENA */ 11626d4baf08SMark Brown #define WM5100_ISRC2_INT2_ENA_MASK 0x4000 /* ISRC2_INT2_ENA */ 11636d4baf08SMark Brown #define WM5100_ISRC2_INT2_ENA_SHIFT 14 /* ISRC2_INT2_ENA */ 11646d4baf08SMark Brown #define WM5100_ISRC2_INT2_ENA_WIDTH 1 /* ISRC2_INT2_ENA */ 11656d4baf08SMark Brown #define WM5100_ISRC2_INT3_ENA 0x2000 /* ISRC2_INT3_ENA */ 11666d4baf08SMark Brown #define WM5100_ISRC2_INT3_ENA_MASK 0x2000 /* ISRC2_INT3_ENA */ 11676d4baf08SMark Brown #define WM5100_ISRC2_INT3_ENA_SHIFT 13 /* ISRC2_INT3_ENA */ 11686d4baf08SMark Brown #define WM5100_ISRC2_INT3_ENA_WIDTH 1 /* ISRC2_INT3_ENA */ 11696d4baf08SMark Brown #define WM5100_ISRC2_INT4_ENA 0x1000 /* ISRC2_INT4_ENA */ 11706d4baf08SMark Brown #define WM5100_ISRC2_INT4_ENA_MASK 0x1000 /* ISRC2_INT4_ENA */ 11716d4baf08SMark Brown #define WM5100_ISRC2_INT4_ENA_SHIFT 12 /* ISRC2_INT4_ENA */ 11726d4baf08SMark Brown #define WM5100_ISRC2_INT4_ENA_WIDTH 1 /* ISRC2_INT4_ENA */ 11736d4baf08SMark Brown #define WM5100_ISRC2_DEC1_ENA 0x0200 /* ISRC2_DEC1_ENA */ 11746d4baf08SMark Brown #define WM5100_ISRC2_DEC1_ENA_MASK 0x0200 /* ISRC2_DEC1_ENA */ 11756d4baf08SMark Brown #define WM5100_ISRC2_DEC1_ENA_SHIFT 9 /* ISRC2_DEC1_ENA */ 11766d4baf08SMark Brown #define WM5100_ISRC2_DEC1_ENA_WIDTH 1 /* ISRC2_DEC1_ENA */ 11776d4baf08SMark Brown #define WM5100_ISRC2_DEC2_ENA 0x0100 /* ISRC2_DEC2_ENA */ 11786d4baf08SMark Brown #define WM5100_ISRC2_DEC2_ENA_MASK 0x0100 /* ISRC2_DEC2_ENA */ 11796d4baf08SMark Brown #define WM5100_ISRC2_DEC2_ENA_SHIFT 8 /* ISRC2_DEC2_ENA */ 11806d4baf08SMark Brown #define WM5100_ISRC2_DEC2_ENA_WIDTH 1 /* ISRC2_DEC2_ENA */ 11816d4baf08SMark Brown #define WM5100_ISRC2_DEC3_ENA 0x0080 /* ISRC2_DEC3_ENA */ 11826d4baf08SMark Brown #define WM5100_ISRC2_DEC3_ENA_MASK 0x0080 /* ISRC2_DEC3_ENA */ 11836d4baf08SMark Brown #define WM5100_ISRC2_DEC3_ENA_SHIFT 7 /* ISRC2_DEC3_ENA */ 11846d4baf08SMark Brown #define WM5100_ISRC2_DEC3_ENA_WIDTH 1 /* ISRC2_DEC3_ENA */ 11856d4baf08SMark Brown #define WM5100_ISRC2_DEC4_ENA 0x0040 /* ISRC2_DEC4_ENA */ 11866d4baf08SMark Brown #define WM5100_ISRC2_DEC4_ENA_MASK 0x0040 /* ISRC2_DEC4_ENA */ 11876d4baf08SMark Brown #define WM5100_ISRC2_DEC4_ENA_SHIFT 6 /* ISRC2_DEC4_ENA */ 11886d4baf08SMark Brown #define WM5100_ISRC2_DEC4_ENA_WIDTH 1 /* ISRC2_DEC4_ENA */ 11896d4baf08SMark Brown #define WM5100_ISRC2_NOTCH_ENA 0x0001 /* ISRC2_NOTCH_ENA */ 11906d4baf08SMark Brown #define WM5100_ISRC2_NOTCH_ENA_MASK 0x0001 /* ISRC2_NOTCH_ENA */ 11916d4baf08SMark Brown #define WM5100_ISRC2_NOTCH_ENA_SHIFT 0 /* ISRC2_NOTCH_ENA */ 11926d4baf08SMark Brown #define WM5100_ISRC2_NOTCH_ENA_WIDTH 1 /* ISRC2_NOTCH_ENA */ 11936d4baf08SMark Brown 11946d4baf08SMark Brown /* 11956d4baf08SMark Brown * R386 (0x182) - FLL1 Control 1 11966d4baf08SMark Brown */ 11976d4baf08SMark Brown #define WM5100_FLL1_ENA 0x0001 /* FLL1_ENA */ 11986d4baf08SMark Brown #define WM5100_FLL1_ENA_MASK 0x0001 /* FLL1_ENA */ 11996d4baf08SMark Brown #define WM5100_FLL1_ENA_SHIFT 0 /* FLL1_ENA */ 12006d4baf08SMark Brown #define WM5100_FLL1_ENA_WIDTH 1 /* FLL1_ENA */ 12016d4baf08SMark Brown 12026d4baf08SMark Brown /* 12036d4baf08SMark Brown * R387 (0x183) - FLL1 Control 2 12046d4baf08SMark Brown */ 12056d4baf08SMark Brown #define WM5100_FLL1_OUTDIV_MASK 0x3F00 /* FLL1_OUTDIV - [13:8] */ 12066d4baf08SMark Brown #define WM5100_FLL1_OUTDIV_SHIFT 8 /* FLL1_OUTDIV - [13:8] */ 12076d4baf08SMark Brown #define WM5100_FLL1_OUTDIV_WIDTH 6 /* FLL1_OUTDIV - [13:8] */ 12086d4baf08SMark Brown #define WM5100_FLL1_FRATIO_MASK 0x0007 /* FLL1_FRATIO - [2:0] */ 12096d4baf08SMark Brown #define WM5100_FLL1_FRATIO_SHIFT 0 /* FLL1_FRATIO - [2:0] */ 12106d4baf08SMark Brown #define WM5100_FLL1_FRATIO_WIDTH 3 /* FLL1_FRATIO - [2:0] */ 12116d4baf08SMark Brown 12126d4baf08SMark Brown /* 12136d4baf08SMark Brown * R388 (0x184) - FLL1 Control 3 12146d4baf08SMark Brown */ 12156d4baf08SMark Brown #define WM5100_FLL1_THETA_MASK 0xFFFF /* FLL1_THETA - [15:0] */ 12166d4baf08SMark Brown #define WM5100_FLL1_THETA_SHIFT 0 /* FLL1_THETA - [15:0] */ 12176d4baf08SMark Brown #define WM5100_FLL1_THETA_WIDTH 16 /* FLL1_THETA - [15:0] */ 12186d4baf08SMark Brown 12196d4baf08SMark Brown /* 12206d4baf08SMark Brown * R390 (0x186) - FLL1 Control 5 12216d4baf08SMark Brown */ 12226d4baf08SMark Brown #define WM5100_FLL1_N_MASK 0x03FF /* FLL1_N - [9:0] */ 12236d4baf08SMark Brown #define WM5100_FLL1_N_SHIFT 0 /* FLL1_N - [9:0] */ 12246d4baf08SMark Brown #define WM5100_FLL1_N_WIDTH 10 /* FLL1_N - [9:0] */ 12256d4baf08SMark Brown 12266d4baf08SMark Brown /* 12276d4baf08SMark Brown * R391 (0x187) - FLL1 Control 6 12286d4baf08SMark Brown */ 12296d4baf08SMark Brown #define WM5100_FLL1_REFCLK_DIV_MASK 0x00C0 /* FLL1_REFCLK_DIV - [7:6] */ 12306d4baf08SMark Brown #define WM5100_FLL1_REFCLK_DIV_SHIFT 6 /* FLL1_REFCLK_DIV - [7:6] */ 12316d4baf08SMark Brown #define WM5100_FLL1_REFCLK_DIV_WIDTH 2 /* FLL1_REFCLK_DIV - [7:6] */ 12326d4baf08SMark Brown #define WM5100_FLL1_REFCLK_SRC_MASK 0x000F /* FLL1_REFCLK_SRC - [3:0] */ 12336d4baf08SMark Brown #define WM5100_FLL1_REFCLK_SRC_SHIFT 0 /* FLL1_REFCLK_SRC - [3:0] */ 12346d4baf08SMark Brown #define WM5100_FLL1_REFCLK_SRC_WIDTH 4 /* FLL1_REFCLK_SRC - [3:0] */ 12356d4baf08SMark Brown 12366d4baf08SMark Brown /* 12376d4baf08SMark Brown * R392 (0x188) - FLL1 EFS 1 12386d4baf08SMark Brown */ 12396d4baf08SMark Brown #define WM5100_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */ 12406d4baf08SMark Brown #define WM5100_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */ 12416d4baf08SMark Brown #define WM5100_FLL1_LAMBDA_WIDTH 16 /* FLL1_LAMBDA - [15:0] */ 12426d4baf08SMark Brown 12436d4baf08SMark Brown /* 12446d4baf08SMark Brown * R418 (0x1A2) - FLL2 Control 1 12456d4baf08SMark Brown */ 12466d4baf08SMark Brown #define WM5100_FLL2_ENA 0x0001 /* FLL2_ENA */ 12476d4baf08SMark Brown #define WM5100_FLL2_ENA_MASK 0x0001 /* FLL2_ENA */ 12486d4baf08SMark Brown #define WM5100_FLL2_ENA_SHIFT 0 /* FLL2_ENA */ 12496d4baf08SMark Brown #define WM5100_FLL2_ENA_WIDTH 1 /* FLL2_ENA */ 12506d4baf08SMark Brown 12516d4baf08SMark Brown /* 12526d4baf08SMark Brown * R419 (0x1A3) - FLL2 Control 2 12536d4baf08SMark Brown */ 12546d4baf08SMark Brown #define WM5100_FLL2_OUTDIV_MASK 0x3F00 /* FLL2_OUTDIV - [13:8] */ 12556d4baf08SMark Brown #define WM5100_FLL2_OUTDIV_SHIFT 8 /* FLL2_OUTDIV - [13:8] */ 12566d4baf08SMark Brown #define WM5100_FLL2_OUTDIV_WIDTH 6 /* FLL2_OUTDIV - [13:8] */ 12576d4baf08SMark Brown #define WM5100_FLL2_FRATIO_MASK 0x0007 /* FLL2_FRATIO - [2:0] */ 12586d4baf08SMark Brown #define WM5100_FLL2_FRATIO_SHIFT 0 /* FLL2_FRATIO - [2:0] */ 12596d4baf08SMark Brown #define WM5100_FLL2_FRATIO_WIDTH 3 /* FLL2_FRATIO - [2:0] */ 12606d4baf08SMark Brown 12616d4baf08SMark Brown /* 12626d4baf08SMark Brown * R420 (0x1A4) - FLL2 Control 3 12636d4baf08SMark Brown */ 12646d4baf08SMark Brown #define WM5100_FLL2_THETA_MASK 0xFFFF /* FLL2_THETA - [15:0] */ 12656d4baf08SMark Brown #define WM5100_FLL2_THETA_SHIFT 0 /* FLL2_THETA - [15:0] */ 12666d4baf08SMark Brown #define WM5100_FLL2_THETA_WIDTH 16 /* FLL2_THETA - [15:0] */ 12676d4baf08SMark Brown 12686d4baf08SMark Brown /* 12696d4baf08SMark Brown * R422 (0x1A6) - FLL2 Control 5 12706d4baf08SMark Brown */ 12716d4baf08SMark Brown #define WM5100_FLL2_N_MASK 0x03FF /* FLL2_N - [9:0] */ 12726d4baf08SMark Brown #define WM5100_FLL2_N_SHIFT 0 /* FLL2_N - [9:0] */ 12736d4baf08SMark Brown #define WM5100_FLL2_N_WIDTH 10 /* FLL2_N - [9:0] */ 12746d4baf08SMark Brown 12756d4baf08SMark Brown /* 12766d4baf08SMark Brown * R423 (0x1A7) - FLL2 Control 6 12776d4baf08SMark Brown */ 12786d4baf08SMark Brown #define WM5100_FLL2_REFCLK_DIV_MASK 0x00C0 /* FLL2_REFCLK_DIV - [7:6] */ 12796d4baf08SMark Brown #define WM5100_FLL2_REFCLK_DIV_SHIFT 6 /* FLL2_REFCLK_DIV - [7:6] */ 12806d4baf08SMark Brown #define WM5100_FLL2_REFCLK_DIV_WIDTH 2 /* FLL2_REFCLK_DIV - [7:6] */ 12816d4baf08SMark Brown #define WM5100_FLL2_REFCLK_SRC_MASK 0x000F /* FLL2_REFCLK_SRC - [3:0] */ 12826d4baf08SMark Brown #define WM5100_FLL2_REFCLK_SRC_SHIFT 0 /* FLL2_REFCLK_SRC - [3:0] */ 12836d4baf08SMark Brown #define WM5100_FLL2_REFCLK_SRC_WIDTH 4 /* FLL2_REFCLK_SRC - [3:0] */ 12846d4baf08SMark Brown 12856d4baf08SMark Brown /* 12866d4baf08SMark Brown * R424 (0x1A8) - FLL2 EFS 1 12876d4baf08SMark Brown */ 12886d4baf08SMark Brown #define WM5100_FLL2_LAMBDA_MASK 0xFFFF /* FLL2_LAMBDA - [15:0] */ 12896d4baf08SMark Brown #define WM5100_FLL2_LAMBDA_SHIFT 0 /* FLL2_LAMBDA - [15:0] */ 12906d4baf08SMark Brown #define WM5100_FLL2_LAMBDA_WIDTH 16 /* FLL2_LAMBDA - [15:0] */ 12916d4baf08SMark Brown 12926d4baf08SMark Brown /* 12936d4baf08SMark Brown * R512 (0x200) - Mic Charge Pump 1 12946d4baf08SMark Brown */ 12956d4baf08SMark Brown #define WM5100_CP2_BYPASS 0x0020 /* CP2_BYPASS */ 12966d4baf08SMark Brown #define WM5100_CP2_BYPASS_MASK 0x0020 /* CP2_BYPASS */ 12976d4baf08SMark Brown #define WM5100_CP2_BYPASS_SHIFT 5 /* CP2_BYPASS */ 12986d4baf08SMark Brown #define WM5100_CP2_BYPASS_WIDTH 1 /* CP2_BYPASS */ 12996d4baf08SMark Brown #define WM5100_CP2_ENA 0x0001 /* CP2_ENA */ 13006d4baf08SMark Brown #define WM5100_CP2_ENA_MASK 0x0001 /* CP2_ENA */ 13016d4baf08SMark Brown #define WM5100_CP2_ENA_SHIFT 0 /* CP2_ENA */ 13026d4baf08SMark Brown #define WM5100_CP2_ENA_WIDTH 1 /* CP2_ENA */ 13036d4baf08SMark Brown 13046d4baf08SMark Brown /* 13056d4baf08SMark Brown * R513 (0x201) - Mic Charge Pump 2 13066d4baf08SMark Brown */ 13076d4baf08SMark Brown #define WM5100_LDO2_VSEL_MASK 0xF800 /* LDO2_VSEL - [15:11] */ 13086d4baf08SMark Brown #define WM5100_LDO2_VSEL_SHIFT 11 /* LDO2_VSEL - [15:11] */ 13096d4baf08SMark Brown #define WM5100_LDO2_VSEL_WIDTH 5 /* LDO2_VSEL - [15:11] */ 13106d4baf08SMark Brown 13116d4baf08SMark Brown /* 13126d4baf08SMark Brown * R514 (0x202) - HP Charge Pump 1 13136d4baf08SMark Brown */ 13146d4baf08SMark Brown #define WM5100_CP1_ENA 0x0001 /* CP1_ENA */ 13156d4baf08SMark Brown #define WM5100_CP1_ENA_MASK 0x0001 /* CP1_ENA */ 13166d4baf08SMark Brown #define WM5100_CP1_ENA_SHIFT 0 /* CP1_ENA */ 13176d4baf08SMark Brown #define WM5100_CP1_ENA_WIDTH 1 /* CP1_ENA */ 13186d4baf08SMark Brown 13196d4baf08SMark Brown /* 13206d4baf08SMark Brown * R529 (0x211) - LDO1 Control 13216d4baf08SMark Brown */ 13226d4baf08SMark Brown #define WM5100_LDO1_BYPASS 0x0002 /* LDO1_BYPASS */ 13236d4baf08SMark Brown #define WM5100_LDO1_BYPASS_MASK 0x0002 /* LDO1_BYPASS */ 13246d4baf08SMark Brown #define WM5100_LDO1_BYPASS_SHIFT 1 /* LDO1_BYPASS */ 13256d4baf08SMark Brown #define WM5100_LDO1_BYPASS_WIDTH 1 /* LDO1_BYPASS */ 13266d4baf08SMark Brown 13276d4baf08SMark Brown /* 13286d4baf08SMark Brown * R533 (0x215) - Mic Bias Ctrl 1 13296d4baf08SMark Brown */ 13306d4baf08SMark Brown #define WM5100_MICB1_DISCH 0x0040 /* MICB1_DISCH */ 13316d4baf08SMark Brown #define WM5100_MICB1_DISCH_MASK 0x0040 /* MICB1_DISCH */ 13326d4baf08SMark Brown #define WM5100_MICB1_DISCH_SHIFT 6 /* MICB1_DISCH */ 13336d4baf08SMark Brown #define WM5100_MICB1_DISCH_WIDTH 1 /* MICB1_DISCH */ 13346d4baf08SMark Brown #define WM5100_MICB1_RATE 0x0020 /* MICB1_RATE */ 13356d4baf08SMark Brown #define WM5100_MICB1_RATE_MASK 0x0020 /* MICB1_RATE */ 13366d4baf08SMark Brown #define WM5100_MICB1_RATE_SHIFT 5 /* MICB1_RATE */ 13376d4baf08SMark Brown #define WM5100_MICB1_RATE_WIDTH 1 /* MICB1_RATE */ 13386d4baf08SMark Brown #define WM5100_MICB1_LVL_MASK 0x001C /* MICB1_LVL - [4:2] */ 13396d4baf08SMark Brown #define WM5100_MICB1_LVL_SHIFT 2 /* MICB1_LVL - [4:2] */ 13406d4baf08SMark Brown #define WM5100_MICB1_LVL_WIDTH 3 /* MICB1_LVL - [4:2] */ 13416d4baf08SMark Brown #define WM5100_MICB1_BYPASS 0x0002 /* MICB1_BYPASS */ 13426d4baf08SMark Brown #define WM5100_MICB1_BYPASS_MASK 0x0002 /* MICB1_BYPASS */ 13436d4baf08SMark Brown #define WM5100_MICB1_BYPASS_SHIFT 1 /* MICB1_BYPASS */ 13446d4baf08SMark Brown #define WM5100_MICB1_BYPASS_WIDTH 1 /* MICB1_BYPASS */ 13456d4baf08SMark Brown #define WM5100_MICB1_ENA 0x0001 /* MICB1_ENA */ 13466d4baf08SMark Brown #define WM5100_MICB1_ENA_MASK 0x0001 /* MICB1_ENA */ 13476d4baf08SMark Brown #define WM5100_MICB1_ENA_SHIFT 0 /* MICB1_ENA */ 13486d4baf08SMark Brown #define WM5100_MICB1_ENA_WIDTH 1 /* MICB1_ENA */ 13496d4baf08SMark Brown 13506d4baf08SMark Brown /* 13516d4baf08SMark Brown * R534 (0x216) - Mic Bias Ctrl 2 13526d4baf08SMark Brown */ 13536d4baf08SMark Brown #define WM5100_MICB2_DISCH 0x0040 /* MICB2_DISCH */ 13546d4baf08SMark Brown #define WM5100_MICB2_DISCH_MASK 0x0040 /* MICB2_DISCH */ 13556d4baf08SMark Brown #define WM5100_MICB2_DISCH_SHIFT 6 /* MICB2_DISCH */ 13566d4baf08SMark Brown #define WM5100_MICB2_DISCH_WIDTH 1 /* MICB2_DISCH */ 13576d4baf08SMark Brown #define WM5100_MICB2_RATE 0x0020 /* MICB2_RATE */ 13586d4baf08SMark Brown #define WM5100_MICB2_RATE_MASK 0x0020 /* MICB2_RATE */ 13596d4baf08SMark Brown #define WM5100_MICB2_RATE_SHIFT 5 /* MICB2_RATE */ 13606d4baf08SMark Brown #define WM5100_MICB2_RATE_WIDTH 1 /* MICB2_RATE */ 13616d4baf08SMark Brown #define WM5100_MICB2_LVL_MASK 0x001C /* MICB2_LVL - [4:2] */ 13626d4baf08SMark Brown #define WM5100_MICB2_LVL_SHIFT 2 /* MICB2_LVL - [4:2] */ 13636d4baf08SMark Brown #define WM5100_MICB2_LVL_WIDTH 3 /* MICB2_LVL - [4:2] */ 13646d4baf08SMark Brown #define WM5100_MICB2_BYPASS 0x0002 /* MICB2_BYPASS */ 13656d4baf08SMark Brown #define WM5100_MICB2_BYPASS_MASK 0x0002 /* MICB2_BYPASS */ 13666d4baf08SMark Brown #define WM5100_MICB2_BYPASS_SHIFT 1 /* MICB2_BYPASS */ 13676d4baf08SMark Brown #define WM5100_MICB2_BYPASS_WIDTH 1 /* MICB2_BYPASS */ 13686d4baf08SMark Brown #define WM5100_MICB2_ENA 0x0001 /* MICB2_ENA */ 13696d4baf08SMark Brown #define WM5100_MICB2_ENA_MASK 0x0001 /* MICB2_ENA */ 13706d4baf08SMark Brown #define WM5100_MICB2_ENA_SHIFT 0 /* MICB2_ENA */ 13716d4baf08SMark Brown #define WM5100_MICB2_ENA_WIDTH 1 /* MICB2_ENA */ 13726d4baf08SMark Brown 13736d4baf08SMark Brown /* 13746d4baf08SMark Brown * R535 (0x217) - Mic Bias Ctrl 3 13756d4baf08SMark Brown */ 13766d4baf08SMark Brown #define WM5100_MICB3_DISCH 0x0040 /* MICB3_DISCH */ 13776d4baf08SMark Brown #define WM5100_MICB3_DISCH_MASK 0x0040 /* MICB3_DISCH */ 13786d4baf08SMark Brown #define WM5100_MICB3_DISCH_SHIFT 6 /* MICB3_DISCH */ 13796d4baf08SMark Brown #define WM5100_MICB3_DISCH_WIDTH 1 /* MICB3_DISCH */ 13806d4baf08SMark Brown #define WM5100_MICB3_RATE 0x0020 /* MICB3_RATE */ 13816d4baf08SMark Brown #define WM5100_MICB3_RATE_MASK 0x0020 /* MICB3_RATE */ 13826d4baf08SMark Brown #define WM5100_MICB3_RATE_SHIFT 5 /* MICB3_RATE */ 13836d4baf08SMark Brown #define WM5100_MICB3_RATE_WIDTH 1 /* MICB3_RATE */ 13846d4baf08SMark Brown #define WM5100_MICB3_LVL_MASK 0x001C /* MICB3_LVL - [4:2] */ 13856d4baf08SMark Brown #define WM5100_MICB3_LVL_SHIFT 2 /* MICB3_LVL - [4:2] */ 13866d4baf08SMark Brown #define WM5100_MICB3_LVL_WIDTH 3 /* MICB3_LVL - [4:2] */ 13876d4baf08SMark Brown #define WM5100_MICB3_BYPASS 0x0002 /* MICB3_BYPASS */ 13886d4baf08SMark Brown #define WM5100_MICB3_BYPASS_MASK 0x0002 /* MICB3_BYPASS */ 13896d4baf08SMark Brown #define WM5100_MICB3_BYPASS_SHIFT 1 /* MICB3_BYPASS */ 13906d4baf08SMark Brown #define WM5100_MICB3_BYPASS_WIDTH 1 /* MICB3_BYPASS */ 13916d4baf08SMark Brown #define WM5100_MICB3_ENA 0x0001 /* MICB3_ENA */ 13926d4baf08SMark Brown #define WM5100_MICB3_ENA_MASK 0x0001 /* MICB3_ENA */ 13936d4baf08SMark Brown #define WM5100_MICB3_ENA_SHIFT 0 /* MICB3_ENA */ 13946d4baf08SMark Brown #define WM5100_MICB3_ENA_WIDTH 1 /* MICB3_ENA */ 13956d4baf08SMark Brown 13966d4baf08SMark Brown /* 13976d4baf08SMark Brown * R640 (0x280) - Accessory Detect Mode 1 13986d4baf08SMark Brown */ 13996d4baf08SMark Brown #define WM5100_ACCDET_BIAS_SRC_MASK 0xC000 /* ACCDET_BIAS_SRC - [15:14] */ 14006d4baf08SMark Brown #define WM5100_ACCDET_BIAS_SRC_SHIFT 14 /* ACCDET_BIAS_SRC - [15:14] */ 14016d4baf08SMark Brown #define WM5100_ACCDET_BIAS_SRC_WIDTH 2 /* ACCDET_BIAS_SRC - [15:14] */ 14026d4baf08SMark Brown #define WM5100_ACCDET_SRC 0x2000 /* ACCDET_SRC */ 14036d4baf08SMark Brown #define WM5100_ACCDET_SRC_MASK 0x2000 /* ACCDET_SRC */ 14046d4baf08SMark Brown #define WM5100_ACCDET_SRC_SHIFT 13 /* ACCDET_SRC */ 14056d4baf08SMark Brown #define WM5100_ACCDET_SRC_WIDTH 1 /* ACCDET_SRC */ 14066d4baf08SMark Brown #define WM5100_ACCDET_MODE_MASK 0x0003 /* ACCDET_MODE - [1:0] */ 14076d4baf08SMark Brown #define WM5100_ACCDET_MODE_SHIFT 0 /* ACCDET_MODE - [1:0] */ 14086d4baf08SMark Brown #define WM5100_ACCDET_MODE_WIDTH 2 /* ACCDET_MODE - [1:0] */ 14096d4baf08SMark Brown 14106d4baf08SMark Brown /* 14116d4baf08SMark Brown * R648 (0x288) - Headphone Detect 1 14126d4baf08SMark Brown */ 14136d4baf08SMark Brown #define WM5100_HP_HOLDTIME_MASK 0x00E0 /* HP_HOLDTIME - [7:5] */ 14146d4baf08SMark Brown #define WM5100_HP_HOLDTIME_SHIFT 5 /* HP_HOLDTIME - [7:5] */ 14156d4baf08SMark Brown #define WM5100_HP_HOLDTIME_WIDTH 3 /* HP_HOLDTIME - [7:5] */ 14166d4baf08SMark Brown #define WM5100_HP_CLK_DIV_MASK 0x0018 /* HP_CLK_DIV - [4:3] */ 14176d4baf08SMark Brown #define WM5100_HP_CLK_DIV_SHIFT 3 /* HP_CLK_DIV - [4:3] */ 14186d4baf08SMark Brown #define WM5100_HP_CLK_DIV_WIDTH 2 /* HP_CLK_DIV - [4:3] */ 14196d4baf08SMark Brown #define WM5100_HP_STEP_SIZE 0x0002 /* HP_STEP_SIZE */ 14206d4baf08SMark Brown #define WM5100_HP_STEP_SIZE_MASK 0x0002 /* HP_STEP_SIZE */ 14216d4baf08SMark Brown #define WM5100_HP_STEP_SIZE_SHIFT 1 /* HP_STEP_SIZE */ 14226d4baf08SMark Brown #define WM5100_HP_STEP_SIZE_WIDTH 1 /* HP_STEP_SIZE */ 14236d4baf08SMark Brown #define WM5100_HP_POLL 0x0001 /* HP_POLL */ 14246d4baf08SMark Brown #define WM5100_HP_POLL_MASK 0x0001 /* HP_POLL */ 14256d4baf08SMark Brown #define WM5100_HP_POLL_SHIFT 0 /* HP_POLL */ 14266d4baf08SMark Brown #define WM5100_HP_POLL_WIDTH 1 /* HP_POLL */ 14276d4baf08SMark Brown 14286d4baf08SMark Brown /* 14296d4baf08SMark Brown * R649 (0x289) - Headphone Detect 2 14306d4baf08SMark Brown */ 14316d4baf08SMark Brown #define WM5100_HP_DONE 0x0080 /* HP_DONE */ 14326d4baf08SMark Brown #define WM5100_HP_DONE_MASK 0x0080 /* HP_DONE */ 14336d4baf08SMark Brown #define WM5100_HP_DONE_SHIFT 7 /* HP_DONE */ 14346d4baf08SMark Brown #define WM5100_HP_DONE_WIDTH 1 /* HP_DONE */ 14356d4baf08SMark Brown #define WM5100_HP_LVL_MASK 0x007F /* HP_LVL - [6:0] */ 14366d4baf08SMark Brown #define WM5100_HP_LVL_SHIFT 0 /* HP_LVL - [6:0] */ 14376d4baf08SMark Brown #define WM5100_HP_LVL_WIDTH 7 /* HP_LVL - [6:0] */ 14386d4baf08SMark Brown 14396d4baf08SMark Brown /* 14406d4baf08SMark Brown * R656 (0x290) - Mic Detect 1 14416d4baf08SMark Brown */ 14426d4baf08SMark Brown #define WM5100_ACCDET_BIAS_STARTTIME_MASK 0xF000 /* ACCDET_BIAS_STARTTIME - [15:12] */ 14436d4baf08SMark Brown #define WM5100_ACCDET_BIAS_STARTTIME_SHIFT 12 /* ACCDET_BIAS_STARTTIME - [15:12] */ 14446d4baf08SMark Brown #define WM5100_ACCDET_BIAS_STARTTIME_WIDTH 4 /* ACCDET_BIAS_STARTTIME - [15:12] */ 14456d4baf08SMark Brown #define WM5100_ACCDET_RATE_MASK 0x0F00 /* ACCDET_RATE - [11:8] */ 14466d4baf08SMark Brown #define WM5100_ACCDET_RATE_SHIFT 8 /* ACCDET_RATE - [11:8] */ 14476d4baf08SMark Brown #define WM5100_ACCDET_RATE_WIDTH 4 /* ACCDET_RATE - [11:8] */ 14486d4baf08SMark Brown #define WM5100_ACCDET_DBTIME 0x0002 /* ACCDET_DBTIME */ 14496d4baf08SMark Brown #define WM5100_ACCDET_DBTIME_MASK 0x0002 /* ACCDET_DBTIME */ 14506d4baf08SMark Brown #define WM5100_ACCDET_DBTIME_SHIFT 1 /* ACCDET_DBTIME */ 14516d4baf08SMark Brown #define WM5100_ACCDET_DBTIME_WIDTH 1 /* ACCDET_DBTIME */ 14526d4baf08SMark Brown #define WM5100_ACCDET_ENA 0x0001 /* ACCDET_ENA */ 14536d4baf08SMark Brown #define WM5100_ACCDET_ENA_MASK 0x0001 /* ACCDET_ENA */ 14546d4baf08SMark Brown #define WM5100_ACCDET_ENA_SHIFT 0 /* ACCDET_ENA */ 14556d4baf08SMark Brown #define WM5100_ACCDET_ENA_WIDTH 1 /* ACCDET_ENA */ 14566d4baf08SMark Brown 14576d4baf08SMark Brown /* 14586d4baf08SMark Brown * R657 (0x291) - Mic Detect 2 14596d4baf08SMark Brown */ 14606d4baf08SMark Brown #define WM5100_ACCDET_LVL_SEL_MASK 0x00FF /* ACCDET_LVL_SEL - [7:0] */ 14616d4baf08SMark Brown #define WM5100_ACCDET_LVL_SEL_SHIFT 0 /* ACCDET_LVL_SEL - [7:0] */ 14626d4baf08SMark Brown #define WM5100_ACCDET_LVL_SEL_WIDTH 8 /* ACCDET_LVL_SEL - [7:0] */ 14636d4baf08SMark Brown 14646d4baf08SMark Brown /* 14656d4baf08SMark Brown * R658 (0x292) - Mic Detect 3 14666d4baf08SMark Brown */ 14676d4baf08SMark Brown #define WM5100_ACCDET_LVL_MASK 0x07FC /* ACCDET_LVL - [10:2] */ 14686d4baf08SMark Brown #define WM5100_ACCDET_LVL_SHIFT 2 /* ACCDET_LVL - [10:2] */ 14696d4baf08SMark Brown #define WM5100_ACCDET_LVL_WIDTH 9 /* ACCDET_LVL - [10:2] */ 14706d4baf08SMark Brown #define WM5100_ACCDET_VALID 0x0002 /* ACCDET_VALID */ 14716d4baf08SMark Brown #define WM5100_ACCDET_VALID_MASK 0x0002 /* ACCDET_VALID */ 14726d4baf08SMark Brown #define WM5100_ACCDET_VALID_SHIFT 1 /* ACCDET_VALID */ 14736d4baf08SMark Brown #define WM5100_ACCDET_VALID_WIDTH 1 /* ACCDET_VALID */ 14746d4baf08SMark Brown #define WM5100_ACCDET_STS 0x0001 /* ACCDET_STS */ 14756d4baf08SMark Brown #define WM5100_ACCDET_STS_MASK 0x0001 /* ACCDET_STS */ 14766d4baf08SMark Brown #define WM5100_ACCDET_STS_SHIFT 0 /* ACCDET_STS */ 14776d4baf08SMark Brown #define WM5100_ACCDET_STS_WIDTH 1 /* ACCDET_STS */ 14786d4baf08SMark Brown 14796d4baf08SMark Brown /* 14801cba77c1SMark Brown * R699 (0x2BB) - Misc Control 14811cba77c1SMark Brown */ 14821cba77c1SMark Brown #define WM5100_HPCOM_SRC 0x200 /* HPCOM_SRC */ 14831cba77c1SMark Brown #define WM5100_HPCOM_SRC_SHIFT 9 /* HPCOM_SRC */ 14841cba77c1SMark Brown 14851cba77c1SMark Brown /* 14866d4baf08SMark Brown * R769 (0x301) - Input Enables 14876d4baf08SMark Brown */ 14886d4baf08SMark Brown #define WM5100_IN4L_ENA 0x0080 /* IN4L_ENA */ 14896d4baf08SMark Brown #define WM5100_IN4L_ENA_MASK 0x0080 /* IN4L_ENA */ 14906d4baf08SMark Brown #define WM5100_IN4L_ENA_SHIFT 7 /* IN4L_ENA */ 14916d4baf08SMark Brown #define WM5100_IN4L_ENA_WIDTH 1 /* IN4L_ENA */ 14926d4baf08SMark Brown #define WM5100_IN4R_ENA 0x0040 /* IN4R_ENA */ 14936d4baf08SMark Brown #define WM5100_IN4R_ENA_MASK 0x0040 /* IN4R_ENA */ 14946d4baf08SMark Brown #define WM5100_IN4R_ENA_SHIFT 6 /* IN4R_ENA */ 14956d4baf08SMark Brown #define WM5100_IN4R_ENA_WIDTH 1 /* IN4R_ENA */ 14966d4baf08SMark Brown #define WM5100_IN3L_ENA 0x0020 /* IN3L_ENA */ 14976d4baf08SMark Brown #define WM5100_IN3L_ENA_MASK 0x0020 /* IN3L_ENA */ 14986d4baf08SMark Brown #define WM5100_IN3L_ENA_SHIFT 5 /* IN3L_ENA */ 14996d4baf08SMark Brown #define WM5100_IN3L_ENA_WIDTH 1 /* IN3L_ENA */ 15006d4baf08SMark Brown #define WM5100_IN3R_ENA 0x0010 /* IN3R_ENA */ 15016d4baf08SMark Brown #define WM5100_IN3R_ENA_MASK 0x0010 /* IN3R_ENA */ 15026d4baf08SMark Brown #define WM5100_IN3R_ENA_SHIFT 4 /* IN3R_ENA */ 15036d4baf08SMark Brown #define WM5100_IN3R_ENA_WIDTH 1 /* IN3R_ENA */ 15046d4baf08SMark Brown #define WM5100_IN2L_ENA 0x0008 /* IN2L_ENA */ 15056d4baf08SMark Brown #define WM5100_IN2L_ENA_MASK 0x0008 /* IN2L_ENA */ 15066d4baf08SMark Brown #define WM5100_IN2L_ENA_SHIFT 3 /* IN2L_ENA */ 15076d4baf08SMark Brown #define WM5100_IN2L_ENA_WIDTH 1 /* IN2L_ENA */ 15086d4baf08SMark Brown #define WM5100_IN2R_ENA 0x0004 /* IN2R_ENA */ 15096d4baf08SMark Brown #define WM5100_IN2R_ENA_MASK 0x0004 /* IN2R_ENA */ 15106d4baf08SMark Brown #define WM5100_IN2R_ENA_SHIFT 2 /* IN2R_ENA */ 15116d4baf08SMark Brown #define WM5100_IN2R_ENA_WIDTH 1 /* IN2R_ENA */ 15126d4baf08SMark Brown #define WM5100_IN1L_ENA 0x0002 /* IN1L_ENA */ 15136d4baf08SMark Brown #define WM5100_IN1L_ENA_MASK 0x0002 /* IN1L_ENA */ 15146d4baf08SMark Brown #define WM5100_IN1L_ENA_SHIFT 1 /* IN1L_ENA */ 15156d4baf08SMark Brown #define WM5100_IN1L_ENA_WIDTH 1 /* IN1L_ENA */ 15166d4baf08SMark Brown #define WM5100_IN1R_ENA 0x0001 /* IN1R_ENA */ 15176d4baf08SMark Brown #define WM5100_IN1R_ENA_MASK 0x0001 /* IN1R_ENA */ 15186d4baf08SMark Brown #define WM5100_IN1R_ENA_SHIFT 0 /* IN1R_ENA */ 15196d4baf08SMark Brown #define WM5100_IN1R_ENA_WIDTH 1 /* IN1R_ENA */ 15206d4baf08SMark Brown 15216d4baf08SMark Brown /* 15226d4baf08SMark Brown * R770 (0x302) - Input Enables Status 15236d4baf08SMark Brown */ 15246d4baf08SMark Brown #define WM5100_IN4L_ENA_STS 0x0080 /* IN4L_ENA_STS */ 15256d4baf08SMark Brown #define WM5100_IN4L_ENA_STS_MASK 0x0080 /* IN4L_ENA_STS */ 15266d4baf08SMark Brown #define WM5100_IN4L_ENA_STS_SHIFT 7 /* IN4L_ENA_STS */ 15276d4baf08SMark Brown #define WM5100_IN4L_ENA_STS_WIDTH 1 /* IN4L_ENA_STS */ 15286d4baf08SMark Brown #define WM5100_IN4R_ENA_STS 0x0040 /* IN4R_ENA_STS */ 15296d4baf08SMark Brown #define WM5100_IN4R_ENA_STS_MASK 0x0040 /* IN4R_ENA_STS */ 15306d4baf08SMark Brown #define WM5100_IN4R_ENA_STS_SHIFT 6 /* IN4R_ENA_STS */ 15316d4baf08SMark Brown #define WM5100_IN4R_ENA_STS_WIDTH 1 /* IN4R_ENA_STS */ 15326d4baf08SMark Brown #define WM5100_IN3L_ENA_STS 0x0020 /* IN3L_ENA_STS */ 15336d4baf08SMark Brown #define WM5100_IN3L_ENA_STS_MASK 0x0020 /* IN3L_ENA_STS */ 15346d4baf08SMark Brown #define WM5100_IN3L_ENA_STS_SHIFT 5 /* IN3L_ENA_STS */ 15356d4baf08SMark Brown #define WM5100_IN3L_ENA_STS_WIDTH 1 /* IN3L_ENA_STS */ 15366d4baf08SMark Brown #define WM5100_IN3R_ENA_STS 0x0010 /* IN3R_ENA_STS */ 15376d4baf08SMark Brown #define WM5100_IN3R_ENA_STS_MASK 0x0010 /* IN3R_ENA_STS */ 15386d4baf08SMark Brown #define WM5100_IN3R_ENA_STS_SHIFT 4 /* IN3R_ENA_STS */ 15396d4baf08SMark Brown #define WM5100_IN3R_ENA_STS_WIDTH 1 /* IN3R_ENA_STS */ 15406d4baf08SMark Brown #define WM5100_IN2L_ENA_STS 0x0008 /* IN2L_ENA_STS */ 15416d4baf08SMark Brown #define WM5100_IN2L_ENA_STS_MASK 0x0008 /* IN2L_ENA_STS */ 15426d4baf08SMark Brown #define WM5100_IN2L_ENA_STS_SHIFT 3 /* IN2L_ENA_STS */ 15436d4baf08SMark Brown #define WM5100_IN2L_ENA_STS_WIDTH 1 /* IN2L_ENA_STS */ 15446d4baf08SMark Brown #define WM5100_IN2R_ENA_STS 0x0004 /* IN2R_ENA_STS */ 15456d4baf08SMark Brown #define WM5100_IN2R_ENA_STS_MASK 0x0004 /* IN2R_ENA_STS */ 15466d4baf08SMark Brown #define WM5100_IN2R_ENA_STS_SHIFT 2 /* IN2R_ENA_STS */ 15476d4baf08SMark Brown #define WM5100_IN2R_ENA_STS_WIDTH 1 /* IN2R_ENA_STS */ 15486d4baf08SMark Brown #define WM5100_IN1L_ENA_STS 0x0002 /* IN1L_ENA_STS */ 15496d4baf08SMark Brown #define WM5100_IN1L_ENA_STS_MASK 0x0002 /* IN1L_ENA_STS */ 15506d4baf08SMark Brown #define WM5100_IN1L_ENA_STS_SHIFT 1 /* IN1L_ENA_STS */ 15516d4baf08SMark Brown #define WM5100_IN1L_ENA_STS_WIDTH 1 /* IN1L_ENA_STS */ 15526d4baf08SMark Brown #define WM5100_IN1R_ENA_STS 0x0001 /* IN1R_ENA_STS */ 15536d4baf08SMark Brown #define WM5100_IN1R_ENA_STS_MASK 0x0001 /* IN1R_ENA_STS */ 15546d4baf08SMark Brown #define WM5100_IN1R_ENA_STS_SHIFT 0 /* IN1R_ENA_STS */ 15556d4baf08SMark Brown #define WM5100_IN1R_ENA_STS_WIDTH 1 /* IN1R_ENA_STS */ 15566d4baf08SMark Brown 15576d4baf08SMark Brown /* 15586d4baf08SMark Brown * R784 (0x310) - IN1L Control 15596d4baf08SMark Brown */ 15606d4baf08SMark Brown #define WM5100_IN_RATE_MASK 0xC000 /* IN_RATE - [15:14] */ 15616d4baf08SMark Brown #define WM5100_IN_RATE_SHIFT 14 /* IN_RATE - [15:14] */ 15626d4baf08SMark Brown #define WM5100_IN_RATE_WIDTH 2 /* IN_RATE - [15:14] */ 15636d4baf08SMark Brown #define WM5100_IN1_OSR 0x2000 /* IN1_OSR */ 15646d4baf08SMark Brown #define WM5100_IN1_OSR_MASK 0x2000 /* IN1_OSR */ 15656d4baf08SMark Brown #define WM5100_IN1_OSR_SHIFT 13 /* IN1_OSR */ 15666d4baf08SMark Brown #define WM5100_IN1_OSR_WIDTH 1 /* IN1_OSR */ 15676d4baf08SMark Brown #define WM5100_IN1_DMIC_SUP_MASK 0x1800 /* IN1_DMIC_SUP - [12:11] */ 15686d4baf08SMark Brown #define WM5100_IN1_DMIC_SUP_SHIFT 11 /* IN1_DMIC_SUP - [12:11] */ 15696d4baf08SMark Brown #define WM5100_IN1_DMIC_SUP_WIDTH 2 /* IN1_DMIC_SUP - [12:11] */ 15706d4baf08SMark Brown #define WM5100_IN1_MODE_MASK 0x0600 /* IN1_MODE - [10:9] */ 15716d4baf08SMark Brown #define WM5100_IN1_MODE_SHIFT 9 /* IN1_MODE - [10:9] */ 15726d4baf08SMark Brown #define WM5100_IN1_MODE_WIDTH 2 /* IN1_MODE - [10:9] */ 15736d4baf08SMark Brown #define WM5100_IN1L_PGA_VOL_MASK 0x00FE /* IN1L_PGA_VOL - [7:1] */ 15746d4baf08SMark Brown #define WM5100_IN1L_PGA_VOL_SHIFT 1 /* IN1L_PGA_VOL - [7:1] */ 15756d4baf08SMark Brown #define WM5100_IN1L_PGA_VOL_WIDTH 7 /* IN1L_PGA_VOL - [7:1] */ 15766d4baf08SMark Brown 15776d4baf08SMark Brown /* 15786d4baf08SMark Brown * R785 (0x311) - IN1R Control 15796d4baf08SMark Brown */ 15806d4baf08SMark Brown #define WM5100_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */ 15816d4baf08SMark Brown #define WM5100_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */ 15826d4baf08SMark Brown #define WM5100_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */ 15836d4baf08SMark Brown 15846d4baf08SMark Brown /* 15856d4baf08SMark Brown * R786 (0x312) - IN2L Control 15866d4baf08SMark Brown */ 15876d4baf08SMark Brown #define WM5100_IN2_OSR 0x2000 /* IN2_OSR */ 15886d4baf08SMark Brown #define WM5100_IN2_OSR_MASK 0x2000 /* IN2_OSR */ 15896d4baf08SMark Brown #define WM5100_IN2_OSR_SHIFT 13 /* IN2_OSR */ 15906d4baf08SMark Brown #define WM5100_IN2_OSR_WIDTH 1 /* IN2_OSR */ 15916d4baf08SMark Brown #define WM5100_IN2_DMIC_SUP_MASK 0x1800 /* IN2_DMIC_SUP - [12:11] */ 15926d4baf08SMark Brown #define WM5100_IN2_DMIC_SUP_SHIFT 11 /* IN2_DMIC_SUP - [12:11] */ 15936d4baf08SMark Brown #define WM5100_IN2_DMIC_SUP_WIDTH 2 /* IN2_DMIC_SUP - [12:11] */ 15946d4baf08SMark Brown #define WM5100_IN2_MODE_MASK 0x0600 /* IN2_MODE - [10:9] */ 15956d4baf08SMark Brown #define WM5100_IN2_MODE_SHIFT 9 /* IN2_MODE - [10:9] */ 15966d4baf08SMark Brown #define WM5100_IN2_MODE_WIDTH 2 /* IN2_MODE - [10:9] */ 15976d4baf08SMark Brown #define WM5100_IN2L_PGA_VOL_MASK 0x00FE /* IN2L_PGA_VOL - [7:1] */ 15986d4baf08SMark Brown #define WM5100_IN2L_PGA_VOL_SHIFT 1 /* IN2L_PGA_VOL - [7:1] */ 15996d4baf08SMark Brown #define WM5100_IN2L_PGA_VOL_WIDTH 7 /* IN2L_PGA_VOL - [7:1] */ 16006d4baf08SMark Brown 16016d4baf08SMark Brown /* 16026d4baf08SMark Brown * R787 (0x313) - IN2R Control 16036d4baf08SMark Brown */ 16046d4baf08SMark Brown #define WM5100_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */ 16056d4baf08SMark Brown #define WM5100_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */ 16066d4baf08SMark Brown #define WM5100_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */ 16076d4baf08SMark Brown 16086d4baf08SMark Brown /* 16096d4baf08SMark Brown * R788 (0x314) - IN3L Control 16106d4baf08SMark Brown */ 16116d4baf08SMark Brown #define WM5100_IN3_OSR 0x2000 /* IN3_OSR */ 16126d4baf08SMark Brown #define WM5100_IN3_OSR_MASK 0x2000 /* IN3_OSR */ 16136d4baf08SMark Brown #define WM5100_IN3_OSR_SHIFT 13 /* IN3_OSR */ 16146d4baf08SMark Brown #define WM5100_IN3_OSR_WIDTH 1 /* IN3_OSR */ 16156d4baf08SMark Brown #define WM5100_IN3_DMIC_SUP_MASK 0x1800 /* IN3_DMIC_SUP - [12:11] */ 16166d4baf08SMark Brown #define WM5100_IN3_DMIC_SUP_SHIFT 11 /* IN3_DMIC_SUP - [12:11] */ 16176d4baf08SMark Brown #define WM5100_IN3_DMIC_SUP_WIDTH 2 /* IN3_DMIC_SUP - [12:11] */ 16186d4baf08SMark Brown #define WM5100_IN3_MODE_MASK 0x0600 /* IN3_MODE - [10:9] */ 16196d4baf08SMark Brown #define WM5100_IN3_MODE_SHIFT 9 /* IN3_MODE - [10:9] */ 16206d4baf08SMark Brown #define WM5100_IN3_MODE_WIDTH 2 /* IN3_MODE - [10:9] */ 16216d4baf08SMark Brown #define WM5100_IN3L_PGA_VOL_MASK 0x00FE /* IN3L_PGA_VOL - [7:1] */ 16226d4baf08SMark Brown #define WM5100_IN3L_PGA_VOL_SHIFT 1 /* IN3L_PGA_VOL - [7:1] */ 16236d4baf08SMark Brown #define WM5100_IN3L_PGA_VOL_WIDTH 7 /* IN3L_PGA_VOL - [7:1] */ 16246d4baf08SMark Brown 16256d4baf08SMark Brown /* 16266d4baf08SMark Brown * R789 (0x315) - IN3R Control 16276d4baf08SMark Brown */ 16286d4baf08SMark Brown #define WM5100_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */ 16296d4baf08SMark Brown #define WM5100_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */ 16306d4baf08SMark Brown #define WM5100_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */ 16316d4baf08SMark Brown 16326d4baf08SMark Brown /* 16336d4baf08SMark Brown * R790 (0x316) - IN4L Control 16346d4baf08SMark Brown */ 16356d4baf08SMark Brown #define WM5100_IN4_OSR 0x2000 /* IN4_OSR */ 16366d4baf08SMark Brown #define WM5100_IN4_OSR_MASK 0x2000 /* IN4_OSR */ 16376d4baf08SMark Brown #define WM5100_IN4_OSR_SHIFT 13 /* IN4_OSR */ 16386d4baf08SMark Brown #define WM5100_IN4_OSR_WIDTH 1 /* IN4_OSR */ 16396d4baf08SMark Brown #define WM5100_IN4_DMIC_SUP_MASK 0x1800 /* IN4_DMIC_SUP - [12:11] */ 16406d4baf08SMark Brown #define WM5100_IN4_DMIC_SUP_SHIFT 11 /* IN4_DMIC_SUP - [12:11] */ 16416d4baf08SMark Brown #define WM5100_IN4_DMIC_SUP_WIDTH 2 /* IN4_DMIC_SUP - [12:11] */ 16426d4baf08SMark Brown #define WM5100_IN4_MODE_MASK 0x0600 /* IN4_MODE - [10:9] */ 16436d4baf08SMark Brown #define WM5100_IN4_MODE_SHIFT 9 /* IN4_MODE - [10:9] */ 16446d4baf08SMark Brown #define WM5100_IN4_MODE_WIDTH 2 /* IN4_MODE - [10:9] */ 16456d4baf08SMark Brown #define WM5100_IN4L_PGA_VOL_MASK 0x00FE /* IN4L_PGA_VOL - [7:1] */ 16466d4baf08SMark Brown #define WM5100_IN4L_PGA_VOL_SHIFT 1 /* IN4L_PGA_VOL - [7:1] */ 16476d4baf08SMark Brown #define WM5100_IN4L_PGA_VOL_WIDTH 7 /* IN4L_PGA_VOL - [7:1] */ 16486d4baf08SMark Brown 16496d4baf08SMark Brown /* 16506d4baf08SMark Brown * R791 (0x317) - IN4R Control 16516d4baf08SMark Brown */ 16526d4baf08SMark Brown #define WM5100_IN4R_PGA_VOL_MASK 0x00FE /* IN4R_PGA_VOL - [7:1] */ 16536d4baf08SMark Brown #define WM5100_IN4R_PGA_VOL_SHIFT 1 /* IN4R_PGA_VOL - [7:1] */ 16546d4baf08SMark Brown #define WM5100_IN4R_PGA_VOL_WIDTH 7 /* IN4R_PGA_VOL - [7:1] */ 16556d4baf08SMark Brown 16566d4baf08SMark Brown /* 16576d4baf08SMark Brown * R792 (0x318) - RXANC_SRC 16586d4baf08SMark Brown */ 16596d4baf08SMark Brown #define WM5100_IN_RXANC_SEL_MASK 0x0007 /* IN_RXANC_SEL - [2:0] */ 16606d4baf08SMark Brown #define WM5100_IN_RXANC_SEL_SHIFT 0 /* IN_RXANC_SEL - [2:0] */ 16616d4baf08SMark Brown #define WM5100_IN_RXANC_SEL_WIDTH 3 /* IN_RXANC_SEL - [2:0] */ 16626d4baf08SMark Brown 16636d4baf08SMark Brown /* 16646d4baf08SMark Brown * R793 (0x319) - Input Volume Ramp 16656d4baf08SMark Brown */ 16666d4baf08SMark Brown #define WM5100_IN_VD_RAMP_MASK 0x0070 /* IN_VD_RAMP - [6:4] */ 16676d4baf08SMark Brown #define WM5100_IN_VD_RAMP_SHIFT 4 /* IN_VD_RAMP - [6:4] */ 16686d4baf08SMark Brown #define WM5100_IN_VD_RAMP_WIDTH 3 /* IN_VD_RAMP - [6:4] */ 16696d4baf08SMark Brown #define WM5100_IN_VI_RAMP_MASK 0x0007 /* IN_VI_RAMP - [2:0] */ 16706d4baf08SMark Brown #define WM5100_IN_VI_RAMP_SHIFT 0 /* IN_VI_RAMP - [2:0] */ 16716d4baf08SMark Brown #define WM5100_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */ 16726d4baf08SMark Brown 16736d4baf08SMark Brown /* 16746d4baf08SMark Brown * R800 (0x320) - ADC Digital Volume 1L 16756d4baf08SMark Brown */ 16766d4baf08SMark Brown #define WM5100_IN_VU 0x0200 /* IN_VU */ 16776d4baf08SMark Brown #define WM5100_IN_VU_MASK 0x0200 /* IN_VU */ 16786d4baf08SMark Brown #define WM5100_IN_VU_SHIFT 9 /* IN_VU */ 16796d4baf08SMark Brown #define WM5100_IN_VU_WIDTH 1 /* IN_VU */ 16806d4baf08SMark Brown #define WM5100_IN1L_MUTE 0x0100 /* IN1L_MUTE */ 16816d4baf08SMark Brown #define WM5100_IN1L_MUTE_MASK 0x0100 /* IN1L_MUTE */ 16826d4baf08SMark Brown #define WM5100_IN1L_MUTE_SHIFT 8 /* IN1L_MUTE */ 16836d4baf08SMark Brown #define WM5100_IN1L_MUTE_WIDTH 1 /* IN1L_MUTE */ 16846d4baf08SMark Brown #define WM5100_IN1L_VOL_MASK 0x00FF /* IN1L_VOL - [7:0] */ 16856d4baf08SMark Brown #define WM5100_IN1L_VOL_SHIFT 0 /* IN1L_VOL - [7:0] */ 16866d4baf08SMark Brown #define WM5100_IN1L_VOL_WIDTH 8 /* IN1L_VOL - [7:0] */ 16876d4baf08SMark Brown 16886d4baf08SMark Brown /* 16896d4baf08SMark Brown * R801 (0x321) - ADC Digital Volume 1R 16906d4baf08SMark Brown */ 16916d4baf08SMark Brown #define WM5100_IN_VU 0x0200 /* IN_VU */ 16926d4baf08SMark Brown #define WM5100_IN_VU_MASK 0x0200 /* IN_VU */ 16936d4baf08SMark Brown #define WM5100_IN_VU_SHIFT 9 /* IN_VU */ 16946d4baf08SMark Brown #define WM5100_IN_VU_WIDTH 1 /* IN_VU */ 16956d4baf08SMark Brown #define WM5100_IN1R_MUTE 0x0100 /* IN1R_MUTE */ 16966d4baf08SMark Brown #define WM5100_IN1R_MUTE_MASK 0x0100 /* IN1R_MUTE */ 16976d4baf08SMark Brown #define WM5100_IN1R_MUTE_SHIFT 8 /* IN1R_MUTE */ 16986d4baf08SMark Brown #define WM5100_IN1R_MUTE_WIDTH 1 /* IN1R_MUTE */ 16996d4baf08SMark Brown #define WM5100_IN1R_VOL_MASK 0x00FF /* IN1R_VOL - [7:0] */ 17006d4baf08SMark Brown #define WM5100_IN1R_VOL_SHIFT 0 /* IN1R_VOL - [7:0] */ 17016d4baf08SMark Brown #define WM5100_IN1R_VOL_WIDTH 8 /* IN1R_VOL - [7:0] */ 17026d4baf08SMark Brown 17036d4baf08SMark Brown /* 17046d4baf08SMark Brown * R802 (0x322) - ADC Digital Volume 2L 17056d4baf08SMark Brown */ 17066d4baf08SMark Brown #define WM5100_IN_VU 0x0200 /* IN_VU */ 17076d4baf08SMark Brown #define WM5100_IN_VU_MASK 0x0200 /* IN_VU */ 17086d4baf08SMark Brown #define WM5100_IN_VU_SHIFT 9 /* IN_VU */ 17096d4baf08SMark Brown #define WM5100_IN_VU_WIDTH 1 /* IN_VU */ 17106d4baf08SMark Brown #define WM5100_IN2L_MUTE 0x0100 /* IN2L_MUTE */ 17116d4baf08SMark Brown #define WM5100_IN2L_MUTE_MASK 0x0100 /* IN2L_MUTE */ 17126d4baf08SMark Brown #define WM5100_IN2L_MUTE_SHIFT 8 /* IN2L_MUTE */ 17136d4baf08SMark Brown #define WM5100_IN2L_MUTE_WIDTH 1 /* IN2L_MUTE */ 17146d4baf08SMark Brown #define WM5100_IN2L_VOL_MASK 0x00FF /* IN2L_VOL - [7:0] */ 17156d4baf08SMark Brown #define WM5100_IN2L_VOL_SHIFT 0 /* IN2L_VOL - [7:0] */ 17166d4baf08SMark Brown #define WM5100_IN2L_VOL_WIDTH 8 /* IN2L_VOL - [7:0] */ 17176d4baf08SMark Brown 17186d4baf08SMark Brown /* 17196d4baf08SMark Brown * R803 (0x323) - ADC Digital Volume 2R 17206d4baf08SMark Brown */ 17216d4baf08SMark Brown #define WM5100_IN_VU 0x0200 /* IN_VU */ 17226d4baf08SMark Brown #define WM5100_IN_VU_MASK 0x0200 /* IN_VU */ 17236d4baf08SMark Brown #define WM5100_IN_VU_SHIFT 9 /* IN_VU */ 17246d4baf08SMark Brown #define WM5100_IN_VU_WIDTH 1 /* IN_VU */ 17256d4baf08SMark Brown #define WM5100_IN2R_MUTE 0x0100 /* IN2R_MUTE */ 17266d4baf08SMark Brown #define WM5100_IN2R_MUTE_MASK 0x0100 /* IN2R_MUTE */ 17276d4baf08SMark Brown #define WM5100_IN2R_MUTE_SHIFT 8 /* IN2R_MUTE */ 17286d4baf08SMark Brown #define WM5100_IN2R_MUTE_WIDTH 1 /* IN2R_MUTE */ 17296d4baf08SMark Brown #define WM5100_IN2R_VOL_MASK 0x00FF /* IN2R_VOL - [7:0] */ 17306d4baf08SMark Brown #define WM5100_IN2R_VOL_SHIFT 0 /* IN2R_VOL - [7:0] */ 17316d4baf08SMark Brown #define WM5100_IN2R_VOL_WIDTH 8 /* IN2R_VOL - [7:0] */ 17326d4baf08SMark Brown 17336d4baf08SMark Brown /* 17346d4baf08SMark Brown * R804 (0x324) - ADC Digital Volume 3L 17356d4baf08SMark Brown */ 17366d4baf08SMark Brown #define WM5100_IN_VU 0x0200 /* IN_VU */ 17376d4baf08SMark Brown #define WM5100_IN_VU_MASK 0x0200 /* IN_VU */ 17386d4baf08SMark Brown #define WM5100_IN_VU_SHIFT 9 /* IN_VU */ 17396d4baf08SMark Brown #define WM5100_IN_VU_WIDTH 1 /* IN_VU */ 17406d4baf08SMark Brown #define WM5100_IN3L_MUTE 0x0100 /* IN3L_MUTE */ 17416d4baf08SMark Brown #define WM5100_IN3L_MUTE_MASK 0x0100 /* IN3L_MUTE */ 17426d4baf08SMark Brown #define WM5100_IN3L_MUTE_SHIFT 8 /* IN3L_MUTE */ 17436d4baf08SMark Brown #define WM5100_IN3L_MUTE_WIDTH 1 /* IN3L_MUTE */ 17446d4baf08SMark Brown #define WM5100_IN3L_VOL_MASK 0x00FF /* IN3L_VOL - [7:0] */ 17456d4baf08SMark Brown #define WM5100_IN3L_VOL_SHIFT 0 /* IN3L_VOL - [7:0] */ 17466d4baf08SMark Brown #define WM5100_IN3L_VOL_WIDTH 8 /* IN3L_VOL - [7:0] */ 17476d4baf08SMark Brown 17486d4baf08SMark Brown /* 17496d4baf08SMark Brown * R805 (0x325) - ADC Digital Volume 3R 17506d4baf08SMark Brown */ 17516d4baf08SMark Brown #define WM5100_IN_VU 0x0200 /* IN_VU */ 17526d4baf08SMark Brown #define WM5100_IN_VU_MASK 0x0200 /* IN_VU */ 17536d4baf08SMark Brown #define WM5100_IN_VU_SHIFT 9 /* IN_VU */ 17546d4baf08SMark Brown #define WM5100_IN_VU_WIDTH 1 /* IN_VU */ 17556d4baf08SMark Brown #define WM5100_IN3R_MUTE 0x0100 /* IN3R_MUTE */ 17566d4baf08SMark Brown #define WM5100_IN3R_MUTE_MASK 0x0100 /* IN3R_MUTE */ 17576d4baf08SMark Brown #define WM5100_IN3R_MUTE_SHIFT 8 /* IN3R_MUTE */ 17586d4baf08SMark Brown #define WM5100_IN3R_MUTE_WIDTH 1 /* IN3R_MUTE */ 17596d4baf08SMark Brown #define WM5100_IN3R_VOL_MASK 0x00FF /* IN3R_VOL - [7:0] */ 17606d4baf08SMark Brown #define WM5100_IN3R_VOL_SHIFT 0 /* IN3R_VOL - [7:0] */ 17616d4baf08SMark Brown #define WM5100_IN3R_VOL_WIDTH 8 /* IN3R_VOL - [7:0] */ 17626d4baf08SMark Brown 17636d4baf08SMark Brown /* 17646d4baf08SMark Brown * R806 (0x326) - ADC Digital Volume 4L 17656d4baf08SMark Brown */ 17666d4baf08SMark Brown #define WM5100_IN_VU 0x0200 /* IN_VU */ 17676d4baf08SMark Brown #define WM5100_IN_VU_MASK 0x0200 /* IN_VU */ 17686d4baf08SMark Brown #define WM5100_IN_VU_SHIFT 9 /* IN_VU */ 17696d4baf08SMark Brown #define WM5100_IN_VU_WIDTH 1 /* IN_VU */ 17706d4baf08SMark Brown #define WM5100_IN4L_MUTE 0x0100 /* IN4L_MUTE */ 17716d4baf08SMark Brown #define WM5100_IN4L_MUTE_MASK 0x0100 /* IN4L_MUTE */ 17726d4baf08SMark Brown #define WM5100_IN4L_MUTE_SHIFT 8 /* IN4L_MUTE */ 17736d4baf08SMark Brown #define WM5100_IN4L_MUTE_WIDTH 1 /* IN4L_MUTE */ 17746d4baf08SMark Brown #define WM5100_IN4L_VOL_MASK 0x00FF /* IN4L_VOL - [7:0] */ 17756d4baf08SMark Brown #define WM5100_IN4L_VOL_SHIFT 0 /* IN4L_VOL - [7:0] */ 17766d4baf08SMark Brown #define WM5100_IN4L_VOL_WIDTH 8 /* IN4L_VOL - [7:0] */ 17776d4baf08SMark Brown 17786d4baf08SMark Brown /* 17796d4baf08SMark Brown * R807 (0x327) - ADC Digital Volume 4R 17806d4baf08SMark Brown */ 17816d4baf08SMark Brown #define WM5100_IN_VU 0x0200 /* IN_VU */ 17826d4baf08SMark Brown #define WM5100_IN_VU_MASK 0x0200 /* IN_VU */ 17836d4baf08SMark Brown #define WM5100_IN_VU_SHIFT 9 /* IN_VU */ 17846d4baf08SMark Brown #define WM5100_IN_VU_WIDTH 1 /* IN_VU */ 17856d4baf08SMark Brown #define WM5100_IN4R_MUTE 0x0100 /* IN4R_MUTE */ 17866d4baf08SMark Brown #define WM5100_IN4R_MUTE_MASK 0x0100 /* IN4R_MUTE */ 17876d4baf08SMark Brown #define WM5100_IN4R_MUTE_SHIFT 8 /* IN4R_MUTE */ 17886d4baf08SMark Brown #define WM5100_IN4R_MUTE_WIDTH 1 /* IN4R_MUTE */ 17896d4baf08SMark Brown #define WM5100_IN4R_VOL_MASK 0x00FF /* IN4R_VOL - [7:0] */ 17906d4baf08SMark Brown #define WM5100_IN4R_VOL_SHIFT 0 /* IN4R_VOL - [7:0] */ 17916d4baf08SMark Brown #define WM5100_IN4R_VOL_WIDTH 8 /* IN4R_VOL - [7:0] */ 17926d4baf08SMark Brown 17936d4baf08SMark Brown /* 17946d4baf08SMark Brown * R1025 (0x401) - Output Enables 2 17956d4baf08SMark Brown */ 17966d4baf08SMark Brown #define WM5100_OUT6L_ENA 0x0800 /* OUT6L_ENA */ 17976d4baf08SMark Brown #define WM5100_OUT6L_ENA_MASK 0x0800 /* OUT6L_ENA */ 17986d4baf08SMark Brown #define WM5100_OUT6L_ENA_SHIFT 11 /* OUT6L_ENA */ 17996d4baf08SMark Brown #define WM5100_OUT6L_ENA_WIDTH 1 /* OUT6L_ENA */ 18006d4baf08SMark Brown #define WM5100_OUT6R_ENA 0x0400 /* OUT6R_ENA */ 18016d4baf08SMark Brown #define WM5100_OUT6R_ENA_MASK 0x0400 /* OUT6R_ENA */ 18026d4baf08SMark Brown #define WM5100_OUT6R_ENA_SHIFT 10 /* OUT6R_ENA */ 18036d4baf08SMark Brown #define WM5100_OUT6R_ENA_WIDTH 1 /* OUT6R_ENA */ 18046d4baf08SMark Brown #define WM5100_OUT5L_ENA 0x0200 /* OUT5L_ENA */ 18056d4baf08SMark Brown #define WM5100_OUT5L_ENA_MASK 0x0200 /* OUT5L_ENA */ 18066d4baf08SMark Brown #define WM5100_OUT5L_ENA_SHIFT 9 /* OUT5L_ENA */ 18076d4baf08SMark Brown #define WM5100_OUT5L_ENA_WIDTH 1 /* OUT5L_ENA */ 18086d4baf08SMark Brown #define WM5100_OUT5R_ENA 0x0100 /* OUT5R_ENA */ 18096d4baf08SMark Brown #define WM5100_OUT5R_ENA_MASK 0x0100 /* OUT5R_ENA */ 18106d4baf08SMark Brown #define WM5100_OUT5R_ENA_SHIFT 8 /* OUT5R_ENA */ 18116d4baf08SMark Brown #define WM5100_OUT5R_ENA_WIDTH 1 /* OUT5R_ENA */ 18126d4baf08SMark Brown #define WM5100_OUT4L_ENA 0x0080 /* OUT4L_ENA */ 18136d4baf08SMark Brown #define WM5100_OUT4L_ENA_MASK 0x0080 /* OUT4L_ENA */ 18146d4baf08SMark Brown #define WM5100_OUT4L_ENA_SHIFT 7 /* OUT4L_ENA */ 18156d4baf08SMark Brown #define WM5100_OUT4L_ENA_WIDTH 1 /* OUT4L_ENA */ 18166d4baf08SMark Brown #define WM5100_OUT4R_ENA 0x0040 /* OUT4R_ENA */ 18176d4baf08SMark Brown #define WM5100_OUT4R_ENA_MASK 0x0040 /* OUT4R_ENA */ 18186d4baf08SMark Brown #define WM5100_OUT4R_ENA_SHIFT 6 /* OUT4R_ENA */ 18196d4baf08SMark Brown #define WM5100_OUT4R_ENA_WIDTH 1 /* OUT4R_ENA */ 18206d4baf08SMark Brown 18216d4baf08SMark Brown /* 18226d4baf08SMark Brown * R1026 (0x402) - Output Status 1 18236d4baf08SMark Brown */ 18246d4baf08SMark Brown #define WM5100_OUT3L_ENA_STS 0x0020 /* OUT3L_ENA_STS */ 18256d4baf08SMark Brown #define WM5100_OUT3L_ENA_STS_MASK 0x0020 /* OUT3L_ENA_STS */ 18266d4baf08SMark Brown #define WM5100_OUT3L_ENA_STS_SHIFT 5 /* OUT3L_ENA_STS */ 18276d4baf08SMark Brown #define WM5100_OUT3L_ENA_STS_WIDTH 1 /* OUT3L_ENA_STS */ 18286d4baf08SMark Brown #define WM5100_OUT3R_ENA_STS 0x0010 /* OUT3R_ENA_STS */ 18296d4baf08SMark Brown #define WM5100_OUT3R_ENA_STS_MASK 0x0010 /* OUT3R_ENA_STS */ 18306d4baf08SMark Brown #define WM5100_OUT3R_ENA_STS_SHIFT 4 /* OUT3R_ENA_STS */ 18316d4baf08SMark Brown #define WM5100_OUT3R_ENA_STS_WIDTH 1 /* OUT3R_ENA_STS */ 18326d4baf08SMark Brown #define WM5100_OUT2L_ENA_STS 0x0008 /* OUT2L_ENA_STS */ 18336d4baf08SMark Brown #define WM5100_OUT2L_ENA_STS_MASK 0x0008 /* OUT2L_ENA_STS */ 18346d4baf08SMark Brown #define WM5100_OUT2L_ENA_STS_SHIFT 3 /* OUT2L_ENA_STS */ 18356d4baf08SMark Brown #define WM5100_OUT2L_ENA_STS_WIDTH 1 /* OUT2L_ENA_STS */ 18366d4baf08SMark Brown #define WM5100_OUT2R_ENA_STS 0x0004 /* OUT2R_ENA_STS */ 18376d4baf08SMark Brown #define WM5100_OUT2R_ENA_STS_MASK 0x0004 /* OUT2R_ENA_STS */ 18386d4baf08SMark Brown #define WM5100_OUT2R_ENA_STS_SHIFT 2 /* OUT2R_ENA_STS */ 18396d4baf08SMark Brown #define WM5100_OUT2R_ENA_STS_WIDTH 1 /* OUT2R_ENA_STS */ 18406d4baf08SMark Brown #define WM5100_OUT1L_ENA_STS 0x0002 /* OUT1L_ENA_STS */ 18416d4baf08SMark Brown #define WM5100_OUT1L_ENA_STS_MASK 0x0002 /* OUT1L_ENA_STS */ 18426d4baf08SMark Brown #define WM5100_OUT1L_ENA_STS_SHIFT 1 /* OUT1L_ENA_STS */ 18436d4baf08SMark Brown #define WM5100_OUT1L_ENA_STS_WIDTH 1 /* OUT1L_ENA_STS */ 18446d4baf08SMark Brown #define WM5100_OUT1R_ENA_STS 0x0001 /* OUT1R_ENA_STS */ 18456d4baf08SMark Brown #define WM5100_OUT1R_ENA_STS_MASK 0x0001 /* OUT1R_ENA_STS */ 18466d4baf08SMark Brown #define WM5100_OUT1R_ENA_STS_SHIFT 0 /* OUT1R_ENA_STS */ 18476d4baf08SMark Brown #define WM5100_OUT1R_ENA_STS_WIDTH 1 /* OUT1R_ENA_STS */ 18486d4baf08SMark Brown 18496d4baf08SMark Brown /* 18506d4baf08SMark Brown * R1027 (0x403) - Output Status 2 18516d4baf08SMark Brown */ 18526d4baf08SMark Brown #define WM5100_OUT6L_ENA_STS 0x0800 /* OUT6L_ENA_STS */ 18536d4baf08SMark Brown #define WM5100_OUT6L_ENA_STS_MASK 0x0800 /* OUT6L_ENA_STS */ 18546d4baf08SMark Brown #define WM5100_OUT6L_ENA_STS_SHIFT 11 /* OUT6L_ENA_STS */ 18556d4baf08SMark Brown #define WM5100_OUT6L_ENA_STS_WIDTH 1 /* OUT6L_ENA_STS */ 18566d4baf08SMark Brown #define WM5100_OUT6R_ENA_STS 0x0400 /* OUT6R_ENA_STS */ 18576d4baf08SMark Brown #define WM5100_OUT6R_ENA_STS_MASK 0x0400 /* OUT6R_ENA_STS */ 18586d4baf08SMark Brown #define WM5100_OUT6R_ENA_STS_SHIFT 10 /* OUT6R_ENA_STS */ 18596d4baf08SMark Brown #define WM5100_OUT6R_ENA_STS_WIDTH 1 /* OUT6R_ENA_STS */ 18606d4baf08SMark Brown #define WM5100_OUT5L_ENA_STS 0x0200 /* OUT5L_ENA_STS */ 18616d4baf08SMark Brown #define WM5100_OUT5L_ENA_STS_MASK 0x0200 /* OUT5L_ENA_STS */ 18626d4baf08SMark Brown #define WM5100_OUT5L_ENA_STS_SHIFT 9 /* OUT5L_ENA_STS */ 18636d4baf08SMark Brown #define WM5100_OUT5L_ENA_STS_WIDTH 1 /* OUT5L_ENA_STS */ 18646d4baf08SMark Brown #define WM5100_OUT5R_ENA_STS 0x0100 /* OUT5R_ENA_STS */ 18656d4baf08SMark Brown #define WM5100_OUT5R_ENA_STS_MASK 0x0100 /* OUT5R_ENA_STS */ 18666d4baf08SMark Brown #define WM5100_OUT5R_ENA_STS_SHIFT 8 /* OUT5R_ENA_STS */ 18676d4baf08SMark Brown #define WM5100_OUT5R_ENA_STS_WIDTH 1 /* OUT5R_ENA_STS */ 18686d4baf08SMark Brown #define WM5100_OUT4L_ENA_STS 0x0080 /* OUT4L_ENA_STS */ 18696d4baf08SMark Brown #define WM5100_OUT4L_ENA_STS_MASK 0x0080 /* OUT4L_ENA_STS */ 18706d4baf08SMark Brown #define WM5100_OUT4L_ENA_STS_SHIFT 7 /* OUT4L_ENA_STS */ 18716d4baf08SMark Brown #define WM5100_OUT4L_ENA_STS_WIDTH 1 /* OUT4L_ENA_STS */ 18726d4baf08SMark Brown #define WM5100_OUT4R_ENA_STS 0x0040 /* OUT4R_ENA_STS */ 18736d4baf08SMark Brown #define WM5100_OUT4R_ENA_STS_MASK 0x0040 /* OUT4R_ENA_STS */ 18746d4baf08SMark Brown #define WM5100_OUT4R_ENA_STS_SHIFT 6 /* OUT4R_ENA_STS */ 18756d4baf08SMark Brown #define WM5100_OUT4R_ENA_STS_WIDTH 1 /* OUT4R_ENA_STS */ 18766d4baf08SMark Brown 18776d4baf08SMark Brown /* 18786d4baf08SMark Brown * R1032 (0x408) - Channel Enables 1 18796d4baf08SMark Brown */ 18806d4baf08SMark Brown #define WM5100_HP3L_ENA 0x0020 /* HP3L_ENA */ 18816d4baf08SMark Brown #define WM5100_HP3L_ENA_MASK 0x0020 /* HP3L_ENA */ 18826d4baf08SMark Brown #define WM5100_HP3L_ENA_SHIFT 5 /* HP3L_ENA */ 18836d4baf08SMark Brown #define WM5100_HP3L_ENA_WIDTH 1 /* HP3L_ENA */ 18846d4baf08SMark Brown #define WM5100_HP3R_ENA 0x0010 /* HP3R_ENA */ 18856d4baf08SMark Brown #define WM5100_HP3R_ENA_MASK 0x0010 /* HP3R_ENA */ 18866d4baf08SMark Brown #define WM5100_HP3R_ENA_SHIFT 4 /* HP3R_ENA */ 18876d4baf08SMark Brown #define WM5100_HP3R_ENA_WIDTH 1 /* HP3R_ENA */ 18886d4baf08SMark Brown #define WM5100_HP2L_ENA 0x0008 /* HP2L_ENA */ 18896d4baf08SMark Brown #define WM5100_HP2L_ENA_MASK 0x0008 /* HP2L_ENA */ 18906d4baf08SMark Brown #define WM5100_HP2L_ENA_SHIFT 3 /* HP2L_ENA */ 18916d4baf08SMark Brown #define WM5100_HP2L_ENA_WIDTH 1 /* HP2L_ENA */ 18926d4baf08SMark Brown #define WM5100_HP2R_ENA 0x0004 /* HP2R_ENA */ 18936d4baf08SMark Brown #define WM5100_HP2R_ENA_MASK 0x0004 /* HP2R_ENA */ 18946d4baf08SMark Brown #define WM5100_HP2R_ENA_SHIFT 2 /* HP2R_ENA */ 18956d4baf08SMark Brown #define WM5100_HP2R_ENA_WIDTH 1 /* HP2R_ENA */ 18966d4baf08SMark Brown #define WM5100_HP1L_ENA 0x0002 /* HP1L_ENA */ 18976d4baf08SMark Brown #define WM5100_HP1L_ENA_MASK 0x0002 /* HP1L_ENA */ 18986d4baf08SMark Brown #define WM5100_HP1L_ENA_SHIFT 1 /* HP1L_ENA */ 18996d4baf08SMark Brown #define WM5100_HP1L_ENA_WIDTH 1 /* HP1L_ENA */ 19006d4baf08SMark Brown #define WM5100_HP1R_ENA 0x0001 /* HP1R_ENA */ 19016d4baf08SMark Brown #define WM5100_HP1R_ENA_MASK 0x0001 /* HP1R_ENA */ 19026d4baf08SMark Brown #define WM5100_HP1R_ENA_SHIFT 0 /* HP1R_ENA */ 19036d4baf08SMark Brown #define WM5100_HP1R_ENA_WIDTH 1 /* HP1R_ENA */ 19046d4baf08SMark Brown 19056d4baf08SMark Brown /* 19066d4baf08SMark Brown * R1040 (0x410) - Out Volume 1L 19076d4baf08SMark Brown */ 19086d4baf08SMark Brown #define WM5100_OUT_RATE_MASK 0xC000 /* OUT_RATE - [15:14] */ 19096d4baf08SMark Brown #define WM5100_OUT_RATE_SHIFT 14 /* OUT_RATE - [15:14] */ 19106d4baf08SMark Brown #define WM5100_OUT_RATE_WIDTH 2 /* OUT_RATE - [15:14] */ 19116d4baf08SMark Brown #define WM5100_OUT1_OSR 0x2000 /* OUT1_OSR */ 19126d4baf08SMark Brown #define WM5100_OUT1_OSR_MASK 0x2000 /* OUT1_OSR */ 19136d4baf08SMark Brown #define WM5100_OUT1_OSR_SHIFT 13 /* OUT1_OSR */ 19146d4baf08SMark Brown #define WM5100_OUT1_OSR_WIDTH 1 /* OUT1_OSR */ 19156d4baf08SMark Brown #define WM5100_OUT1_MONO 0x1000 /* OUT1_MONO */ 19166d4baf08SMark Brown #define WM5100_OUT1_MONO_MASK 0x1000 /* OUT1_MONO */ 19176d4baf08SMark Brown #define WM5100_OUT1_MONO_SHIFT 12 /* OUT1_MONO */ 19186d4baf08SMark Brown #define WM5100_OUT1_MONO_WIDTH 1 /* OUT1_MONO */ 19196d4baf08SMark Brown #define WM5100_OUT1L_ANC_SRC 0x0800 /* OUT1L_ANC_SRC */ 19206d4baf08SMark Brown #define WM5100_OUT1L_ANC_SRC_MASK 0x0800 /* OUT1L_ANC_SRC */ 19216d4baf08SMark Brown #define WM5100_OUT1L_ANC_SRC_SHIFT 11 /* OUT1L_ANC_SRC */ 19226d4baf08SMark Brown #define WM5100_OUT1L_ANC_SRC_WIDTH 1 /* OUT1L_ANC_SRC */ 19236d4baf08SMark Brown #define WM5100_OUT1L_PGA_VOL_MASK 0x00FE /* OUT1L_PGA_VOL - [7:1] */ 19246d4baf08SMark Brown #define WM5100_OUT1L_PGA_VOL_SHIFT 1 /* OUT1L_PGA_VOL - [7:1] */ 19256d4baf08SMark Brown #define WM5100_OUT1L_PGA_VOL_WIDTH 7 /* OUT1L_PGA_VOL - [7:1] */ 19266d4baf08SMark Brown 19276d4baf08SMark Brown /* 19286d4baf08SMark Brown * R1041 (0x411) - Out Volume 1R 19296d4baf08SMark Brown */ 19306d4baf08SMark Brown #define WM5100_OUT1R_ANC_SRC 0x0800 /* OUT1R_ANC_SRC */ 19316d4baf08SMark Brown #define WM5100_OUT1R_ANC_SRC_MASK 0x0800 /* OUT1R_ANC_SRC */ 19326d4baf08SMark Brown #define WM5100_OUT1R_ANC_SRC_SHIFT 11 /* OUT1R_ANC_SRC */ 19336d4baf08SMark Brown #define WM5100_OUT1R_ANC_SRC_WIDTH 1 /* OUT1R_ANC_SRC */ 19346d4baf08SMark Brown #define WM5100_OUT1R_PGA_VOL_MASK 0x00FE /* OUT1R_PGA_VOL - [7:1] */ 19356d4baf08SMark Brown #define WM5100_OUT1R_PGA_VOL_SHIFT 1 /* OUT1R_PGA_VOL - [7:1] */ 19366d4baf08SMark Brown #define WM5100_OUT1R_PGA_VOL_WIDTH 7 /* OUT1R_PGA_VOL - [7:1] */ 19376d4baf08SMark Brown 19386d4baf08SMark Brown /* 19396d4baf08SMark Brown * R1042 (0x412) - DAC Volume Limit 1L 19406d4baf08SMark Brown */ 19416d4baf08SMark Brown #define WM5100_OUT1L_VOL_LIM_MASK 0x00FF /* OUT1L_VOL_LIM - [7:0] */ 19426d4baf08SMark Brown #define WM5100_OUT1L_VOL_LIM_SHIFT 0 /* OUT1L_VOL_LIM - [7:0] */ 19436d4baf08SMark Brown #define WM5100_OUT1L_VOL_LIM_WIDTH 8 /* OUT1L_VOL_LIM - [7:0] */ 19446d4baf08SMark Brown 19456d4baf08SMark Brown /* 19466d4baf08SMark Brown * R1043 (0x413) - DAC Volume Limit 1R 19476d4baf08SMark Brown */ 19486d4baf08SMark Brown #define WM5100_OUT1R_VOL_LIM_MASK 0x00FF /* OUT1R_VOL_LIM - [7:0] */ 19496d4baf08SMark Brown #define WM5100_OUT1R_VOL_LIM_SHIFT 0 /* OUT1R_VOL_LIM - [7:0] */ 19506d4baf08SMark Brown #define WM5100_OUT1R_VOL_LIM_WIDTH 8 /* OUT1R_VOL_LIM - [7:0] */ 19516d4baf08SMark Brown 19526d4baf08SMark Brown /* 19536d4baf08SMark Brown * R1044 (0x414) - Out Volume 2L 19546d4baf08SMark Brown */ 19556d4baf08SMark Brown #define WM5100_OUT2_OSR 0x2000 /* OUT2_OSR */ 19566d4baf08SMark Brown #define WM5100_OUT2_OSR_MASK 0x2000 /* OUT2_OSR */ 19576d4baf08SMark Brown #define WM5100_OUT2_OSR_SHIFT 13 /* OUT2_OSR */ 19586d4baf08SMark Brown #define WM5100_OUT2_OSR_WIDTH 1 /* OUT2_OSR */ 19596d4baf08SMark Brown #define WM5100_OUT2_MONO 0x1000 /* OUT2_MONO */ 19606d4baf08SMark Brown #define WM5100_OUT2_MONO_MASK 0x1000 /* OUT2_MONO */ 19616d4baf08SMark Brown #define WM5100_OUT2_MONO_SHIFT 12 /* OUT2_MONO */ 19626d4baf08SMark Brown #define WM5100_OUT2_MONO_WIDTH 1 /* OUT2_MONO */ 19636d4baf08SMark Brown #define WM5100_OUT2L_ANC_SRC 0x0800 /* OUT2L_ANC_SRC */ 19646d4baf08SMark Brown #define WM5100_OUT2L_ANC_SRC_MASK 0x0800 /* OUT2L_ANC_SRC */ 19656d4baf08SMark Brown #define WM5100_OUT2L_ANC_SRC_SHIFT 11 /* OUT2L_ANC_SRC */ 19666d4baf08SMark Brown #define WM5100_OUT2L_ANC_SRC_WIDTH 1 /* OUT2L_ANC_SRC */ 19676d4baf08SMark Brown #define WM5100_OUT2L_PGA_VOL_MASK 0x00FE /* OUT2L_PGA_VOL - [7:1] */ 19686d4baf08SMark Brown #define WM5100_OUT2L_PGA_VOL_SHIFT 1 /* OUT2L_PGA_VOL - [7:1] */ 19696d4baf08SMark Brown #define WM5100_OUT2L_PGA_VOL_WIDTH 7 /* OUT2L_PGA_VOL - [7:1] */ 19706d4baf08SMark Brown 19716d4baf08SMark Brown /* 19726d4baf08SMark Brown * R1045 (0x415) - Out Volume 2R 19736d4baf08SMark Brown */ 19746d4baf08SMark Brown #define WM5100_OUT2R_ANC_SRC 0x0800 /* OUT2R_ANC_SRC */ 19756d4baf08SMark Brown #define WM5100_OUT2R_ANC_SRC_MASK 0x0800 /* OUT2R_ANC_SRC */ 19766d4baf08SMark Brown #define WM5100_OUT2R_ANC_SRC_SHIFT 11 /* OUT2R_ANC_SRC */ 19776d4baf08SMark Brown #define WM5100_OUT2R_ANC_SRC_WIDTH 1 /* OUT2R_ANC_SRC */ 19786d4baf08SMark Brown #define WM5100_OUT2R_PGA_VOL_MASK 0x00FE /* OUT2R_PGA_VOL - [7:1] */ 19796d4baf08SMark Brown #define WM5100_OUT2R_PGA_VOL_SHIFT 1 /* OUT2R_PGA_VOL - [7:1] */ 19806d4baf08SMark Brown #define WM5100_OUT2R_PGA_VOL_WIDTH 7 /* OUT2R_PGA_VOL - [7:1] */ 19816d4baf08SMark Brown 19826d4baf08SMark Brown /* 19836d4baf08SMark Brown * R1046 (0x416) - DAC Volume Limit 2L 19846d4baf08SMark Brown */ 19856d4baf08SMark Brown #define WM5100_OUT2L_VOL_LIM_MASK 0x00FF /* OUT2L_VOL_LIM - [7:0] */ 19866d4baf08SMark Brown #define WM5100_OUT2L_VOL_LIM_SHIFT 0 /* OUT2L_VOL_LIM - [7:0] */ 19876d4baf08SMark Brown #define WM5100_OUT2L_VOL_LIM_WIDTH 8 /* OUT2L_VOL_LIM - [7:0] */ 19886d4baf08SMark Brown 19896d4baf08SMark Brown /* 19906d4baf08SMark Brown * R1047 (0x417) - DAC Volume Limit 2R 19916d4baf08SMark Brown */ 19926d4baf08SMark Brown #define WM5100_OUT2R_VOL_LIM_MASK 0x00FF /* OUT2R_VOL_LIM - [7:0] */ 19936d4baf08SMark Brown #define WM5100_OUT2R_VOL_LIM_SHIFT 0 /* OUT2R_VOL_LIM - [7:0] */ 19946d4baf08SMark Brown #define WM5100_OUT2R_VOL_LIM_WIDTH 8 /* OUT2R_VOL_LIM - [7:0] */ 19956d4baf08SMark Brown 19966d4baf08SMark Brown /* 19976d4baf08SMark Brown * R1048 (0x418) - Out Volume 3L 19986d4baf08SMark Brown */ 19996d4baf08SMark Brown #define WM5100_OUT3_OSR 0x2000 /* OUT3_OSR */ 20006d4baf08SMark Brown #define WM5100_OUT3_OSR_MASK 0x2000 /* OUT3_OSR */ 20016d4baf08SMark Brown #define WM5100_OUT3_OSR_SHIFT 13 /* OUT3_OSR */ 20026d4baf08SMark Brown #define WM5100_OUT3_OSR_WIDTH 1 /* OUT3_OSR */ 20036d4baf08SMark Brown #define WM5100_OUT3_MONO 0x1000 /* OUT3_MONO */ 20046d4baf08SMark Brown #define WM5100_OUT3_MONO_MASK 0x1000 /* OUT3_MONO */ 20056d4baf08SMark Brown #define WM5100_OUT3_MONO_SHIFT 12 /* OUT3_MONO */ 20066d4baf08SMark Brown #define WM5100_OUT3_MONO_WIDTH 1 /* OUT3_MONO */ 20076d4baf08SMark Brown #define WM5100_OUT3L_ANC_SRC 0x0800 /* OUT3L_ANC_SRC */ 20086d4baf08SMark Brown #define WM5100_OUT3L_ANC_SRC_MASK 0x0800 /* OUT3L_ANC_SRC */ 20096d4baf08SMark Brown #define WM5100_OUT3L_ANC_SRC_SHIFT 11 /* OUT3L_ANC_SRC */ 20106d4baf08SMark Brown #define WM5100_OUT3L_ANC_SRC_WIDTH 1 /* OUT3L_ANC_SRC */ 20116d4baf08SMark Brown #define WM5100_OUT3L_PGA_VOL_MASK 0x00FE /* OUT3L_PGA_VOL - [7:1] */ 20126d4baf08SMark Brown #define WM5100_OUT3L_PGA_VOL_SHIFT 1 /* OUT3L_PGA_VOL - [7:1] */ 20136d4baf08SMark Brown #define WM5100_OUT3L_PGA_VOL_WIDTH 7 /* OUT3L_PGA_VOL - [7:1] */ 20146d4baf08SMark Brown 20156d4baf08SMark Brown /* 20166d4baf08SMark Brown * R1049 (0x419) - Out Volume 3R 20176d4baf08SMark Brown */ 20186d4baf08SMark Brown #define WM5100_OUT3R_ANC_SRC 0x0800 /* OUT3R_ANC_SRC */ 20196d4baf08SMark Brown #define WM5100_OUT3R_ANC_SRC_MASK 0x0800 /* OUT3R_ANC_SRC */ 20206d4baf08SMark Brown #define WM5100_OUT3R_ANC_SRC_SHIFT 11 /* OUT3R_ANC_SRC */ 20216d4baf08SMark Brown #define WM5100_OUT3R_ANC_SRC_WIDTH 1 /* OUT3R_ANC_SRC */ 20226d4baf08SMark Brown #define WM5100_OUT3R_PGA_VOL_MASK 0x00FE /* OUT3R_PGA_VOL - [7:1] */ 20236d4baf08SMark Brown #define WM5100_OUT3R_PGA_VOL_SHIFT 1 /* OUT3R_PGA_VOL - [7:1] */ 20246d4baf08SMark Brown #define WM5100_OUT3R_PGA_VOL_WIDTH 7 /* OUT3R_PGA_VOL - [7:1] */ 20256d4baf08SMark Brown 20266d4baf08SMark Brown /* 20276d4baf08SMark Brown * R1050 (0x41A) - DAC Volume Limit 3L 20286d4baf08SMark Brown */ 20296d4baf08SMark Brown #define WM5100_OUT3L_VOL_LIM_MASK 0x00FF /* OUT3L_VOL_LIM - [7:0] */ 20306d4baf08SMark Brown #define WM5100_OUT3L_VOL_LIM_SHIFT 0 /* OUT3L_VOL_LIM - [7:0] */ 20316d4baf08SMark Brown #define WM5100_OUT3L_VOL_LIM_WIDTH 8 /* OUT3L_VOL_LIM - [7:0] */ 20326d4baf08SMark Brown 20336d4baf08SMark Brown /* 20346d4baf08SMark Brown * R1051 (0x41B) - DAC Volume Limit 3R 20356d4baf08SMark Brown */ 20366d4baf08SMark Brown #define WM5100_OUT3R_VOL_LIM_MASK 0x00FF /* OUT3R_VOL_LIM - [7:0] */ 20376d4baf08SMark Brown #define WM5100_OUT3R_VOL_LIM_SHIFT 0 /* OUT3R_VOL_LIM - [7:0] */ 20386d4baf08SMark Brown #define WM5100_OUT3R_VOL_LIM_WIDTH 8 /* OUT3R_VOL_LIM - [7:0] */ 20396d4baf08SMark Brown 20406d4baf08SMark Brown /* 20416d4baf08SMark Brown * R1052 (0x41C) - Out Volume 4L 20426d4baf08SMark Brown */ 20436d4baf08SMark Brown #define WM5100_OUT4_OSR 0x2000 /* OUT4_OSR */ 20446d4baf08SMark Brown #define WM5100_OUT4_OSR_MASK 0x2000 /* OUT4_OSR */ 20456d4baf08SMark Brown #define WM5100_OUT4_OSR_SHIFT 13 /* OUT4_OSR */ 20466d4baf08SMark Brown #define WM5100_OUT4_OSR_WIDTH 1 /* OUT4_OSR */ 20476d4baf08SMark Brown #define WM5100_OUT4L_ANC_SRC 0x0800 /* OUT4L_ANC_SRC */ 20486d4baf08SMark Brown #define WM5100_OUT4L_ANC_SRC_MASK 0x0800 /* OUT4L_ANC_SRC */ 20496d4baf08SMark Brown #define WM5100_OUT4L_ANC_SRC_SHIFT 11 /* OUT4L_ANC_SRC */ 20506d4baf08SMark Brown #define WM5100_OUT4L_ANC_SRC_WIDTH 1 /* OUT4L_ANC_SRC */ 20516d4baf08SMark Brown #define WM5100_OUT4L_VOL_LIM_MASK 0x00FF /* OUT4L_VOL_LIM - [7:0] */ 20526d4baf08SMark Brown #define WM5100_OUT4L_VOL_LIM_SHIFT 0 /* OUT4L_VOL_LIM - [7:0] */ 20536d4baf08SMark Brown #define WM5100_OUT4L_VOL_LIM_WIDTH 8 /* OUT4L_VOL_LIM - [7:0] */ 20546d4baf08SMark Brown 20556d4baf08SMark Brown /* 20566d4baf08SMark Brown * R1053 (0x41D) - Out Volume 4R 20576d4baf08SMark Brown */ 20586d4baf08SMark Brown #define WM5100_OUT4R_ANC_SRC 0x0800 /* OUT4R_ANC_SRC */ 20596d4baf08SMark Brown #define WM5100_OUT4R_ANC_SRC_MASK 0x0800 /* OUT4R_ANC_SRC */ 20606d4baf08SMark Brown #define WM5100_OUT4R_ANC_SRC_SHIFT 11 /* OUT4R_ANC_SRC */ 20616d4baf08SMark Brown #define WM5100_OUT4R_ANC_SRC_WIDTH 1 /* OUT4R_ANC_SRC */ 20626d4baf08SMark Brown #define WM5100_OUT4R_VOL_LIM_MASK 0x00FF /* OUT4R_VOL_LIM - [7:0] */ 20636d4baf08SMark Brown #define WM5100_OUT4R_VOL_LIM_SHIFT 0 /* OUT4R_VOL_LIM - [7:0] */ 20646d4baf08SMark Brown #define WM5100_OUT4R_VOL_LIM_WIDTH 8 /* OUT4R_VOL_LIM - [7:0] */ 20656d4baf08SMark Brown 20666d4baf08SMark Brown /* 20676d4baf08SMark Brown * R1054 (0x41E) - DAC Volume Limit 5L 20686d4baf08SMark Brown */ 20696d4baf08SMark Brown #define WM5100_OUT5_OSR 0x2000 /* OUT5_OSR */ 20706d4baf08SMark Brown #define WM5100_OUT5_OSR_MASK 0x2000 /* OUT5_OSR */ 20716d4baf08SMark Brown #define WM5100_OUT5_OSR_SHIFT 13 /* OUT5_OSR */ 20726d4baf08SMark Brown #define WM5100_OUT5_OSR_WIDTH 1 /* OUT5_OSR */ 20736d4baf08SMark Brown #define WM5100_OUT5L_ANC_SRC 0x0800 /* OUT5L_ANC_SRC */ 20746d4baf08SMark Brown #define WM5100_OUT5L_ANC_SRC_MASK 0x0800 /* OUT5L_ANC_SRC */ 20756d4baf08SMark Brown #define WM5100_OUT5L_ANC_SRC_SHIFT 11 /* OUT5L_ANC_SRC */ 20766d4baf08SMark Brown #define WM5100_OUT5L_ANC_SRC_WIDTH 1 /* OUT5L_ANC_SRC */ 20776d4baf08SMark Brown #define WM5100_OUT5L_VOL_LIM_MASK 0x00FF /* OUT5L_VOL_LIM - [7:0] */ 20786d4baf08SMark Brown #define WM5100_OUT5L_VOL_LIM_SHIFT 0 /* OUT5L_VOL_LIM - [7:0] */ 20796d4baf08SMark Brown #define WM5100_OUT5L_VOL_LIM_WIDTH 8 /* OUT5L_VOL_LIM - [7:0] */ 20806d4baf08SMark Brown 20816d4baf08SMark Brown /* 20826d4baf08SMark Brown * R1055 (0x41F) - DAC Volume Limit 5R 20836d4baf08SMark Brown */ 20846d4baf08SMark Brown #define WM5100_OUT5R_ANC_SRC 0x0800 /* OUT5R_ANC_SRC */ 20856d4baf08SMark Brown #define WM5100_OUT5R_ANC_SRC_MASK 0x0800 /* OUT5R_ANC_SRC */ 20866d4baf08SMark Brown #define WM5100_OUT5R_ANC_SRC_SHIFT 11 /* OUT5R_ANC_SRC */ 20876d4baf08SMark Brown #define WM5100_OUT5R_ANC_SRC_WIDTH 1 /* OUT5R_ANC_SRC */ 20886d4baf08SMark Brown #define WM5100_OUT5R_VOL_LIM_MASK 0x00FF /* OUT5R_VOL_LIM - [7:0] */ 20896d4baf08SMark Brown #define WM5100_OUT5R_VOL_LIM_SHIFT 0 /* OUT5R_VOL_LIM - [7:0] */ 20906d4baf08SMark Brown #define WM5100_OUT5R_VOL_LIM_WIDTH 8 /* OUT5R_VOL_LIM - [7:0] */ 20916d4baf08SMark Brown 20926d4baf08SMark Brown /* 20936d4baf08SMark Brown * R1056 (0x420) - DAC Volume Limit 6L 20946d4baf08SMark Brown */ 20956d4baf08SMark Brown #define WM5100_OUT6_OSR 0x2000 /* OUT6_OSR */ 20966d4baf08SMark Brown #define WM5100_OUT6_OSR_MASK 0x2000 /* OUT6_OSR */ 20976d4baf08SMark Brown #define WM5100_OUT6_OSR_SHIFT 13 /* OUT6_OSR */ 20986d4baf08SMark Brown #define WM5100_OUT6_OSR_WIDTH 1 /* OUT6_OSR */ 20996d4baf08SMark Brown #define WM5100_OUT6L_ANC_SRC 0x0800 /* OUT6L_ANC_SRC */ 21006d4baf08SMark Brown #define WM5100_OUT6L_ANC_SRC_MASK 0x0800 /* OUT6L_ANC_SRC */ 21016d4baf08SMark Brown #define WM5100_OUT6L_ANC_SRC_SHIFT 11 /* OUT6L_ANC_SRC */ 21026d4baf08SMark Brown #define WM5100_OUT6L_ANC_SRC_WIDTH 1 /* OUT6L_ANC_SRC */ 21036d4baf08SMark Brown #define WM5100_OUT6L_VOL_LIM_MASK 0x00FF /* OUT6L_VOL_LIM - [7:0] */ 21046d4baf08SMark Brown #define WM5100_OUT6L_VOL_LIM_SHIFT 0 /* OUT6L_VOL_LIM - [7:0] */ 21056d4baf08SMark Brown #define WM5100_OUT6L_VOL_LIM_WIDTH 8 /* OUT6L_VOL_LIM - [7:0] */ 21066d4baf08SMark Brown 21076d4baf08SMark Brown /* 21086d4baf08SMark Brown * R1057 (0x421) - DAC Volume Limit 6R 21096d4baf08SMark Brown */ 21106d4baf08SMark Brown #define WM5100_OUT6R_ANC_SRC 0x0800 /* OUT6R_ANC_SRC */ 21116d4baf08SMark Brown #define WM5100_OUT6R_ANC_SRC_MASK 0x0800 /* OUT6R_ANC_SRC */ 21126d4baf08SMark Brown #define WM5100_OUT6R_ANC_SRC_SHIFT 11 /* OUT6R_ANC_SRC */ 21136d4baf08SMark Brown #define WM5100_OUT6R_ANC_SRC_WIDTH 1 /* OUT6R_ANC_SRC */ 21146d4baf08SMark Brown #define WM5100_OUT6R_VOL_LIM_MASK 0x00FF /* OUT6R_VOL_LIM - [7:0] */ 21156d4baf08SMark Brown #define WM5100_OUT6R_VOL_LIM_SHIFT 0 /* OUT6R_VOL_LIM - [7:0] */ 21166d4baf08SMark Brown #define WM5100_OUT6R_VOL_LIM_WIDTH 8 /* OUT6R_VOL_LIM - [7:0] */ 21176d4baf08SMark Brown 21186d4baf08SMark Brown /* 21196d4baf08SMark Brown * R1088 (0x440) - DAC AEC Control 1 21206d4baf08SMark Brown */ 21216d4baf08SMark Brown #define WM5100_AEC_LOOPBACK_SRC_MASK 0x003C /* AEC_LOOPBACK_SRC - [5:2] */ 21226d4baf08SMark Brown #define WM5100_AEC_LOOPBACK_SRC_SHIFT 2 /* AEC_LOOPBACK_SRC - [5:2] */ 21236d4baf08SMark Brown #define WM5100_AEC_LOOPBACK_SRC_WIDTH 4 /* AEC_LOOPBACK_SRC - [5:2] */ 21246d4baf08SMark Brown #define WM5100_AEC_ENA_STS 0x0002 /* AEC_ENA_STS */ 21256d4baf08SMark Brown #define WM5100_AEC_ENA_STS_MASK 0x0002 /* AEC_ENA_STS */ 21266d4baf08SMark Brown #define WM5100_AEC_ENA_STS_SHIFT 1 /* AEC_ENA_STS */ 21276d4baf08SMark Brown #define WM5100_AEC_ENA_STS_WIDTH 1 /* AEC_ENA_STS */ 21286d4baf08SMark Brown #define WM5100_AEC_LOOPBACK_ENA 0x0001 /* AEC_LOOPBACK_ENA */ 21296d4baf08SMark Brown #define WM5100_AEC_LOOPBACK_ENA_MASK 0x0001 /* AEC_LOOPBACK_ENA */ 21306d4baf08SMark Brown #define WM5100_AEC_LOOPBACK_ENA_SHIFT 0 /* AEC_LOOPBACK_ENA */ 21316d4baf08SMark Brown #define WM5100_AEC_LOOPBACK_ENA_WIDTH 1 /* AEC_LOOPBACK_ENA */ 21326d4baf08SMark Brown 21336d4baf08SMark Brown /* 21346d4baf08SMark Brown * R1089 (0x441) - Output Volume Ramp 21356d4baf08SMark Brown */ 21366d4baf08SMark Brown #define WM5100_OUT_VD_RAMP_MASK 0x0070 /* OUT_VD_RAMP - [6:4] */ 21376d4baf08SMark Brown #define WM5100_OUT_VD_RAMP_SHIFT 4 /* OUT_VD_RAMP - [6:4] */ 21386d4baf08SMark Brown #define WM5100_OUT_VD_RAMP_WIDTH 3 /* OUT_VD_RAMP - [6:4] */ 21396d4baf08SMark Brown #define WM5100_OUT_VI_RAMP_MASK 0x0007 /* OUT_VI_RAMP - [2:0] */ 21406d4baf08SMark Brown #define WM5100_OUT_VI_RAMP_SHIFT 0 /* OUT_VI_RAMP - [2:0] */ 21416d4baf08SMark Brown #define WM5100_OUT_VI_RAMP_WIDTH 3 /* OUT_VI_RAMP - [2:0] */ 21426d4baf08SMark Brown 21436d4baf08SMark Brown /* 21446d4baf08SMark Brown * R1152 (0x480) - DAC Digital Volume 1L 21456d4baf08SMark Brown */ 21466d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 21476d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 21486d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 21496d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 21506d4baf08SMark Brown #define WM5100_OUT1L_MUTE 0x0100 /* OUT1L_MUTE */ 21516d4baf08SMark Brown #define WM5100_OUT1L_MUTE_MASK 0x0100 /* OUT1L_MUTE */ 21526d4baf08SMark Brown #define WM5100_OUT1L_MUTE_SHIFT 8 /* OUT1L_MUTE */ 21536d4baf08SMark Brown #define WM5100_OUT1L_MUTE_WIDTH 1 /* OUT1L_MUTE */ 21546d4baf08SMark Brown #define WM5100_OUT1L_VOL_MASK 0x00FF /* OUT1L_VOL - [7:0] */ 21556d4baf08SMark Brown #define WM5100_OUT1L_VOL_SHIFT 0 /* OUT1L_VOL - [7:0] */ 21566d4baf08SMark Brown #define WM5100_OUT1L_VOL_WIDTH 8 /* OUT1L_VOL - [7:0] */ 21576d4baf08SMark Brown 21586d4baf08SMark Brown /* 21596d4baf08SMark Brown * R1153 (0x481) - DAC Digital Volume 1R 21606d4baf08SMark Brown */ 21616d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 21626d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 21636d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 21646d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 21656d4baf08SMark Brown #define WM5100_OUT1R_MUTE 0x0100 /* OUT1R_MUTE */ 21666d4baf08SMark Brown #define WM5100_OUT1R_MUTE_MASK 0x0100 /* OUT1R_MUTE */ 21676d4baf08SMark Brown #define WM5100_OUT1R_MUTE_SHIFT 8 /* OUT1R_MUTE */ 21686d4baf08SMark Brown #define WM5100_OUT1R_MUTE_WIDTH 1 /* OUT1R_MUTE */ 21696d4baf08SMark Brown #define WM5100_OUT1R_VOL_MASK 0x00FF /* OUT1R_VOL - [7:0] */ 21706d4baf08SMark Brown #define WM5100_OUT1R_VOL_SHIFT 0 /* OUT1R_VOL - [7:0] */ 21716d4baf08SMark Brown #define WM5100_OUT1R_VOL_WIDTH 8 /* OUT1R_VOL - [7:0] */ 21726d4baf08SMark Brown 21736d4baf08SMark Brown /* 21746d4baf08SMark Brown * R1154 (0x482) - DAC Digital Volume 2L 21756d4baf08SMark Brown */ 21766d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 21776d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 21786d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 21796d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 21806d4baf08SMark Brown #define WM5100_OUT2L_MUTE 0x0100 /* OUT2L_MUTE */ 21816d4baf08SMark Brown #define WM5100_OUT2L_MUTE_MASK 0x0100 /* OUT2L_MUTE */ 21826d4baf08SMark Brown #define WM5100_OUT2L_MUTE_SHIFT 8 /* OUT2L_MUTE */ 21836d4baf08SMark Brown #define WM5100_OUT2L_MUTE_WIDTH 1 /* OUT2L_MUTE */ 21846d4baf08SMark Brown #define WM5100_OUT2L_VOL_MASK 0x00FF /* OUT2L_VOL - [7:0] */ 21856d4baf08SMark Brown #define WM5100_OUT2L_VOL_SHIFT 0 /* OUT2L_VOL - [7:0] */ 21866d4baf08SMark Brown #define WM5100_OUT2L_VOL_WIDTH 8 /* OUT2L_VOL - [7:0] */ 21876d4baf08SMark Brown 21886d4baf08SMark Brown /* 21896d4baf08SMark Brown * R1155 (0x483) - DAC Digital Volume 2R 21906d4baf08SMark Brown */ 21916d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 21926d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 21936d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 21946d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 21956d4baf08SMark Brown #define WM5100_OUT2R_MUTE 0x0100 /* OUT2R_MUTE */ 21966d4baf08SMark Brown #define WM5100_OUT2R_MUTE_MASK 0x0100 /* OUT2R_MUTE */ 21976d4baf08SMark Brown #define WM5100_OUT2R_MUTE_SHIFT 8 /* OUT2R_MUTE */ 21986d4baf08SMark Brown #define WM5100_OUT2R_MUTE_WIDTH 1 /* OUT2R_MUTE */ 21996d4baf08SMark Brown #define WM5100_OUT2R_VOL_MASK 0x00FF /* OUT2R_VOL - [7:0] */ 22006d4baf08SMark Brown #define WM5100_OUT2R_VOL_SHIFT 0 /* OUT2R_VOL - [7:0] */ 22016d4baf08SMark Brown #define WM5100_OUT2R_VOL_WIDTH 8 /* OUT2R_VOL - [7:0] */ 22026d4baf08SMark Brown 22036d4baf08SMark Brown /* 22046d4baf08SMark Brown * R1156 (0x484) - DAC Digital Volume 3L 22056d4baf08SMark Brown */ 22066d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 22076d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 22086d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 22096d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 22106d4baf08SMark Brown #define WM5100_OUT3L_MUTE 0x0100 /* OUT3L_MUTE */ 22116d4baf08SMark Brown #define WM5100_OUT3L_MUTE_MASK 0x0100 /* OUT3L_MUTE */ 22126d4baf08SMark Brown #define WM5100_OUT3L_MUTE_SHIFT 8 /* OUT3L_MUTE */ 22136d4baf08SMark Brown #define WM5100_OUT3L_MUTE_WIDTH 1 /* OUT3L_MUTE */ 22146d4baf08SMark Brown #define WM5100_OUT3L_VOL_MASK 0x00FF /* OUT3L_VOL - [7:0] */ 22156d4baf08SMark Brown #define WM5100_OUT3L_VOL_SHIFT 0 /* OUT3L_VOL - [7:0] */ 22166d4baf08SMark Brown #define WM5100_OUT3L_VOL_WIDTH 8 /* OUT3L_VOL - [7:0] */ 22176d4baf08SMark Brown 22186d4baf08SMark Brown /* 22196d4baf08SMark Brown * R1157 (0x485) - DAC Digital Volume 3R 22206d4baf08SMark Brown */ 22216d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 22226d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 22236d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 22246d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 22256d4baf08SMark Brown #define WM5100_OUT3R_MUTE 0x0100 /* OUT3R_MUTE */ 22266d4baf08SMark Brown #define WM5100_OUT3R_MUTE_MASK 0x0100 /* OUT3R_MUTE */ 22276d4baf08SMark Brown #define WM5100_OUT3R_MUTE_SHIFT 8 /* OUT3R_MUTE */ 22286d4baf08SMark Brown #define WM5100_OUT3R_MUTE_WIDTH 1 /* OUT3R_MUTE */ 22296d4baf08SMark Brown #define WM5100_OUT3R_VOL_MASK 0x00FF /* OUT3R_VOL - [7:0] */ 22306d4baf08SMark Brown #define WM5100_OUT3R_VOL_SHIFT 0 /* OUT3R_VOL - [7:0] */ 22316d4baf08SMark Brown #define WM5100_OUT3R_VOL_WIDTH 8 /* OUT3R_VOL - [7:0] */ 22326d4baf08SMark Brown 22336d4baf08SMark Brown /* 22346d4baf08SMark Brown * R1158 (0x486) - DAC Digital Volume 4L 22356d4baf08SMark Brown */ 22366d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 22376d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 22386d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 22396d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 22406d4baf08SMark Brown #define WM5100_OUT4L_MUTE 0x0100 /* OUT4L_MUTE */ 22416d4baf08SMark Brown #define WM5100_OUT4L_MUTE_MASK 0x0100 /* OUT4L_MUTE */ 22426d4baf08SMark Brown #define WM5100_OUT4L_MUTE_SHIFT 8 /* OUT4L_MUTE */ 22436d4baf08SMark Brown #define WM5100_OUT4L_MUTE_WIDTH 1 /* OUT4L_MUTE */ 22446d4baf08SMark Brown #define WM5100_OUT4L_VOL_MASK 0x00FF /* OUT4L_VOL - [7:0] */ 22456d4baf08SMark Brown #define WM5100_OUT4L_VOL_SHIFT 0 /* OUT4L_VOL - [7:0] */ 22466d4baf08SMark Brown #define WM5100_OUT4L_VOL_WIDTH 8 /* OUT4L_VOL - [7:0] */ 22476d4baf08SMark Brown 22486d4baf08SMark Brown /* 22496d4baf08SMark Brown * R1159 (0x487) - DAC Digital Volume 4R 22506d4baf08SMark Brown */ 22516d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 22526d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 22536d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 22546d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 22556d4baf08SMark Brown #define WM5100_OUT4R_MUTE 0x0100 /* OUT4R_MUTE */ 22566d4baf08SMark Brown #define WM5100_OUT4R_MUTE_MASK 0x0100 /* OUT4R_MUTE */ 22576d4baf08SMark Brown #define WM5100_OUT4R_MUTE_SHIFT 8 /* OUT4R_MUTE */ 22586d4baf08SMark Brown #define WM5100_OUT4R_MUTE_WIDTH 1 /* OUT4R_MUTE */ 22596d4baf08SMark Brown #define WM5100_OUT4R_VOL_MASK 0x00FF /* OUT4R_VOL - [7:0] */ 22606d4baf08SMark Brown #define WM5100_OUT4R_VOL_SHIFT 0 /* OUT4R_VOL - [7:0] */ 22616d4baf08SMark Brown #define WM5100_OUT4R_VOL_WIDTH 8 /* OUT4R_VOL - [7:0] */ 22626d4baf08SMark Brown 22636d4baf08SMark Brown /* 22646d4baf08SMark Brown * R1160 (0x488) - DAC Digital Volume 5L 22656d4baf08SMark Brown */ 22666d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 22676d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 22686d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 22696d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 22706d4baf08SMark Brown #define WM5100_OUT5L_MUTE 0x0100 /* OUT5L_MUTE */ 22716d4baf08SMark Brown #define WM5100_OUT5L_MUTE_MASK 0x0100 /* OUT5L_MUTE */ 22726d4baf08SMark Brown #define WM5100_OUT5L_MUTE_SHIFT 8 /* OUT5L_MUTE */ 22736d4baf08SMark Brown #define WM5100_OUT5L_MUTE_WIDTH 1 /* OUT5L_MUTE */ 22746d4baf08SMark Brown #define WM5100_OUT5L_VOL_MASK 0x00FF /* OUT5L_VOL - [7:0] */ 22756d4baf08SMark Brown #define WM5100_OUT5L_VOL_SHIFT 0 /* OUT5L_VOL - [7:0] */ 22766d4baf08SMark Brown #define WM5100_OUT5L_VOL_WIDTH 8 /* OUT5L_VOL - [7:0] */ 22776d4baf08SMark Brown 22786d4baf08SMark Brown /* 22796d4baf08SMark Brown * R1161 (0x489) - DAC Digital Volume 5R 22806d4baf08SMark Brown */ 22816d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 22826d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 22836d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 22846d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 22856d4baf08SMark Brown #define WM5100_OUT5R_MUTE 0x0100 /* OUT5R_MUTE */ 22866d4baf08SMark Brown #define WM5100_OUT5R_MUTE_MASK 0x0100 /* OUT5R_MUTE */ 22876d4baf08SMark Brown #define WM5100_OUT5R_MUTE_SHIFT 8 /* OUT5R_MUTE */ 22886d4baf08SMark Brown #define WM5100_OUT5R_MUTE_WIDTH 1 /* OUT5R_MUTE */ 22896d4baf08SMark Brown #define WM5100_OUT5R_VOL_MASK 0x00FF /* OUT5R_VOL - [7:0] */ 22906d4baf08SMark Brown #define WM5100_OUT5R_VOL_SHIFT 0 /* OUT5R_VOL - [7:0] */ 22916d4baf08SMark Brown #define WM5100_OUT5R_VOL_WIDTH 8 /* OUT5R_VOL - [7:0] */ 22926d4baf08SMark Brown 22936d4baf08SMark Brown /* 22946d4baf08SMark Brown * R1162 (0x48A) - DAC Digital Volume 6L 22956d4baf08SMark Brown */ 22966d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 22976d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 22986d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 22996d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 23006d4baf08SMark Brown #define WM5100_OUT6L_MUTE 0x0100 /* OUT6L_MUTE */ 23016d4baf08SMark Brown #define WM5100_OUT6L_MUTE_MASK 0x0100 /* OUT6L_MUTE */ 23026d4baf08SMark Brown #define WM5100_OUT6L_MUTE_SHIFT 8 /* OUT6L_MUTE */ 23036d4baf08SMark Brown #define WM5100_OUT6L_MUTE_WIDTH 1 /* OUT6L_MUTE */ 23046d4baf08SMark Brown #define WM5100_OUT6L_VOL_MASK 0x00FF /* OUT6L_VOL - [7:0] */ 23056d4baf08SMark Brown #define WM5100_OUT6L_VOL_SHIFT 0 /* OUT6L_VOL - [7:0] */ 23066d4baf08SMark Brown #define WM5100_OUT6L_VOL_WIDTH 8 /* OUT6L_VOL - [7:0] */ 23076d4baf08SMark Brown 23086d4baf08SMark Brown /* 23096d4baf08SMark Brown * R1163 (0x48B) - DAC Digital Volume 6R 23106d4baf08SMark Brown */ 23116d4baf08SMark Brown #define WM5100_OUT_VU 0x0200 /* OUT_VU */ 23126d4baf08SMark Brown #define WM5100_OUT_VU_MASK 0x0200 /* OUT_VU */ 23136d4baf08SMark Brown #define WM5100_OUT_VU_SHIFT 9 /* OUT_VU */ 23146d4baf08SMark Brown #define WM5100_OUT_VU_WIDTH 1 /* OUT_VU */ 23156d4baf08SMark Brown #define WM5100_OUT6R_MUTE 0x0100 /* OUT6R_MUTE */ 23166d4baf08SMark Brown #define WM5100_OUT6R_MUTE_MASK 0x0100 /* OUT6R_MUTE */ 23176d4baf08SMark Brown #define WM5100_OUT6R_MUTE_SHIFT 8 /* OUT6R_MUTE */ 23186d4baf08SMark Brown #define WM5100_OUT6R_MUTE_WIDTH 1 /* OUT6R_MUTE */ 23196d4baf08SMark Brown #define WM5100_OUT6R_VOL_MASK 0x00FF /* OUT6R_VOL - [7:0] */ 23206d4baf08SMark Brown #define WM5100_OUT6R_VOL_SHIFT 0 /* OUT6R_VOL - [7:0] */ 23216d4baf08SMark Brown #define WM5100_OUT6R_VOL_WIDTH 8 /* OUT6R_VOL - [7:0] */ 23226d4baf08SMark Brown 23236d4baf08SMark Brown /* 23246d4baf08SMark Brown * R1216 (0x4C0) - PDM SPK1 CTRL 1 23256d4baf08SMark Brown */ 23266d4baf08SMark Brown #define WM5100_SPK1R_MUTE 0x2000 /* SPK1R_MUTE */ 23276d4baf08SMark Brown #define WM5100_SPK1R_MUTE_MASK 0x2000 /* SPK1R_MUTE */ 23286d4baf08SMark Brown #define WM5100_SPK1R_MUTE_SHIFT 13 /* SPK1R_MUTE */ 23296d4baf08SMark Brown #define WM5100_SPK1R_MUTE_WIDTH 1 /* SPK1R_MUTE */ 23306d4baf08SMark Brown #define WM5100_SPK1L_MUTE 0x1000 /* SPK1L_MUTE */ 23316d4baf08SMark Brown #define WM5100_SPK1L_MUTE_MASK 0x1000 /* SPK1L_MUTE */ 23326d4baf08SMark Brown #define WM5100_SPK1L_MUTE_SHIFT 12 /* SPK1L_MUTE */ 23336d4baf08SMark Brown #define WM5100_SPK1L_MUTE_WIDTH 1 /* SPK1L_MUTE */ 23346d4baf08SMark Brown #define WM5100_SPK1_MUTE_ENDIAN 0x0100 /* SPK1_MUTE_ENDIAN */ 23356d4baf08SMark Brown #define WM5100_SPK1_MUTE_ENDIAN_MASK 0x0100 /* SPK1_MUTE_ENDIAN */ 23366d4baf08SMark Brown #define WM5100_SPK1_MUTE_ENDIAN_SHIFT 8 /* SPK1_MUTE_ENDIAN */ 23376d4baf08SMark Brown #define WM5100_SPK1_MUTE_ENDIAN_WIDTH 1 /* SPK1_MUTE_ENDIAN */ 23386d4baf08SMark Brown #define WM5100_SPK1_MUTE_SEQ1_MASK 0x00FF /* SPK1_MUTE_SEQ1 - [7:0] */ 23396d4baf08SMark Brown #define WM5100_SPK1_MUTE_SEQ1_SHIFT 0 /* SPK1_MUTE_SEQ1 - [7:0] */ 23406d4baf08SMark Brown #define WM5100_SPK1_MUTE_SEQ1_WIDTH 8 /* SPK1_MUTE_SEQ1 - [7:0] */ 23416d4baf08SMark Brown 23426d4baf08SMark Brown /* 23436d4baf08SMark Brown * R1217 (0x4C1) - PDM SPK1 CTRL 2 23446d4baf08SMark Brown */ 23456d4baf08SMark Brown #define WM5100_SPK1_FMT 0x0001 /* SPK1_FMT */ 23466d4baf08SMark Brown #define WM5100_SPK1_FMT_MASK 0x0001 /* SPK1_FMT */ 23476d4baf08SMark Brown #define WM5100_SPK1_FMT_SHIFT 0 /* SPK1_FMT */ 23486d4baf08SMark Brown #define WM5100_SPK1_FMT_WIDTH 1 /* SPK1_FMT */ 23496d4baf08SMark Brown 23506d4baf08SMark Brown /* 23516d4baf08SMark Brown * R1218 (0x4C2) - PDM SPK2 CTRL 1 23526d4baf08SMark Brown */ 23536d4baf08SMark Brown #define WM5100_SPK2R_MUTE 0x2000 /* SPK2R_MUTE */ 23546d4baf08SMark Brown #define WM5100_SPK2R_MUTE_MASK 0x2000 /* SPK2R_MUTE */ 23556d4baf08SMark Brown #define WM5100_SPK2R_MUTE_SHIFT 13 /* SPK2R_MUTE */ 23566d4baf08SMark Brown #define WM5100_SPK2R_MUTE_WIDTH 1 /* SPK2R_MUTE */ 23576d4baf08SMark Brown #define WM5100_SPK2L_MUTE 0x1000 /* SPK2L_MUTE */ 23586d4baf08SMark Brown #define WM5100_SPK2L_MUTE_MASK 0x1000 /* SPK2L_MUTE */ 23596d4baf08SMark Brown #define WM5100_SPK2L_MUTE_SHIFT 12 /* SPK2L_MUTE */ 23606d4baf08SMark Brown #define WM5100_SPK2L_MUTE_WIDTH 1 /* SPK2L_MUTE */ 23616d4baf08SMark Brown #define WM5100_SPK2_MUTE_ENDIAN 0x0100 /* SPK2_MUTE_ENDIAN */ 23626d4baf08SMark Brown #define WM5100_SPK2_MUTE_ENDIAN_MASK 0x0100 /* SPK2_MUTE_ENDIAN */ 23636d4baf08SMark Brown #define WM5100_SPK2_MUTE_ENDIAN_SHIFT 8 /* SPK2_MUTE_ENDIAN */ 23646d4baf08SMark Brown #define WM5100_SPK2_MUTE_ENDIAN_WIDTH 1 /* SPK2_MUTE_ENDIAN */ 23656d4baf08SMark Brown #define WM5100_SPK2_MUTE_SEQ1_MASK 0x00FF /* SPK2_MUTE_SEQ1 - [7:0] */ 23666d4baf08SMark Brown #define WM5100_SPK2_MUTE_SEQ1_SHIFT 0 /* SPK2_MUTE_SEQ1 - [7:0] */ 23676d4baf08SMark Brown #define WM5100_SPK2_MUTE_SEQ1_WIDTH 8 /* SPK2_MUTE_SEQ1 - [7:0] */ 23686d4baf08SMark Brown 23696d4baf08SMark Brown /* 23706d4baf08SMark Brown * R1219 (0x4C3) - PDM SPK2 CTRL 2 23716d4baf08SMark Brown */ 23726d4baf08SMark Brown #define WM5100_SPK2_FMT 0x0001 /* SPK2_FMT */ 23736d4baf08SMark Brown #define WM5100_SPK2_FMT_MASK 0x0001 /* SPK2_FMT */ 23746d4baf08SMark Brown #define WM5100_SPK2_FMT_SHIFT 0 /* SPK2_FMT */ 23756d4baf08SMark Brown #define WM5100_SPK2_FMT_WIDTH 1 /* SPK2_FMT */ 23766d4baf08SMark Brown 23776d4baf08SMark Brown /* 23786d4baf08SMark Brown * R1280 (0x500) - Audio IF 1_1 23796d4baf08SMark Brown */ 23806d4baf08SMark Brown #define WM5100_AIF1_BCLK_INV 0x0080 /* AIF1_BCLK_INV */ 23816d4baf08SMark Brown #define WM5100_AIF1_BCLK_INV_MASK 0x0080 /* AIF1_BCLK_INV */ 23826d4baf08SMark Brown #define WM5100_AIF1_BCLK_INV_SHIFT 7 /* AIF1_BCLK_INV */ 23836d4baf08SMark Brown #define WM5100_AIF1_BCLK_INV_WIDTH 1 /* AIF1_BCLK_INV */ 23846d4baf08SMark Brown #define WM5100_AIF1_BCLK_FRC 0x0040 /* AIF1_BCLK_FRC */ 23856d4baf08SMark Brown #define WM5100_AIF1_BCLK_FRC_MASK 0x0040 /* AIF1_BCLK_FRC */ 23866d4baf08SMark Brown #define WM5100_AIF1_BCLK_FRC_SHIFT 6 /* AIF1_BCLK_FRC */ 23876d4baf08SMark Brown #define WM5100_AIF1_BCLK_FRC_WIDTH 1 /* AIF1_BCLK_FRC */ 23886d4baf08SMark Brown #define WM5100_AIF1_BCLK_MSTR 0x0020 /* AIF1_BCLK_MSTR */ 23896d4baf08SMark Brown #define WM5100_AIF1_BCLK_MSTR_MASK 0x0020 /* AIF1_BCLK_MSTR */ 23906d4baf08SMark Brown #define WM5100_AIF1_BCLK_MSTR_SHIFT 5 /* AIF1_BCLK_MSTR */ 23916d4baf08SMark Brown #define WM5100_AIF1_BCLK_MSTR_WIDTH 1 /* AIF1_BCLK_MSTR */ 23926d4baf08SMark Brown #define WM5100_AIF1_BCLK_FREQ_MASK 0x001F /* AIF1_BCLK_FREQ - [4:0] */ 23936d4baf08SMark Brown #define WM5100_AIF1_BCLK_FREQ_SHIFT 0 /* AIF1_BCLK_FREQ - [4:0] */ 23946d4baf08SMark Brown #define WM5100_AIF1_BCLK_FREQ_WIDTH 5 /* AIF1_BCLK_FREQ - [4:0] */ 23956d4baf08SMark Brown 23966d4baf08SMark Brown /* 23976d4baf08SMark Brown * R1281 (0x501) - Audio IF 1_2 23986d4baf08SMark Brown */ 23996d4baf08SMark Brown #define WM5100_AIF1TX_DAT_TRI 0x0020 /* AIF1TX_DAT_TRI */ 24006d4baf08SMark Brown #define WM5100_AIF1TX_DAT_TRI_MASK 0x0020 /* AIF1TX_DAT_TRI */ 24016d4baf08SMark Brown #define WM5100_AIF1TX_DAT_TRI_SHIFT 5 /* AIF1TX_DAT_TRI */ 24026d4baf08SMark Brown #define WM5100_AIF1TX_DAT_TRI_WIDTH 1 /* AIF1TX_DAT_TRI */ 24036d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_SRC 0x0008 /* AIF1TX_LRCLK_SRC */ 24046d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_SRC_MASK 0x0008 /* AIF1TX_LRCLK_SRC */ 24056d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_SRC_SHIFT 3 /* AIF1TX_LRCLK_SRC */ 24066d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_SRC_WIDTH 1 /* AIF1TX_LRCLK_SRC */ 24076d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_INV 0x0004 /* AIF1TX_LRCLK_INV */ 24086d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_INV_MASK 0x0004 /* AIF1TX_LRCLK_INV */ 24096d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_INV_SHIFT 2 /* AIF1TX_LRCLK_INV */ 24106d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_INV_WIDTH 1 /* AIF1TX_LRCLK_INV */ 24116d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_FRC 0x0002 /* AIF1TX_LRCLK_FRC */ 24126d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_FRC_MASK 0x0002 /* AIF1TX_LRCLK_FRC */ 24136d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_FRC_SHIFT 1 /* AIF1TX_LRCLK_FRC */ 24146d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_FRC_WIDTH 1 /* AIF1TX_LRCLK_FRC */ 24156d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_MSTR 0x0001 /* AIF1TX_LRCLK_MSTR */ 24166d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_MSTR_MASK 0x0001 /* AIF1TX_LRCLK_MSTR */ 24176d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_MSTR_SHIFT 0 /* AIF1TX_LRCLK_MSTR */ 24186d4baf08SMark Brown #define WM5100_AIF1TX_LRCLK_MSTR_WIDTH 1 /* AIF1TX_LRCLK_MSTR */ 24196d4baf08SMark Brown 24206d4baf08SMark Brown /* 24216d4baf08SMark Brown * R1282 (0x502) - Audio IF 1_3 24226d4baf08SMark Brown */ 24236d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_INV 0x0004 /* AIF1RX_LRCLK_INV */ 24246d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_INV_MASK 0x0004 /* AIF1RX_LRCLK_INV */ 24256d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_INV_SHIFT 2 /* AIF1RX_LRCLK_INV */ 24266d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_INV_WIDTH 1 /* AIF1RX_LRCLK_INV */ 24276d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_FRC 0x0002 /* AIF1RX_LRCLK_FRC */ 24286d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_FRC_MASK 0x0002 /* AIF1RX_LRCLK_FRC */ 24296d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_FRC_SHIFT 1 /* AIF1RX_LRCLK_FRC */ 24306d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_FRC_WIDTH 1 /* AIF1RX_LRCLK_FRC */ 24316d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_MSTR 0x0001 /* AIF1RX_LRCLK_MSTR */ 24326d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_MSTR_MASK 0x0001 /* AIF1RX_LRCLK_MSTR */ 24336d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_MSTR_SHIFT 0 /* AIF1RX_LRCLK_MSTR */ 24346d4baf08SMark Brown #define WM5100_AIF1RX_LRCLK_MSTR_WIDTH 1 /* AIF1RX_LRCLK_MSTR */ 24356d4baf08SMark Brown 24366d4baf08SMark Brown /* 24376d4baf08SMark Brown * R1283 (0x503) - Audio IF 1_4 24386d4baf08SMark Brown */ 24396d4baf08SMark Brown #define WM5100_AIF1_TRI 0x0040 /* AIF1_TRI */ 24406d4baf08SMark Brown #define WM5100_AIF1_TRI_MASK 0x0040 /* AIF1_TRI */ 24416d4baf08SMark Brown #define WM5100_AIF1_TRI_SHIFT 6 /* AIF1_TRI */ 24426d4baf08SMark Brown #define WM5100_AIF1_TRI_WIDTH 1 /* AIF1_TRI */ 24436d4baf08SMark Brown #define WM5100_AIF1_RATE_MASK 0x0003 /* AIF1_RATE - [1:0] */ 24446d4baf08SMark Brown #define WM5100_AIF1_RATE_SHIFT 0 /* AIF1_RATE - [1:0] */ 24456d4baf08SMark Brown #define WM5100_AIF1_RATE_WIDTH 2 /* AIF1_RATE - [1:0] */ 24466d4baf08SMark Brown 24476d4baf08SMark Brown /* 24486d4baf08SMark Brown * R1284 (0x504) - Audio IF 1_5 24496d4baf08SMark Brown */ 24506d4baf08SMark Brown #define WM5100_AIF1_FMT_MASK 0x0007 /* AIF1_FMT - [2:0] */ 24516d4baf08SMark Brown #define WM5100_AIF1_FMT_SHIFT 0 /* AIF1_FMT - [2:0] */ 24526d4baf08SMark Brown #define WM5100_AIF1_FMT_WIDTH 3 /* AIF1_FMT - [2:0] */ 24536d4baf08SMark Brown 24546d4baf08SMark Brown /* 24556d4baf08SMark Brown * R1285 (0x505) - Audio IF 1_6 24566d4baf08SMark Brown */ 24576d4baf08SMark Brown #define WM5100_AIF1TX_BCPF_MASK 0x1FFF /* AIF1TX_BCPF - [12:0] */ 24586d4baf08SMark Brown #define WM5100_AIF1TX_BCPF_SHIFT 0 /* AIF1TX_BCPF - [12:0] */ 24596d4baf08SMark Brown #define WM5100_AIF1TX_BCPF_WIDTH 13 /* AIF1TX_BCPF - [12:0] */ 24606d4baf08SMark Brown 24616d4baf08SMark Brown /* 24626d4baf08SMark Brown * R1286 (0x506) - Audio IF 1_7 24636d4baf08SMark Brown */ 24646d4baf08SMark Brown #define WM5100_AIF1RX_BCPF_MASK 0x1FFF /* AIF1RX_BCPF - [12:0] */ 24656d4baf08SMark Brown #define WM5100_AIF1RX_BCPF_SHIFT 0 /* AIF1RX_BCPF - [12:0] */ 24666d4baf08SMark Brown #define WM5100_AIF1RX_BCPF_WIDTH 13 /* AIF1RX_BCPF - [12:0] */ 24676d4baf08SMark Brown 24686d4baf08SMark Brown /* 24696d4baf08SMark Brown * R1287 (0x507) - Audio IF 1_8 24706d4baf08SMark Brown */ 24716d4baf08SMark Brown #define WM5100_AIF1TX_WL_MASK 0x3F00 /* AIF1TX_WL - [13:8] */ 24726d4baf08SMark Brown #define WM5100_AIF1TX_WL_SHIFT 8 /* AIF1TX_WL - [13:8] */ 24736d4baf08SMark Brown #define WM5100_AIF1TX_WL_WIDTH 6 /* AIF1TX_WL - [13:8] */ 24746d4baf08SMark Brown #define WM5100_AIF1TX_SLOT_LEN_MASK 0x00FF /* AIF1TX_SLOT_LEN - [7:0] */ 24756d4baf08SMark Brown #define WM5100_AIF1TX_SLOT_LEN_SHIFT 0 /* AIF1TX_SLOT_LEN - [7:0] */ 24766d4baf08SMark Brown #define WM5100_AIF1TX_SLOT_LEN_WIDTH 8 /* AIF1TX_SLOT_LEN - [7:0] */ 24776d4baf08SMark Brown 24786d4baf08SMark Brown /* 24796d4baf08SMark Brown * R1288 (0x508) - Audio IF 1_9 24806d4baf08SMark Brown */ 24816d4baf08SMark Brown #define WM5100_AIF1RX_WL_MASK 0x3F00 /* AIF1RX_WL - [13:8] */ 24826d4baf08SMark Brown #define WM5100_AIF1RX_WL_SHIFT 8 /* AIF1RX_WL - [13:8] */ 24836d4baf08SMark Brown #define WM5100_AIF1RX_WL_WIDTH 6 /* AIF1RX_WL - [13:8] */ 24846d4baf08SMark Brown #define WM5100_AIF1RX_SLOT_LEN_MASK 0x00FF /* AIF1RX_SLOT_LEN - [7:0] */ 24856d4baf08SMark Brown #define WM5100_AIF1RX_SLOT_LEN_SHIFT 0 /* AIF1RX_SLOT_LEN - [7:0] */ 24866d4baf08SMark Brown #define WM5100_AIF1RX_SLOT_LEN_WIDTH 8 /* AIF1RX_SLOT_LEN - [7:0] */ 24876d4baf08SMark Brown 24886d4baf08SMark Brown /* 24896d4baf08SMark Brown * R1289 (0x509) - Audio IF 1_10 24906d4baf08SMark Brown */ 24916d4baf08SMark Brown #define WM5100_AIF1TX1_SLOT_MASK 0x003F /* AIF1TX1_SLOT - [5:0] */ 24926d4baf08SMark Brown #define WM5100_AIF1TX1_SLOT_SHIFT 0 /* AIF1TX1_SLOT - [5:0] */ 24936d4baf08SMark Brown #define WM5100_AIF1TX1_SLOT_WIDTH 6 /* AIF1TX1_SLOT - [5:0] */ 24946d4baf08SMark Brown 24956d4baf08SMark Brown /* 24966d4baf08SMark Brown * R1290 (0x50A) - Audio IF 1_11 24976d4baf08SMark Brown */ 24986d4baf08SMark Brown #define WM5100_AIF1TX2_SLOT_MASK 0x003F /* AIF1TX2_SLOT - [5:0] */ 24996d4baf08SMark Brown #define WM5100_AIF1TX2_SLOT_SHIFT 0 /* AIF1TX2_SLOT - [5:0] */ 25006d4baf08SMark Brown #define WM5100_AIF1TX2_SLOT_WIDTH 6 /* AIF1TX2_SLOT - [5:0] */ 25016d4baf08SMark Brown 25026d4baf08SMark Brown /* 25036d4baf08SMark Brown * R1291 (0x50B) - Audio IF 1_12 25046d4baf08SMark Brown */ 25056d4baf08SMark Brown #define WM5100_AIF1TX3_SLOT_MASK 0x003F /* AIF1TX3_SLOT - [5:0] */ 25066d4baf08SMark Brown #define WM5100_AIF1TX3_SLOT_SHIFT 0 /* AIF1TX3_SLOT - [5:0] */ 25076d4baf08SMark Brown #define WM5100_AIF1TX3_SLOT_WIDTH 6 /* AIF1TX3_SLOT - [5:0] */ 25086d4baf08SMark Brown 25096d4baf08SMark Brown /* 25106d4baf08SMark Brown * R1292 (0x50C) - Audio IF 1_13 25116d4baf08SMark Brown */ 25126d4baf08SMark Brown #define WM5100_AIF1TX4_SLOT_MASK 0x003F /* AIF1TX4_SLOT - [5:0] */ 25136d4baf08SMark Brown #define WM5100_AIF1TX4_SLOT_SHIFT 0 /* AIF1TX4_SLOT - [5:0] */ 25146d4baf08SMark Brown #define WM5100_AIF1TX4_SLOT_WIDTH 6 /* AIF1TX4_SLOT - [5:0] */ 25156d4baf08SMark Brown 25166d4baf08SMark Brown /* 25176d4baf08SMark Brown * R1293 (0x50D) - Audio IF 1_14 25186d4baf08SMark Brown */ 25196d4baf08SMark Brown #define WM5100_AIF1TX5_SLOT_MASK 0x003F /* AIF1TX5_SLOT - [5:0] */ 25206d4baf08SMark Brown #define WM5100_AIF1TX5_SLOT_SHIFT 0 /* AIF1TX5_SLOT - [5:0] */ 25216d4baf08SMark Brown #define WM5100_AIF1TX5_SLOT_WIDTH 6 /* AIF1TX5_SLOT - [5:0] */ 25226d4baf08SMark Brown 25236d4baf08SMark Brown /* 25246d4baf08SMark Brown * R1294 (0x50E) - Audio IF 1_15 25256d4baf08SMark Brown */ 25266d4baf08SMark Brown #define WM5100_AIF1TX6_SLOT_MASK 0x003F /* AIF1TX6_SLOT - [5:0] */ 25276d4baf08SMark Brown #define WM5100_AIF1TX6_SLOT_SHIFT 0 /* AIF1TX6_SLOT - [5:0] */ 25286d4baf08SMark Brown #define WM5100_AIF1TX6_SLOT_WIDTH 6 /* AIF1TX6_SLOT - [5:0] */ 25296d4baf08SMark Brown 25306d4baf08SMark Brown /* 25316d4baf08SMark Brown * R1295 (0x50F) - Audio IF 1_16 25326d4baf08SMark Brown */ 25336d4baf08SMark Brown #define WM5100_AIF1TX7_SLOT_MASK 0x003F /* AIF1TX7_SLOT - [5:0] */ 25346d4baf08SMark Brown #define WM5100_AIF1TX7_SLOT_SHIFT 0 /* AIF1TX7_SLOT - [5:0] */ 25356d4baf08SMark Brown #define WM5100_AIF1TX7_SLOT_WIDTH 6 /* AIF1TX7_SLOT - [5:0] */ 25366d4baf08SMark Brown 25376d4baf08SMark Brown /* 25386d4baf08SMark Brown * R1296 (0x510) - Audio IF 1_17 25396d4baf08SMark Brown */ 25406d4baf08SMark Brown #define WM5100_AIF1TX8_SLOT_MASK 0x003F /* AIF1TX8_SLOT - [5:0] */ 25416d4baf08SMark Brown #define WM5100_AIF1TX8_SLOT_SHIFT 0 /* AIF1TX8_SLOT - [5:0] */ 25426d4baf08SMark Brown #define WM5100_AIF1TX8_SLOT_WIDTH 6 /* AIF1TX8_SLOT - [5:0] */ 25436d4baf08SMark Brown 25446d4baf08SMark Brown /* 25456d4baf08SMark Brown * R1297 (0x511) - Audio IF 1_18 25466d4baf08SMark Brown */ 25476d4baf08SMark Brown #define WM5100_AIF1RX1_SLOT_MASK 0x003F /* AIF1RX1_SLOT - [5:0] */ 25486d4baf08SMark Brown #define WM5100_AIF1RX1_SLOT_SHIFT 0 /* AIF1RX1_SLOT - [5:0] */ 25496d4baf08SMark Brown #define WM5100_AIF1RX1_SLOT_WIDTH 6 /* AIF1RX1_SLOT - [5:0] */ 25506d4baf08SMark Brown 25516d4baf08SMark Brown /* 25526d4baf08SMark Brown * R1298 (0x512) - Audio IF 1_19 25536d4baf08SMark Brown */ 25546d4baf08SMark Brown #define WM5100_AIF1RX2_SLOT_MASK 0x003F /* AIF1RX2_SLOT - [5:0] */ 25556d4baf08SMark Brown #define WM5100_AIF1RX2_SLOT_SHIFT 0 /* AIF1RX2_SLOT - [5:0] */ 25566d4baf08SMark Brown #define WM5100_AIF1RX2_SLOT_WIDTH 6 /* AIF1RX2_SLOT - [5:0] */ 25576d4baf08SMark Brown 25586d4baf08SMark Brown /* 25596d4baf08SMark Brown * R1299 (0x513) - Audio IF 1_20 25606d4baf08SMark Brown */ 25616d4baf08SMark Brown #define WM5100_AIF1RX3_SLOT_MASK 0x003F /* AIF1RX3_SLOT - [5:0] */ 25626d4baf08SMark Brown #define WM5100_AIF1RX3_SLOT_SHIFT 0 /* AIF1RX3_SLOT - [5:0] */ 25636d4baf08SMark Brown #define WM5100_AIF1RX3_SLOT_WIDTH 6 /* AIF1RX3_SLOT - [5:0] */ 25646d4baf08SMark Brown 25656d4baf08SMark Brown /* 25666d4baf08SMark Brown * R1300 (0x514) - Audio IF 1_21 25676d4baf08SMark Brown */ 25686d4baf08SMark Brown #define WM5100_AIF1RX4_SLOT_MASK 0x003F /* AIF1RX4_SLOT - [5:0] */ 25696d4baf08SMark Brown #define WM5100_AIF1RX4_SLOT_SHIFT 0 /* AIF1RX4_SLOT - [5:0] */ 25706d4baf08SMark Brown #define WM5100_AIF1RX4_SLOT_WIDTH 6 /* AIF1RX4_SLOT - [5:0] */ 25716d4baf08SMark Brown 25726d4baf08SMark Brown /* 25736d4baf08SMark Brown * R1301 (0x515) - Audio IF 1_22 25746d4baf08SMark Brown */ 25756d4baf08SMark Brown #define WM5100_AIF1RX5_SLOT_MASK 0x003F /* AIF1RX5_SLOT - [5:0] */ 25766d4baf08SMark Brown #define WM5100_AIF1RX5_SLOT_SHIFT 0 /* AIF1RX5_SLOT - [5:0] */ 25776d4baf08SMark Brown #define WM5100_AIF1RX5_SLOT_WIDTH 6 /* AIF1RX5_SLOT - [5:0] */ 25786d4baf08SMark Brown 25796d4baf08SMark Brown /* 25806d4baf08SMark Brown * R1302 (0x516) - Audio IF 1_23 25816d4baf08SMark Brown */ 25826d4baf08SMark Brown #define WM5100_AIF1RX6_SLOT_MASK 0x003F /* AIF1RX6_SLOT - [5:0] */ 25836d4baf08SMark Brown #define WM5100_AIF1RX6_SLOT_SHIFT 0 /* AIF1RX6_SLOT - [5:0] */ 25846d4baf08SMark Brown #define WM5100_AIF1RX6_SLOT_WIDTH 6 /* AIF1RX6_SLOT - [5:0] */ 25856d4baf08SMark Brown 25866d4baf08SMark Brown /* 25876d4baf08SMark Brown * R1303 (0x517) - Audio IF 1_24 25886d4baf08SMark Brown */ 25896d4baf08SMark Brown #define WM5100_AIF1RX7_SLOT_MASK 0x003F /* AIF1RX7_SLOT - [5:0] */ 25906d4baf08SMark Brown #define WM5100_AIF1RX7_SLOT_SHIFT 0 /* AIF1RX7_SLOT - [5:0] */ 25916d4baf08SMark Brown #define WM5100_AIF1RX7_SLOT_WIDTH 6 /* AIF1RX7_SLOT - [5:0] */ 25926d4baf08SMark Brown 25936d4baf08SMark Brown /* 25946d4baf08SMark Brown * R1304 (0x518) - Audio IF 1_25 25956d4baf08SMark Brown */ 25966d4baf08SMark Brown #define WM5100_AIF1RX8_SLOT_MASK 0x003F /* AIF1RX8_SLOT - [5:0] */ 25976d4baf08SMark Brown #define WM5100_AIF1RX8_SLOT_SHIFT 0 /* AIF1RX8_SLOT - [5:0] */ 25986d4baf08SMark Brown #define WM5100_AIF1RX8_SLOT_WIDTH 6 /* AIF1RX8_SLOT - [5:0] */ 25996d4baf08SMark Brown 26006d4baf08SMark Brown /* 26016d4baf08SMark Brown * R1305 (0x519) - Audio IF 1_26 26026d4baf08SMark Brown */ 26036d4baf08SMark Brown #define WM5100_AIF1TX8_ENA 0x0080 /* AIF1TX8_ENA */ 26046d4baf08SMark Brown #define WM5100_AIF1TX8_ENA_MASK 0x0080 /* AIF1TX8_ENA */ 26056d4baf08SMark Brown #define WM5100_AIF1TX8_ENA_SHIFT 7 /* AIF1TX8_ENA */ 26066d4baf08SMark Brown #define WM5100_AIF1TX8_ENA_WIDTH 1 /* AIF1TX8_ENA */ 26076d4baf08SMark Brown #define WM5100_AIF1TX7_ENA 0x0040 /* AIF1TX7_ENA */ 26086d4baf08SMark Brown #define WM5100_AIF1TX7_ENA_MASK 0x0040 /* AIF1TX7_ENA */ 26096d4baf08SMark Brown #define WM5100_AIF1TX7_ENA_SHIFT 6 /* AIF1TX7_ENA */ 26106d4baf08SMark Brown #define WM5100_AIF1TX7_ENA_WIDTH 1 /* AIF1TX7_ENA */ 26116d4baf08SMark Brown #define WM5100_AIF1TX6_ENA 0x0020 /* AIF1TX6_ENA */ 26126d4baf08SMark Brown #define WM5100_AIF1TX6_ENA_MASK 0x0020 /* AIF1TX6_ENA */ 26136d4baf08SMark Brown #define WM5100_AIF1TX6_ENA_SHIFT 5 /* AIF1TX6_ENA */ 26146d4baf08SMark Brown #define WM5100_AIF1TX6_ENA_WIDTH 1 /* AIF1TX6_ENA */ 26156d4baf08SMark Brown #define WM5100_AIF1TX5_ENA 0x0010 /* AIF1TX5_ENA */ 26166d4baf08SMark Brown #define WM5100_AIF1TX5_ENA_MASK 0x0010 /* AIF1TX5_ENA */ 26176d4baf08SMark Brown #define WM5100_AIF1TX5_ENA_SHIFT 4 /* AIF1TX5_ENA */ 26186d4baf08SMark Brown #define WM5100_AIF1TX5_ENA_WIDTH 1 /* AIF1TX5_ENA */ 26196d4baf08SMark Brown #define WM5100_AIF1TX4_ENA 0x0008 /* AIF1TX4_ENA */ 26206d4baf08SMark Brown #define WM5100_AIF1TX4_ENA_MASK 0x0008 /* AIF1TX4_ENA */ 26216d4baf08SMark Brown #define WM5100_AIF1TX4_ENA_SHIFT 3 /* AIF1TX4_ENA */ 26226d4baf08SMark Brown #define WM5100_AIF1TX4_ENA_WIDTH 1 /* AIF1TX4_ENA */ 26236d4baf08SMark Brown #define WM5100_AIF1TX3_ENA 0x0004 /* AIF1TX3_ENA */ 26246d4baf08SMark Brown #define WM5100_AIF1TX3_ENA_MASK 0x0004 /* AIF1TX3_ENA */ 26256d4baf08SMark Brown #define WM5100_AIF1TX3_ENA_SHIFT 2 /* AIF1TX3_ENA */ 26266d4baf08SMark Brown #define WM5100_AIF1TX3_ENA_WIDTH 1 /* AIF1TX3_ENA */ 26276d4baf08SMark Brown #define WM5100_AIF1TX2_ENA 0x0002 /* AIF1TX2_ENA */ 26286d4baf08SMark Brown #define WM5100_AIF1TX2_ENA_MASK 0x0002 /* AIF1TX2_ENA */ 26296d4baf08SMark Brown #define WM5100_AIF1TX2_ENA_SHIFT 1 /* AIF1TX2_ENA */ 26306d4baf08SMark Brown #define WM5100_AIF1TX2_ENA_WIDTH 1 /* AIF1TX2_ENA */ 26316d4baf08SMark Brown #define WM5100_AIF1TX1_ENA 0x0001 /* AIF1TX1_ENA */ 26326d4baf08SMark Brown #define WM5100_AIF1TX1_ENA_MASK 0x0001 /* AIF1TX1_ENA */ 26336d4baf08SMark Brown #define WM5100_AIF1TX1_ENA_SHIFT 0 /* AIF1TX1_ENA */ 26346d4baf08SMark Brown #define WM5100_AIF1TX1_ENA_WIDTH 1 /* AIF1TX1_ENA */ 26356d4baf08SMark Brown 26366d4baf08SMark Brown /* 26376d4baf08SMark Brown * R1306 (0x51A) - Audio IF 1_27 26386d4baf08SMark Brown */ 26396d4baf08SMark Brown #define WM5100_AIF1RX8_ENA 0x0080 /* AIF1RX8_ENA */ 26406d4baf08SMark Brown #define WM5100_AIF1RX8_ENA_MASK 0x0080 /* AIF1RX8_ENA */ 26416d4baf08SMark Brown #define WM5100_AIF1RX8_ENA_SHIFT 7 /* AIF1RX8_ENA */ 26426d4baf08SMark Brown #define WM5100_AIF1RX8_ENA_WIDTH 1 /* AIF1RX8_ENA */ 26436d4baf08SMark Brown #define WM5100_AIF1RX7_ENA 0x0040 /* AIF1RX7_ENA */ 26446d4baf08SMark Brown #define WM5100_AIF1RX7_ENA_MASK 0x0040 /* AIF1RX7_ENA */ 26456d4baf08SMark Brown #define WM5100_AIF1RX7_ENA_SHIFT 6 /* AIF1RX7_ENA */ 26466d4baf08SMark Brown #define WM5100_AIF1RX7_ENA_WIDTH 1 /* AIF1RX7_ENA */ 26476d4baf08SMark Brown #define WM5100_AIF1RX6_ENA 0x0020 /* AIF1RX6_ENA */ 26486d4baf08SMark Brown #define WM5100_AIF1RX6_ENA_MASK 0x0020 /* AIF1RX6_ENA */ 26496d4baf08SMark Brown #define WM5100_AIF1RX6_ENA_SHIFT 5 /* AIF1RX6_ENA */ 26506d4baf08SMark Brown #define WM5100_AIF1RX6_ENA_WIDTH 1 /* AIF1RX6_ENA */ 26516d4baf08SMark Brown #define WM5100_AIF1RX5_ENA 0x0010 /* AIF1RX5_ENA */ 26526d4baf08SMark Brown #define WM5100_AIF1RX5_ENA_MASK 0x0010 /* AIF1RX5_ENA */ 26536d4baf08SMark Brown #define WM5100_AIF1RX5_ENA_SHIFT 4 /* AIF1RX5_ENA */ 26546d4baf08SMark Brown #define WM5100_AIF1RX5_ENA_WIDTH 1 /* AIF1RX5_ENA */ 26556d4baf08SMark Brown #define WM5100_AIF1RX4_ENA 0x0008 /* AIF1RX4_ENA */ 26566d4baf08SMark Brown #define WM5100_AIF1RX4_ENA_MASK 0x0008 /* AIF1RX4_ENA */ 26576d4baf08SMark Brown #define WM5100_AIF1RX4_ENA_SHIFT 3 /* AIF1RX4_ENA */ 26586d4baf08SMark Brown #define WM5100_AIF1RX4_ENA_WIDTH 1 /* AIF1RX4_ENA */ 26596d4baf08SMark Brown #define WM5100_AIF1RX3_ENA 0x0004 /* AIF1RX3_ENA */ 26606d4baf08SMark Brown #define WM5100_AIF1RX3_ENA_MASK 0x0004 /* AIF1RX3_ENA */ 26616d4baf08SMark Brown #define WM5100_AIF1RX3_ENA_SHIFT 2 /* AIF1RX3_ENA */ 26626d4baf08SMark Brown #define WM5100_AIF1RX3_ENA_WIDTH 1 /* AIF1RX3_ENA */ 26636d4baf08SMark Brown #define WM5100_AIF1RX2_ENA 0x0002 /* AIF1RX2_ENA */ 26646d4baf08SMark Brown #define WM5100_AIF1RX2_ENA_MASK 0x0002 /* AIF1RX2_ENA */ 26656d4baf08SMark Brown #define WM5100_AIF1RX2_ENA_SHIFT 1 /* AIF1RX2_ENA */ 26666d4baf08SMark Brown #define WM5100_AIF1RX2_ENA_WIDTH 1 /* AIF1RX2_ENA */ 26676d4baf08SMark Brown #define WM5100_AIF1RX1_ENA 0x0001 /* AIF1RX1_ENA */ 26686d4baf08SMark Brown #define WM5100_AIF1RX1_ENA_MASK 0x0001 /* AIF1RX1_ENA */ 26696d4baf08SMark Brown #define WM5100_AIF1RX1_ENA_SHIFT 0 /* AIF1RX1_ENA */ 26706d4baf08SMark Brown #define WM5100_AIF1RX1_ENA_WIDTH 1 /* AIF1RX1_ENA */ 26716d4baf08SMark Brown 26726d4baf08SMark Brown /* 26736d4baf08SMark Brown * R1344 (0x540) - Audio IF 2_1 26746d4baf08SMark Brown */ 26756d4baf08SMark Brown #define WM5100_AIF2_BCLK_INV 0x0080 /* AIF2_BCLK_INV */ 26766d4baf08SMark Brown #define WM5100_AIF2_BCLK_INV_MASK 0x0080 /* AIF2_BCLK_INV */ 26776d4baf08SMark Brown #define WM5100_AIF2_BCLK_INV_SHIFT 7 /* AIF2_BCLK_INV */ 26786d4baf08SMark Brown #define WM5100_AIF2_BCLK_INV_WIDTH 1 /* AIF2_BCLK_INV */ 26796d4baf08SMark Brown #define WM5100_AIF2_BCLK_FRC 0x0040 /* AIF2_BCLK_FRC */ 26806d4baf08SMark Brown #define WM5100_AIF2_BCLK_FRC_MASK 0x0040 /* AIF2_BCLK_FRC */ 26816d4baf08SMark Brown #define WM5100_AIF2_BCLK_FRC_SHIFT 6 /* AIF2_BCLK_FRC */ 26826d4baf08SMark Brown #define WM5100_AIF2_BCLK_FRC_WIDTH 1 /* AIF2_BCLK_FRC */ 26836d4baf08SMark Brown #define WM5100_AIF2_BCLK_MSTR 0x0020 /* AIF2_BCLK_MSTR */ 26846d4baf08SMark Brown #define WM5100_AIF2_BCLK_MSTR_MASK 0x0020 /* AIF2_BCLK_MSTR */ 26856d4baf08SMark Brown #define WM5100_AIF2_BCLK_MSTR_SHIFT 5 /* AIF2_BCLK_MSTR */ 26866d4baf08SMark Brown #define WM5100_AIF2_BCLK_MSTR_WIDTH 1 /* AIF2_BCLK_MSTR */ 26876d4baf08SMark Brown #define WM5100_AIF2_BCLK_FREQ_MASK 0x001F /* AIF2_BCLK_FREQ - [4:0] */ 26886d4baf08SMark Brown #define WM5100_AIF2_BCLK_FREQ_SHIFT 0 /* AIF2_BCLK_FREQ - [4:0] */ 26896d4baf08SMark Brown #define WM5100_AIF2_BCLK_FREQ_WIDTH 5 /* AIF2_BCLK_FREQ - [4:0] */ 26906d4baf08SMark Brown 26916d4baf08SMark Brown /* 26926d4baf08SMark Brown * R1345 (0x541) - Audio IF 2_2 26936d4baf08SMark Brown */ 26946d4baf08SMark Brown #define WM5100_AIF2TX_DAT_TRI 0x0020 /* AIF2TX_DAT_TRI */ 26956d4baf08SMark Brown #define WM5100_AIF2TX_DAT_TRI_MASK 0x0020 /* AIF2TX_DAT_TRI */ 26966d4baf08SMark Brown #define WM5100_AIF2TX_DAT_TRI_SHIFT 5 /* AIF2TX_DAT_TRI */ 26976d4baf08SMark Brown #define WM5100_AIF2TX_DAT_TRI_WIDTH 1 /* AIF2TX_DAT_TRI */ 26986d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_SRC 0x0008 /* AIF2TX_LRCLK_SRC */ 26996d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_SRC_MASK 0x0008 /* AIF2TX_LRCLK_SRC */ 27006d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_SRC_SHIFT 3 /* AIF2TX_LRCLK_SRC */ 27016d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_SRC_WIDTH 1 /* AIF2TX_LRCLK_SRC */ 27026d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_INV 0x0004 /* AIF2TX_LRCLK_INV */ 27036d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_INV_MASK 0x0004 /* AIF2TX_LRCLK_INV */ 27046d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_INV_SHIFT 2 /* AIF2TX_LRCLK_INV */ 27056d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_INV_WIDTH 1 /* AIF2TX_LRCLK_INV */ 27066d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_FRC 0x0002 /* AIF2TX_LRCLK_FRC */ 27076d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_FRC_MASK 0x0002 /* AIF2TX_LRCLK_FRC */ 27086d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_FRC_SHIFT 1 /* AIF2TX_LRCLK_FRC */ 27096d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_FRC_WIDTH 1 /* AIF2TX_LRCLK_FRC */ 27106d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_MSTR 0x0001 /* AIF2TX_LRCLK_MSTR */ 27116d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_MSTR_MASK 0x0001 /* AIF2TX_LRCLK_MSTR */ 27126d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_MSTR_SHIFT 0 /* AIF2TX_LRCLK_MSTR */ 27136d4baf08SMark Brown #define WM5100_AIF2TX_LRCLK_MSTR_WIDTH 1 /* AIF2TX_LRCLK_MSTR */ 27146d4baf08SMark Brown 27156d4baf08SMark Brown /* 27166d4baf08SMark Brown * R1346 (0x542) - Audio IF 2_3 27176d4baf08SMark Brown */ 27186d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_INV 0x0004 /* AIF2RX_LRCLK_INV */ 27196d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_INV_MASK 0x0004 /* AIF2RX_LRCLK_INV */ 27206d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_INV_SHIFT 2 /* AIF2RX_LRCLK_INV */ 27216d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_INV_WIDTH 1 /* AIF2RX_LRCLK_INV */ 27226d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_FRC 0x0002 /* AIF2RX_LRCLK_FRC */ 27236d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_FRC_MASK 0x0002 /* AIF2RX_LRCLK_FRC */ 27246d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_FRC_SHIFT 1 /* AIF2RX_LRCLK_FRC */ 27256d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_FRC_WIDTH 1 /* AIF2RX_LRCLK_FRC */ 27266d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_MSTR 0x0001 /* AIF2RX_LRCLK_MSTR */ 27276d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_MSTR_MASK 0x0001 /* AIF2RX_LRCLK_MSTR */ 27286d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_MSTR_SHIFT 0 /* AIF2RX_LRCLK_MSTR */ 27296d4baf08SMark Brown #define WM5100_AIF2RX_LRCLK_MSTR_WIDTH 1 /* AIF2RX_LRCLK_MSTR */ 27306d4baf08SMark Brown 27316d4baf08SMark Brown /* 27326d4baf08SMark Brown * R1347 (0x543) - Audio IF 2_4 27336d4baf08SMark Brown */ 27346d4baf08SMark Brown #define WM5100_AIF2_TRI 0x0040 /* AIF2_TRI */ 27356d4baf08SMark Brown #define WM5100_AIF2_TRI_MASK 0x0040 /* AIF2_TRI */ 27366d4baf08SMark Brown #define WM5100_AIF2_TRI_SHIFT 6 /* AIF2_TRI */ 27376d4baf08SMark Brown #define WM5100_AIF2_TRI_WIDTH 1 /* AIF2_TRI */ 27386d4baf08SMark Brown #define WM5100_AIF2_RATE_MASK 0x0003 /* AIF2_RATE - [1:0] */ 27396d4baf08SMark Brown #define WM5100_AIF2_RATE_SHIFT 0 /* AIF2_RATE - [1:0] */ 27406d4baf08SMark Brown #define WM5100_AIF2_RATE_WIDTH 2 /* AIF2_RATE - [1:0] */ 27416d4baf08SMark Brown 27426d4baf08SMark Brown /* 27436d4baf08SMark Brown * R1348 (0x544) - Audio IF 2_5 27446d4baf08SMark Brown */ 27456d4baf08SMark Brown #define WM5100_AIF2_FMT_MASK 0x0007 /* AIF2_FMT - [2:0] */ 27466d4baf08SMark Brown #define WM5100_AIF2_FMT_SHIFT 0 /* AIF2_FMT - [2:0] */ 27476d4baf08SMark Brown #define WM5100_AIF2_FMT_WIDTH 3 /* AIF2_FMT - [2:0] */ 27486d4baf08SMark Brown 27496d4baf08SMark Brown /* 27506d4baf08SMark Brown * R1349 (0x545) - Audio IF 2_6 27516d4baf08SMark Brown */ 27526d4baf08SMark Brown #define WM5100_AIF2TX_BCPF_MASK 0x1FFF /* AIF2TX_BCPF - [12:0] */ 27536d4baf08SMark Brown #define WM5100_AIF2TX_BCPF_SHIFT 0 /* AIF2TX_BCPF - [12:0] */ 27546d4baf08SMark Brown #define WM5100_AIF2TX_BCPF_WIDTH 13 /* AIF2TX_BCPF - [12:0] */ 27556d4baf08SMark Brown 27566d4baf08SMark Brown /* 27576d4baf08SMark Brown * R1350 (0x546) - Audio IF 2_7 27586d4baf08SMark Brown */ 27596d4baf08SMark Brown #define WM5100_AIF2RX_BCPF_MASK 0x1FFF /* AIF2RX_BCPF - [12:0] */ 27606d4baf08SMark Brown #define WM5100_AIF2RX_BCPF_SHIFT 0 /* AIF2RX_BCPF - [12:0] */ 27616d4baf08SMark Brown #define WM5100_AIF2RX_BCPF_WIDTH 13 /* AIF2RX_BCPF - [12:0] */ 27626d4baf08SMark Brown 27636d4baf08SMark Brown /* 27646d4baf08SMark Brown * R1351 (0x547) - Audio IF 2_8 27656d4baf08SMark Brown */ 27666d4baf08SMark Brown #define WM5100_AIF2TX_WL_MASK 0x3F00 /* AIF2TX_WL - [13:8] */ 27676d4baf08SMark Brown #define WM5100_AIF2TX_WL_SHIFT 8 /* AIF2TX_WL - [13:8] */ 27686d4baf08SMark Brown #define WM5100_AIF2TX_WL_WIDTH 6 /* AIF2TX_WL - [13:8] */ 27696d4baf08SMark Brown #define WM5100_AIF2TX_SLOT_LEN_MASK 0x00FF /* AIF2TX_SLOT_LEN - [7:0] */ 27706d4baf08SMark Brown #define WM5100_AIF2TX_SLOT_LEN_SHIFT 0 /* AIF2TX_SLOT_LEN - [7:0] */ 27716d4baf08SMark Brown #define WM5100_AIF2TX_SLOT_LEN_WIDTH 8 /* AIF2TX_SLOT_LEN - [7:0] */ 27726d4baf08SMark Brown 27736d4baf08SMark Brown /* 27746d4baf08SMark Brown * R1352 (0x548) - Audio IF 2_9 27756d4baf08SMark Brown */ 27766d4baf08SMark Brown #define WM5100_AIF2RX_WL_MASK 0x3F00 /* AIF2RX_WL - [13:8] */ 27776d4baf08SMark Brown #define WM5100_AIF2RX_WL_SHIFT 8 /* AIF2RX_WL - [13:8] */ 27786d4baf08SMark Brown #define WM5100_AIF2RX_WL_WIDTH 6 /* AIF2RX_WL - [13:8] */ 27796d4baf08SMark Brown #define WM5100_AIF2RX_SLOT_LEN_MASK 0x00FF /* AIF2RX_SLOT_LEN - [7:0] */ 27806d4baf08SMark Brown #define WM5100_AIF2RX_SLOT_LEN_SHIFT 0 /* AIF2RX_SLOT_LEN - [7:0] */ 27816d4baf08SMark Brown #define WM5100_AIF2RX_SLOT_LEN_WIDTH 8 /* AIF2RX_SLOT_LEN - [7:0] */ 27826d4baf08SMark Brown 27836d4baf08SMark Brown /* 27846d4baf08SMark Brown * R1353 (0x549) - Audio IF 2_10 27856d4baf08SMark Brown */ 27866d4baf08SMark Brown #define WM5100_AIF2TX1_SLOT_MASK 0x003F /* AIF2TX1_SLOT - [5:0] */ 27876d4baf08SMark Brown #define WM5100_AIF2TX1_SLOT_SHIFT 0 /* AIF2TX1_SLOT - [5:0] */ 27886d4baf08SMark Brown #define WM5100_AIF2TX1_SLOT_WIDTH 6 /* AIF2TX1_SLOT - [5:0] */ 27896d4baf08SMark Brown 27906d4baf08SMark Brown /* 27916d4baf08SMark Brown * R1354 (0x54A) - Audio IF 2_11 27926d4baf08SMark Brown */ 27936d4baf08SMark Brown #define WM5100_AIF2TX2_SLOT_MASK 0x003F /* AIF2TX2_SLOT - [5:0] */ 27946d4baf08SMark Brown #define WM5100_AIF2TX2_SLOT_SHIFT 0 /* AIF2TX2_SLOT - [5:0] */ 27956d4baf08SMark Brown #define WM5100_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */ 27966d4baf08SMark Brown 27976d4baf08SMark Brown /* 27986d4baf08SMark Brown * R1361 (0x551) - Audio IF 2_18 27996d4baf08SMark Brown */ 28006d4baf08SMark Brown #define WM5100_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */ 28016d4baf08SMark Brown #define WM5100_AIF2RX1_SLOT_SHIFT 0 /* AIF2RX1_SLOT - [5:0] */ 28026d4baf08SMark Brown #define WM5100_AIF2RX1_SLOT_WIDTH 6 /* AIF2RX1_SLOT - [5:0] */ 28036d4baf08SMark Brown 28046d4baf08SMark Brown /* 28056d4baf08SMark Brown * R1362 (0x552) - Audio IF 2_19 28066d4baf08SMark Brown */ 28076d4baf08SMark Brown #define WM5100_AIF2RX2_SLOT_MASK 0x003F /* AIF2RX2_SLOT - [5:0] */ 28086d4baf08SMark Brown #define WM5100_AIF2RX2_SLOT_SHIFT 0 /* AIF2RX2_SLOT - [5:0] */ 28096d4baf08SMark Brown #define WM5100_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */ 28106d4baf08SMark Brown 28116d4baf08SMark Brown /* 28126d4baf08SMark Brown * R1369 (0x559) - Audio IF 2_26 28136d4baf08SMark Brown */ 28146d4baf08SMark Brown #define WM5100_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */ 28156d4baf08SMark Brown #define WM5100_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */ 28166d4baf08SMark Brown #define WM5100_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */ 28176d4baf08SMark Brown #define WM5100_AIF2TX2_ENA_WIDTH 1 /* AIF2TX2_ENA */ 28186d4baf08SMark Brown #define WM5100_AIF2TX1_ENA 0x0001 /* AIF2TX1_ENA */ 28196d4baf08SMark Brown #define WM5100_AIF2TX1_ENA_MASK 0x0001 /* AIF2TX1_ENA */ 28206d4baf08SMark Brown #define WM5100_AIF2TX1_ENA_SHIFT 0 /* AIF2TX1_ENA */ 28216d4baf08SMark Brown #define WM5100_AIF2TX1_ENA_WIDTH 1 /* AIF2TX1_ENA */ 28226d4baf08SMark Brown 28236d4baf08SMark Brown /* 28246d4baf08SMark Brown * R1370 (0x55A) - Audio IF 2_27 28256d4baf08SMark Brown */ 28266d4baf08SMark Brown #define WM5100_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */ 28276d4baf08SMark Brown #define WM5100_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */ 28286d4baf08SMark Brown #define WM5100_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */ 28296d4baf08SMark Brown #define WM5100_AIF2RX2_ENA_WIDTH 1 /* AIF2RX2_ENA */ 28306d4baf08SMark Brown #define WM5100_AIF2RX1_ENA 0x0001 /* AIF2RX1_ENA */ 28316d4baf08SMark Brown #define WM5100_AIF2RX1_ENA_MASK 0x0001 /* AIF2RX1_ENA */ 28326d4baf08SMark Brown #define WM5100_AIF2RX1_ENA_SHIFT 0 /* AIF2RX1_ENA */ 28336d4baf08SMark Brown #define WM5100_AIF2RX1_ENA_WIDTH 1 /* AIF2RX1_ENA */ 28346d4baf08SMark Brown 28356d4baf08SMark Brown /* 28366d4baf08SMark Brown * R1408 (0x580) - Audio IF 3_1 28376d4baf08SMark Brown */ 28386d4baf08SMark Brown #define WM5100_AIF3_BCLK_INV 0x0080 /* AIF3_BCLK_INV */ 28396d4baf08SMark Brown #define WM5100_AIF3_BCLK_INV_MASK 0x0080 /* AIF3_BCLK_INV */ 28406d4baf08SMark Brown #define WM5100_AIF3_BCLK_INV_SHIFT 7 /* AIF3_BCLK_INV */ 28416d4baf08SMark Brown #define WM5100_AIF3_BCLK_INV_WIDTH 1 /* AIF3_BCLK_INV */ 28426d4baf08SMark Brown #define WM5100_AIF3_BCLK_FRC 0x0040 /* AIF3_BCLK_FRC */ 28436d4baf08SMark Brown #define WM5100_AIF3_BCLK_FRC_MASK 0x0040 /* AIF3_BCLK_FRC */ 28446d4baf08SMark Brown #define WM5100_AIF3_BCLK_FRC_SHIFT 6 /* AIF3_BCLK_FRC */ 28456d4baf08SMark Brown #define WM5100_AIF3_BCLK_FRC_WIDTH 1 /* AIF3_BCLK_FRC */ 28466d4baf08SMark Brown #define WM5100_AIF3_BCLK_MSTR 0x0020 /* AIF3_BCLK_MSTR */ 28476d4baf08SMark Brown #define WM5100_AIF3_BCLK_MSTR_MASK 0x0020 /* AIF3_BCLK_MSTR */ 28486d4baf08SMark Brown #define WM5100_AIF3_BCLK_MSTR_SHIFT 5 /* AIF3_BCLK_MSTR */ 28496d4baf08SMark Brown #define WM5100_AIF3_BCLK_MSTR_WIDTH 1 /* AIF3_BCLK_MSTR */ 28506d4baf08SMark Brown #define WM5100_AIF3_BCLK_FREQ_MASK 0x001F /* AIF3_BCLK_FREQ - [4:0] */ 28516d4baf08SMark Brown #define WM5100_AIF3_BCLK_FREQ_SHIFT 0 /* AIF3_BCLK_FREQ - [4:0] */ 28526d4baf08SMark Brown #define WM5100_AIF3_BCLK_FREQ_WIDTH 5 /* AIF3_BCLK_FREQ - [4:0] */ 28536d4baf08SMark Brown 28546d4baf08SMark Brown /* 28556d4baf08SMark Brown * R1409 (0x581) - Audio IF 3_2 28566d4baf08SMark Brown */ 28576d4baf08SMark Brown #define WM5100_AIF3TX_DAT_TRI 0x0020 /* AIF3TX_DAT_TRI */ 28586d4baf08SMark Brown #define WM5100_AIF3TX_DAT_TRI_MASK 0x0020 /* AIF3TX_DAT_TRI */ 28596d4baf08SMark Brown #define WM5100_AIF3TX_DAT_TRI_SHIFT 5 /* AIF3TX_DAT_TRI */ 28606d4baf08SMark Brown #define WM5100_AIF3TX_DAT_TRI_WIDTH 1 /* AIF3TX_DAT_TRI */ 28616d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_SRC 0x0008 /* AIF3TX_LRCLK_SRC */ 28626d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_SRC_MASK 0x0008 /* AIF3TX_LRCLK_SRC */ 28636d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_SRC_SHIFT 3 /* AIF3TX_LRCLK_SRC */ 28646d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_SRC_WIDTH 1 /* AIF3TX_LRCLK_SRC */ 28656d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_INV 0x0004 /* AIF3TX_LRCLK_INV */ 28666d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_INV_MASK 0x0004 /* AIF3TX_LRCLK_INV */ 28676d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_INV_SHIFT 2 /* AIF3TX_LRCLK_INV */ 28686d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_INV_WIDTH 1 /* AIF3TX_LRCLK_INV */ 28696d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_FRC 0x0002 /* AIF3TX_LRCLK_FRC */ 28706d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_FRC_MASK 0x0002 /* AIF3TX_LRCLK_FRC */ 28716d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_FRC_SHIFT 1 /* AIF3TX_LRCLK_FRC */ 28726d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_FRC_WIDTH 1 /* AIF3TX_LRCLK_FRC */ 28736d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_MSTR 0x0001 /* AIF3TX_LRCLK_MSTR */ 28746d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_MSTR_MASK 0x0001 /* AIF3TX_LRCLK_MSTR */ 28756d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_MSTR_SHIFT 0 /* AIF3TX_LRCLK_MSTR */ 28766d4baf08SMark Brown #define WM5100_AIF3TX_LRCLK_MSTR_WIDTH 1 /* AIF3TX_LRCLK_MSTR */ 28776d4baf08SMark Brown 28786d4baf08SMark Brown /* 28796d4baf08SMark Brown * R1410 (0x582) - Audio IF 3_3 28806d4baf08SMark Brown */ 28816d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_INV 0x0004 /* AIF3RX_LRCLK_INV */ 28826d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_INV_MASK 0x0004 /* AIF3RX_LRCLK_INV */ 28836d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_INV_SHIFT 2 /* AIF3RX_LRCLK_INV */ 28846d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_INV_WIDTH 1 /* AIF3RX_LRCLK_INV */ 28856d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_FRC 0x0002 /* AIF3RX_LRCLK_FRC */ 28866d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_FRC_MASK 0x0002 /* AIF3RX_LRCLK_FRC */ 28876d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_FRC_SHIFT 1 /* AIF3RX_LRCLK_FRC */ 28886d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_FRC_WIDTH 1 /* AIF3RX_LRCLK_FRC */ 28896d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_MSTR 0x0001 /* AIF3RX_LRCLK_MSTR */ 28906d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_MSTR_MASK 0x0001 /* AIF3RX_LRCLK_MSTR */ 28916d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_MSTR_SHIFT 0 /* AIF3RX_LRCLK_MSTR */ 28926d4baf08SMark Brown #define WM5100_AIF3RX_LRCLK_MSTR_WIDTH 1 /* AIF3RX_LRCLK_MSTR */ 28936d4baf08SMark Brown 28946d4baf08SMark Brown /* 28956d4baf08SMark Brown * R1411 (0x583) - Audio IF 3_4 28966d4baf08SMark Brown */ 28976d4baf08SMark Brown #define WM5100_AIF3_TRI 0x0040 /* AIF3_TRI */ 28986d4baf08SMark Brown #define WM5100_AIF3_TRI_MASK 0x0040 /* AIF3_TRI */ 28996d4baf08SMark Brown #define WM5100_AIF3_TRI_SHIFT 6 /* AIF3_TRI */ 29006d4baf08SMark Brown #define WM5100_AIF3_TRI_WIDTH 1 /* AIF3_TRI */ 29016d4baf08SMark Brown #define WM5100_AIF3_RATE_MASK 0x0003 /* AIF3_RATE - [1:0] */ 29026d4baf08SMark Brown #define WM5100_AIF3_RATE_SHIFT 0 /* AIF3_RATE - [1:0] */ 29036d4baf08SMark Brown #define WM5100_AIF3_RATE_WIDTH 2 /* AIF3_RATE - [1:0] */ 29046d4baf08SMark Brown 29056d4baf08SMark Brown /* 29066d4baf08SMark Brown * R1412 (0x584) - Audio IF 3_5 29076d4baf08SMark Brown */ 29086d4baf08SMark Brown #define WM5100_AIF3_FMT_MASK 0x0007 /* AIF3_FMT - [2:0] */ 29096d4baf08SMark Brown #define WM5100_AIF3_FMT_SHIFT 0 /* AIF3_FMT - [2:0] */ 29106d4baf08SMark Brown #define WM5100_AIF3_FMT_WIDTH 3 /* AIF3_FMT - [2:0] */ 29116d4baf08SMark Brown 29126d4baf08SMark Brown /* 29136d4baf08SMark Brown * R1413 (0x585) - Audio IF 3_6 29146d4baf08SMark Brown */ 29156d4baf08SMark Brown #define WM5100_AIF3TX_BCPF_MASK 0x1FFF /* AIF3TX_BCPF - [12:0] */ 29166d4baf08SMark Brown #define WM5100_AIF3TX_BCPF_SHIFT 0 /* AIF3TX_BCPF - [12:0] */ 29176d4baf08SMark Brown #define WM5100_AIF3TX_BCPF_WIDTH 13 /* AIF3TX_BCPF - [12:0] */ 29186d4baf08SMark Brown 29196d4baf08SMark Brown /* 29206d4baf08SMark Brown * R1414 (0x586) - Audio IF 3_7 29216d4baf08SMark Brown */ 29226d4baf08SMark Brown #define WM5100_AIF3RX_BCPF_MASK 0x1FFF /* AIF3RX_BCPF - [12:0] */ 29236d4baf08SMark Brown #define WM5100_AIF3RX_BCPF_SHIFT 0 /* AIF3RX_BCPF - [12:0] */ 29246d4baf08SMark Brown #define WM5100_AIF3RX_BCPF_WIDTH 13 /* AIF3RX_BCPF - [12:0] */ 29256d4baf08SMark Brown 29266d4baf08SMark Brown /* 29276d4baf08SMark Brown * R1415 (0x587) - Audio IF 3_8 29286d4baf08SMark Brown */ 29296d4baf08SMark Brown #define WM5100_AIF3TX_WL_MASK 0x3F00 /* AIF3TX_WL - [13:8] */ 29306d4baf08SMark Brown #define WM5100_AIF3TX_WL_SHIFT 8 /* AIF3TX_WL - [13:8] */ 29316d4baf08SMark Brown #define WM5100_AIF3TX_WL_WIDTH 6 /* AIF3TX_WL - [13:8] */ 29326d4baf08SMark Brown #define WM5100_AIF3TX_SLOT_LEN_MASK 0x00FF /* AIF3TX_SLOT_LEN - [7:0] */ 29336d4baf08SMark Brown #define WM5100_AIF3TX_SLOT_LEN_SHIFT 0 /* AIF3TX_SLOT_LEN - [7:0] */ 29346d4baf08SMark Brown #define WM5100_AIF3TX_SLOT_LEN_WIDTH 8 /* AIF3TX_SLOT_LEN - [7:0] */ 29356d4baf08SMark Brown 29366d4baf08SMark Brown /* 29376d4baf08SMark Brown * R1416 (0x588) - Audio IF 3_9 29386d4baf08SMark Brown */ 29396d4baf08SMark Brown #define WM5100_AIF3RX_WL_MASK 0x3F00 /* AIF3RX_WL - [13:8] */ 29406d4baf08SMark Brown #define WM5100_AIF3RX_WL_SHIFT 8 /* AIF3RX_WL - [13:8] */ 29416d4baf08SMark Brown #define WM5100_AIF3RX_WL_WIDTH 6 /* AIF3RX_WL - [13:8] */ 29426d4baf08SMark Brown #define WM5100_AIF3RX_SLOT_LEN_MASK 0x00FF /* AIF3RX_SLOT_LEN - [7:0] */ 29436d4baf08SMark Brown #define WM5100_AIF3RX_SLOT_LEN_SHIFT 0 /* AIF3RX_SLOT_LEN - [7:0] */ 29446d4baf08SMark Brown #define WM5100_AIF3RX_SLOT_LEN_WIDTH 8 /* AIF3RX_SLOT_LEN - [7:0] */ 29456d4baf08SMark Brown 29466d4baf08SMark Brown /* 29476d4baf08SMark Brown * R1417 (0x589) - Audio IF 3_10 29486d4baf08SMark Brown */ 29496d4baf08SMark Brown #define WM5100_AIF3TX1_SLOT_MASK 0x003F /* AIF3TX1_SLOT - [5:0] */ 29506d4baf08SMark Brown #define WM5100_AIF3TX1_SLOT_SHIFT 0 /* AIF3TX1_SLOT - [5:0] */ 29516d4baf08SMark Brown #define WM5100_AIF3TX1_SLOT_WIDTH 6 /* AIF3TX1_SLOT - [5:0] */ 29526d4baf08SMark Brown 29536d4baf08SMark Brown /* 29546d4baf08SMark Brown * R1418 (0x58A) - Audio IF 3_11 29556d4baf08SMark Brown */ 29566d4baf08SMark Brown #define WM5100_AIF3TX2_SLOT_MASK 0x003F /* AIF3TX2_SLOT - [5:0] */ 29576d4baf08SMark Brown #define WM5100_AIF3TX2_SLOT_SHIFT 0 /* AIF3TX2_SLOT - [5:0] */ 29586d4baf08SMark Brown #define WM5100_AIF3TX2_SLOT_WIDTH 6 /* AIF3TX2_SLOT - [5:0] */ 29596d4baf08SMark Brown 29606d4baf08SMark Brown /* 29616d4baf08SMark Brown * R1425 (0x591) - Audio IF 3_18 29626d4baf08SMark Brown */ 29636d4baf08SMark Brown #define WM5100_AIF3RX1_SLOT_MASK 0x003F /* AIF3RX1_SLOT - [5:0] */ 29646d4baf08SMark Brown #define WM5100_AIF3RX1_SLOT_SHIFT 0 /* AIF3RX1_SLOT - [5:0] */ 29656d4baf08SMark Brown #define WM5100_AIF3RX1_SLOT_WIDTH 6 /* AIF3RX1_SLOT - [5:0] */ 29666d4baf08SMark Brown 29676d4baf08SMark Brown /* 29686d4baf08SMark Brown * R1426 (0x592) - Audio IF 3_19 29696d4baf08SMark Brown */ 29706d4baf08SMark Brown #define WM5100_AIF3RX2_SLOT_MASK 0x003F /* AIF3RX2_SLOT - [5:0] */ 29716d4baf08SMark Brown #define WM5100_AIF3RX2_SLOT_SHIFT 0 /* AIF3RX2_SLOT - [5:0] */ 29726d4baf08SMark Brown #define WM5100_AIF3RX2_SLOT_WIDTH 6 /* AIF3RX2_SLOT - [5:0] */ 29736d4baf08SMark Brown 29746d4baf08SMark Brown /* 29756d4baf08SMark Brown * R1433 (0x599) - Audio IF 3_26 29766d4baf08SMark Brown */ 29776d4baf08SMark Brown #define WM5100_AIF3TX2_ENA 0x0002 /* AIF3TX2_ENA */ 29786d4baf08SMark Brown #define WM5100_AIF3TX2_ENA_MASK 0x0002 /* AIF3TX2_ENA */ 29796d4baf08SMark Brown #define WM5100_AIF3TX2_ENA_SHIFT 1 /* AIF3TX2_ENA */ 29806d4baf08SMark Brown #define WM5100_AIF3TX2_ENA_WIDTH 1 /* AIF3TX2_ENA */ 29816d4baf08SMark Brown #define WM5100_AIF3TX1_ENA 0x0001 /* AIF3TX1_ENA */ 29826d4baf08SMark Brown #define WM5100_AIF3TX1_ENA_MASK 0x0001 /* AIF3TX1_ENA */ 29836d4baf08SMark Brown #define WM5100_AIF3TX1_ENA_SHIFT 0 /* AIF3TX1_ENA */ 29846d4baf08SMark Brown #define WM5100_AIF3TX1_ENA_WIDTH 1 /* AIF3TX1_ENA */ 29856d4baf08SMark Brown 29866d4baf08SMark Brown /* 29876d4baf08SMark Brown * R1434 (0x59A) - Audio IF 3_27 29886d4baf08SMark Brown */ 29896d4baf08SMark Brown #define WM5100_AIF3RX2_ENA 0x0002 /* AIF3RX2_ENA */ 29906d4baf08SMark Brown #define WM5100_AIF3RX2_ENA_MASK 0x0002 /* AIF3RX2_ENA */ 29916d4baf08SMark Brown #define WM5100_AIF3RX2_ENA_SHIFT 1 /* AIF3RX2_ENA */ 29926d4baf08SMark Brown #define WM5100_AIF3RX2_ENA_WIDTH 1 /* AIF3RX2_ENA */ 29936d4baf08SMark Brown #define WM5100_AIF3RX1_ENA 0x0001 /* AIF3RX1_ENA */ 29946d4baf08SMark Brown #define WM5100_AIF3RX1_ENA_MASK 0x0001 /* AIF3RX1_ENA */ 29956d4baf08SMark Brown #define WM5100_AIF3RX1_ENA_SHIFT 0 /* AIF3RX1_ENA */ 29966d4baf08SMark Brown #define WM5100_AIF3RX1_ENA_WIDTH 1 /* AIF3RX1_ENA */ 29976d4baf08SMark Brown 29986d4baf08SMark Brown #define WM5100_MIXER_VOL_MASK 0x00FE /* MIXER_VOL - [7:1] */ 29996d4baf08SMark Brown #define WM5100_MIXER_VOL_SHIFT 1 /* MIXER_VOL - [7:1] */ 30006d4baf08SMark Brown #define WM5100_MIXER_VOL_WIDTH 7 /* MIXER_VOL - [7:1] */ 30016d4baf08SMark Brown 30026d4baf08SMark Brown /* 30036d4baf08SMark Brown * R3072 (0xC00) - GPIO CTRL 1 30046d4baf08SMark Brown */ 30056d4baf08SMark Brown #define WM5100_GP1_DIR 0x8000 /* GP1_DIR */ 30066d4baf08SMark Brown #define WM5100_GP1_DIR_MASK 0x8000 /* GP1_DIR */ 30076d4baf08SMark Brown #define WM5100_GP1_DIR_SHIFT 15 /* GP1_DIR */ 30086d4baf08SMark Brown #define WM5100_GP1_DIR_WIDTH 1 /* GP1_DIR */ 30096d4baf08SMark Brown #define WM5100_GP1_PU 0x4000 /* GP1_PU */ 30106d4baf08SMark Brown #define WM5100_GP1_PU_MASK 0x4000 /* GP1_PU */ 30116d4baf08SMark Brown #define WM5100_GP1_PU_SHIFT 14 /* GP1_PU */ 30126d4baf08SMark Brown #define WM5100_GP1_PU_WIDTH 1 /* GP1_PU */ 30136d4baf08SMark Brown #define WM5100_GP1_PD 0x2000 /* GP1_PD */ 30146d4baf08SMark Brown #define WM5100_GP1_PD_MASK 0x2000 /* GP1_PD */ 30156d4baf08SMark Brown #define WM5100_GP1_PD_SHIFT 13 /* GP1_PD */ 30166d4baf08SMark Brown #define WM5100_GP1_PD_WIDTH 1 /* GP1_PD */ 30176d4baf08SMark Brown #define WM5100_GP1_POL 0x0400 /* GP1_POL */ 30186d4baf08SMark Brown #define WM5100_GP1_POL_MASK 0x0400 /* GP1_POL */ 30196d4baf08SMark Brown #define WM5100_GP1_POL_SHIFT 10 /* GP1_POL */ 30206d4baf08SMark Brown #define WM5100_GP1_POL_WIDTH 1 /* GP1_POL */ 30216d4baf08SMark Brown #define WM5100_GP1_OP_CFG 0x0200 /* GP1_OP_CFG */ 30226d4baf08SMark Brown #define WM5100_GP1_OP_CFG_MASK 0x0200 /* GP1_OP_CFG */ 30236d4baf08SMark Brown #define WM5100_GP1_OP_CFG_SHIFT 9 /* GP1_OP_CFG */ 30246d4baf08SMark Brown #define WM5100_GP1_OP_CFG_WIDTH 1 /* GP1_OP_CFG */ 30256d4baf08SMark Brown #define WM5100_GP1_DB 0x0100 /* GP1_DB */ 30266d4baf08SMark Brown #define WM5100_GP1_DB_MASK 0x0100 /* GP1_DB */ 30276d4baf08SMark Brown #define WM5100_GP1_DB_SHIFT 8 /* GP1_DB */ 30286d4baf08SMark Brown #define WM5100_GP1_DB_WIDTH 1 /* GP1_DB */ 30296d4baf08SMark Brown #define WM5100_GP1_LVL 0x0040 /* GP1_LVL */ 30306d4baf08SMark Brown #define WM5100_GP1_LVL_MASK 0x0040 /* GP1_LVL */ 30316d4baf08SMark Brown #define WM5100_GP1_LVL_SHIFT 6 /* GP1_LVL */ 30326d4baf08SMark Brown #define WM5100_GP1_LVL_WIDTH 1 /* GP1_LVL */ 30336d4baf08SMark Brown #define WM5100_GP1_FN_MASK 0x003F /* GP1_FN - [5:0] */ 30346d4baf08SMark Brown #define WM5100_GP1_FN_SHIFT 0 /* GP1_FN - [5:0] */ 30356d4baf08SMark Brown #define WM5100_GP1_FN_WIDTH 6 /* GP1_FN - [5:0] */ 30366d4baf08SMark Brown 30376d4baf08SMark Brown /* 30386d4baf08SMark Brown * R3073 (0xC01) - GPIO CTRL 2 30396d4baf08SMark Brown */ 30406d4baf08SMark Brown #define WM5100_GP2_DIR 0x8000 /* GP2_DIR */ 30416d4baf08SMark Brown #define WM5100_GP2_DIR_MASK 0x8000 /* GP2_DIR */ 30426d4baf08SMark Brown #define WM5100_GP2_DIR_SHIFT 15 /* GP2_DIR */ 30436d4baf08SMark Brown #define WM5100_GP2_DIR_WIDTH 1 /* GP2_DIR */ 30446d4baf08SMark Brown #define WM5100_GP2_PU 0x4000 /* GP2_PU */ 30456d4baf08SMark Brown #define WM5100_GP2_PU_MASK 0x4000 /* GP2_PU */ 30466d4baf08SMark Brown #define WM5100_GP2_PU_SHIFT 14 /* GP2_PU */ 30476d4baf08SMark Brown #define WM5100_GP2_PU_WIDTH 1 /* GP2_PU */ 30486d4baf08SMark Brown #define WM5100_GP2_PD 0x2000 /* GP2_PD */ 30496d4baf08SMark Brown #define WM5100_GP2_PD_MASK 0x2000 /* GP2_PD */ 30506d4baf08SMark Brown #define WM5100_GP2_PD_SHIFT 13 /* GP2_PD */ 30516d4baf08SMark Brown #define WM5100_GP2_PD_WIDTH 1 /* GP2_PD */ 30526d4baf08SMark Brown #define WM5100_GP2_POL 0x0400 /* GP2_POL */ 30536d4baf08SMark Brown #define WM5100_GP2_POL_MASK 0x0400 /* GP2_POL */ 30546d4baf08SMark Brown #define WM5100_GP2_POL_SHIFT 10 /* GP2_POL */ 30556d4baf08SMark Brown #define WM5100_GP2_POL_WIDTH 1 /* GP2_POL */ 30566d4baf08SMark Brown #define WM5100_GP2_OP_CFG 0x0200 /* GP2_OP_CFG */ 30576d4baf08SMark Brown #define WM5100_GP2_OP_CFG_MASK 0x0200 /* GP2_OP_CFG */ 30586d4baf08SMark Brown #define WM5100_GP2_OP_CFG_SHIFT 9 /* GP2_OP_CFG */ 30596d4baf08SMark Brown #define WM5100_GP2_OP_CFG_WIDTH 1 /* GP2_OP_CFG */ 30606d4baf08SMark Brown #define WM5100_GP2_DB 0x0100 /* GP2_DB */ 30616d4baf08SMark Brown #define WM5100_GP2_DB_MASK 0x0100 /* GP2_DB */ 30626d4baf08SMark Brown #define WM5100_GP2_DB_SHIFT 8 /* GP2_DB */ 30636d4baf08SMark Brown #define WM5100_GP2_DB_WIDTH 1 /* GP2_DB */ 30646d4baf08SMark Brown #define WM5100_GP2_LVL 0x0040 /* GP2_LVL */ 30656d4baf08SMark Brown #define WM5100_GP2_LVL_MASK 0x0040 /* GP2_LVL */ 30666d4baf08SMark Brown #define WM5100_GP2_LVL_SHIFT 6 /* GP2_LVL */ 30676d4baf08SMark Brown #define WM5100_GP2_LVL_WIDTH 1 /* GP2_LVL */ 30686d4baf08SMark Brown #define WM5100_GP2_FN_MASK 0x003F /* GP2_FN - [5:0] */ 30696d4baf08SMark Brown #define WM5100_GP2_FN_SHIFT 0 /* GP2_FN - [5:0] */ 30706d4baf08SMark Brown #define WM5100_GP2_FN_WIDTH 6 /* GP2_FN - [5:0] */ 30716d4baf08SMark Brown 30726d4baf08SMark Brown /* 30736d4baf08SMark Brown * R3074 (0xC02) - GPIO CTRL 3 30746d4baf08SMark Brown */ 30756d4baf08SMark Brown #define WM5100_GP3_DIR 0x8000 /* GP3_DIR */ 30766d4baf08SMark Brown #define WM5100_GP3_DIR_MASK 0x8000 /* GP3_DIR */ 30776d4baf08SMark Brown #define WM5100_GP3_DIR_SHIFT 15 /* GP3_DIR */ 30786d4baf08SMark Brown #define WM5100_GP3_DIR_WIDTH 1 /* GP3_DIR */ 30796d4baf08SMark Brown #define WM5100_GP3_PU 0x4000 /* GP3_PU */ 30806d4baf08SMark Brown #define WM5100_GP3_PU_MASK 0x4000 /* GP3_PU */ 30816d4baf08SMark Brown #define WM5100_GP3_PU_SHIFT 14 /* GP3_PU */ 30826d4baf08SMark Brown #define WM5100_GP3_PU_WIDTH 1 /* GP3_PU */ 30836d4baf08SMark Brown #define WM5100_GP3_PD 0x2000 /* GP3_PD */ 30846d4baf08SMark Brown #define WM5100_GP3_PD_MASK 0x2000 /* GP3_PD */ 30856d4baf08SMark Brown #define WM5100_GP3_PD_SHIFT 13 /* GP3_PD */ 30866d4baf08SMark Brown #define WM5100_GP3_PD_WIDTH 1 /* GP3_PD */ 30876d4baf08SMark Brown #define WM5100_GP3_POL 0x0400 /* GP3_POL */ 30886d4baf08SMark Brown #define WM5100_GP3_POL_MASK 0x0400 /* GP3_POL */ 30896d4baf08SMark Brown #define WM5100_GP3_POL_SHIFT 10 /* GP3_POL */ 30906d4baf08SMark Brown #define WM5100_GP3_POL_WIDTH 1 /* GP3_POL */ 30916d4baf08SMark Brown #define WM5100_GP3_OP_CFG 0x0200 /* GP3_OP_CFG */ 30926d4baf08SMark Brown #define WM5100_GP3_OP_CFG_MASK 0x0200 /* GP3_OP_CFG */ 30936d4baf08SMark Brown #define WM5100_GP3_OP_CFG_SHIFT 9 /* GP3_OP_CFG */ 30946d4baf08SMark Brown #define WM5100_GP3_OP_CFG_WIDTH 1 /* GP3_OP_CFG */ 30956d4baf08SMark Brown #define WM5100_GP3_DB 0x0100 /* GP3_DB */ 30966d4baf08SMark Brown #define WM5100_GP3_DB_MASK 0x0100 /* GP3_DB */ 30976d4baf08SMark Brown #define WM5100_GP3_DB_SHIFT 8 /* GP3_DB */ 30986d4baf08SMark Brown #define WM5100_GP3_DB_WIDTH 1 /* GP3_DB */ 30996d4baf08SMark Brown #define WM5100_GP3_LVL 0x0040 /* GP3_LVL */ 31006d4baf08SMark Brown #define WM5100_GP3_LVL_MASK 0x0040 /* GP3_LVL */ 31016d4baf08SMark Brown #define WM5100_GP3_LVL_SHIFT 6 /* GP3_LVL */ 31026d4baf08SMark Brown #define WM5100_GP3_LVL_WIDTH 1 /* GP3_LVL */ 31036d4baf08SMark Brown #define WM5100_GP3_FN_MASK 0x003F /* GP3_FN - [5:0] */ 31046d4baf08SMark Brown #define WM5100_GP3_FN_SHIFT 0 /* GP3_FN - [5:0] */ 31056d4baf08SMark Brown #define WM5100_GP3_FN_WIDTH 6 /* GP3_FN - [5:0] */ 31066d4baf08SMark Brown 31076d4baf08SMark Brown /* 31086d4baf08SMark Brown * R3075 (0xC03) - GPIO CTRL 4 31096d4baf08SMark Brown */ 31106d4baf08SMark Brown #define WM5100_GP4_DIR 0x8000 /* GP4_DIR */ 31116d4baf08SMark Brown #define WM5100_GP4_DIR_MASK 0x8000 /* GP4_DIR */ 31126d4baf08SMark Brown #define WM5100_GP4_DIR_SHIFT 15 /* GP4_DIR */ 31136d4baf08SMark Brown #define WM5100_GP4_DIR_WIDTH 1 /* GP4_DIR */ 31146d4baf08SMark Brown #define WM5100_GP4_PU 0x4000 /* GP4_PU */ 31156d4baf08SMark Brown #define WM5100_GP4_PU_MASK 0x4000 /* GP4_PU */ 31166d4baf08SMark Brown #define WM5100_GP4_PU_SHIFT 14 /* GP4_PU */ 31176d4baf08SMark Brown #define WM5100_GP4_PU_WIDTH 1 /* GP4_PU */ 31186d4baf08SMark Brown #define WM5100_GP4_PD 0x2000 /* GP4_PD */ 31196d4baf08SMark Brown #define WM5100_GP4_PD_MASK 0x2000 /* GP4_PD */ 31206d4baf08SMark Brown #define WM5100_GP4_PD_SHIFT 13 /* GP4_PD */ 31216d4baf08SMark Brown #define WM5100_GP4_PD_WIDTH 1 /* GP4_PD */ 31226d4baf08SMark Brown #define WM5100_GP4_POL 0x0400 /* GP4_POL */ 31236d4baf08SMark Brown #define WM5100_GP4_POL_MASK 0x0400 /* GP4_POL */ 31246d4baf08SMark Brown #define WM5100_GP4_POL_SHIFT 10 /* GP4_POL */ 31256d4baf08SMark Brown #define WM5100_GP4_POL_WIDTH 1 /* GP4_POL */ 31266d4baf08SMark Brown #define WM5100_GP4_OP_CFG 0x0200 /* GP4_OP_CFG */ 31276d4baf08SMark Brown #define WM5100_GP4_OP_CFG_MASK 0x0200 /* GP4_OP_CFG */ 31286d4baf08SMark Brown #define WM5100_GP4_OP_CFG_SHIFT 9 /* GP4_OP_CFG */ 31296d4baf08SMark Brown #define WM5100_GP4_OP_CFG_WIDTH 1 /* GP4_OP_CFG */ 31306d4baf08SMark Brown #define WM5100_GP4_DB 0x0100 /* GP4_DB */ 31316d4baf08SMark Brown #define WM5100_GP4_DB_MASK 0x0100 /* GP4_DB */ 31326d4baf08SMark Brown #define WM5100_GP4_DB_SHIFT 8 /* GP4_DB */ 31336d4baf08SMark Brown #define WM5100_GP4_DB_WIDTH 1 /* GP4_DB */ 31346d4baf08SMark Brown #define WM5100_GP4_LVL 0x0040 /* GP4_LVL */ 31356d4baf08SMark Brown #define WM5100_GP4_LVL_MASK 0x0040 /* GP4_LVL */ 31366d4baf08SMark Brown #define WM5100_GP4_LVL_SHIFT 6 /* GP4_LVL */ 31376d4baf08SMark Brown #define WM5100_GP4_LVL_WIDTH 1 /* GP4_LVL */ 31386d4baf08SMark Brown #define WM5100_GP4_FN_MASK 0x003F /* GP4_FN - [5:0] */ 31396d4baf08SMark Brown #define WM5100_GP4_FN_SHIFT 0 /* GP4_FN - [5:0] */ 31406d4baf08SMark Brown #define WM5100_GP4_FN_WIDTH 6 /* GP4_FN - [5:0] */ 31416d4baf08SMark Brown 31426d4baf08SMark Brown /* 31436d4baf08SMark Brown * R3076 (0xC04) - GPIO CTRL 5 31446d4baf08SMark Brown */ 31456d4baf08SMark Brown #define WM5100_GP5_DIR 0x8000 /* GP5_DIR */ 31466d4baf08SMark Brown #define WM5100_GP5_DIR_MASK 0x8000 /* GP5_DIR */ 31476d4baf08SMark Brown #define WM5100_GP5_DIR_SHIFT 15 /* GP5_DIR */ 31486d4baf08SMark Brown #define WM5100_GP5_DIR_WIDTH 1 /* GP5_DIR */ 31496d4baf08SMark Brown #define WM5100_GP5_PU 0x4000 /* GP5_PU */ 31506d4baf08SMark Brown #define WM5100_GP5_PU_MASK 0x4000 /* GP5_PU */ 31516d4baf08SMark Brown #define WM5100_GP5_PU_SHIFT 14 /* GP5_PU */ 31526d4baf08SMark Brown #define WM5100_GP5_PU_WIDTH 1 /* GP5_PU */ 31536d4baf08SMark Brown #define WM5100_GP5_PD 0x2000 /* GP5_PD */ 31546d4baf08SMark Brown #define WM5100_GP5_PD_MASK 0x2000 /* GP5_PD */ 31556d4baf08SMark Brown #define WM5100_GP5_PD_SHIFT 13 /* GP5_PD */ 31566d4baf08SMark Brown #define WM5100_GP5_PD_WIDTH 1 /* GP5_PD */ 31576d4baf08SMark Brown #define WM5100_GP5_POL 0x0400 /* GP5_POL */ 31586d4baf08SMark Brown #define WM5100_GP5_POL_MASK 0x0400 /* GP5_POL */ 31596d4baf08SMark Brown #define WM5100_GP5_POL_SHIFT 10 /* GP5_POL */ 31606d4baf08SMark Brown #define WM5100_GP5_POL_WIDTH 1 /* GP5_POL */ 31616d4baf08SMark Brown #define WM5100_GP5_OP_CFG 0x0200 /* GP5_OP_CFG */ 31626d4baf08SMark Brown #define WM5100_GP5_OP_CFG_MASK 0x0200 /* GP5_OP_CFG */ 31636d4baf08SMark Brown #define WM5100_GP5_OP_CFG_SHIFT 9 /* GP5_OP_CFG */ 31646d4baf08SMark Brown #define WM5100_GP5_OP_CFG_WIDTH 1 /* GP5_OP_CFG */ 31656d4baf08SMark Brown #define WM5100_GP5_DB 0x0100 /* GP5_DB */ 31666d4baf08SMark Brown #define WM5100_GP5_DB_MASK 0x0100 /* GP5_DB */ 31676d4baf08SMark Brown #define WM5100_GP5_DB_SHIFT 8 /* GP5_DB */ 31686d4baf08SMark Brown #define WM5100_GP5_DB_WIDTH 1 /* GP5_DB */ 31696d4baf08SMark Brown #define WM5100_GP5_LVL 0x0040 /* GP5_LVL */ 31706d4baf08SMark Brown #define WM5100_GP5_LVL_MASK 0x0040 /* GP5_LVL */ 31716d4baf08SMark Brown #define WM5100_GP5_LVL_SHIFT 6 /* GP5_LVL */ 31726d4baf08SMark Brown #define WM5100_GP5_LVL_WIDTH 1 /* GP5_LVL */ 31736d4baf08SMark Brown #define WM5100_GP5_FN_MASK 0x003F /* GP5_FN - [5:0] */ 31746d4baf08SMark Brown #define WM5100_GP5_FN_SHIFT 0 /* GP5_FN - [5:0] */ 31756d4baf08SMark Brown #define WM5100_GP5_FN_WIDTH 6 /* GP5_FN - [5:0] */ 31766d4baf08SMark Brown 31776d4baf08SMark Brown /* 31786d4baf08SMark Brown * R3077 (0xC05) - GPIO CTRL 6 31796d4baf08SMark Brown */ 31806d4baf08SMark Brown #define WM5100_GP6_DIR 0x8000 /* GP6_DIR */ 31816d4baf08SMark Brown #define WM5100_GP6_DIR_MASK 0x8000 /* GP6_DIR */ 31826d4baf08SMark Brown #define WM5100_GP6_DIR_SHIFT 15 /* GP6_DIR */ 31836d4baf08SMark Brown #define WM5100_GP6_DIR_WIDTH 1 /* GP6_DIR */ 31846d4baf08SMark Brown #define WM5100_GP6_PU 0x4000 /* GP6_PU */ 31856d4baf08SMark Brown #define WM5100_GP6_PU_MASK 0x4000 /* GP6_PU */ 31866d4baf08SMark Brown #define WM5100_GP6_PU_SHIFT 14 /* GP6_PU */ 31876d4baf08SMark Brown #define WM5100_GP6_PU_WIDTH 1 /* GP6_PU */ 31886d4baf08SMark Brown #define WM5100_GP6_PD 0x2000 /* GP6_PD */ 31896d4baf08SMark Brown #define WM5100_GP6_PD_MASK 0x2000 /* GP6_PD */ 31906d4baf08SMark Brown #define WM5100_GP6_PD_SHIFT 13 /* GP6_PD */ 31916d4baf08SMark Brown #define WM5100_GP6_PD_WIDTH 1 /* GP6_PD */ 31926d4baf08SMark Brown #define WM5100_GP6_POL 0x0400 /* GP6_POL */ 31936d4baf08SMark Brown #define WM5100_GP6_POL_MASK 0x0400 /* GP6_POL */ 31946d4baf08SMark Brown #define WM5100_GP6_POL_SHIFT 10 /* GP6_POL */ 31956d4baf08SMark Brown #define WM5100_GP6_POL_WIDTH 1 /* GP6_POL */ 31966d4baf08SMark Brown #define WM5100_GP6_OP_CFG 0x0200 /* GP6_OP_CFG */ 31976d4baf08SMark Brown #define WM5100_GP6_OP_CFG_MASK 0x0200 /* GP6_OP_CFG */ 31986d4baf08SMark Brown #define WM5100_GP6_OP_CFG_SHIFT 9 /* GP6_OP_CFG */ 31996d4baf08SMark Brown #define WM5100_GP6_OP_CFG_WIDTH 1 /* GP6_OP_CFG */ 32006d4baf08SMark Brown #define WM5100_GP6_DB 0x0100 /* GP6_DB */ 32016d4baf08SMark Brown #define WM5100_GP6_DB_MASK 0x0100 /* GP6_DB */ 32026d4baf08SMark Brown #define WM5100_GP6_DB_SHIFT 8 /* GP6_DB */ 32036d4baf08SMark Brown #define WM5100_GP6_DB_WIDTH 1 /* GP6_DB */ 32046d4baf08SMark Brown #define WM5100_GP6_LVL 0x0040 /* GP6_LVL */ 32056d4baf08SMark Brown #define WM5100_GP6_LVL_MASK 0x0040 /* GP6_LVL */ 32066d4baf08SMark Brown #define WM5100_GP6_LVL_SHIFT 6 /* GP6_LVL */ 32076d4baf08SMark Brown #define WM5100_GP6_LVL_WIDTH 1 /* GP6_LVL */ 32086d4baf08SMark Brown #define WM5100_GP6_FN_MASK 0x003F /* GP6_FN - [5:0] */ 32096d4baf08SMark Brown #define WM5100_GP6_FN_SHIFT 0 /* GP6_FN - [5:0] */ 32106d4baf08SMark Brown #define WM5100_GP6_FN_WIDTH 6 /* GP6_FN - [5:0] */ 32116d4baf08SMark Brown 32126d4baf08SMark Brown /* 32136d4baf08SMark Brown * R3107 (0xC23) - Misc Pad Ctrl 1 32146d4baf08SMark Brown */ 32156d4baf08SMark Brown #define WM5100_LDO1ENA_PD 0x8000 /* LDO1ENA_PD */ 32166d4baf08SMark Brown #define WM5100_LDO1ENA_PD_MASK 0x8000 /* LDO1ENA_PD */ 32176d4baf08SMark Brown #define WM5100_LDO1ENA_PD_SHIFT 15 /* LDO1ENA_PD */ 32186d4baf08SMark Brown #define WM5100_LDO1ENA_PD_WIDTH 1 /* LDO1ENA_PD */ 32196d4baf08SMark Brown #define WM5100_MCLK2_PD 0x2000 /* MCLK2_PD */ 32206d4baf08SMark Brown #define WM5100_MCLK2_PD_MASK 0x2000 /* MCLK2_PD */ 32216d4baf08SMark Brown #define WM5100_MCLK2_PD_SHIFT 13 /* MCLK2_PD */ 32226d4baf08SMark Brown #define WM5100_MCLK2_PD_WIDTH 1 /* MCLK2_PD */ 32236d4baf08SMark Brown #define WM5100_MCLK1_PD 0x1000 /* MCLK1_PD */ 32246d4baf08SMark Brown #define WM5100_MCLK1_PD_MASK 0x1000 /* MCLK1_PD */ 32256d4baf08SMark Brown #define WM5100_MCLK1_PD_SHIFT 12 /* MCLK1_PD */ 32266d4baf08SMark Brown #define WM5100_MCLK1_PD_WIDTH 1 /* MCLK1_PD */ 32276d4baf08SMark Brown #define WM5100_RESET_PU 0x0002 /* RESET_PU */ 32286d4baf08SMark Brown #define WM5100_RESET_PU_MASK 0x0002 /* RESET_PU */ 32296d4baf08SMark Brown #define WM5100_RESET_PU_SHIFT 1 /* RESET_PU */ 32306d4baf08SMark Brown #define WM5100_RESET_PU_WIDTH 1 /* RESET_PU */ 32316d4baf08SMark Brown #define WM5100_ADDR_PD 0x0001 /* ADDR_PD */ 32326d4baf08SMark Brown #define WM5100_ADDR_PD_MASK 0x0001 /* ADDR_PD */ 32336d4baf08SMark Brown #define WM5100_ADDR_PD_SHIFT 0 /* ADDR_PD */ 32346d4baf08SMark Brown #define WM5100_ADDR_PD_WIDTH 1 /* ADDR_PD */ 32356d4baf08SMark Brown 32366d4baf08SMark Brown /* 32376d4baf08SMark Brown * R3108 (0xC24) - Misc Pad Ctrl 2 32386d4baf08SMark Brown */ 32396d4baf08SMark Brown #define WM5100_DMICDAT4_PD 0x0008 /* DMICDAT4_PD */ 32406d4baf08SMark Brown #define WM5100_DMICDAT4_PD_MASK 0x0008 /* DMICDAT4_PD */ 32416d4baf08SMark Brown #define WM5100_DMICDAT4_PD_SHIFT 3 /* DMICDAT4_PD */ 32426d4baf08SMark Brown #define WM5100_DMICDAT4_PD_WIDTH 1 /* DMICDAT4_PD */ 32436d4baf08SMark Brown #define WM5100_DMICDAT3_PD 0x0004 /* DMICDAT3_PD */ 32446d4baf08SMark Brown #define WM5100_DMICDAT3_PD_MASK 0x0004 /* DMICDAT3_PD */ 32456d4baf08SMark Brown #define WM5100_DMICDAT3_PD_SHIFT 2 /* DMICDAT3_PD */ 32466d4baf08SMark Brown #define WM5100_DMICDAT3_PD_WIDTH 1 /* DMICDAT3_PD */ 32476d4baf08SMark Brown #define WM5100_DMICDAT2_PD 0x0002 /* DMICDAT2_PD */ 32486d4baf08SMark Brown #define WM5100_DMICDAT2_PD_MASK 0x0002 /* DMICDAT2_PD */ 32496d4baf08SMark Brown #define WM5100_DMICDAT2_PD_SHIFT 1 /* DMICDAT2_PD */ 32506d4baf08SMark Brown #define WM5100_DMICDAT2_PD_WIDTH 1 /* DMICDAT2_PD */ 32516d4baf08SMark Brown #define WM5100_DMICDAT1_PD 0x0001 /* DMICDAT1_PD */ 32526d4baf08SMark Brown #define WM5100_DMICDAT1_PD_MASK 0x0001 /* DMICDAT1_PD */ 32536d4baf08SMark Brown #define WM5100_DMICDAT1_PD_SHIFT 0 /* DMICDAT1_PD */ 32546d4baf08SMark Brown #define WM5100_DMICDAT1_PD_WIDTH 1 /* DMICDAT1_PD */ 32556d4baf08SMark Brown 32566d4baf08SMark Brown /* 32576d4baf08SMark Brown * R3109 (0xC25) - Misc Pad Ctrl 3 32586d4baf08SMark Brown */ 32596d4baf08SMark Brown #define WM5100_AIF1RXLRCLK_PU 0x0020 /* AIF1RXLRCLK_PU */ 32606d4baf08SMark Brown #define WM5100_AIF1RXLRCLK_PU_MASK 0x0020 /* AIF1RXLRCLK_PU */ 32616d4baf08SMark Brown #define WM5100_AIF1RXLRCLK_PU_SHIFT 5 /* AIF1RXLRCLK_PU */ 32626d4baf08SMark Brown #define WM5100_AIF1RXLRCLK_PU_WIDTH 1 /* AIF1RXLRCLK_PU */ 32636d4baf08SMark Brown #define WM5100_AIF1RXLRCLK_PD 0x0010 /* AIF1RXLRCLK_PD */ 32646d4baf08SMark Brown #define WM5100_AIF1RXLRCLK_PD_MASK 0x0010 /* AIF1RXLRCLK_PD */ 32656d4baf08SMark Brown #define WM5100_AIF1RXLRCLK_PD_SHIFT 4 /* AIF1RXLRCLK_PD */ 32666d4baf08SMark Brown #define WM5100_AIF1RXLRCLK_PD_WIDTH 1 /* AIF1RXLRCLK_PD */ 32676d4baf08SMark Brown #define WM5100_AIF1BCLK_PU 0x0008 /* AIF1BCLK_PU */ 32686d4baf08SMark Brown #define WM5100_AIF1BCLK_PU_MASK 0x0008 /* AIF1BCLK_PU */ 32696d4baf08SMark Brown #define WM5100_AIF1BCLK_PU_SHIFT 3 /* AIF1BCLK_PU */ 32706d4baf08SMark Brown #define WM5100_AIF1BCLK_PU_WIDTH 1 /* AIF1BCLK_PU */ 32716d4baf08SMark Brown #define WM5100_AIF1BCLK_PD 0x0004 /* AIF1BCLK_PD */ 32726d4baf08SMark Brown #define WM5100_AIF1BCLK_PD_MASK 0x0004 /* AIF1BCLK_PD */ 32736d4baf08SMark Brown #define WM5100_AIF1BCLK_PD_SHIFT 2 /* AIF1BCLK_PD */ 32746d4baf08SMark Brown #define WM5100_AIF1BCLK_PD_WIDTH 1 /* AIF1BCLK_PD */ 32756d4baf08SMark Brown #define WM5100_AIF1RXDAT_PU 0x0002 /* AIF1RXDAT_PU */ 32766d4baf08SMark Brown #define WM5100_AIF1RXDAT_PU_MASK 0x0002 /* AIF1RXDAT_PU */ 32776d4baf08SMark Brown #define WM5100_AIF1RXDAT_PU_SHIFT 1 /* AIF1RXDAT_PU */ 32786d4baf08SMark Brown #define WM5100_AIF1RXDAT_PU_WIDTH 1 /* AIF1RXDAT_PU */ 32796d4baf08SMark Brown #define WM5100_AIF1RXDAT_PD 0x0001 /* AIF1RXDAT_PD */ 32806d4baf08SMark Brown #define WM5100_AIF1RXDAT_PD_MASK 0x0001 /* AIF1RXDAT_PD */ 32816d4baf08SMark Brown #define WM5100_AIF1RXDAT_PD_SHIFT 0 /* AIF1RXDAT_PD */ 32826d4baf08SMark Brown #define WM5100_AIF1RXDAT_PD_WIDTH 1 /* AIF1RXDAT_PD */ 32836d4baf08SMark Brown 32846d4baf08SMark Brown /* 32856d4baf08SMark Brown * R3110 (0xC26) - Misc Pad Ctrl 4 32866d4baf08SMark Brown */ 32876d4baf08SMark Brown #define WM5100_AIF2RXLRCLK_PU 0x0020 /* AIF2RXLRCLK_PU */ 32886d4baf08SMark Brown #define WM5100_AIF2RXLRCLK_PU_MASK 0x0020 /* AIF2RXLRCLK_PU */ 32896d4baf08SMark Brown #define WM5100_AIF2RXLRCLK_PU_SHIFT 5 /* AIF2RXLRCLK_PU */ 32906d4baf08SMark Brown #define WM5100_AIF2RXLRCLK_PU_WIDTH 1 /* AIF2RXLRCLK_PU */ 32916d4baf08SMark Brown #define WM5100_AIF2RXLRCLK_PD 0x0010 /* AIF2RXLRCLK_PD */ 32926d4baf08SMark Brown #define WM5100_AIF2RXLRCLK_PD_MASK 0x0010 /* AIF2RXLRCLK_PD */ 32936d4baf08SMark Brown #define WM5100_AIF2RXLRCLK_PD_SHIFT 4 /* AIF2RXLRCLK_PD */ 32946d4baf08SMark Brown #define WM5100_AIF2RXLRCLK_PD_WIDTH 1 /* AIF2RXLRCLK_PD */ 32956d4baf08SMark Brown #define WM5100_AIF2BCLK_PU 0x0008 /* AIF2BCLK_PU */ 32966d4baf08SMark Brown #define WM5100_AIF2BCLK_PU_MASK 0x0008 /* AIF2BCLK_PU */ 32976d4baf08SMark Brown #define WM5100_AIF2BCLK_PU_SHIFT 3 /* AIF2BCLK_PU */ 32986d4baf08SMark Brown #define WM5100_AIF2BCLK_PU_WIDTH 1 /* AIF2BCLK_PU */ 32996d4baf08SMark Brown #define WM5100_AIF2BCLK_PD 0x0004 /* AIF2BCLK_PD */ 33006d4baf08SMark Brown #define WM5100_AIF2BCLK_PD_MASK 0x0004 /* AIF2BCLK_PD */ 33016d4baf08SMark Brown #define WM5100_AIF2BCLK_PD_SHIFT 2 /* AIF2BCLK_PD */ 33026d4baf08SMark Brown #define WM5100_AIF2BCLK_PD_WIDTH 1 /* AIF2BCLK_PD */ 33036d4baf08SMark Brown #define WM5100_AIF2RXDAT_PU 0x0002 /* AIF2RXDAT_PU */ 33046d4baf08SMark Brown #define WM5100_AIF2RXDAT_PU_MASK 0x0002 /* AIF2RXDAT_PU */ 33056d4baf08SMark Brown #define WM5100_AIF2RXDAT_PU_SHIFT 1 /* AIF2RXDAT_PU */ 33066d4baf08SMark Brown #define WM5100_AIF2RXDAT_PU_WIDTH 1 /* AIF2RXDAT_PU */ 33076d4baf08SMark Brown #define WM5100_AIF2RXDAT_PD 0x0001 /* AIF2RXDAT_PD */ 33086d4baf08SMark Brown #define WM5100_AIF2RXDAT_PD_MASK 0x0001 /* AIF2RXDAT_PD */ 33096d4baf08SMark Brown #define WM5100_AIF2RXDAT_PD_SHIFT 0 /* AIF2RXDAT_PD */ 33106d4baf08SMark Brown #define WM5100_AIF2RXDAT_PD_WIDTH 1 /* AIF2RXDAT_PD */ 33116d4baf08SMark Brown 33126d4baf08SMark Brown /* 33136d4baf08SMark Brown * R3111 (0xC27) - Misc Pad Ctrl 5 33146d4baf08SMark Brown */ 33156d4baf08SMark Brown #define WM5100_AIF3RXLRCLK_PU 0x0020 /* AIF3RXLRCLK_PU */ 33166d4baf08SMark Brown #define WM5100_AIF3RXLRCLK_PU_MASK 0x0020 /* AIF3RXLRCLK_PU */ 33176d4baf08SMark Brown #define WM5100_AIF3RXLRCLK_PU_SHIFT 5 /* AIF3RXLRCLK_PU */ 33186d4baf08SMark Brown #define WM5100_AIF3RXLRCLK_PU_WIDTH 1 /* AIF3RXLRCLK_PU */ 33196d4baf08SMark Brown #define WM5100_AIF3RXLRCLK_PD 0x0010 /* AIF3RXLRCLK_PD */ 33206d4baf08SMark Brown #define WM5100_AIF3RXLRCLK_PD_MASK 0x0010 /* AIF3RXLRCLK_PD */ 33216d4baf08SMark Brown #define WM5100_AIF3RXLRCLK_PD_SHIFT 4 /* AIF3RXLRCLK_PD */ 33226d4baf08SMark Brown #define WM5100_AIF3RXLRCLK_PD_WIDTH 1 /* AIF3RXLRCLK_PD */ 33236d4baf08SMark Brown #define WM5100_AIF3BCLK_PU 0x0008 /* AIF3BCLK_PU */ 33246d4baf08SMark Brown #define WM5100_AIF3BCLK_PU_MASK 0x0008 /* AIF3BCLK_PU */ 33256d4baf08SMark Brown #define WM5100_AIF3BCLK_PU_SHIFT 3 /* AIF3BCLK_PU */ 33266d4baf08SMark Brown #define WM5100_AIF3BCLK_PU_WIDTH 1 /* AIF3BCLK_PU */ 33276d4baf08SMark Brown #define WM5100_AIF3BCLK_PD 0x0004 /* AIF3BCLK_PD */ 33286d4baf08SMark Brown #define WM5100_AIF3BCLK_PD_MASK 0x0004 /* AIF3BCLK_PD */ 33296d4baf08SMark Brown #define WM5100_AIF3BCLK_PD_SHIFT 2 /* AIF3BCLK_PD */ 33306d4baf08SMark Brown #define WM5100_AIF3BCLK_PD_WIDTH 1 /* AIF3BCLK_PD */ 33316d4baf08SMark Brown #define WM5100_AIF3RXDAT_PU 0x0002 /* AIF3RXDAT_PU */ 33326d4baf08SMark Brown #define WM5100_AIF3RXDAT_PU_MASK 0x0002 /* AIF3RXDAT_PU */ 33336d4baf08SMark Brown #define WM5100_AIF3RXDAT_PU_SHIFT 1 /* AIF3RXDAT_PU */ 33346d4baf08SMark Brown #define WM5100_AIF3RXDAT_PU_WIDTH 1 /* AIF3RXDAT_PU */ 33356d4baf08SMark Brown #define WM5100_AIF3RXDAT_PD 0x0001 /* AIF3RXDAT_PD */ 33366d4baf08SMark Brown #define WM5100_AIF3RXDAT_PD_MASK 0x0001 /* AIF3RXDAT_PD */ 33376d4baf08SMark Brown #define WM5100_AIF3RXDAT_PD_SHIFT 0 /* AIF3RXDAT_PD */ 33386d4baf08SMark Brown #define WM5100_AIF3RXDAT_PD_WIDTH 1 /* AIF3RXDAT_PD */ 33396d4baf08SMark Brown 33406d4baf08SMark Brown /* 33416d4baf08SMark Brown * R3112 (0xC28) - Misc GPIO 1 33426d4baf08SMark Brown */ 33436d4baf08SMark Brown #define WM5100_OPCLK_SEL_MASK 0x0003 /* OPCLK_SEL - [1:0] */ 33446d4baf08SMark Brown #define WM5100_OPCLK_SEL_SHIFT 0 /* OPCLK_SEL - [1:0] */ 33456d4baf08SMark Brown #define WM5100_OPCLK_SEL_WIDTH 2 /* OPCLK_SEL - [1:0] */ 33466d4baf08SMark Brown 33476d4baf08SMark Brown /* 33486d4baf08SMark Brown * R3328 (0xD00) - Interrupt Status 1 33496d4baf08SMark Brown */ 33506d4baf08SMark Brown #define WM5100_GP6_EINT 0x0020 /* GP6_EINT */ 33516d4baf08SMark Brown #define WM5100_GP6_EINT_MASK 0x0020 /* GP6_EINT */ 33526d4baf08SMark Brown #define WM5100_GP6_EINT_SHIFT 5 /* GP6_EINT */ 33536d4baf08SMark Brown #define WM5100_GP6_EINT_WIDTH 1 /* GP6_EINT */ 33546d4baf08SMark Brown #define WM5100_GP5_EINT 0x0010 /* GP5_EINT */ 33556d4baf08SMark Brown #define WM5100_GP5_EINT_MASK 0x0010 /* GP5_EINT */ 33566d4baf08SMark Brown #define WM5100_GP5_EINT_SHIFT 4 /* GP5_EINT */ 33576d4baf08SMark Brown #define WM5100_GP5_EINT_WIDTH 1 /* GP5_EINT */ 33586d4baf08SMark Brown #define WM5100_GP4_EINT 0x0008 /* GP4_EINT */ 33596d4baf08SMark Brown #define WM5100_GP4_EINT_MASK 0x0008 /* GP4_EINT */ 33606d4baf08SMark Brown #define WM5100_GP4_EINT_SHIFT 3 /* GP4_EINT */ 33616d4baf08SMark Brown #define WM5100_GP4_EINT_WIDTH 1 /* GP4_EINT */ 33626d4baf08SMark Brown #define WM5100_GP3_EINT 0x0004 /* GP3_EINT */ 33636d4baf08SMark Brown #define WM5100_GP3_EINT_MASK 0x0004 /* GP3_EINT */ 33646d4baf08SMark Brown #define WM5100_GP3_EINT_SHIFT 2 /* GP3_EINT */ 33656d4baf08SMark Brown #define WM5100_GP3_EINT_WIDTH 1 /* GP3_EINT */ 33666d4baf08SMark Brown #define WM5100_GP2_EINT 0x0002 /* GP2_EINT */ 33676d4baf08SMark Brown #define WM5100_GP2_EINT_MASK 0x0002 /* GP2_EINT */ 33686d4baf08SMark Brown #define WM5100_GP2_EINT_SHIFT 1 /* GP2_EINT */ 33696d4baf08SMark Brown #define WM5100_GP2_EINT_WIDTH 1 /* GP2_EINT */ 33706d4baf08SMark Brown #define WM5100_GP1_EINT 0x0001 /* GP1_EINT */ 33716d4baf08SMark Brown #define WM5100_GP1_EINT_MASK 0x0001 /* GP1_EINT */ 33726d4baf08SMark Brown #define WM5100_GP1_EINT_SHIFT 0 /* GP1_EINT */ 33736d4baf08SMark Brown #define WM5100_GP1_EINT_WIDTH 1 /* GP1_EINT */ 33746d4baf08SMark Brown 33756d4baf08SMark Brown /* 33766d4baf08SMark Brown * R3329 (0xD01) - Interrupt Status 2 33776d4baf08SMark Brown */ 33786d4baf08SMark Brown #define WM5100_DSP_IRQ6_EINT 0x0020 /* DSP_IRQ6_EINT */ 33796d4baf08SMark Brown #define WM5100_DSP_IRQ6_EINT_MASK 0x0020 /* DSP_IRQ6_EINT */ 33806d4baf08SMark Brown #define WM5100_DSP_IRQ6_EINT_SHIFT 5 /* DSP_IRQ6_EINT */ 33816d4baf08SMark Brown #define WM5100_DSP_IRQ6_EINT_WIDTH 1 /* DSP_IRQ6_EINT */ 33826d4baf08SMark Brown #define WM5100_DSP_IRQ5_EINT 0x0010 /* DSP_IRQ5_EINT */ 33836d4baf08SMark Brown #define WM5100_DSP_IRQ5_EINT_MASK 0x0010 /* DSP_IRQ5_EINT */ 33846d4baf08SMark Brown #define WM5100_DSP_IRQ5_EINT_SHIFT 4 /* DSP_IRQ5_EINT */ 33856d4baf08SMark Brown #define WM5100_DSP_IRQ5_EINT_WIDTH 1 /* DSP_IRQ5_EINT */ 33866d4baf08SMark Brown #define WM5100_DSP_IRQ4_EINT 0x0008 /* DSP_IRQ4_EINT */ 33876d4baf08SMark Brown #define WM5100_DSP_IRQ4_EINT_MASK 0x0008 /* DSP_IRQ4_EINT */ 33886d4baf08SMark Brown #define WM5100_DSP_IRQ4_EINT_SHIFT 3 /* DSP_IRQ4_EINT */ 33896d4baf08SMark Brown #define WM5100_DSP_IRQ4_EINT_WIDTH 1 /* DSP_IRQ4_EINT */ 33906d4baf08SMark Brown #define WM5100_DSP_IRQ3_EINT 0x0004 /* DSP_IRQ3_EINT */ 33916d4baf08SMark Brown #define WM5100_DSP_IRQ3_EINT_MASK 0x0004 /* DSP_IRQ3_EINT */ 33926d4baf08SMark Brown #define WM5100_DSP_IRQ3_EINT_SHIFT 2 /* DSP_IRQ3_EINT */ 33936d4baf08SMark Brown #define WM5100_DSP_IRQ3_EINT_WIDTH 1 /* DSP_IRQ3_EINT */ 33946d4baf08SMark Brown #define WM5100_DSP_IRQ2_EINT 0x0002 /* DSP_IRQ2_EINT */ 33956d4baf08SMark Brown #define WM5100_DSP_IRQ2_EINT_MASK 0x0002 /* DSP_IRQ2_EINT */ 33966d4baf08SMark Brown #define WM5100_DSP_IRQ2_EINT_SHIFT 1 /* DSP_IRQ2_EINT */ 33976d4baf08SMark Brown #define WM5100_DSP_IRQ2_EINT_WIDTH 1 /* DSP_IRQ2_EINT */ 33986d4baf08SMark Brown #define WM5100_DSP_IRQ1_EINT 0x0001 /* DSP_IRQ1_EINT */ 33996d4baf08SMark Brown #define WM5100_DSP_IRQ1_EINT_MASK 0x0001 /* DSP_IRQ1_EINT */ 34006d4baf08SMark Brown #define WM5100_DSP_IRQ1_EINT_SHIFT 0 /* DSP_IRQ1_EINT */ 34016d4baf08SMark Brown #define WM5100_DSP_IRQ1_EINT_WIDTH 1 /* DSP_IRQ1_EINT */ 34026d4baf08SMark Brown 34036d4baf08SMark Brown /* 34046d4baf08SMark Brown * R3330 (0xD02) - Interrupt Status 3 34056d4baf08SMark Brown */ 34066d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_EINT 0x8000 /* SPK_SHUTDOWN_WARN_EINT */ 34076d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_EINT_MASK 0x8000 /* SPK_SHUTDOWN_WARN_EINT */ 34086d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_EINT_SHIFT 15 /* SPK_SHUTDOWN_WARN_EINT */ 34096d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_EINT_WIDTH 1 /* SPK_SHUTDOWN_WARN_EINT */ 34106d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_EINT 0x4000 /* SPK_SHUTDOWN_EINT */ 34116d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_EINT_MASK 0x4000 /* SPK_SHUTDOWN_EINT */ 34126d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_EINT_SHIFT 14 /* SPK_SHUTDOWN_EINT */ 34136d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_EINT_WIDTH 1 /* SPK_SHUTDOWN_EINT */ 34146d4baf08SMark Brown #define WM5100_HPDET_EINT 0x2000 /* HPDET_EINT */ 34156d4baf08SMark Brown #define WM5100_HPDET_EINT_MASK 0x2000 /* HPDET_EINT */ 34166d4baf08SMark Brown #define WM5100_HPDET_EINT_SHIFT 13 /* HPDET_EINT */ 34176d4baf08SMark Brown #define WM5100_HPDET_EINT_WIDTH 1 /* HPDET_EINT */ 34186d4baf08SMark Brown #define WM5100_ACCDET_EINT 0x1000 /* ACCDET_EINT */ 34196d4baf08SMark Brown #define WM5100_ACCDET_EINT_MASK 0x1000 /* ACCDET_EINT */ 34206d4baf08SMark Brown #define WM5100_ACCDET_EINT_SHIFT 12 /* ACCDET_EINT */ 34216d4baf08SMark Brown #define WM5100_ACCDET_EINT_WIDTH 1 /* ACCDET_EINT */ 34226d4baf08SMark Brown #define WM5100_DRC_SIG_DET_EINT 0x0200 /* DRC_SIG_DET_EINT */ 34236d4baf08SMark Brown #define WM5100_DRC_SIG_DET_EINT_MASK 0x0200 /* DRC_SIG_DET_EINT */ 34246d4baf08SMark Brown #define WM5100_DRC_SIG_DET_EINT_SHIFT 9 /* DRC_SIG_DET_EINT */ 34256d4baf08SMark Brown #define WM5100_DRC_SIG_DET_EINT_WIDTH 1 /* DRC_SIG_DET_EINT */ 34266d4baf08SMark Brown #define WM5100_ASRC2_LOCK_EINT 0x0100 /* ASRC2_LOCK_EINT */ 34276d4baf08SMark Brown #define WM5100_ASRC2_LOCK_EINT_MASK 0x0100 /* ASRC2_LOCK_EINT */ 34286d4baf08SMark Brown #define WM5100_ASRC2_LOCK_EINT_SHIFT 8 /* ASRC2_LOCK_EINT */ 34296d4baf08SMark Brown #define WM5100_ASRC2_LOCK_EINT_WIDTH 1 /* ASRC2_LOCK_EINT */ 34306d4baf08SMark Brown #define WM5100_ASRC1_LOCK_EINT 0x0080 /* ASRC1_LOCK_EINT */ 34316d4baf08SMark Brown #define WM5100_ASRC1_LOCK_EINT_MASK 0x0080 /* ASRC1_LOCK_EINT */ 34326d4baf08SMark Brown #define WM5100_ASRC1_LOCK_EINT_SHIFT 7 /* ASRC1_LOCK_EINT */ 34336d4baf08SMark Brown #define WM5100_ASRC1_LOCK_EINT_WIDTH 1 /* ASRC1_LOCK_EINT */ 34346d4baf08SMark Brown #define WM5100_FLL2_LOCK_EINT 0x0008 /* FLL2_LOCK_EINT */ 34356d4baf08SMark Brown #define WM5100_FLL2_LOCK_EINT_MASK 0x0008 /* FLL2_LOCK_EINT */ 34366d4baf08SMark Brown #define WM5100_FLL2_LOCK_EINT_SHIFT 3 /* FLL2_LOCK_EINT */ 34376d4baf08SMark Brown #define WM5100_FLL2_LOCK_EINT_WIDTH 1 /* FLL2_LOCK_EINT */ 34386d4baf08SMark Brown #define WM5100_FLL1_LOCK_EINT 0x0004 /* FLL1_LOCK_EINT */ 34396d4baf08SMark Brown #define WM5100_FLL1_LOCK_EINT_MASK 0x0004 /* FLL1_LOCK_EINT */ 34406d4baf08SMark Brown #define WM5100_FLL1_LOCK_EINT_SHIFT 2 /* FLL1_LOCK_EINT */ 34416d4baf08SMark Brown #define WM5100_FLL1_LOCK_EINT_WIDTH 1 /* FLL1_LOCK_EINT */ 34426d4baf08SMark Brown #define WM5100_CLKGEN_ERR_EINT 0x0002 /* CLKGEN_ERR_EINT */ 34436d4baf08SMark Brown #define WM5100_CLKGEN_ERR_EINT_MASK 0x0002 /* CLKGEN_ERR_EINT */ 34446d4baf08SMark Brown #define WM5100_CLKGEN_ERR_EINT_SHIFT 1 /* CLKGEN_ERR_EINT */ 34456d4baf08SMark Brown #define WM5100_CLKGEN_ERR_EINT_WIDTH 1 /* CLKGEN_ERR_EINT */ 34466d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_EINT 0x0001 /* CLKGEN_ERR_ASYNC_EINT */ 34476d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_EINT_MASK 0x0001 /* CLKGEN_ERR_ASYNC_EINT */ 34486d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_EINT_SHIFT 0 /* CLKGEN_ERR_ASYNC_EINT */ 34496d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_EINT_WIDTH 1 /* CLKGEN_ERR_ASYNC_EINT */ 34506d4baf08SMark Brown 34516d4baf08SMark Brown /* 34526d4baf08SMark Brown * R3331 (0xD03) - Interrupt Status 4 34536d4baf08SMark Brown */ 34546d4baf08SMark Brown #define WM5100_AIF3_ERR_EINT 0x2000 /* AIF3_ERR_EINT */ 34556d4baf08SMark Brown #define WM5100_AIF3_ERR_EINT_MASK 0x2000 /* AIF3_ERR_EINT */ 34566d4baf08SMark Brown #define WM5100_AIF3_ERR_EINT_SHIFT 13 /* AIF3_ERR_EINT */ 34576d4baf08SMark Brown #define WM5100_AIF3_ERR_EINT_WIDTH 1 /* AIF3_ERR_EINT */ 34586d4baf08SMark Brown #define WM5100_AIF2_ERR_EINT 0x1000 /* AIF2_ERR_EINT */ 34596d4baf08SMark Brown #define WM5100_AIF2_ERR_EINT_MASK 0x1000 /* AIF2_ERR_EINT */ 34606d4baf08SMark Brown #define WM5100_AIF2_ERR_EINT_SHIFT 12 /* AIF2_ERR_EINT */ 34616d4baf08SMark Brown #define WM5100_AIF2_ERR_EINT_WIDTH 1 /* AIF2_ERR_EINT */ 34626d4baf08SMark Brown #define WM5100_AIF1_ERR_EINT 0x0800 /* AIF1_ERR_EINT */ 34636d4baf08SMark Brown #define WM5100_AIF1_ERR_EINT_MASK 0x0800 /* AIF1_ERR_EINT */ 34646d4baf08SMark Brown #define WM5100_AIF1_ERR_EINT_SHIFT 11 /* AIF1_ERR_EINT */ 34656d4baf08SMark Brown #define WM5100_AIF1_ERR_EINT_WIDTH 1 /* AIF1_ERR_EINT */ 34666d4baf08SMark Brown #define WM5100_CTRLIF_ERR_EINT 0x0400 /* CTRLIF_ERR_EINT */ 34676d4baf08SMark Brown #define WM5100_CTRLIF_ERR_EINT_MASK 0x0400 /* CTRLIF_ERR_EINT */ 34686d4baf08SMark Brown #define WM5100_CTRLIF_ERR_EINT_SHIFT 10 /* CTRLIF_ERR_EINT */ 34696d4baf08SMark Brown #define WM5100_CTRLIF_ERR_EINT_WIDTH 1 /* CTRLIF_ERR_EINT */ 34706d4baf08SMark Brown #define WM5100_ISRC2_UNDERCLOCKED_EINT 0x0200 /* ISRC2_UNDERCLOCKED_EINT */ 34716d4baf08SMark Brown #define WM5100_ISRC2_UNDERCLOCKED_EINT_MASK 0x0200 /* ISRC2_UNDERCLOCKED_EINT */ 34726d4baf08SMark Brown #define WM5100_ISRC2_UNDERCLOCKED_EINT_SHIFT 9 /* ISRC2_UNDERCLOCKED_EINT */ 34736d4baf08SMark Brown #define WM5100_ISRC2_UNDERCLOCKED_EINT_WIDTH 1 /* ISRC2_UNDERCLOCKED_EINT */ 34746d4baf08SMark Brown #define WM5100_ISRC1_UNDERCLOCKED_EINT 0x0100 /* ISRC1_UNDERCLOCKED_EINT */ 34756d4baf08SMark Brown #define WM5100_ISRC1_UNDERCLOCKED_EINT_MASK 0x0100 /* ISRC1_UNDERCLOCKED_EINT */ 34766d4baf08SMark Brown #define WM5100_ISRC1_UNDERCLOCKED_EINT_SHIFT 8 /* ISRC1_UNDERCLOCKED_EINT */ 34776d4baf08SMark Brown #define WM5100_ISRC1_UNDERCLOCKED_EINT_WIDTH 1 /* ISRC1_UNDERCLOCKED_EINT */ 34786d4baf08SMark Brown #define WM5100_FX_UNDERCLOCKED_EINT 0x0080 /* FX_UNDERCLOCKED_EINT */ 34796d4baf08SMark Brown #define WM5100_FX_UNDERCLOCKED_EINT_MASK 0x0080 /* FX_UNDERCLOCKED_EINT */ 34806d4baf08SMark Brown #define WM5100_FX_UNDERCLOCKED_EINT_SHIFT 7 /* FX_UNDERCLOCKED_EINT */ 34816d4baf08SMark Brown #define WM5100_FX_UNDERCLOCKED_EINT_WIDTH 1 /* FX_UNDERCLOCKED_EINT */ 34826d4baf08SMark Brown #define WM5100_AIF3_UNDERCLOCKED_EINT 0x0040 /* AIF3_UNDERCLOCKED_EINT */ 34836d4baf08SMark Brown #define WM5100_AIF3_UNDERCLOCKED_EINT_MASK 0x0040 /* AIF3_UNDERCLOCKED_EINT */ 34846d4baf08SMark Brown #define WM5100_AIF3_UNDERCLOCKED_EINT_SHIFT 6 /* AIF3_UNDERCLOCKED_EINT */ 34856d4baf08SMark Brown #define WM5100_AIF3_UNDERCLOCKED_EINT_WIDTH 1 /* AIF3_UNDERCLOCKED_EINT */ 34866d4baf08SMark Brown #define WM5100_AIF2_UNDERCLOCKED_EINT 0x0020 /* AIF2_UNDERCLOCKED_EINT */ 34876d4baf08SMark Brown #define WM5100_AIF2_UNDERCLOCKED_EINT_MASK 0x0020 /* AIF2_UNDERCLOCKED_EINT */ 34886d4baf08SMark Brown #define WM5100_AIF2_UNDERCLOCKED_EINT_SHIFT 5 /* AIF2_UNDERCLOCKED_EINT */ 34896d4baf08SMark Brown #define WM5100_AIF2_UNDERCLOCKED_EINT_WIDTH 1 /* AIF2_UNDERCLOCKED_EINT */ 34906d4baf08SMark Brown #define WM5100_AIF1_UNDERCLOCKED_EINT 0x0010 /* AIF1_UNDERCLOCKED_EINT */ 34916d4baf08SMark Brown #define WM5100_AIF1_UNDERCLOCKED_EINT_MASK 0x0010 /* AIF1_UNDERCLOCKED_EINT */ 34926d4baf08SMark Brown #define WM5100_AIF1_UNDERCLOCKED_EINT_SHIFT 4 /* AIF1_UNDERCLOCKED_EINT */ 34936d4baf08SMark Brown #define WM5100_AIF1_UNDERCLOCKED_EINT_WIDTH 1 /* AIF1_UNDERCLOCKED_EINT */ 34946d4baf08SMark Brown #define WM5100_ASRC_UNDERCLOCKED_EINT 0x0008 /* ASRC_UNDERCLOCKED_EINT */ 34956d4baf08SMark Brown #define WM5100_ASRC_UNDERCLOCKED_EINT_MASK 0x0008 /* ASRC_UNDERCLOCKED_EINT */ 34966d4baf08SMark Brown #define WM5100_ASRC_UNDERCLOCKED_EINT_SHIFT 3 /* ASRC_UNDERCLOCKED_EINT */ 34976d4baf08SMark Brown #define WM5100_ASRC_UNDERCLOCKED_EINT_WIDTH 1 /* ASRC_UNDERCLOCKED_EINT */ 34986d4baf08SMark Brown #define WM5100_DAC_UNDERCLOCKED_EINT 0x0004 /* DAC_UNDERCLOCKED_EINT */ 34996d4baf08SMark Brown #define WM5100_DAC_UNDERCLOCKED_EINT_MASK 0x0004 /* DAC_UNDERCLOCKED_EINT */ 35006d4baf08SMark Brown #define WM5100_DAC_UNDERCLOCKED_EINT_SHIFT 2 /* DAC_UNDERCLOCKED_EINT */ 35016d4baf08SMark Brown #define WM5100_DAC_UNDERCLOCKED_EINT_WIDTH 1 /* DAC_UNDERCLOCKED_EINT */ 35026d4baf08SMark Brown #define WM5100_ADC_UNDERCLOCKED_EINT 0x0002 /* ADC_UNDERCLOCKED_EINT */ 35036d4baf08SMark Brown #define WM5100_ADC_UNDERCLOCKED_EINT_MASK 0x0002 /* ADC_UNDERCLOCKED_EINT */ 35046d4baf08SMark Brown #define WM5100_ADC_UNDERCLOCKED_EINT_SHIFT 1 /* ADC_UNDERCLOCKED_EINT */ 35056d4baf08SMark Brown #define WM5100_ADC_UNDERCLOCKED_EINT_WIDTH 1 /* ADC_UNDERCLOCKED_EINT */ 35066d4baf08SMark Brown #define WM5100_MIXER_UNDERCLOCKED_EINT 0x0001 /* MIXER_UNDERCLOCKED_EINT */ 35076d4baf08SMark Brown #define WM5100_MIXER_UNDERCLOCKED_EINT_MASK 0x0001 /* MIXER_UNDERCLOCKED_EINT */ 35086d4baf08SMark Brown #define WM5100_MIXER_UNDERCLOCKED_EINT_SHIFT 0 /* MIXER_UNDERCLOCKED_EINT */ 35096d4baf08SMark Brown #define WM5100_MIXER_UNDERCLOCKED_EINT_WIDTH 1 /* MIXER_UNDERCLOCKED_EINT */ 35106d4baf08SMark Brown 35116d4baf08SMark Brown /* 35126d4baf08SMark Brown * R3332 (0xD04) - Interrupt Raw Status 2 35136d4baf08SMark Brown */ 35146d4baf08SMark Brown #define WM5100_DSP_IRQ6_STS 0x0020 /* DSP_IRQ6_STS */ 35156d4baf08SMark Brown #define WM5100_DSP_IRQ6_STS_MASK 0x0020 /* DSP_IRQ6_STS */ 35166d4baf08SMark Brown #define WM5100_DSP_IRQ6_STS_SHIFT 5 /* DSP_IRQ6_STS */ 35176d4baf08SMark Brown #define WM5100_DSP_IRQ6_STS_WIDTH 1 /* DSP_IRQ6_STS */ 35186d4baf08SMark Brown #define WM5100_DSP_IRQ5_STS 0x0010 /* DSP_IRQ5_STS */ 35196d4baf08SMark Brown #define WM5100_DSP_IRQ5_STS_MASK 0x0010 /* DSP_IRQ5_STS */ 35206d4baf08SMark Brown #define WM5100_DSP_IRQ5_STS_SHIFT 4 /* DSP_IRQ5_STS */ 35216d4baf08SMark Brown #define WM5100_DSP_IRQ5_STS_WIDTH 1 /* DSP_IRQ5_STS */ 35226d4baf08SMark Brown #define WM5100_DSP_IRQ4_STS 0x0008 /* DSP_IRQ4_STS */ 35236d4baf08SMark Brown #define WM5100_DSP_IRQ4_STS_MASK 0x0008 /* DSP_IRQ4_STS */ 35246d4baf08SMark Brown #define WM5100_DSP_IRQ4_STS_SHIFT 3 /* DSP_IRQ4_STS */ 35256d4baf08SMark Brown #define WM5100_DSP_IRQ4_STS_WIDTH 1 /* DSP_IRQ4_STS */ 35266d4baf08SMark Brown #define WM5100_DSP_IRQ3_STS 0x0004 /* DSP_IRQ3_STS */ 35276d4baf08SMark Brown #define WM5100_DSP_IRQ3_STS_MASK 0x0004 /* DSP_IRQ3_STS */ 35286d4baf08SMark Brown #define WM5100_DSP_IRQ3_STS_SHIFT 2 /* DSP_IRQ3_STS */ 35296d4baf08SMark Brown #define WM5100_DSP_IRQ3_STS_WIDTH 1 /* DSP_IRQ3_STS */ 35306d4baf08SMark Brown #define WM5100_DSP_IRQ2_STS 0x0002 /* DSP_IRQ2_STS */ 35316d4baf08SMark Brown #define WM5100_DSP_IRQ2_STS_MASK 0x0002 /* DSP_IRQ2_STS */ 35326d4baf08SMark Brown #define WM5100_DSP_IRQ2_STS_SHIFT 1 /* DSP_IRQ2_STS */ 35336d4baf08SMark Brown #define WM5100_DSP_IRQ2_STS_WIDTH 1 /* DSP_IRQ2_STS */ 35346d4baf08SMark Brown #define WM5100_DSP_IRQ1_STS 0x0001 /* DSP_IRQ1_STS */ 35356d4baf08SMark Brown #define WM5100_DSP_IRQ1_STS_MASK 0x0001 /* DSP_IRQ1_STS */ 35366d4baf08SMark Brown #define WM5100_DSP_IRQ1_STS_SHIFT 0 /* DSP_IRQ1_STS */ 35376d4baf08SMark Brown #define WM5100_DSP_IRQ1_STS_WIDTH 1 /* DSP_IRQ1_STS */ 35386d4baf08SMark Brown 35396d4baf08SMark Brown /* 35406d4baf08SMark Brown * R3333 (0xD05) - Interrupt Raw Status 3 35416d4baf08SMark Brown */ 35426d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_STS 0x8000 /* SPK_SHUTDOWN_WARN_STS */ 35436d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_STS_MASK 0x8000 /* SPK_SHUTDOWN_WARN_STS */ 35446d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_STS_SHIFT 15 /* SPK_SHUTDOWN_WARN_STS */ 35456d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_STS_WIDTH 1 /* SPK_SHUTDOWN_WARN_STS */ 35466d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_STS 0x4000 /* SPK_SHUTDOWN_STS */ 35476d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_STS_MASK 0x4000 /* SPK_SHUTDOWN_STS */ 35486d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_STS_SHIFT 14 /* SPK_SHUTDOWN_STS */ 35496d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_STS_WIDTH 1 /* SPK_SHUTDOWN_STS */ 35506d4baf08SMark Brown #define WM5100_HPDET_STS 0x2000 /* HPDET_STS */ 35516d4baf08SMark Brown #define WM5100_HPDET_STS_MASK 0x2000 /* HPDET_STS */ 35526d4baf08SMark Brown #define WM5100_HPDET_STS_SHIFT 13 /* HPDET_STS */ 35536d4baf08SMark Brown #define WM5100_HPDET_STS_WIDTH 1 /* HPDET_STS */ 35546d4baf08SMark Brown #define WM5100_DRC_SID_DET_STS 0x0200 /* DRC_SID_DET_STS */ 35556d4baf08SMark Brown #define WM5100_DRC_SID_DET_STS_MASK 0x0200 /* DRC_SID_DET_STS */ 35566d4baf08SMark Brown #define WM5100_DRC_SID_DET_STS_SHIFT 9 /* DRC_SID_DET_STS */ 35576d4baf08SMark Brown #define WM5100_DRC_SID_DET_STS_WIDTH 1 /* DRC_SID_DET_STS */ 35586d4baf08SMark Brown #define WM5100_ASRC2_LOCK_STS 0x0100 /* ASRC2_LOCK_STS */ 35596d4baf08SMark Brown #define WM5100_ASRC2_LOCK_STS_MASK 0x0100 /* ASRC2_LOCK_STS */ 35606d4baf08SMark Brown #define WM5100_ASRC2_LOCK_STS_SHIFT 8 /* ASRC2_LOCK_STS */ 35616d4baf08SMark Brown #define WM5100_ASRC2_LOCK_STS_WIDTH 1 /* ASRC2_LOCK_STS */ 35626d4baf08SMark Brown #define WM5100_ASRC1_LOCK_STS 0x0080 /* ASRC1_LOCK_STS */ 35636d4baf08SMark Brown #define WM5100_ASRC1_LOCK_STS_MASK 0x0080 /* ASRC1_LOCK_STS */ 35646d4baf08SMark Brown #define WM5100_ASRC1_LOCK_STS_SHIFT 7 /* ASRC1_LOCK_STS */ 35656d4baf08SMark Brown #define WM5100_ASRC1_LOCK_STS_WIDTH 1 /* ASRC1_LOCK_STS */ 35666d4baf08SMark Brown #define WM5100_FLL2_LOCK_STS 0x0008 /* FLL2_LOCK_STS */ 35676d4baf08SMark Brown #define WM5100_FLL2_LOCK_STS_MASK 0x0008 /* FLL2_LOCK_STS */ 35686d4baf08SMark Brown #define WM5100_FLL2_LOCK_STS_SHIFT 3 /* FLL2_LOCK_STS */ 35696d4baf08SMark Brown #define WM5100_FLL2_LOCK_STS_WIDTH 1 /* FLL2_LOCK_STS */ 35706d4baf08SMark Brown #define WM5100_FLL1_LOCK_STS 0x0004 /* FLL1_LOCK_STS */ 35716d4baf08SMark Brown #define WM5100_FLL1_LOCK_STS_MASK 0x0004 /* FLL1_LOCK_STS */ 35726d4baf08SMark Brown #define WM5100_FLL1_LOCK_STS_SHIFT 2 /* FLL1_LOCK_STS */ 35736d4baf08SMark Brown #define WM5100_FLL1_LOCK_STS_WIDTH 1 /* FLL1_LOCK_STS */ 35746d4baf08SMark Brown #define WM5100_CLKGEN_ERR_STS 0x0002 /* CLKGEN_ERR_STS */ 35756d4baf08SMark Brown #define WM5100_CLKGEN_ERR_STS_MASK 0x0002 /* CLKGEN_ERR_STS */ 35766d4baf08SMark Brown #define WM5100_CLKGEN_ERR_STS_SHIFT 1 /* CLKGEN_ERR_STS */ 35776d4baf08SMark Brown #define WM5100_CLKGEN_ERR_STS_WIDTH 1 /* CLKGEN_ERR_STS */ 35786d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_STS 0x0001 /* CLKGEN_ERR_ASYNC_STS */ 35796d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_STS_MASK 0x0001 /* CLKGEN_ERR_ASYNC_STS */ 35806d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_STS_SHIFT 0 /* CLKGEN_ERR_ASYNC_STS */ 35816d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_STS_WIDTH 1 /* CLKGEN_ERR_ASYNC_STS */ 35826d4baf08SMark Brown 35836d4baf08SMark Brown /* 35846d4baf08SMark Brown * R3334 (0xD06) - Interrupt Raw Status 4 35856d4baf08SMark Brown */ 35866d4baf08SMark Brown #define WM5100_AIF3_ERR_STS 0x2000 /* AIF3_ERR_STS */ 35876d4baf08SMark Brown #define WM5100_AIF3_ERR_STS_MASK 0x2000 /* AIF3_ERR_STS */ 35886d4baf08SMark Brown #define WM5100_AIF3_ERR_STS_SHIFT 13 /* AIF3_ERR_STS */ 35896d4baf08SMark Brown #define WM5100_AIF3_ERR_STS_WIDTH 1 /* AIF3_ERR_STS */ 35906d4baf08SMark Brown #define WM5100_AIF2_ERR_STS 0x1000 /* AIF2_ERR_STS */ 35916d4baf08SMark Brown #define WM5100_AIF2_ERR_STS_MASK 0x1000 /* AIF2_ERR_STS */ 35926d4baf08SMark Brown #define WM5100_AIF2_ERR_STS_SHIFT 12 /* AIF2_ERR_STS */ 35936d4baf08SMark Brown #define WM5100_AIF2_ERR_STS_WIDTH 1 /* AIF2_ERR_STS */ 35946d4baf08SMark Brown #define WM5100_AIF1_ERR_STS 0x0800 /* AIF1_ERR_STS */ 35956d4baf08SMark Brown #define WM5100_AIF1_ERR_STS_MASK 0x0800 /* AIF1_ERR_STS */ 35966d4baf08SMark Brown #define WM5100_AIF1_ERR_STS_SHIFT 11 /* AIF1_ERR_STS */ 35976d4baf08SMark Brown #define WM5100_AIF1_ERR_STS_WIDTH 1 /* AIF1_ERR_STS */ 35986d4baf08SMark Brown #define WM5100_CTRLIF_ERR_STS 0x0400 /* CTRLIF_ERR_STS */ 35996d4baf08SMark Brown #define WM5100_CTRLIF_ERR_STS_MASK 0x0400 /* CTRLIF_ERR_STS */ 36006d4baf08SMark Brown #define WM5100_CTRLIF_ERR_STS_SHIFT 10 /* CTRLIF_ERR_STS */ 36016d4baf08SMark Brown #define WM5100_CTRLIF_ERR_STS_WIDTH 1 /* CTRLIF_ERR_STS */ 36026d4baf08SMark Brown #define WM5100_ISRC2_UNDERCLOCKED_STS 0x0200 /* ISRC2_UNDERCLOCKED_STS */ 36036d4baf08SMark Brown #define WM5100_ISRC2_UNDERCLOCKED_STS_MASK 0x0200 /* ISRC2_UNDERCLOCKED_STS */ 36046d4baf08SMark Brown #define WM5100_ISRC2_UNDERCLOCKED_STS_SHIFT 9 /* ISRC2_UNDERCLOCKED_STS */ 36056d4baf08SMark Brown #define WM5100_ISRC2_UNDERCLOCKED_STS_WIDTH 1 /* ISRC2_UNDERCLOCKED_STS */ 36066d4baf08SMark Brown #define WM5100_ISRC1_UNDERCLOCKED_STS 0x0100 /* ISRC1_UNDERCLOCKED_STS */ 36076d4baf08SMark Brown #define WM5100_ISRC1_UNDERCLOCKED_STS_MASK 0x0100 /* ISRC1_UNDERCLOCKED_STS */ 36086d4baf08SMark Brown #define WM5100_ISRC1_UNDERCLOCKED_STS_SHIFT 8 /* ISRC1_UNDERCLOCKED_STS */ 36096d4baf08SMark Brown #define WM5100_ISRC1_UNDERCLOCKED_STS_WIDTH 1 /* ISRC1_UNDERCLOCKED_STS */ 36106d4baf08SMark Brown #define WM5100_FX_UNDERCLOCKED_STS 0x0080 /* FX_UNDERCLOCKED_STS */ 36116d4baf08SMark Brown #define WM5100_FX_UNDERCLOCKED_STS_MASK 0x0080 /* FX_UNDERCLOCKED_STS */ 36126d4baf08SMark Brown #define WM5100_FX_UNDERCLOCKED_STS_SHIFT 7 /* FX_UNDERCLOCKED_STS */ 36136d4baf08SMark Brown #define WM5100_FX_UNDERCLOCKED_STS_WIDTH 1 /* FX_UNDERCLOCKED_STS */ 36146d4baf08SMark Brown #define WM5100_AIF3_UNDERCLOCKED_STS 0x0040 /* AIF3_UNDERCLOCKED_STS */ 36156d4baf08SMark Brown #define WM5100_AIF3_UNDERCLOCKED_STS_MASK 0x0040 /* AIF3_UNDERCLOCKED_STS */ 36166d4baf08SMark Brown #define WM5100_AIF3_UNDERCLOCKED_STS_SHIFT 6 /* AIF3_UNDERCLOCKED_STS */ 36176d4baf08SMark Brown #define WM5100_AIF3_UNDERCLOCKED_STS_WIDTH 1 /* AIF3_UNDERCLOCKED_STS */ 36186d4baf08SMark Brown #define WM5100_AIF2_UNDERCLOCKED_STS 0x0020 /* AIF2_UNDERCLOCKED_STS */ 36196d4baf08SMark Brown #define WM5100_AIF2_UNDERCLOCKED_STS_MASK 0x0020 /* AIF2_UNDERCLOCKED_STS */ 36206d4baf08SMark Brown #define WM5100_AIF2_UNDERCLOCKED_STS_SHIFT 5 /* AIF2_UNDERCLOCKED_STS */ 36216d4baf08SMark Brown #define WM5100_AIF2_UNDERCLOCKED_STS_WIDTH 1 /* AIF2_UNDERCLOCKED_STS */ 36226d4baf08SMark Brown #define WM5100_AIF1_UNDERCLOCKED_STS 0x0010 /* AIF1_UNDERCLOCKED_STS */ 36236d4baf08SMark Brown #define WM5100_AIF1_UNDERCLOCKED_STS_MASK 0x0010 /* AIF1_UNDERCLOCKED_STS */ 36246d4baf08SMark Brown #define WM5100_AIF1_UNDERCLOCKED_STS_SHIFT 4 /* AIF1_UNDERCLOCKED_STS */ 36256d4baf08SMark Brown #define WM5100_AIF1_UNDERCLOCKED_STS_WIDTH 1 /* AIF1_UNDERCLOCKED_STS */ 36266d4baf08SMark Brown #define WM5100_ASRC_UNDERCLOCKED_STS 0x0008 /* ASRC_UNDERCLOCKED_STS */ 36276d4baf08SMark Brown #define WM5100_ASRC_UNDERCLOCKED_STS_MASK 0x0008 /* ASRC_UNDERCLOCKED_STS */ 36286d4baf08SMark Brown #define WM5100_ASRC_UNDERCLOCKED_STS_SHIFT 3 /* ASRC_UNDERCLOCKED_STS */ 36296d4baf08SMark Brown #define WM5100_ASRC_UNDERCLOCKED_STS_WIDTH 1 /* ASRC_UNDERCLOCKED_STS */ 36306d4baf08SMark Brown #define WM5100_DAC_UNDERCLOCKED_STS 0x0004 /* DAC_UNDERCLOCKED_STS */ 36316d4baf08SMark Brown #define WM5100_DAC_UNDERCLOCKED_STS_MASK 0x0004 /* DAC_UNDERCLOCKED_STS */ 36326d4baf08SMark Brown #define WM5100_DAC_UNDERCLOCKED_STS_SHIFT 2 /* DAC_UNDERCLOCKED_STS */ 36336d4baf08SMark Brown #define WM5100_DAC_UNDERCLOCKED_STS_WIDTH 1 /* DAC_UNDERCLOCKED_STS */ 36346d4baf08SMark Brown #define WM5100_ADC_UNDERCLOCKED_STS 0x0002 /* ADC_UNDERCLOCKED_STS */ 36356d4baf08SMark Brown #define WM5100_ADC_UNDERCLOCKED_STS_MASK 0x0002 /* ADC_UNDERCLOCKED_STS */ 36366d4baf08SMark Brown #define WM5100_ADC_UNDERCLOCKED_STS_SHIFT 1 /* ADC_UNDERCLOCKED_STS */ 36376d4baf08SMark Brown #define WM5100_ADC_UNDERCLOCKED_STS_WIDTH 1 /* ADC_UNDERCLOCKED_STS */ 36386d4baf08SMark Brown #define WM5100_MIXER_UNDERCLOCKED_STS 0x0001 /* MIXER_UNDERCLOCKED_STS */ 36396d4baf08SMark Brown #define WM5100_MIXER_UNDERCLOCKED_STS_MASK 0x0001 /* MIXER_UNDERCLOCKED_STS */ 36406d4baf08SMark Brown #define WM5100_MIXER_UNDERCLOCKED_STS_SHIFT 0 /* MIXER_UNDERCLOCKED_STS */ 36416d4baf08SMark Brown #define WM5100_MIXER_UNDERCLOCKED_STS_WIDTH 1 /* MIXER_UNDERCLOCKED_STS */ 36426d4baf08SMark Brown 36436d4baf08SMark Brown /* 36446d4baf08SMark Brown * R3335 (0xD07) - Interrupt Status 1 Mask 36456d4baf08SMark Brown */ 36466d4baf08SMark Brown #define WM5100_IM_GP6_EINT 0x0020 /* IM_GP6_EINT */ 36476d4baf08SMark Brown #define WM5100_IM_GP6_EINT_MASK 0x0020 /* IM_GP6_EINT */ 36486d4baf08SMark Brown #define WM5100_IM_GP6_EINT_SHIFT 5 /* IM_GP6_EINT */ 36496d4baf08SMark Brown #define WM5100_IM_GP6_EINT_WIDTH 1 /* IM_GP6_EINT */ 36506d4baf08SMark Brown #define WM5100_IM_GP5_EINT 0x0010 /* IM_GP5_EINT */ 36516d4baf08SMark Brown #define WM5100_IM_GP5_EINT_MASK 0x0010 /* IM_GP5_EINT */ 36526d4baf08SMark Brown #define WM5100_IM_GP5_EINT_SHIFT 4 /* IM_GP5_EINT */ 36536d4baf08SMark Brown #define WM5100_IM_GP5_EINT_WIDTH 1 /* IM_GP5_EINT */ 36546d4baf08SMark Brown #define WM5100_IM_GP4_EINT 0x0008 /* IM_GP4_EINT */ 36556d4baf08SMark Brown #define WM5100_IM_GP4_EINT_MASK 0x0008 /* IM_GP4_EINT */ 36566d4baf08SMark Brown #define WM5100_IM_GP4_EINT_SHIFT 3 /* IM_GP4_EINT */ 36576d4baf08SMark Brown #define WM5100_IM_GP4_EINT_WIDTH 1 /* IM_GP4_EINT */ 36586d4baf08SMark Brown #define WM5100_IM_GP3_EINT 0x0004 /* IM_GP3_EINT */ 36596d4baf08SMark Brown #define WM5100_IM_GP3_EINT_MASK 0x0004 /* IM_GP3_EINT */ 36606d4baf08SMark Brown #define WM5100_IM_GP3_EINT_SHIFT 2 /* IM_GP3_EINT */ 36616d4baf08SMark Brown #define WM5100_IM_GP3_EINT_WIDTH 1 /* IM_GP3_EINT */ 36626d4baf08SMark Brown #define WM5100_IM_GP2_EINT 0x0002 /* IM_GP2_EINT */ 36636d4baf08SMark Brown #define WM5100_IM_GP2_EINT_MASK 0x0002 /* IM_GP2_EINT */ 36646d4baf08SMark Brown #define WM5100_IM_GP2_EINT_SHIFT 1 /* IM_GP2_EINT */ 36656d4baf08SMark Brown #define WM5100_IM_GP2_EINT_WIDTH 1 /* IM_GP2_EINT */ 36666d4baf08SMark Brown #define WM5100_IM_GP1_EINT 0x0001 /* IM_GP1_EINT */ 36676d4baf08SMark Brown #define WM5100_IM_GP1_EINT_MASK 0x0001 /* IM_GP1_EINT */ 36686d4baf08SMark Brown #define WM5100_IM_GP1_EINT_SHIFT 0 /* IM_GP1_EINT */ 36696d4baf08SMark Brown #define WM5100_IM_GP1_EINT_WIDTH 1 /* IM_GP1_EINT */ 36706d4baf08SMark Brown 36716d4baf08SMark Brown /* 36726d4baf08SMark Brown * R3336 (0xD08) - Interrupt Status 2 Mask 36736d4baf08SMark Brown */ 36746d4baf08SMark Brown #define WM5100_IM_DSP_IRQ6_EINT 0x0020 /* IM_DSP_IRQ6_EINT */ 36756d4baf08SMark Brown #define WM5100_IM_DSP_IRQ6_EINT_MASK 0x0020 /* IM_DSP_IRQ6_EINT */ 36766d4baf08SMark Brown #define WM5100_IM_DSP_IRQ6_EINT_SHIFT 5 /* IM_DSP_IRQ6_EINT */ 36776d4baf08SMark Brown #define WM5100_IM_DSP_IRQ6_EINT_WIDTH 1 /* IM_DSP_IRQ6_EINT */ 36786d4baf08SMark Brown #define WM5100_IM_DSP_IRQ5_EINT 0x0010 /* IM_DSP_IRQ5_EINT */ 36796d4baf08SMark Brown #define WM5100_IM_DSP_IRQ5_EINT_MASK 0x0010 /* IM_DSP_IRQ5_EINT */ 36806d4baf08SMark Brown #define WM5100_IM_DSP_IRQ5_EINT_SHIFT 4 /* IM_DSP_IRQ5_EINT */ 36816d4baf08SMark Brown #define WM5100_IM_DSP_IRQ5_EINT_WIDTH 1 /* IM_DSP_IRQ5_EINT */ 36826d4baf08SMark Brown #define WM5100_IM_DSP_IRQ4_EINT 0x0008 /* IM_DSP_IRQ4_EINT */ 36836d4baf08SMark Brown #define WM5100_IM_DSP_IRQ4_EINT_MASK 0x0008 /* IM_DSP_IRQ4_EINT */ 36846d4baf08SMark Brown #define WM5100_IM_DSP_IRQ4_EINT_SHIFT 3 /* IM_DSP_IRQ4_EINT */ 36856d4baf08SMark Brown #define WM5100_IM_DSP_IRQ4_EINT_WIDTH 1 /* IM_DSP_IRQ4_EINT */ 36866d4baf08SMark Brown #define WM5100_IM_DSP_IRQ3_EINT 0x0004 /* IM_DSP_IRQ3_EINT */ 36876d4baf08SMark Brown #define WM5100_IM_DSP_IRQ3_EINT_MASK 0x0004 /* IM_DSP_IRQ3_EINT */ 36886d4baf08SMark Brown #define WM5100_IM_DSP_IRQ3_EINT_SHIFT 2 /* IM_DSP_IRQ3_EINT */ 36896d4baf08SMark Brown #define WM5100_IM_DSP_IRQ3_EINT_WIDTH 1 /* IM_DSP_IRQ3_EINT */ 36906d4baf08SMark Brown #define WM5100_IM_DSP_IRQ2_EINT 0x0002 /* IM_DSP_IRQ2_EINT */ 36916d4baf08SMark Brown #define WM5100_IM_DSP_IRQ2_EINT_MASK 0x0002 /* IM_DSP_IRQ2_EINT */ 36926d4baf08SMark Brown #define WM5100_IM_DSP_IRQ2_EINT_SHIFT 1 /* IM_DSP_IRQ2_EINT */ 36936d4baf08SMark Brown #define WM5100_IM_DSP_IRQ2_EINT_WIDTH 1 /* IM_DSP_IRQ2_EINT */ 36946d4baf08SMark Brown #define WM5100_IM_DSP_IRQ1_EINT 0x0001 /* IM_DSP_IRQ1_EINT */ 36956d4baf08SMark Brown #define WM5100_IM_DSP_IRQ1_EINT_MASK 0x0001 /* IM_DSP_IRQ1_EINT */ 36966d4baf08SMark Brown #define WM5100_IM_DSP_IRQ1_EINT_SHIFT 0 /* IM_DSP_IRQ1_EINT */ 36976d4baf08SMark Brown #define WM5100_IM_DSP_IRQ1_EINT_WIDTH 1 /* IM_DSP_IRQ1_EINT */ 36986d4baf08SMark Brown 36996d4baf08SMark Brown /* 37006d4baf08SMark Brown * R3337 (0xD09) - Interrupt Status 3 Mask 37016d4baf08SMark Brown */ 37026d4baf08SMark Brown #define WM5100_IM_SPK_SHUTDOWN_WARN_EINT 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT */ 37036d4baf08SMark Brown #define WM5100_IM_SPK_SHUTDOWN_WARN_EINT_MASK 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT */ 37046d4baf08SMark Brown #define WM5100_IM_SPK_SHUTDOWN_WARN_EINT_SHIFT 15 /* IM_SPK_SHUTDOWN_WARN_EINT */ 37056d4baf08SMark Brown #define WM5100_IM_SPK_SHUTDOWN_WARN_EINT_WIDTH 1 /* IM_SPK_SHUTDOWN_WARN_EINT */ 37066d4baf08SMark Brown #define WM5100_IM_SPK_SHUTDOWN_EINT 0x4000 /* IM_SPK_SHUTDOWN_EINT */ 37076d4baf08SMark Brown #define WM5100_IM_SPK_SHUTDOWN_EINT_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT */ 37086d4baf08SMark Brown #define WM5100_IM_SPK_SHUTDOWN_EINT_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT */ 37096d4baf08SMark Brown #define WM5100_IM_SPK_SHUTDOWN_EINT_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT */ 37106d4baf08SMark Brown #define WM5100_IM_HPDET_EINT 0x2000 /* IM_HPDET_EINT */ 37116d4baf08SMark Brown #define WM5100_IM_HPDET_EINT_MASK 0x2000 /* IM_HPDET_EINT */ 37126d4baf08SMark Brown #define WM5100_IM_HPDET_EINT_SHIFT 13 /* IM_HPDET_EINT */ 37136d4baf08SMark Brown #define WM5100_IM_HPDET_EINT_WIDTH 1 /* IM_HPDET_EINT */ 37146d4baf08SMark Brown #define WM5100_IM_ACCDET_EINT 0x1000 /* IM_ACCDET_EINT */ 37156d4baf08SMark Brown #define WM5100_IM_ACCDET_EINT_MASK 0x1000 /* IM_ACCDET_EINT */ 37166d4baf08SMark Brown #define WM5100_IM_ACCDET_EINT_SHIFT 12 /* IM_ACCDET_EINT */ 37176d4baf08SMark Brown #define WM5100_IM_ACCDET_EINT_WIDTH 1 /* IM_ACCDET_EINT */ 37186d4baf08SMark Brown #define WM5100_IM_DRC_SIG_DET_EINT 0x0200 /* IM_DRC_SIG_DET_EINT */ 37196d4baf08SMark Brown #define WM5100_IM_DRC_SIG_DET_EINT_MASK 0x0200 /* IM_DRC_SIG_DET_EINT */ 37206d4baf08SMark Brown #define WM5100_IM_DRC_SIG_DET_EINT_SHIFT 9 /* IM_DRC_SIG_DET_EINT */ 37216d4baf08SMark Brown #define WM5100_IM_DRC_SIG_DET_EINT_WIDTH 1 /* IM_DRC_SIG_DET_EINT */ 37226d4baf08SMark Brown #define WM5100_IM_ASRC2_LOCK_EINT 0x0100 /* IM_ASRC2_LOCK_EINT */ 37236d4baf08SMark Brown #define WM5100_IM_ASRC2_LOCK_EINT_MASK 0x0100 /* IM_ASRC2_LOCK_EINT */ 37246d4baf08SMark Brown #define WM5100_IM_ASRC2_LOCK_EINT_SHIFT 8 /* IM_ASRC2_LOCK_EINT */ 37256d4baf08SMark Brown #define WM5100_IM_ASRC2_LOCK_EINT_WIDTH 1 /* IM_ASRC2_LOCK_EINT */ 37266d4baf08SMark Brown #define WM5100_IM_ASRC1_LOCK_EINT 0x0080 /* IM_ASRC1_LOCK_EINT */ 37276d4baf08SMark Brown #define WM5100_IM_ASRC1_LOCK_EINT_MASK 0x0080 /* IM_ASRC1_LOCK_EINT */ 37286d4baf08SMark Brown #define WM5100_IM_ASRC1_LOCK_EINT_SHIFT 7 /* IM_ASRC1_LOCK_EINT */ 37296d4baf08SMark Brown #define WM5100_IM_ASRC1_LOCK_EINT_WIDTH 1 /* IM_ASRC1_LOCK_EINT */ 37306d4baf08SMark Brown #define WM5100_IM_FLL2_LOCK_EINT 0x0008 /* IM_FLL2_LOCK_EINT */ 37316d4baf08SMark Brown #define WM5100_IM_FLL2_LOCK_EINT_MASK 0x0008 /* IM_FLL2_LOCK_EINT */ 37326d4baf08SMark Brown #define WM5100_IM_FLL2_LOCK_EINT_SHIFT 3 /* IM_FLL2_LOCK_EINT */ 37336d4baf08SMark Brown #define WM5100_IM_FLL2_LOCK_EINT_WIDTH 1 /* IM_FLL2_LOCK_EINT */ 37346d4baf08SMark Brown #define WM5100_IM_FLL1_LOCK_EINT 0x0004 /* IM_FLL1_LOCK_EINT */ 37356d4baf08SMark Brown #define WM5100_IM_FLL1_LOCK_EINT_MASK 0x0004 /* IM_FLL1_LOCK_EINT */ 37366d4baf08SMark Brown #define WM5100_IM_FLL1_LOCK_EINT_SHIFT 2 /* IM_FLL1_LOCK_EINT */ 37376d4baf08SMark Brown #define WM5100_IM_FLL1_LOCK_EINT_WIDTH 1 /* IM_FLL1_LOCK_EINT */ 37386d4baf08SMark Brown #define WM5100_IM_CLKGEN_ERR_EINT 0x0002 /* IM_CLKGEN_ERR_EINT */ 37396d4baf08SMark Brown #define WM5100_IM_CLKGEN_ERR_EINT_MASK 0x0002 /* IM_CLKGEN_ERR_EINT */ 37406d4baf08SMark Brown #define WM5100_IM_CLKGEN_ERR_EINT_SHIFT 1 /* IM_CLKGEN_ERR_EINT */ 37416d4baf08SMark Brown #define WM5100_IM_CLKGEN_ERR_EINT_WIDTH 1 /* IM_CLKGEN_ERR_EINT */ 37426d4baf08SMark Brown #define WM5100_IM_CLKGEN_ERR_ASYNC_EINT 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT */ 37436d4baf08SMark Brown #define WM5100_IM_CLKGEN_ERR_ASYNC_EINT_MASK 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT */ 37446d4baf08SMark Brown #define WM5100_IM_CLKGEN_ERR_ASYNC_EINT_SHIFT 0 /* IM_CLKGEN_ERR_ASYNC_EINT */ 37456d4baf08SMark Brown #define WM5100_IM_CLKGEN_ERR_ASYNC_EINT_WIDTH 1 /* IM_CLKGEN_ERR_ASYNC_EINT */ 37466d4baf08SMark Brown 37476d4baf08SMark Brown /* 37486d4baf08SMark Brown * R3338 (0xD0A) - Interrupt Status 4 Mask 37496d4baf08SMark Brown */ 37506d4baf08SMark Brown #define WM5100_IM_AIF3_ERR_EINT 0x2000 /* IM_AIF3_ERR_EINT */ 37516d4baf08SMark Brown #define WM5100_IM_AIF3_ERR_EINT_MASK 0x2000 /* IM_AIF3_ERR_EINT */ 37526d4baf08SMark Brown #define WM5100_IM_AIF3_ERR_EINT_SHIFT 13 /* IM_AIF3_ERR_EINT */ 37536d4baf08SMark Brown #define WM5100_IM_AIF3_ERR_EINT_WIDTH 1 /* IM_AIF3_ERR_EINT */ 37546d4baf08SMark Brown #define WM5100_IM_AIF2_ERR_EINT 0x1000 /* IM_AIF2_ERR_EINT */ 37556d4baf08SMark Brown #define WM5100_IM_AIF2_ERR_EINT_MASK 0x1000 /* IM_AIF2_ERR_EINT */ 37566d4baf08SMark Brown #define WM5100_IM_AIF2_ERR_EINT_SHIFT 12 /* IM_AIF2_ERR_EINT */ 37576d4baf08SMark Brown #define WM5100_IM_AIF2_ERR_EINT_WIDTH 1 /* IM_AIF2_ERR_EINT */ 37586d4baf08SMark Brown #define WM5100_IM_AIF1_ERR_EINT 0x0800 /* IM_AIF1_ERR_EINT */ 37596d4baf08SMark Brown #define WM5100_IM_AIF1_ERR_EINT_MASK 0x0800 /* IM_AIF1_ERR_EINT */ 37606d4baf08SMark Brown #define WM5100_IM_AIF1_ERR_EINT_SHIFT 11 /* IM_AIF1_ERR_EINT */ 37616d4baf08SMark Brown #define WM5100_IM_AIF1_ERR_EINT_WIDTH 1 /* IM_AIF1_ERR_EINT */ 37626d4baf08SMark Brown #define WM5100_IM_CTRLIF_ERR_EINT 0x0400 /* IM_CTRLIF_ERR_EINT */ 37636d4baf08SMark Brown #define WM5100_IM_CTRLIF_ERR_EINT_MASK 0x0400 /* IM_CTRLIF_ERR_EINT */ 37646d4baf08SMark Brown #define WM5100_IM_CTRLIF_ERR_EINT_SHIFT 10 /* IM_CTRLIF_ERR_EINT */ 37656d4baf08SMark Brown #define WM5100_IM_CTRLIF_ERR_EINT_WIDTH 1 /* IM_CTRLIF_ERR_EINT */ 37666d4baf08SMark Brown #define WM5100_IM_ISRC2_UNDERCLOCKED_EINT 0x0200 /* IM_ISRC2_UNDERCLOCKED_EINT */ 37676d4baf08SMark Brown #define WM5100_IM_ISRC2_UNDERCLOCKED_EINT_MASK 0x0200 /* IM_ISRC2_UNDERCLOCKED_EINT */ 37686d4baf08SMark Brown #define WM5100_IM_ISRC2_UNDERCLOCKED_EINT_SHIFT 9 /* IM_ISRC2_UNDERCLOCKED_EINT */ 37696d4baf08SMark Brown #define WM5100_IM_ISRC2_UNDERCLOCKED_EINT_WIDTH 1 /* IM_ISRC2_UNDERCLOCKED_EINT */ 37706d4baf08SMark Brown #define WM5100_IM_ISRC1_UNDERCLOCKED_EINT 0x0100 /* IM_ISRC1_UNDERCLOCKED_EINT */ 37716d4baf08SMark Brown #define WM5100_IM_ISRC1_UNDERCLOCKED_EINT_MASK 0x0100 /* IM_ISRC1_UNDERCLOCKED_EINT */ 37726d4baf08SMark Brown #define WM5100_IM_ISRC1_UNDERCLOCKED_EINT_SHIFT 8 /* IM_ISRC1_UNDERCLOCKED_EINT */ 37736d4baf08SMark Brown #define WM5100_IM_ISRC1_UNDERCLOCKED_EINT_WIDTH 1 /* IM_ISRC1_UNDERCLOCKED_EINT */ 37746d4baf08SMark Brown #define WM5100_IM_FX_UNDERCLOCKED_EINT 0x0080 /* IM_FX_UNDERCLOCKED_EINT */ 37756d4baf08SMark Brown #define WM5100_IM_FX_UNDERCLOCKED_EINT_MASK 0x0080 /* IM_FX_UNDERCLOCKED_EINT */ 37766d4baf08SMark Brown #define WM5100_IM_FX_UNDERCLOCKED_EINT_SHIFT 7 /* IM_FX_UNDERCLOCKED_EINT */ 37776d4baf08SMark Brown #define WM5100_IM_FX_UNDERCLOCKED_EINT_WIDTH 1 /* IM_FX_UNDERCLOCKED_EINT */ 37786d4baf08SMark Brown #define WM5100_IM_AIF3_UNDERCLOCKED_EINT 0x0040 /* IM_AIF3_UNDERCLOCKED_EINT */ 37796d4baf08SMark Brown #define WM5100_IM_AIF3_UNDERCLOCKED_EINT_MASK 0x0040 /* IM_AIF3_UNDERCLOCKED_EINT */ 37806d4baf08SMark Brown #define WM5100_IM_AIF3_UNDERCLOCKED_EINT_SHIFT 6 /* IM_AIF3_UNDERCLOCKED_EINT */ 37816d4baf08SMark Brown #define WM5100_IM_AIF3_UNDERCLOCKED_EINT_WIDTH 1 /* IM_AIF3_UNDERCLOCKED_EINT */ 37826d4baf08SMark Brown #define WM5100_IM_AIF2_UNDERCLOCKED_EINT 0x0020 /* IM_AIF2_UNDERCLOCKED_EINT */ 37836d4baf08SMark Brown #define WM5100_IM_AIF2_UNDERCLOCKED_EINT_MASK 0x0020 /* IM_AIF2_UNDERCLOCKED_EINT */ 37846d4baf08SMark Brown #define WM5100_IM_AIF2_UNDERCLOCKED_EINT_SHIFT 5 /* IM_AIF2_UNDERCLOCKED_EINT */ 37856d4baf08SMark Brown #define WM5100_IM_AIF2_UNDERCLOCKED_EINT_WIDTH 1 /* IM_AIF2_UNDERCLOCKED_EINT */ 37866d4baf08SMark Brown #define WM5100_IM_AIF1_UNDERCLOCKED_EINT 0x0010 /* IM_AIF1_UNDERCLOCKED_EINT */ 37876d4baf08SMark Brown #define WM5100_IM_AIF1_UNDERCLOCKED_EINT_MASK 0x0010 /* IM_AIF1_UNDERCLOCKED_EINT */ 37886d4baf08SMark Brown #define WM5100_IM_AIF1_UNDERCLOCKED_EINT_SHIFT 4 /* IM_AIF1_UNDERCLOCKED_EINT */ 37896d4baf08SMark Brown #define WM5100_IM_AIF1_UNDERCLOCKED_EINT_WIDTH 1 /* IM_AIF1_UNDERCLOCKED_EINT */ 37906d4baf08SMark Brown #define WM5100_IM_ASRC_UNDERCLOCKED_EINT 0x0008 /* IM_ASRC_UNDERCLOCKED_EINT */ 37916d4baf08SMark Brown #define WM5100_IM_ASRC_UNDERCLOCKED_EINT_MASK 0x0008 /* IM_ASRC_UNDERCLOCKED_EINT */ 37926d4baf08SMark Brown #define WM5100_IM_ASRC_UNDERCLOCKED_EINT_SHIFT 3 /* IM_ASRC_UNDERCLOCKED_EINT */ 37936d4baf08SMark Brown #define WM5100_IM_ASRC_UNDERCLOCKED_EINT_WIDTH 1 /* IM_ASRC_UNDERCLOCKED_EINT */ 37946d4baf08SMark Brown #define WM5100_IM_DAC_UNDERCLOCKED_EINT 0x0004 /* IM_DAC_UNDERCLOCKED_EINT */ 37956d4baf08SMark Brown #define WM5100_IM_DAC_UNDERCLOCKED_EINT_MASK 0x0004 /* IM_DAC_UNDERCLOCKED_EINT */ 37966d4baf08SMark Brown #define WM5100_IM_DAC_UNDERCLOCKED_EINT_SHIFT 2 /* IM_DAC_UNDERCLOCKED_EINT */ 37976d4baf08SMark Brown #define WM5100_IM_DAC_UNDERCLOCKED_EINT_WIDTH 1 /* IM_DAC_UNDERCLOCKED_EINT */ 37986d4baf08SMark Brown #define WM5100_IM_ADC_UNDERCLOCKED_EINT 0x0002 /* IM_ADC_UNDERCLOCKED_EINT */ 37996d4baf08SMark Brown #define WM5100_IM_ADC_UNDERCLOCKED_EINT_MASK 0x0002 /* IM_ADC_UNDERCLOCKED_EINT */ 38006d4baf08SMark Brown #define WM5100_IM_ADC_UNDERCLOCKED_EINT_SHIFT 1 /* IM_ADC_UNDERCLOCKED_EINT */ 38016d4baf08SMark Brown #define WM5100_IM_ADC_UNDERCLOCKED_EINT_WIDTH 1 /* IM_ADC_UNDERCLOCKED_EINT */ 38026d4baf08SMark Brown #define WM5100_IM_MIXER_UNDERCLOCKED_EINT 0x0001 /* IM_MIXER_UNDERCLOCKED_EINT */ 38036d4baf08SMark Brown #define WM5100_IM_MIXER_UNDERCLOCKED_EINT_MASK 0x0001 /* IM_MIXER_UNDERCLOCKED_EINT */ 38046d4baf08SMark Brown #define WM5100_IM_MIXER_UNDERCLOCKED_EINT_SHIFT 0 /* IM_MIXER_UNDERCLOCKED_EINT */ 38056d4baf08SMark Brown #define WM5100_IM_MIXER_UNDERCLOCKED_EINT_WIDTH 1 /* IM_MIXER_UNDERCLOCKED_EINT */ 38066d4baf08SMark Brown 38076d4baf08SMark Brown /* 38086d4baf08SMark Brown * R3359 (0xD1F) - Interrupt Control 38096d4baf08SMark Brown */ 38106d4baf08SMark Brown #define WM5100_IM_IRQ 0x0001 /* IM_IRQ */ 38116d4baf08SMark Brown #define WM5100_IM_IRQ_MASK 0x0001 /* IM_IRQ */ 38126d4baf08SMark Brown #define WM5100_IM_IRQ_SHIFT 0 /* IM_IRQ */ 38136d4baf08SMark Brown #define WM5100_IM_IRQ_WIDTH 1 /* IM_IRQ */ 38146d4baf08SMark Brown 38156d4baf08SMark Brown /* 38166d4baf08SMark Brown * R3360 (0xD20) - IRQ Debounce 1 38176d4baf08SMark Brown */ 38186d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_DB 0x0200 /* SPK_SHUTDOWN_WARN_DB */ 38196d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_DB_MASK 0x0200 /* SPK_SHUTDOWN_WARN_DB */ 38206d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_DB_SHIFT 9 /* SPK_SHUTDOWN_WARN_DB */ 38216d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_WARN_DB_WIDTH 1 /* SPK_SHUTDOWN_WARN_DB */ 38226d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_DB 0x0100 /* SPK_SHUTDOWN_DB */ 38236d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_DB_MASK 0x0100 /* SPK_SHUTDOWN_DB */ 38246d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_DB_SHIFT 8 /* SPK_SHUTDOWN_DB */ 38256d4baf08SMark Brown #define WM5100_SPK_SHUTDOWN_DB_WIDTH 1 /* SPK_SHUTDOWN_DB */ 38266d4baf08SMark Brown #define WM5100_FLL1_LOCK_IRQ_DB 0x0008 /* FLL1_LOCK_IRQ_DB */ 38276d4baf08SMark Brown #define WM5100_FLL1_LOCK_IRQ_DB_MASK 0x0008 /* FLL1_LOCK_IRQ_DB */ 38286d4baf08SMark Brown #define WM5100_FLL1_LOCK_IRQ_DB_SHIFT 3 /* FLL1_LOCK_IRQ_DB */ 38296d4baf08SMark Brown #define WM5100_FLL1_LOCK_IRQ_DB_WIDTH 1 /* FLL1_LOCK_IRQ_DB */ 38306d4baf08SMark Brown #define WM5100_FLL2_LOCK_IRQ_DB 0x0004 /* FLL2_LOCK_IRQ_DB */ 38316d4baf08SMark Brown #define WM5100_FLL2_LOCK_IRQ_DB_MASK 0x0004 /* FLL2_LOCK_IRQ_DB */ 38326d4baf08SMark Brown #define WM5100_FLL2_LOCK_IRQ_DB_SHIFT 2 /* FLL2_LOCK_IRQ_DB */ 38336d4baf08SMark Brown #define WM5100_FLL2_LOCK_IRQ_DB_WIDTH 1 /* FLL2_LOCK_IRQ_DB */ 38346d4baf08SMark Brown #define WM5100_CLKGEN_ERR_IRQ_DB 0x0002 /* CLKGEN_ERR_IRQ_DB */ 38356d4baf08SMark Brown #define WM5100_CLKGEN_ERR_IRQ_DB_MASK 0x0002 /* CLKGEN_ERR_IRQ_DB */ 38366d4baf08SMark Brown #define WM5100_CLKGEN_ERR_IRQ_DB_SHIFT 1 /* CLKGEN_ERR_IRQ_DB */ 38376d4baf08SMark Brown #define WM5100_CLKGEN_ERR_IRQ_DB_WIDTH 1 /* CLKGEN_ERR_IRQ_DB */ 38386d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_IRQ_DB 0x0001 /* CLKGEN_ERR_ASYNC_IRQ_DB */ 38396d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_IRQ_DB_MASK 0x0001 /* CLKGEN_ERR_ASYNC_IRQ_DB */ 38406d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_IRQ_DB_SHIFT 0 /* CLKGEN_ERR_ASYNC_IRQ_DB */ 38416d4baf08SMark Brown #define WM5100_CLKGEN_ERR_ASYNC_IRQ_DB_WIDTH 1 /* CLKGEN_ERR_ASYNC_IRQ_DB */ 38426d4baf08SMark Brown 38436d4baf08SMark Brown /* 38446d4baf08SMark Brown * R3361 (0xD21) - IRQ Debounce 2 38456d4baf08SMark Brown */ 38466d4baf08SMark Brown #define WM5100_AIF_ERR_DB 0x0001 /* AIF_ERR_DB */ 38476d4baf08SMark Brown #define WM5100_AIF_ERR_DB_MASK 0x0001 /* AIF_ERR_DB */ 38486d4baf08SMark Brown #define WM5100_AIF_ERR_DB_SHIFT 0 /* AIF_ERR_DB */ 38496d4baf08SMark Brown #define WM5100_AIF_ERR_DB_WIDTH 1 /* AIF_ERR_DB */ 38506d4baf08SMark Brown 38516d4baf08SMark Brown /* 38526d4baf08SMark Brown * R3584 (0xE00) - FX_Ctrl 38536d4baf08SMark Brown */ 38546d4baf08SMark Brown #define WM5100_FX_STS_MASK 0xFFC0 /* FX_STS - [15:6] */ 38556d4baf08SMark Brown #define WM5100_FX_STS_SHIFT 6 /* FX_STS - [15:6] */ 38566d4baf08SMark Brown #define WM5100_FX_STS_WIDTH 10 /* FX_STS - [15:6] */ 38576d4baf08SMark Brown #define WM5100_FX_RATE_MASK 0x0003 /* FX_RATE - [1:0] */ 38586d4baf08SMark Brown #define WM5100_FX_RATE_SHIFT 0 /* FX_RATE - [1:0] */ 38596d4baf08SMark Brown #define WM5100_FX_RATE_WIDTH 2 /* FX_RATE - [1:0] */ 38606d4baf08SMark Brown 38616d4baf08SMark Brown /* 38626d4baf08SMark Brown * R3600 (0xE10) - EQ1_1 38636d4baf08SMark Brown */ 38646d4baf08SMark Brown #define WM5100_EQ1_B1_GAIN_MASK 0xF800 /* EQ1_B1_GAIN - [15:11] */ 38656d4baf08SMark Brown #define WM5100_EQ1_B1_GAIN_SHIFT 11 /* EQ1_B1_GAIN - [15:11] */ 38666d4baf08SMark Brown #define WM5100_EQ1_B1_GAIN_WIDTH 5 /* EQ1_B1_GAIN - [15:11] */ 38676d4baf08SMark Brown #define WM5100_EQ1_B2_GAIN_MASK 0x07C0 /* EQ1_B2_GAIN - [10:6] */ 38686d4baf08SMark Brown #define WM5100_EQ1_B2_GAIN_SHIFT 6 /* EQ1_B2_GAIN - [10:6] */ 38696d4baf08SMark Brown #define WM5100_EQ1_B2_GAIN_WIDTH 5 /* EQ1_B2_GAIN - [10:6] */ 38706d4baf08SMark Brown #define WM5100_EQ1_B3_GAIN_MASK 0x003E /* EQ1_B3_GAIN - [5:1] */ 38716d4baf08SMark Brown #define WM5100_EQ1_B3_GAIN_SHIFT 1 /* EQ1_B3_GAIN - [5:1] */ 38726d4baf08SMark Brown #define WM5100_EQ1_B3_GAIN_WIDTH 5 /* EQ1_B3_GAIN - [5:1] */ 38736d4baf08SMark Brown #define WM5100_EQ1_ENA 0x0001 /* EQ1_ENA */ 38746d4baf08SMark Brown #define WM5100_EQ1_ENA_MASK 0x0001 /* EQ1_ENA */ 38756d4baf08SMark Brown #define WM5100_EQ1_ENA_SHIFT 0 /* EQ1_ENA */ 38766d4baf08SMark Brown #define WM5100_EQ1_ENA_WIDTH 1 /* EQ1_ENA */ 38776d4baf08SMark Brown 38786d4baf08SMark Brown /* 38796d4baf08SMark Brown * R3601 (0xE11) - EQ1_2 38806d4baf08SMark Brown */ 38816d4baf08SMark Brown #define WM5100_EQ1_B4_GAIN_MASK 0xF800 /* EQ1_B4_GAIN - [15:11] */ 38826d4baf08SMark Brown #define WM5100_EQ1_B4_GAIN_SHIFT 11 /* EQ1_B4_GAIN - [15:11] */ 38836d4baf08SMark Brown #define WM5100_EQ1_B4_GAIN_WIDTH 5 /* EQ1_B4_GAIN - [15:11] */ 38846d4baf08SMark Brown #define WM5100_EQ1_B5_GAIN_MASK 0x07C0 /* EQ1_B5_GAIN - [10:6] */ 38856d4baf08SMark Brown #define WM5100_EQ1_B5_GAIN_SHIFT 6 /* EQ1_B5_GAIN - [10:6] */ 38866d4baf08SMark Brown #define WM5100_EQ1_B5_GAIN_WIDTH 5 /* EQ1_B5_GAIN - [10:6] */ 38876d4baf08SMark Brown 38886d4baf08SMark Brown /* 38896d4baf08SMark Brown * R3602 (0xE12) - EQ1_3 38906d4baf08SMark Brown */ 38916d4baf08SMark Brown #define WM5100_EQ1_B1_A_MASK 0xFFFF /* EQ1_B1_A - [15:0] */ 38926d4baf08SMark Brown #define WM5100_EQ1_B1_A_SHIFT 0 /* EQ1_B1_A - [15:0] */ 38936d4baf08SMark Brown #define WM5100_EQ1_B1_A_WIDTH 16 /* EQ1_B1_A - [15:0] */ 38946d4baf08SMark Brown 38956d4baf08SMark Brown /* 38966d4baf08SMark Brown * R3603 (0xE13) - EQ1_4 38976d4baf08SMark Brown */ 38986d4baf08SMark Brown #define WM5100_EQ1_B1_B_MASK 0xFFFF /* EQ1_B1_B - [15:0] */ 38996d4baf08SMark Brown #define WM5100_EQ1_B1_B_SHIFT 0 /* EQ1_B1_B - [15:0] */ 39006d4baf08SMark Brown #define WM5100_EQ1_B1_B_WIDTH 16 /* EQ1_B1_B - [15:0] */ 39016d4baf08SMark Brown 39026d4baf08SMark Brown /* 39036d4baf08SMark Brown * R3604 (0xE14) - EQ1_5 39046d4baf08SMark Brown */ 39056d4baf08SMark Brown #define WM5100_EQ1_B1_PG_MASK 0xFFFF /* EQ1_B1_PG - [15:0] */ 39066d4baf08SMark Brown #define WM5100_EQ1_B1_PG_SHIFT 0 /* EQ1_B1_PG - [15:0] */ 39076d4baf08SMark Brown #define WM5100_EQ1_B1_PG_WIDTH 16 /* EQ1_B1_PG - [15:0] */ 39086d4baf08SMark Brown 39096d4baf08SMark Brown /* 39106d4baf08SMark Brown * R3605 (0xE15) - EQ1_6 39116d4baf08SMark Brown */ 39126d4baf08SMark Brown #define WM5100_EQ1_B2_A_MASK 0xFFFF /* EQ1_B2_A - [15:0] */ 39136d4baf08SMark Brown #define WM5100_EQ1_B2_A_SHIFT 0 /* EQ1_B2_A - [15:0] */ 39146d4baf08SMark Brown #define WM5100_EQ1_B2_A_WIDTH 16 /* EQ1_B2_A - [15:0] */ 39156d4baf08SMark Brown 39166d4baf08SMark Brown /* 39176d4baf08SMark Brown * R3606 (0xE16) - EQ1_7 39186d4baf08SMark Brown */ 39196d4baf08SMark Brown #define WM5100_EQ1_B2_B_MASK 0xFFFF /* EQ1_B2_B - [15:0] */ 39206d4baf08SMark Brown #define WM5100_EQ1_B2_B_SHIFT 0 /* EQ1_B2_B - [15:0] */ 39216d4baf08SMark Brown #define WM5100_EQ1_B2_B_WIDTH 16 /* EQ1_B2_B - [15:0] */ 39226d4baf08SMark Brown 39236d4baf08SMark Brown /* 39246d4baf08SMark Brown * R3607 (0xE17) - EQ1_8 39256d4baf08SMark Brown */ 39266d4baf08SMark Brown #define WM5100_EQ1_B2_C_MASK 0xFFFF /* EQ1_B2_C - [15:0] */ 39276d4baf08SMark Brown #define WM5100_EQ1_B2_C_SHIFT 0 /* EQ1_B2_C - [15:0] */ 39286d4baf08SMark Brown #define WM5100_EQ1_B2_C_WIDTH 16 /* EQ1_B2_C - [15:0] */ 39296d4baf08SMark Brown 39306d4baf08SMark Brown /* 39316d4baf08SMark Brown * R3608 (0xE18) - EQ1_9 39326d4baf08SMark Brown */ 39336d4baf08SMark Brown #define WM5100_EQ1_B2_PG_MASK 0xFFFF /* EQ1_B2_PG - [15:0] */ 39346d4baf08SMark Brown #define WM5100_EQ1_B2_PG_SHIFT 0 /* EQ1_B2_PG - [15:0] */ 39356d4baf08SMark Brown #define WM5100_EQ1_B2_PG_WIDTH 16 /* EQ1_B2_PG - [15:0] */ 39366d4baf08SMark Brown 39376d4baf08SMark Brown /* 39386d4baf08SMark Brown * R3609 (0xE19) - EQ1_10 39396d4baf08SMark Brown */ 39406d4baf08SMark Brown #define WM5100_EQ1_B3_A_MASK 0xFFFF /* EQ1_B3_A - [15:0] */ 39416d4baf08SMark Brown #define WM5100_EQ1_B3_A_SHIFT 0 /* EQ1_B3_A - [15:0] */ 39426d4baf08SMark Brown #define WM5100_EQ1_B3_A_WIDTH 16 /* EQ1_B3_A - [15:0] */ 39436d4baf08SMark Brown 39446d4baf08SMark Brown /* 39456d4baf08SMark Brown * R3610 (0xE1A) - EQ1_11 39466d4baf08SMark Brown */ 39476d4baf08SMark Brown #define WM5100_EQ1_B3_B_MASK 0xFFFF /* EQ1_B3_B - [15:0] */ 39486d4baf08SMark Brown #define WM5100_EQ1_B3_B_SHIFT 0 /* EQ1_B3_B - [15:0] */ 39496d4baf08SMark Brown #define WM5100_EQ1_B3_B_WIDTH 16 /* EQ1_B3_B - [15:0] */ 39506d4baf08SMark Brown 39516d4baf08SMark Brown /* 39526d4baf08SMark Brown * R3611 (0xE1B) - EQ1_12 39536d4baf08SMark Brown */ 39546d4baf08SMark Brown #define WM5100_EQ1_B3_C_MASK 0xFFFF /* EQ1_B3_C - [15:0] */ 39556d4baf08SMark Brown #define WM5100_EQ1_B3_C_SHIFT 0 /* EQ1_B3_C - [15:0] */ 39566d4baf08SMark Brown #define WM5100_EQ1_B3_C_WIDTH 16 /* EQ1_B3_C - [15:0] */ 39576d4baf08SMark Brown 39586d4baf08SMark Brown /* 39596d4baf08SMark Brown * R3612 (0xE1C) - EQ1_13 39606d4baf08SMark Brown */ 39616d4baf08SMark Brown #define WM5100_EQ1_B3_PG_MASK 0xFFFF /* EQ1_B3_PG - [15:0] */ 39626d4baf08SMark Brown #define WM5100_EQ1_B3_PG_SHIFT 0 /* EQ1_B3_PG - [15:0] */ 39636d4baf08SMark Brown #define WM5100_EQ1_B3_PG_WIDTH 16 /* EQ1_B3_PG - [15:0] */ 39646d4baf08SMark Brown 39656d4baf08SMark Brown /* 39666d4baf08SMark Brown * R3613 (0xE1D) - EQ1_14 39676d4baf08SMark Brown */ 39686d4baf08SMark Brown #define WM5100_EQ1_B4_A_MASK 0xFFFF /* EQ1_B4_A - [15:0] */ 39696d4baf08SMark Brown #define WM5100_EQ1_B4_A_SHIFT 0 /* EQ1_B4_A - [15:0] */ 39706d4baf08SMark Brown #define WM5100_EQ1_B4_A_WIDTH 16 /* EQ1_B4_A - [15:0] */ 39716d4baf08SMark Brown 39726d4baf08SMark Brown /* 39736d4baf08SMark Brown * R3614 (0xE1E) - EQ1_15 39746d4baf08SMark Brown */ 39756d4baf08SMark Brown #define WM5100_EQ1_B4_B_MASK 0xFFFF /* EQ1_B4_B - [15:0] */ 39766d4baf08SMark Brown #define WM5100_EQ1_B4_B_SHIFT 0 /* EQ1_B4_B - [15:0] */ 39776d4baf08SMark Brown #define WM5100_EQ1_B4_B_WIDTH 16 /* EQ1_B4_B - [15:0] */ 39786d4baf08SMark Brown 39796d4baf08SMark Brown /* 39806d4baf08SMark Brown * R3615 (0xE1F) - EQ1_16 39816d4baf08SMark Brown */ 39826d4baf08SMark Brown #define WM5100_EQ1_B4_C_MASK 0xFFFF /* EQ1_B4_C - [15:0] */ 39836d4baf08SMark Brown #define WM5100_EQ1_B4_C_SHIFT 0 /* EQ1_B4_C - [15:0] */ 39846d4baf08SMark Brown #define WM5100_EQ1_B4_C_WIDTH 16 /* EQ1_B4_C - [15:0] */ 39856d4baf08SMark Brown 39866d4baf08SMark Brown /* 39876d4baf08SMark Brown * R3616 (0xE20) - EQ1_17 39886d4baf08SMark Brown */ 39896d4baf08SMark Brown #define WM5100_EQ1_B4_PG_MASK 0xFFFF /* EQ1_B4_PG - [15:0] */ 39906d4baf08SMark Brown #define WM5100_EQ1_B4_PG_SHIFT 0 /* EQ1_B4_PG - [15:0] */ 39916d4baf08SMark Brown #define WM5100_EQ1_B4_PG_WIDTH 16 /* EQ1_B4_PG - [15:0] */ 39926d4baf08SMark Brown 39936d4baf08SMark Brown /* 39946d4baf08SMark Brown * R3617 (0xE21) - EQ1_18 39956d4baf08SMark Brown */ 39966d4baf08SMark Brown #define WM5100_EQ1_B5_A_MASK 0xFFFF /* EQ1_B5_A - [15:0] */ 39976d4baf08SMark Brown #define WM5100_EQ1_B5_A_SHIFT 0 /* EQ1_B5_A - [15:0] */ 39986d4baf08SMark Brown #define WM5100_EQ1_B5_A_WIDTH 16 /* EQ1_B5_A - [15:0] */ 39996d4baf08SMark Brown 40006d4baf08SMark Brown /* 40016d4baf08SMark Brown * R3618 (0xE22) - EQ1_19 40026d4baf08SMark Brown */ 40036d4baf08SMark Brown #define WM5100_EQ1_B5_B_MASK 0xFFFF /* EQ1_B5_B - [15:0] */ 40046d4baf08SMark Brown #define WM5100_EQ1_B5_B_SHIFT 0 /* EQ1_B5_B - [15:0] */ 40056d4baf08SMark Brown #define WM5100_EQ1_B5_B_WIDTH 16 /* EQ1_B5_B - [15:0] */ 40066d4baf08SMark Brown 40076d4baf08SMark Brown /* 40086d4baf08SMark Brown * R3619 (0xE23) - EQ1_20 40096d4baf08SMark Brown */ 40106d4baf08SMark Brown #define WM5100_EQ1_B5_PG_MASK 0xFFFF /* EQ1_B5_PG - [15:0] */ 40116d4baf08SMark Brown #define WM5100_EQ1_B5_PG_SHIFT 0 /* EQ1_B5_PG - [15:0] */ 40126d4baf08SMark Brown #define WM5100_EQ1_B5_PG_WIDTH 16 /* EQ1_B5_PG - [15:0] */ 40136d4baf08SMark Brown 40146d4baf08SMark Brown /* 40156d4baf08SMark Brown * R3622 (0xE26) - EQ2_1 40166d4baf08SMark Brown */ 40176d4baf08SMark Brown #define WM5100_EQ2_B1_GAIN_MASK 0xF800 /* EQ2_B1_GAIN - [15:11] */ 40186d4baf08SMark Brown #define WM5100_EQ2_B1_GAIN_SHIFT 11 /* EQ2_B1_GAIN - [15:11] */ 40196d4baf08SMark Brown #define WM5100_EQ2_B1_GAIN_WIDTH 5 /* EQ2_B1_GAIN - [15:11] */ 40206d4baf08SMark Brown #define WM5100_EQ2_B2_GAIN_MASK 0x07C0 /* EQ2_B2_GAIN - [10:6] */ 40216d4baf08SMark Brown #define WM5100_EQ2_B2_GAIN_SHIFT 6 /* EQ2_B2_GAIN - [10:6] */ 40226d4baf08SMark Brown #define WM5100_EQ2_B2_GAIN_WIDTH 5 /* EQ2_B2_GAIN - [10:6] */ 40236d4baf08SMark Brown #define WM5100_EQ2_B3_GAIN_MASK 0x003E /* EQ2_B3_GAIN - [5:1] */ 40246d4baf08SMark Brown #define WM5100_EQ2_B3_GAIN_SHIFT 1 /* EQ2_B3_GAIN - [5:1] */ 40256d4baf08SMark Brown #define WM5100_EQ2_B3_GAIN_WIDTH 5 /* EQ2_B3_GAIN - [5:1] */ 40266d4baf08SMark Brown #define WM5100_EQ2_ENA 0x0001 /* EQ2_ENA */ 40276d4baf08SMark Brown #define WM5100_EQ2_ENA_MASK 0x0001 /* EQ2_ENA */ 40286d4baf08SMark Brown #define WM5100_EQ2_ENA_SHIFT 0 /* EQ2_ENA */ 40296d4baf08SMark Brown #define WM5100_EQ2_ENA_WIDTH 1 /* EQ2_ENA */ 40306d4baf08SMark Brown 40316d4baf08SMark Brown /* 40326d4baf08SMark Brown * R3623 (0xE27) - EQ2_2 40336d4baf08SMark Brown */ 40346d4baf08SMark Brown #define WM5100_EQ2_B4_GAIN_MASK 0xF800 /* EQ2_B4_GAIN - [15:11] */ 40356d4baf08SMark Brown #define WM5100_EQ2_B4_GAIN_SHIFT 11 /* EQ2_B4_GAIN - [15:11] */ 40366d4baf08SMark Brown #define WM5100_EQ2_B4_GAIN_WIDTH 5 /* EQ2_B4_GAIN - [15:11] */ 40376d4baf08SMark Brown #define WM5100_EQ2_B5_GAIN_MASK 0x07C0 /* EQ2_B5_GAIN - [10:6] */ 40386d4baf08SMark Brown #define WM5100_EQ2_B5_GAIN_SHIFT 6 /* EQ2_B5_GAIN - [10:6] */ 40396d4baf08SMark Brown #define WM5100_EQ2_B5_GAIN_WIDTH 5 /* EQ2_B5_GAIN - [10:6] */ 40406d4baf08SMark Brown 40416d4baf08SMark Brown /* 40426d4baf08SMark Brown * R3624 (0xE28) - EQ2_3 40436d4baf08SMark Brown */ 40446d4baf08SMark Brown #define WM5100_EQ2_B1_A_MASK 0xFFFF /* EQ2_B1_A - [15:0] */ 40456d4baf08SMark Brown #define WM5100_EQ2_B1_A_SHIFT 0 /* EQ2_B1_A - [15:0] */ 40466d4baf08SMark Brown #define WM5100_EQ2_B1_A_WIDTH 16 /* EQ2_B1_A - [15:0] */ 40476d4baf08SMark Brown 40486d4baf08SMark Brown /* 40496d4baf08SMark Brown * R3625 (0xE29) - EQ2_4 40506d4baf08SMark Brown */ 40516d4baf08SMark Brown #define WM5100_EQ2_B1_B_MASK 0xFFFF /* EQ2_B1_B - [15:0] */ 40526d4baf08SMark Brown #define WM5100_EQ2_B1_B_SHIFT 0 /* EQ2_B1_B - [15:0] */ 40536d4baf08SMark Brown #define WM5100_EQ2_B1_B_WIDTH 16 /* EQ2_B1_B - [15:0] */ 40546d4baf08SMark Brown 40556d4baf08SMark Brown /* 40566d4baf08SMark Brown * R3626 (0xE2A) - EQ2_5 40576d4baf08SMark Brown */ 40586d4baf08SMark Brown #define WM5100_EQ2_B1_PG_MASK 0xFFFF /* EQ2_B1_PG - [15:0] */ 40596d4baf08SMark Brown #define WM5100_EQ2_B1_PG_SHIFT 0 /* EQ2_B1_PG - [15:0] */ 40606d4baf08SMark Brown #define WM5100_EQ2_B1_PG_WIDTH 16 /* EQ2_B1_PG - [15:0] */ 40616d4baf08SMark Brown 40626d4baf08SMark Brown /* 40636d4baf08SMark Brown * R3627 (0xE2B) - EQ2_6 40646d4baf08SMark Brown */ 40656d4baf08SMark Brown #define WM5100_EQ2_B2_A_MASK 0xFFFF /* EQ2_B2_A - [15:0] */ 40666d4baf08SMark Brown #define WM5100_EQ2_B2_A_SHIFT 0 /* EQ2_B2_A - [15:0] */ 40676d4baf08SMark Brown #define WM5100_EQ2_B2_A_WIDTH 16 /* EQ2_B2_A - [15:0] */ 40686d4baf08SMark Brown 40696d4baf08SMark Brown /* 40706d4baf08SMark Brown * R3628 (0xE2C) - EQ2_7 40716d4baf08SMark Brown */ 40726d4baf08SMark Brown #define WM5100_EQ2_B2_B_MASK 0xFFFF /* EQ2_B2_B - [15:0] */ 40736d4baf08SMark Brown #define WM5100_EQ2_B2_B_SHIFT 0 /* EQ2_B2_B - [15:0] */ 40746d4baf08SMark Brown #define WM5100_EQ2_B2_B_WIDTH 16 /* EQ2_B2_B - [15:0] */ 40756d4baf08SMark Brown 40766d4baf08SMark Brown /* 40776d4baf08SMark Brown * R3629 (0xE2D) - EQ2_8 40786d4baf08SMark Brown */ 40796d4baf08SMark Brown #define WM5100_EQ2_B2_C_MASK 0xFFFF /* EQ2_B2_C - [15:0] */ 40806d4baf08SMark Brown #define WM5100_EQ2_B2_C_SHIFT 0 /* EQ2_B2_C - [15:0] */ 40816d4baf08SMark Brown #define WM5100_EQ2_B2_C_WIDTH 16 /* EQ2_B2_C - [15:0] */ 40826d4baf08SMark Brown 40836d4baf08SMark Brown /* 40846d4baf08SMark Brown * R3630 (0xE2E) - EQ2_9 40856d4baf08SMark Brown */ 40866d4baf08SMark Brown #define WM5100_EQ2_B2_PG_MASK 0xFFFF /* EQ2_B2_PG - [15:0] */ 40876d4baf08SMark Brown #define WM5100_EQ2_B2_PG_SHIFT 0 /* EQ2_B2_PG - [15:0] */ 40886d4baf08SMark Brown #define WM5100_EQ2_B2_PG_WIDTH 16 /* EQ2_B2_PG - [15:0] */ 40896d4baf08SMark Brown 40906d4baf08SMark Brown /* 40916d4baf08SMark Brown * R3631 (0xE2F) - EQ2_10 40926d4baf08SMark Brown */ 40936d4baf08SMark Brown #define WM5100_EQ2_B3_A_MASK 0xFFFF /* EQ2_B3_A - [15:0] */ 40946d4baf08SMark Brown #define WM5100_EQ2_B3_A_SHIFT 0 /* EQ2_B3_A - [15:0] */ 40956d4baf08SMark Brown #define WM5100_EQ2_B3_A_WIDTH 16 /* EQ2_B3_A - [15:0] */ 40966d4baf08SMark Brown 40976d4baf08SMark Brown /* 40986d4baf08SMark Brown * R3632 (0xE30) - EQ2_11 40996d4baf08SMark Brown */ 41006d4baf08SMark Brown #define WM5100_EQ2_B3_B_MASK 0xFFFF /* EQ2_B3_B - [15:0] */ 41016d4baf08SMark Brown #define WM5100_EQ2_B3_B_SHIFT 0 /* EQ2_B3_B - [15:0] */ 41026d4baf08SMark Brown #define WM5100_EQ2_B3_B_WIDTH 16 /* EQ2_B3_B - [15:0] */ 41036d4baf08SMark Brown 41046d4baf08SMark Brown /* 41056d4baf08SMark Brown * R3633 (0xE31) - EQ2_12 41066d4baf08SMark Brown */ 41076d4baf08SMark Brown #define WM5100_EQ2_B3_C_MASK 0xFFFF /* EQ2_B3_C - [15:0] */ 41086d4baf08SMark Brown #define WM5100_EQ2_B3_C_SHIFT 0 /* EQ2_B3_C - [15:0] */ 41096d4baf08SMark Brown #define WM5100_EQ2_B3_C_WIDTH 16 /* EQ2_B3_C - [15:0] */ 41106d4baf08SMark Brown 41116d4baf08SMark Brown /* 41126d4baf08SMark Brown * R3634 (0xE32) - EQ2_13 41136d4baf08SMark Brown */ 41146d4baf08SMark Brown #define WM5100_EQ2_B3_PG_MASK 0xFFFF /* EQ2_B3_PG - [15:0] */ 41156d4baf08SMark Brown #define WM5100_EQ2_B3_PG_SHIFT 0 /* EQ2_B3_PG - [15:0] */ 41166d4baf08SMark Brown #define WM5100_EQ2_B3_PG_WIDTH 16 /* EQ2_B3_PG - [15:0] */ 41176d4baf08SMark Brown 41186d4baf08SMark Brown /* 41196d4baf08SMark Brown * R3635 (0xE33) - EQ2_14 41206d4baf08SMark Brown */ 41216d4baf08SMark Brown #define WM5100_EQ2_B4_A_MASK 0xFFFF /* EQ2_B4_A - [15:0] */ 41226d4baf08SMark Brown #define WM5100_EQ2_B4_A_SHIFT 0 /* EQ2_B4_A - [15:0] */ 41236d4baf08SMark Brown #define WM5100_EQ2_B4_A_WIDTH 16 /* EQ2_B4_A - [15:0] */ 41246d4baf08SMark Brown 41256d4baf08SMark Brown /* 41266d4baf08SMark Brown * R3636 (0xE34) - EQ2_15 41276d4baf08SMark Brown */ 41286d4baf08SMark Brown #define WM5100_EQ2_B4_B_MASK 0xFFFF /* EQ2_B4_B - [15:0] */ 41296d4baf08SMark Brown #define WM5100_EQ2_B4_B_SHIFT 0 /* EQ2_B4_B - [15:0] */ 41306d4baf08SMark Brown #define WM5100_EQ2_B4_B_WIDTH 16 /* EQ2_B4_B - [15:0] */ 41316d4baf08SMark Brown 41326d4baf08SMark Brown /* 41336d4baf08SMark Brown * R3637 (0xE35) - EQ2_16 41346d4baf08SMark Brown */ 41356d4baf08SMark Brown #define WM5100_EQ2_B4_C_MASK 0xFFFF /* EQ2_B4_C - [15:0] */ 41366d4baf08SMark Brown #define WM5100_EQ2_B4_C_SHIFT 0 /* EQ2_B4_C - [15:0] */ 41376d4baf08SMark Brown #define WM5100_EQ2_B4_C_WIDTH 16 /* EQ2_B4_C - [15:0] */ 41386d4baf08SMark Brown 41396d4baf08SMark Brown /* 41406d4baf08SMark Brown * R3638 (0xE36) - EQ2_17 41416d4baf08SMark Brown */ 41426d4baf08SMark Brown #define WM5100_EQ2_B4_PG_MASK 0xFFFF /* EQ2_B4_PG - [15:0] */ 41436d4baf08SMark Brown #define WM5100_EQ2_B4_PG_SHIFT 0 /* EQ2_B4_PG - [15:0] */ 41446d4baf08SMark Brown #define WM5100_EQ2_B4_PG_WIDTH 16 /* EQ2_B4_PG - [15:0] */ 41456d4baf08SMark Brown 41466d4baf08SMark Brown /* 41476d4baf08SMark Brown * R3639 (0xE37) - EQ2_18 41486d4baf08SMark Brown */ 41496d4baf08SMark Brown #define WM5100_EQ2_B5_A_MASK 0xFFFF /* EQ2_B5_A - [15:0] */ 41506d4baf08SMark Brown #define WM5100_EQ2_B5_A_SHIFT 0 /* EQ2_B5_A - [15:0] */ 41516d4baf08SMark Brown #define WM5100_EQ2_B5_A_WIDTH 16 /* EQ2_B5_A - [15:0] */ 41526d4baf08SMark Brown 41536d4baf08SMark Brown /* 41546d4baf08SMark Brown * R3640 (0xE38) - EQ2_19 41556d4baf08SMark Brown */ 41566d4baf08SMark Brown #define WM5100_EQ2_B5_B_MASK 0xFFFF /* EQ2_B5_B - [15:0] */ 41576d4baf08SMark Brown #define WM5100_EQ2_B5_B_SHIFT 0 /* EQ2_B5_B - [15:0] */ 41586d4baf08SMark Brown #define WM5100_EQ2_B5_B_WIDTH 16 /* EQ2_B5_B - [15:0] */ 41596d4baf08SMark Brown 41606d4baf08SMark Brown /* 41616d4baf08SMark Brown * R3641 (0xE39) - EQ2_20 41626d4baf08SMark Brown */ 41636d4baf08SMark Brown #define WM5100_EQ2_B5_PG_MASK 0xFFFF /* EQ2_B5_PG - [15:0] */ 41646d4baf08SMark Brown #define WM5100_EQ2_B5_PG_SHIFT 0 /* EQ2_B5_PG - [15:0] */ 41656d4baf08SMark Brown #define WM5100_EQ2_B5_PG_WIDTH 16 /* EQ2_B5_PG - [15:0] */ 41666d4baf08SMark Brown 41676d4baf08SMark Brown /* 41686d4baf08SMark Brown * R3644 (0xE3C) - EQ3_1 41696d4baf08SMark Brown */ 41706d4baf08SMark Brown #define WM5100_EQ3_B1_GAIN_MASK 0xF800 /* EQ3_B1_GAIN - [15:11] */ 41716d4baf08SMark Brown #define WM5100_EQ3_B1_GAIN_SHIFT 11 /* EQ3_B1_GAIN - [15:11] */ 41726d4baf08SMark Brown #define WM5100_EQ3_B1_GAIN_WIDTH 5 /* EQ3_B1_GAIN - [15:11] */ 41736d4baf08SMark Brown #define WM5100_EQ3_B2_GAIN_MASK 0x07C0 /* EQ3_B2_GAIN - [10:6] */ 41746d4baf08SMark Brown #define WM5100_EQ3_B2_GAIN_SHIFT 6 /* EQ3_B2_GAIN - [10:6] */ 41756d4baf08SMark Brown #define WM5100_EQ3_B2_GAIN_WIDTH 5 /* EQ3_B2_GAIN - [10:6] */ 41766d4baf08SMark Brown #define WM5100_EQ3_B3_GAIN_MASK 0x003E /* EQ3_B3_GAIN - [5:1] */ 41776d4baf08SMark Brown #define WM5100_EQ3_B3_GAIN_SHIFT 1 /* EQ3_B3_GAIN - [5:1] */ 41786d4baf08SMark Brown #define WM5100_EQ3_B3_GAIN_WIDTH 5 /* EQ3_B3_GAIN - [5:1] */ 41796d4baf08SMark Brown #define WM5100_EQ3_ENA 0x0001 /* EQ3_ENA */ 41806d4baf08SMark Brown #define WM5100_EQ3_ENA_MASK 0x0001 /* EQ3_ENA */ 41816d4baf08SMark Brown #define WM5100_EQ3_ENA_SHIFT 0 /* EQ3_ENA */ 41826d4baf08SMark Brown #define WM5100_EQ3_ENA_WIDTH 1 /* EQ3_ENA */ 41836d4baf08SMark Brown 41846d4baf08SMark Brown /* 41856d4baf08SMark Brown * R3645 (0xE3D) - EQ3_2 41866d4baf08SMark Brown */ 41876d4baf08SMark Brown #define WM5100_EQ3_B4_GAIN_MASK 0xF800 /* EQ3_B4_GAIN - [15:11] */ 41886d4baf08SMark Brown #define WM5100_EQ3_B4_GAIN_SHIFT 11 /* EQ3_B4_GAIN - [15:11] */ 41896d4baf08SMark Brown #define WM5100_EQ3_B4_GAIN_WIDTH 5 /* EQ3_B4_GAIN - [15:11] */ 41906d4baf08SMark Brown #define WM5100_EQ3_B5_GAIN_MASK 0x07C0 /* EQ3_B5_GAIN - [10:6] */ 41916d4baf08SMark Brown #define WM5100_EQ3_B5_GAIN_SHIFT 6 /* EQ3_B5_GAIN - [10:6] */ 41926d4baf08SMark Brown #define WM5100_EQ3_B5_GAIN_WIDTH 5 /* EQ3_B5_GAIN - [10:6] */ 41936d4baf08SMark Brown 41946d4baf08SMark Brown /* 41956d4baf08SMark Brown * R3646 (0xE3E) - EQ3_3 41966d4baf08SMark Brown */ 41976d4baf08SMark Brown #define WM5100_EQ3_B1_A_MASK 0xFFFF /* EQ3_B1_A - [15:0] */ 41986d4baf08SMark Brown #define WM5100_EQ3_B1_A_SHIFT 0 /* EQ3_B1_A - [15:0] */ 41996d4baf08SMark Brown #define WM5100_EQ3_B1_A_WIDTH 16 /* EQ3_B1_A - [15:0] */ 42006d4baf08SMark Brown 42016d4baf08SMark Brown /* 42026d4baf08SMark Brown * R3647 (0xE3F) - EQ3_4 42036d4baf08SMark Brown */ 42046d4baf08SMark Brown #define WM5100_EQ3_B1_B_MASK 0xFFFF /* EQ3_B1_B - [15:0] */ 42056d4baf08SMark Brown #define WM5100_EQ3_B1_B_SHIFT 0 /* EQ3_B1_B - [15:0] */ 42066d4baf08SMark Brown #define WM5100_EQ3_B1_B_WIDTH 16 /* EQ3_B1_B - [15:0] */ 42076d4baf08SMark Brown 42086d4baf08SMark Brown /* 42096d4baf08SMark Brown * R3648 (0xE40) - EQ3_5 42106d4baf08SMark Brown */ 42116d4baf08SMark Brown #define WM5100_EQ3_B1_PG_MASK 0xFFFF /* EQ3_B1_PG - [15:0] */ 42126d4baf08SMark Brown #define WM5100_EQ3_B1_PG_SHIFT 0 /* EQ3_B1_PG - [15:0] */ 42136d4baf08SMark Brown #define WM5100_EQ3_B1_PG_WIDTH 16 /* EQ3_B1_PG - [15:0] */ 42146d4baf08SMark Brown 42156d4baf08SMark Brown /* 42166d4baf08SMark Brown * R3649 (0xE41) - EQ3_6 42176d4baf08SMark Brown */ 42186d4baf08SMark Brown #define WM5100_EQ3_B2_A_MASK 0xFFFF /* EQ3_B2_A - [15:0] */ 42196d4baf08SMark Brown #define WM5100_EQ3_B2_A_SHIFT 0 /* EQ3_B2_A - [15:0] */ 42206d4baf08SMark Brown #define WM5100_EQ3_B2_A_WIDTH 16 /* EQ3_B2_A - [15:0] */ 42216d4baf08SMark Brown 42226d4baf08SMark Brown /* 42236d4baf08SMark Brown * R3650 (0xE42) - EQ3_7 42246d4baf08SMark Brown */ 42256d4baf08SMark Brown #define WM5100_EQ3_B2_B_MASK 0xFFFF /* EQ3_B2_B - [15:0] */ 42266d4baf08SMark Brown #define WM5100_EQ3_B2_B_SHIFT 0 /* EQ3_B2_B - [15:0] */ 42276d4baf08SMark Brown #define WM5100_EQ3_B2_B_WIDTH 16 /* EQ3_B2_B - [15:0] */ 42286d4baf08SMark Brown 42296d4baf08SMark Brown /* 42306d4baf08SMark Brown * R3651 (0xE43) - EQ3_8 42316d4baf08SMark Brown */ 42326d4baf08SMark Brown #define WM5100_EQ3_B2_C_MASK 0xFFFF /* EQ3_B2_C - [15:0] */ 42336d4baf08SMark Brown #define WM5100_EQ3_B2_C_SHIFT 0 /* EQ3_B2_C - [15:0] */ 42346d4baf08SMark Brown #define WM5100_EQ3_B2_C_WIDTH 16 /* EQ3_B2_C - [15:0] */ 42356d4baf08SMark Brown 42366d4baf08SMark Brown /* 42376d4baf08SMark Brown * R3652 (0xE44) - EQ3_9 42386d4baf08SMark Brown */ 42396d4baf08SMark Brown #define WM5100_EQ3_B2_PG_MASK 0xFFFF /* EQ3_B2_PG - [15:0] */ 42406d4baf08SMark Brown #define WM5100_EQ3_B2_PG_SHIFT 0 /* EQ3_B2_PG - [15:0] */ 42416d4baf08SMark Brown #define WM5100_EQ3_B2_PG_WIDTH 16 /* EQ3_B2_PG - [15:0] */ 42426d4baf08SMark Brown 42436d4baf08SMark Brown /* 42446d4baf08SMark Brown * R3653 (0xE45) - EQ3_10 42456d4baf08SMark Brown */ 42466d4baf08SMark Brown #define WM5100_EQ3_B3_A_MASK 0xFFFF /* EQ3_B3_A - [15:0] */ 42476d4baf08SMark Brown #define WM5100_EQ3_B3_A_SHIFT 0 /* EQ3_B3_A - [15:0] */ 42486d4baf08SMark Brown #define WM5100_EQ3_B3_A_WIDTH 16 /* EQ3_B3_A - [15:0] */ 42496d4baf08SMark Brown 42506d4baf08SMark Brown /* 42516d4baf08SMark Brown * R3654 (0xE46) - EQ3_11 42526d4baf08SMark Brown */ 42536d4baf08SMark Brown #define WM5100_EQ3_B3_B_MASK 0xFFFF /* EQ3_B3_B - [15:0] */ 42546d4baf08SMark Brown #define WM5100_EQ3_B3_B_SHIFT 0 /* EQ3_B3_B - [15:0] */ 42556d4baf08SMark Brown #define WM5100_EQ3_B3_B_WIDTH 16 /* EQ3_B3_B - [15:0] */ 42566d4baf08SMark Brown 42576d4baf08SMark Brown /* 42586d4baf08SMark Brown * R3655 (0xE47) - EQ3_12 42596d4baf08SMark Brown */ 42606d4baf08SMark Brown #define WM5100_EQ3_B3_C_MASK 0xFFFF /* EQ3_B3_C - [15:0] */ 42616d4baf08SMark Brown #define WM5100_EQ3_B3_C_SHIFT 0 /* EQ3_B3_C - [15:0] */ 42626d4baf08SMark Brown #define WM5100_EQ3_B3_C_WIDTH 16 /* EQ3_B3_C - [15:0] */ 42636d4baf08SMark Brown 42646d4baf08SMark Brown /* 42656d4baf08SMark Brown * R3656 (0xE48) - EQ3_13 42666d4baf08SMark Brown */ 42676d4baf08SMark Brown #define WM5100_EQ3_B3_PG_MASK 0xFFFF /* EQ3_B3_PG - [15:0] */ 42686d4baf08SMark Brown #define WM5100_EQ3_B3_PG_SHIFT 0 /* EQ3_B3_PG - [15:0] */ 42696d4baf08SMark Brown #define WM5100_EQ3_B3_PG_WIDTH 16 /* EQ3_B3_PG - [15:0] */ 42706d4baf08SMark Brown 42716d4baf08SMark Brown /* 42726d4baf08SMark Brown * R3657 (0xE49) - EQ3_14 42736d4baf08SMark Brown */ 42746d4baf08SMark Brown #define WM5100_EQ3_B4_A_MASK 0xFFFF /* EQ3_B4_A - [15:0] */ 42756d4baf08SMark Brown #define WM5100_EQ3_B4_A_SHIFT 0 /* EQ3_B4_A - [15:0] */ 42766d4baf08SMark Brown #define WM5100_EQ3_B4_A_WIDTH 16 /* EQ3_B4_A - [15:0] */ 42776d4baf08SMark Brown 42786d4baf08SMark Brown /* 42796d4baf08SMark Brown * R3658 (0xE4A) - EQ3_15 42806d4baf08SMark Brown */ 42816d4baf08SMark Brown #define WM5100_EQ3_B4_B_MASK 0xFFFF /* EQ3_B4_B - [15:0] */ 42826d4baf08SMark Brown #define WM5100_EQ3_B4_B_SHIFT 0 /* EQ3_B4_B - [15:0] */ 42836d4baf08SMark Brown #define WM5100_EQ3_B4_B_WIDTH 16 /* EQ3_B4_B - [15:0] */ 42846d4baf08SMark Brown 42856d4baf08SMark Brown /* 42866d4baf08SMark Brown * R3659 (0xE4B) - EQ3_16 42876d4baf08SMark Brown */ 42886d4baf08SMark Brown #define WM5100_EQ3_B4_C_MASK 0xFFFF /* EQ3_B4_C - [15:0] */ 42896d4baf08SMark Brown #define WM5100_EQ3_B4_C_SHIFT 0 /* EQ3_B4_C - [15:0] */ 42906d4baf08SMark Brown #define WM5100_EQ3_B4_C_WIDTH 16 /* EQ3_B4_C - [15:0] */ 42916d4baf08SMark Brown 42926d4baf08SMark Brown /* 42936d4baf08SMark Brown * R3660 (0xE4C) - EQ3_17 42946d4baf08SMark Brown */ 42956d4baf08SMark Brown #define WM5100_EQ3_B4_PG_MASK 0xFFFF /* EQ3_B4_PG - [15:0] */ 42966d4baf08SMark Brown #define WM5100_EQ3_B4_PG_SHIFT 0 /* EQ3_B4_PG - [15:0] */ 42976d4baf08SMark Brown #define WM5100_EQ3_B4_PG_WIDTH 16 /* EQ3_B4_PG - [15:0] */ 42986d4baf08SMark Brown 42996d4baf08SMark Brown /* 43006d4baf08SMark Brown * R3661 (0xE4D) - EQ3_18 43016d4baf08SMark Brown */ 43026d4baf08SMark Brown #define WM5100_EQ3_B5_A_MASK 0xFFFF /* EQ3_B5_A - [15:0] */ 43036d4baf08SMark Brown #define WM5100_EQ3_B5_A_SHIFT 0 /* EQ3_B5_A - [15:0] */ 43046d4baf08SMark Brown #define WM5100_EQ3_B5_A_WIDTH 16 /* EQ3_B5_A - [15:0] */ 43056d4baf08SMark Brown 43066d4baf08SMark Brown /* 43076d4baf08SMark Brown * R3662 (0xE4E) - EQ3_19 43086d4baf08SMark Brown */ 43096d4baf08SMark Brown #define WM5100_EQ3_B5_B_MASK 0xFFFF /* EQ3_B5_B - [15:0] */ 43106d4baf08SMark Brown #define WM5100_EQ3_B5_B_SHIFT 0 /* EQ3_B5_B - [15:0] */ 43116d4baf08SMark Brown #define WM5100_EQ3_B5_B_WIDTH 16 /* EQ3_B5_B - [15:0] */ 43126d4baf08SMark Brown 43136d4baf08SMark Brown /* 43146d4baf08SMark Brown * R3663 (0xE4F) - EQ3_20 43156d4baf08SMark Brown */ 43166d4baf08SMark Brown #define WM5100_EQ3_B5_PG_MASK 0xFFFF /* EQ3_B5_PG - [15:0] */ 43176d4baf08SMark Brown #define WM5100_EQ3_B5_PG_SHIFT 0 /* EQ3_B5_PG - [15:0] */ 43186d4baf08SMark Brown #define WM5100_EQ3_B5_PG_WIDTH 16 /* EQ3_B5_PG - [15:0] */ 43196d4baf08SMark Brown 43206d4baf08SMark Brown /* 43216d4baf08SMark Brown * R3666 (0xE52) - EQ4_1 43226d4baf08SMark Brown */ 43236d4baf08SMark Brown #define WM5100_EQ4_B1_GAIN_MASK 0xF800 /* EQ4_B1_GAIN - [15:11] */ 43246d4baf08SMark Brown #define WM5100_EQ4_B1_GAIN_SHIFT 11 /* EQ4_B1_GAIN - [15:11] */ 43256d4baf08SMark Brown #define WM5100_EQ4_B1_GAIN_WIDTH 5 /* EQ4_B1_GAIN - [15:11] */ 43266d4baf08SMark Brown #define WM5100_EQ4_B2_GAIN_MASK 0x07C0 /* EQ4_B2_GAIN - [10:6] */ 43276d4baf08SMark Brown #define WM5100_EQ4_B2_GAIN_SHIFT 6 /* EQ4_B2_GAIN - [10:6] */ 43286d4baf08SMark Brown #define WM5100_EQ4_B2_GAIN_WIDTH 5 /* EQ4_B2_GAIN - [10:6] */ 43296d4baf08SMark Brown #define WM5100_EQ4_B3_GAIN_MASK 0x003E /* EQ4_B3_GAIN - [5:1] */ 43306d4baf08SMark Brown #define WM5100_EQ4_B3_GAIN_SHIFT 1 /* EQ4_B3_GAIN - [5:1] */ 43316d4baf08SMark Brown #define WM5100_EQ4_B3_GAIN_WIDTH 5 /* EQ4_B3_GAIN - [5:1] */ 43326d4baf08SMark Brown #define WM5100_EQ4_ENA 0x0001 /* EQ4_ENA */ 43336d4baf08SMark Brown #define WM5100_EQ4_ENA_MASK 0x0001 /* EQ4_ENA */ 43346d4baf08SMark Brown #define WM5100_EQ4_ENA_SHIFT 0 /* EQ4_ENA */ 43356d4baf08SMark Brown #define WM5100_EQ4_ENA_WIDTH 1 /* EQ4_ENA */ 43366d4baf08SMark Brown 43376d4baf08SMark Brown /* 43386d4baf08SMark Brown * R3667 (0xE53) - EQ4_2 43396d4baf08SMark Brown */ 43406d4baf08SMark Brown #define WM5100_EQ4_B4_GAIN_MASK 0xF800 /* EQ4_B4_GAIN - [15:11] */ 43416d4baf08SMark Brown #define WM5100_EQ4_B4_GAIN_SHIFT 11 /* EQ4_B4_GAIN - [15:11] */ 43426d4baf08SMark Brown #define WM5100_EQ4_B4_GAIN_WIDTH 5 /* EQ4_B4_GAIN - [15:11] */ 43436d4baf08SMark Brown #define WM5100_EQ4_B5_GAIN_MASK 0x07C0 /* EQ4_B5_GAIN - [10:6] */ 43446d4baf08SMark Brown #define WM5100_EQ4_B5_GAIN_SHIFT 6 /* EQ4_B5_GAIN - [10:6] */ 43456d4baf08SMark Brown #define WM5100_EQ4_B5_GAIN_WIDTH 5 /* EQ4_B5_GAIN - [10:6] */ 43466d4baf08SMark Brown 43476d4baf08SMark Brown /* 43486d4baf08SMark Brown * R3668 (0xE54) - EQ4_3 43496d4baf08SMark Brown */ 43506d4baf08SMark Brown #define WM5100_EQ4_B1_A_MASK 0xFFFF /* EQ4_B1_A - [15:0] */ 43516d4baf08SMark Brown #define WM5100_EQ4_B1_A_SHIFT 0 /* EQ4_B1_A - [15:0] */ 43526d4baf08SMark Brown #define WM5100_EQ4_B1_A_WIDTH 16 /* EQ4_B1_A - [15:0] */ 43536d4baf08SMark Brown 43546d4baf08SMark Brown /* 43556d4baf08SMark Brown * R3669 (0xE55) - EQ4_4 43566d4baf08SMark Brown */ 43576d4baf08SMark Brown #define WM5100_EQ4_B1_B_MASK 0xFFFF /* EQ4_B1_B - [15:0] */ 43586d4baf08SMark Brown #define WM5100_EQ4_B1_B_SHIFT 0 /* EQ4_B1_B - [15:0] */ 43596d4baf08SMark Brown #define WM5100_EQ4_B1_B_WIDTH 16 /* EQ4_B1_B - [15:0] */ 43606d4baf08SMark Brown 43616d4baf08SMark Brown /* 43626d4baf08SMark Brown * R3670 (0xE56) - EQ4_5 43636d4baf08SMark Brown */ 43646d4baf08SMark Brown #define WM5100_EQ4_B1_PG_MASK 0xFFFF /* EQ4_B1_PG - [15:0] */ 43656d4baf08SMark Brown #define WM5100_EQ4_B1_PG_SHIFT 0 /* EQ4_B1_PG - [15:0] */ 43666d4baf08SMark Brown #define WM5100_EQ4_B1_PG_WIDTH 16 /* EQ4_B1_PG - [15:0] */ 43676d4baf08SMark Brown 43686d4baf08SMark Brown /* 43696d4baf08SMark Brown * R3671 (0xE57) - EQ4_6 43706d4baf08SMark Brown */ 43716d4baf08SMark Brown #define WM5100_EQ4_B2_A_MASK 0xFFFF /* EQ4_B2_A - [15:0] */ 43726d4baf08SMark Brown #define WM5100_EQ4_B2_A_SHIFT 0 /* EQ4_B2_A - [15:0] */ 43736d4baf08SMark Brown #define WM5100_EQ4_B2_A_WIDTH 16 /* EQ4_B2_A - [15:0] */ 43746d4baf08SMark Brown 43756d4baf08SMark Brown /* 43766d4baf08SMark Brown * R3672 (0xE58) - EQ4_7 43776d4baf08SMark Brown */ 43786d4baf08SMark Brown #define WM5100_EQ4_B2_B_MASK 0xFFFF /* EQ4_B2_B - [15:0] */ 43796d4baf08SMark Brown #define WM5100_EQ4_B2_B_SHIFT 0 /* EQ4_B2_B - [15:0] */ 43806d4baf08SMark Brown #define WM5100_EQ4_B2_B_WIDTH 16 /* EQ4_B2_B - [15:0] */ 43816d4baf08SMark Brown 43826d4baf08SMark Brown /* 43836d4baf08SMark Brown * R3673 (0xE59) - EQ4_8 43846d4baf08SMark Brown */ 43856d4baf08SMark Brown #define WM5100_EQ4_B2_C_MASK 0xFFFF /* EQ4_B2_C - [15:0] */ 43866d4baf08SMark Brown #define WM5100_EQ4_B2_C_SHIFT 0 /* EQ4_B2_C - [15:0] */ 43876d4baf08SMark Brown #define WM5100_EQ4_B2_C_WIDTH 16 /* EQ4_B2_C - [15:0] */ 43886d4baf08SMark Brown 43896d4baf08SMark Brown /* 43906d4baf08SMark Brown * R3674 (0xE5A) - EQ4_9 43916d4baf08SMark Brown */ 43926d4baf08SMark Brown #define WM5100_EQ4_B2_PG_MASK 0xFFFF /* EQ4_B2_PG - [15:0] */ 43936d4baf08SMark Brown #define WM5100_EQ4_B2_PG_SHIFT 0 /* EQ4_B2_PG - [15:0] */ 43946d4baf08SMark Brown #define WM5100_EQ4_B2_PG_WIDTH 16 /* EQ4_B2_PG - [15:0] */ 43956d4baf08SMark Brown 43966d4baf08SMark Brown /* 43976d4baf08SMark Brown * R3675 (0xE5B) - EQ4_10 43986d4baf08SMark Brown */ 43996d4baf08SMark Brown #define WM5100_EQ4_B3_A_MASK 0xFFFF /* EQ4_B3_A - [15:0] */ 44006d4baf08SMark Brown #define WM5100_EQ4_B3_A_SHIFT 0 /* EQ4_B3_A - [15:0] */ 44016d4baf08SMark Brown #define WM5100_EQ4_B3_A_WIDTH 16 /* EQ4_B3_A - [15:0] */ 44026d4baf08SMark Brown 44036d4baf08SMark Brown /* 44046d4baf08SMark Brown * R3676 (0xE5C) - EQ4_11 44056d4baf08SMark Brown */ 44066d4baf08SMark Brown #define WM5100_EQ4_B3_B_MASK 0xFFFF /* EQ4_B3_B - [15:0] */ 44076d4baf08SMark Brown #define WM5100_EQ4_B3_B_SHIFT 0 /* EQ4_B3_B - [15:0] */ 44086d4baf08SMark Brown #define WM5100_EQ4_B3_B_WIDTH 16 /* EQ4_B3_B - [15:0] */ 44096d4baf08SMark Brown 44106d4baf08SMark Brown /* 44116d4baf08SMark Brown * R3677 (0xE5D) - EQ4_12 44126d4baf08SMark Brown */ 44136d4baf08SMark Brown #define WM5100_EQ4_B3_C_MASK 0xFFFF /* EQ4_B3_C - [15:0] */ 44146d4baf08SMark Brown #define WM5100_EQ4_B3_C_SHIFT 0 /* EQ4_B3_C - [15:0] */ 44156d4baf08SMark Brown #define WM5100_EQ4_B3_C_WIDTH 16 /* EQ4_B3_C - [15:0] */ 44166d4baf08SMark Brown 44176d4baf08SMark Brown /* 44186d4baf08SMark Brown * R3678 (0xE5E) - EQ4_13 44196d4baf08SMark Brown */ 44206d4baf08SMark Brown #define WM5100_EQ4_B3_PG_MASK 0xFFFF /* EQ4_B3_PG - [15:0] */ 44216d4baf08SMark Brown #define WM5100_EQ4_B3_PG_SHIFT 0 /* EQ4_B3_PG - [15:0] */ 44226d4baf08SMark Brown #define WM5100_EQ4_B3_PG_WIDTH 16 /* EQ4_B3_PG - [15:0] */ 44236d4baf08SMark Brown 44246d4baf08SMark Brown /* 44256d4baf08SMark Brown * R3679 (0xE5F) - EQ4_14 44266d4baf08SMark Brown */ 44276d4baf08SMark Brown #define WM5100_EQ4_B4_A_MASK 0xFFFF /* EQ4_B4_A - [15:0] */ 44286d4baf08SMark Brown #define WM5100_EQ4_B4_A_SHIFT 0 /* EQ4_B4_A - [15:0] */ 44296d4baf08SMark Brown #define WM5100_EQ4_B4_A_WIDTH 16 /* EQ4_B4_A - [15:0] */ 44306d4baf08SMark Brown 44316d4baf08SMark Brown /* 44326d4baf08SMark Brown * R3680 (0xE60) - EQ4_15 44336d4baf08SMark Brown */ 44346d4baf08SMark Brown #define WM5100_EQ4_B4_B_MASK 0xFFFF /* EQ4_B4_B - [15:0] */ 44356d4baf08SMark Brown #define WM5100_EQ4_B4_B_SHIFT 0 /* EQ4_B4_B - [15:0] */ 44366d4baf08SMark Brown #define WM5100_EQ4_B4_B_WIDTH 16 /* EQ4_B4_B - [15:0] */ 44376d4baf08SMark Brown 44386d4baf08SMark Brown /* 44396d4baf08SMark Brown * R3681 (0xE61) - EQ4_16 44406d4baf08SMark Brown */ 44416d4baf08SMark Brown #define WM5100_EQ4_B4_C_MASK 0xFFFF /* EQ4_B4_C - [15:0] */ 44426d4baf08SMark Brown #define WM5100_EQ4_B4_C_SHIFT 0 /* EQ4_B4_C - [15:0] */ 44436d4baf08SMark Brown #define WM5100_EQ4_B4_C_WIDTH 16 /* EQ4_B4_C - [15:0] */ 44446d4baf08SMark Brown 44456d4baf08SMark Brown /* 44466d4baf08SMark Brown * R3682 (0xE62) - EQ4_17 44476d4baf08SMark Brown */ 44486d4baf08SMark Brown #define WM5100_EQ4_B4_PG_MASK 0xFFFF /* EQ4_B4_PG - [15:0] */ 44496d4baf08SMark Brown #define WM5100_EQ4_B4_PG_SHIFT 0 /* EQ4_B4_PG - [15:0] */ 44506d4baf08SMark Brown #define WM5100_EQ4_B4_PG_WIDTH 16 /* EQ4_B4_PG - [15:0] */ 44516d4baf08SMark Brown 44526d4baf08SMark Brown /* 44536d4baf08SMark Brown * R3683 (0xE63) - EQ4_18 44546d4baf08SMark Brown */ 44556d4baf08SMark Brown #define WM5100_EQ4_B5_A_MASK 0xFFFF /* EQ4_B5_A - [15:0] */ 44566d4baf08SMark Brown #define WM5100_EQ4_B5_A_SHIFT 0 /* EQ4_B5_A - [15:0] */ 44576d4baf08SMark Brown #define WM5100_EQ4_B5_A_WIDTH 16 /* EQ4_B5_A - [15:0] */ 44586d4baf08SMark Brown 44596d4baf08SMark Brown /* 44606d4baf08SMark Brown * R3684 (0xE64) - EQ4_19 44616d4baf08SMark Brown */ 44626d4baf08SMark Brown #define WM5100_EQ4_B5_B_MASK 0xFFFF /* EQ4_B5_B - [15:0] */ 44636d4baf08SMark Brown #define WM5100_EQ4_B5_B_SHIFT 0 /* EQ4_B5_B - [15:0] */ 44646d4baf08SMark Brown #define WM5100_EQ4_B5_B_WIDTH 16 /* EQ4_B5_B - [15:0] */ 44656d4baf08SMark Brown 44666d4baf08SMark Brown /* 44676d4baf08SMark Brown * R3685 (0xE65) - EQ4_20 44686d4baf08SMark Brown */ 44696d4baf08SMark Brown #define WM5100_EQ4_B5_PG_MASK 0xFFFF /* EQ4_B5_PG - [15:0] */ 44706d4baf08SMark Brown #define WM5100_EQ4_B5_PG_SHIFT 0 /* EQ4_B5_PG - [15:0] */ 44716d4baf08SMark Brown #define WM5100_EQ4_B5_PG_WIDTH 16 /* EQ4_B5_PG - [15:0] */ 44726d4baf08SMark Brown 44736d4baf08SMark Brown /* 44746d4baf08SMark Brown * R3712 (0xE80) - DRC1 ctrl1 44756d4baf08SMark Brown */ 44766d4baf08SMark Brown #define WM5100_DRC_SIG_DET_RMS_MASK 0xF800 /* DRC_SIG_DET_RMS - [15:11] */ 44776d4baf08SMark Brown #define WM5100_DRC_SIG_DET_RMS_SHIFT 11 /* DRC_SIG_DET_RMS - [15:11] */ 44786d4baf08SMark Brown #define WM5100_DRC_SIG_DET_RMS_WIDTH 5 /* DRC_SIG_DET_RMS - [15:11] */ 44796d4baf08SMark Brown #define WM5100_DRC_SIG_DET_PK_MASK 0x0600 /* DRC_SIG_DET_PK - [10:9] */ 44806d4baf08SMark Brown #define WM5100_DRC_SIG_DET_PK_SHIFT 9 /* DRC_SIG_DET_PK - [10:9] */ 44816d4baf08SMark Brown #define WM5100_DRC_SIG_DET_PK_WIDTH 2 /* DRC_SIG_DET_PK - [10:9] */ 44826d4baf08SMark Brown #define WM5100_DRC_NG_ENA 0x0100 /* DRC_NG_ENA */ 44836d4baf08SMark Brown #define WM5100_DRC_NG_ENA_MASK 0x0100 /* DRC_NG_ENA */ 44846d4baf08SMark Brown #define WM5100_DRC_NG_ENA_SHIFT 8 /* DRC_NG_ENA */ 44856d4baf08SMark Brown #define WM5100_DRC_NG_ENA_WIDTH 1 /* DRC_NG_ENA */ 44866d4baf08SMark Brown #define WM5100_DRC_SIG_DET_MODE 0x0080 /* DRC_SIG_DET_MODE */ 44876d4baf08SMark Brown #define WM5100_DRC_SIG_DET_MODE_MASK 0x0080 /* DRC_SIG_DET_MODE */ 44886d4baf08SMark Brown #define WM5100_DRC_SIG_DET_MODE_SHIFT 7 /* DRC_SIG_DET_MODE */ 44896d4baf08SMark Brown #define WM5100_DRC_SIG_DET_MODE_WIDTH 1 /* DRC_SIG_DET_MODE */ 44906d4baf08SMark Brown #define WM5100_DRC_SIG_DET 0x0040 /* DRC_SIG_DET */ 44916d4baf08SMark Brown #define WM5100_DRC_SIG_DET_MASK 0x0040 /* DRC_SIG_DET */ 44926d4baf08SMark Brown #define WM5100_DRC_SIG_DET_SHIFT 6 /* DRC_SIG_DET */ 44936d4baf08SMark Brown #define WM5100_DRC_SIG_DET_WIDTH 1 /* DRC_SIG_DET */ 44946d4baf08SMark Brown #define WM5100_DRC_KNEE2_OP_ENA 0x0020 /* DRC_KNEE2_OP_ENA */ 44956d4baf08SMark Brown #define WM5100_DRC_KNEE2_OP_ENA_MASK 0x0020 /* DRC_KNEE2_OP_ENA */ 44966d4baf08SMark Brown #define WM5100_DRC_KNEE2_OP_ENA_SHIFT 5 /* DRC_KNEE2_OP_ENA */ 44976d4baf08SMark Brown #define WM5100_DRC_KNEE2_OP_ENA_WIDTH 1 /* DRC_KNEE2_OP_ENA */ 44986d4baf08SMark Brown #define WM5100_DRC_QR 0x0010 /* DRC_QR */ 44996d4baf08SMark Brown #define WM5100_DRC_QR_MASK 0x0010 /* DRC_QR */ 45006d4baf08SMark Brown #define WM5100_DRC_QR_SHIFT 4 /* DRC_QR */ 45016d4baf08SMark Brown #define WM5100_DRC_QR_WIDTH 1 /* DRC_QR */ 45026d4baf08SMark Brown #define WM5100_DRC_ANTICLIP 0x0008 /* DRC_ANTICLIP */ 45036d4baf08SMark Brown #define WM5100_DRC_ANTICLIP_MASK 0x0008 /* DRC_ANTICLIP */ 45046d4baf08SMark Brown #define WM5100_DRC_ANTICLIP_SHIFT 3 /* DRC_ANTICLIP */ 45056d4baf08SMark Brown #define WM5100_DRC_ANTICLIP_WIDTH 1 /* DRC_ANTICLIP */ 45066d4baf08SMark Brown #define WM5100_DRCL_ENA 0x0002 /* DRCL_ENA */ 45076d4baf08SMark Brown #define WM5100_DRCL_ENA_MASK 0x0002 /* DRCL_ENA */ 45086d4baf08SMark Brown #define WM5100_DRCL_ENA_SHIFT 1 /* DRCL_ENA */ 45096d4baf08SMark Brown #define WM5100_DRCL_ENA_WIDTH 1 /* DRCL_ENA */ 45106d4baf08SMark Brown #define WM5100_DRCR_ENA 0x0001 /* DRCR_ENA */ 45116d4baf08SMark Brown #define WM5100_DRCR_ENA_MASK 0x0001 /* DRCR_ENA */ 45126d4baf08SMark Brown #define WM5100_DRCR_ENA_SHIFT 0 /* DRCR_ENA */ 45136d4baf08SMark Brown #define WM5100_DRCR_ENA_WIDTH 1 /* DRCR_ENA */ 45146d4baf08SMark Brown 45156d4baf08SMark Brown /* 45166d4baf08SMark Brown * R3713 (0xE81) - DRC1 ctrl2 45176d4baf08SMark Brown */ 45186d4baf08SMark Brown #define WM5100_DRC_ATK_MASK 0x1E00 /* DRC_ATK - [12:9] */ 45196d4baf08SMark Brown #define WM5100_DRC_ATK_SHIFT 9 /* DRC_ATK - [12:9] */ 45206d4baf08SMark Brown #define WM5100_DRC_ATK_WIDTH 4 /* DRC_ATK - [12:9] */ 45216d4baf08SMark Brown #define WM5100_DRC_DCY_MASK 0x01E0 /* DRC_DCY - [8:5] */ 45226d4baf08SMark Brown #define WM5100_DRC_DCY_SHIFT 5 /* DRC_DCY - [8:5] */ 45236d4baf08SMark Brown #define WM5100_DRC_DCY_WIDTH 4 /* DRC_DCY - [8:5] */ 45246d4baf08SMark Brown #define WM5100_DRC_MINGAIN_MASK 0x001C /* DRC_MINGAIN - [4:2] */ 45256d4baf08SMark Brown #define WM5100_DRC_MINGAIN_SHIFT 2 /* DRC_MINGAIN - [4:2] */ 45266d4baf08SMark Brown #define WM5100_DRC_MINGAIN_WIDTH 3 /* DRC_MINGAIN - [4:2] */ 45276d4baf08SMark Brown #define WM5100_DRC_MAXGAIN_MASK 0x0003 /* DRC_MAXGAIN - [1:0] */ 45286d4baf08SMark Brown #define WM5100_DRC_MAXGAIN_SHIFT 0 /* DRC_MAXGAIN - [1:0] */ 45296d4baf08SMark Brown #define WM5100_DRC_MAXGAIN_WIDTH 2 /* DRC_MAXGAIN - [1:0] */ 45306d4baf08SMark Brown 45316d4baf08SMark Brown /* 45326d4baf08SMark Brown * R3714 (0xE82) - DRC1 ctrl3 45336d4baf08SMark Brown */ 45346d4baf08SMark Brown #define WM5100_DRC_NG_MINGAIN_MASK 0xF000 /* DRC_NG_MINGAIN - [15:12] */ 45356d4baf08SMark Brown #define WM5100_DRC_NG_MINGAIN_SHIFT 12 /* DRC_NG_MINGAIN - [15:12] */ 45366d4baf08SMark Brown #define WM5100_DRC_NG_MINGAIN_WIDTH 4 /* DRC_NG_MINGAIN - [15:12] */ 45376d4baf08SMark Brown #define WM5100_DRC_NG_EXP_MASK 0x0C00 /* DRC_NG_EXP - [11:10] */ 45386d4baf08SMark Brown #define WM5100_DRC_NG_EXP_SHIFT 10 /* DRC_NG_EXP - [11:10] */ 45396d4baf08SMark Brown #define WM5100_DRC_NG_EXP_WIDTH 2 /* DRC_NG_EXP - [11:10] */ 45406d4baf08SMark Brown #define WM5100_DRC_QR_THR_MASK 0x0300 /* DRC_QR_THR - [9:8] */ 45416d4baf08SMark Brown #define WM5100_DRC_QR_THR_SHIFT 8 /* DRC_QR_THR - [9:8] */ 45426d4baf08SMark Brown #define WM5100_DRC_QR_THR_WIDTH 2 /* DRC_QR_THR - [9:8] */ 45436d4baf08SMark Brown #define WM5100_DRC_QR_DCY_MASK 0x00C0 /* DRC_QR_DCY - [7:6] */ 45446d4baf08SMark Brown #define WM5100_DRC_QR_DCY_SHIFT 6 /* DRC_QR_DCY - [7:6] */ 45456d4baf08SMark Brown #define WM5100_DRC_QR_DCY_WIDTH 2 /* DRC_QR_DCY - [7:6] */ 45466d4baf08SMark Brown #define WM5100_DRC_HI_COMP_MASK 0x0038 /* DRC_HI_COMP - [5:3] */ 45476d4baf08SMark Brown #define WM5100_DRC_HI_COMP_SHIFT 3 /* DRC_HI_COMP - [5:3] */ 45486d4baf08SMark Brown #define WM5100_DRC_HI_COMP_WIDTH 3 /* DRC_HI_COMP - [5:3] */ 45496d4baf08SMark Brown #define WM5100_DRC_LO_COMP_MASK 0x0007 /* DRC_LO_COMP - [2:0] */ 45506d4baf08SMark Brown #define WM5100_DRC_LO_COMP_SHIFT 0 /* DRC_LO_COMP - [2:0] */ 45516d4baf08SMark Brown #define WM5100_DRC_LO_COMP_WIDTH 3 /* DRC_LO_COMP - [2:0] */ 45526d4baf08SMark Brown 45536d4baf08SMark Brown /* 45546d4baf08SMark Brown * R3715 (0xE83) - DRC1 ctrl4 45556d4baf08SMark Brown */ 45566d4baf08SMark Brown #define WM5100_DRC_KNEE_IP_MASK 0x07E0 /* DRC_KNEE_IP - [10:5] */ 45576d4baf08SMark Brown #define WM5100_DRC_KNEE_IP_SHIFT 5 /* DRC_KNEE_IP - [10:5] */ 45586d4baf08SMark Brown #define WM5100_DRC_KNEE_IP_WIDTH 6 /* DRC_KNEE_IP - [10:5] */ 45596d4baf08SMark Brown #define WM5100_DRC_KNEE_OP_MASK 0x001F /* DRC_KNEE_OP - [4:0] */ 45606d4baf08SMark Brown #define WM5100_DRC_KNEE_OP_SHIFT 0 /* DRC_KNEE_OP - [4:0] */ 45616d4baf08SMark Brown #define WM5100_DRC_KNEE_OP_WIDTH 5 /* DRC_KNEE_OP - [4:0] */ 45626d4baf08SMark Brown 45636d4baf08SMark Brown /* 45646d4baf08SMark Brown * R3716 (0xE84) - DRC1 ctrl5 45656d4baf08SMark Brown */ 45666d4baf08SMark Brown #define WM5100_DRC_KNEE2_IP_MASK 0x03E0 /* DRC_KNEE2_IP - [9:5] */ 45676d4baf08SMark Brown #define WM5100_DRC_KNEE2_IP_SHIFT 5 /* DRC_KNEE2_IP - [9:5] */ 45686d4baf08SMark Brown #define WM5100_DRC_KNEE2_IP_WIDTH 5 /* DRC_KNEE2_IP - [9:5] */ 45696d4baf08SMark Brown #define WM5100_DRC_KNEE2_OP_MASK 0x001F /* DRC_KNEE2_OP - [4:0] */ 45706d4baf08SMark Brown #define WM5100_DRC_KNEE2_OP_SHIFT 0 /* DRC_KNEE2_OP - [4:0] */ 45716d4baf08SMark Brown #define WM5100_DRC_KNEE2_OP_WIDTH 5 /* DRC_KNEE2_OP - [4:0] */ 45726d4baf08SMark Brown 45736d4baf08SMark Brown /* 45746d4baf08SMark Brown * R3776 (0xEC0) - HPLPF1_1 45756d4baf08SMark Brown */ 45766d4baf08SMark Brown #define WM5100_LHPF1_MODE 0x0002 /* LHPF1_MODE */ 45776d4baf08SMark Brown #define WM5100_LHPF1_MODE_MASK 0x0002 /* LHPF1_MODE */ 45786d4baf08SMark Brown #define WM5100_LHPF1_MODE_SHIFT 1 /* LHPF1_MODE */ 45796d4baf08SMark Brown #define WM5100_LHPF1_MODE_WIDTH 1 /* LHPF1_MODE */ 45806d4baf08SMark Brown #define WM5100_LHPF1_ENA 0x0001 /* LHPF1_ENA */ 45816d4baf08SMark Brown #define WM5100_LHPF1_ENA_MASK 0x0001 /* LHPF1_ENA */ 45826d4baf08SMark Brown #define WM5100_LHPF1_ENA_SHIFT 0 /* LHPF1_ENA */ 45836d4baf08SMark Brown #define WM5100_LHPF1_ENA_WIDTH 1 /* LHPF1_ENA */ 45846d4baf08SMark Brown 45856d4baf08SMark Brown /* 45866d4baf08SMark Brown * R3777 (0xEC1) - HPLPF1_2 45876d4baf08SMark Brown */ 45886d4baf08SMark Brown #define WM5100_LHPF1_COEFF_MASK 0xFFFF /* LHPF1_COEFF - [15:0] */ 45896d4baf08SMark Brown #define WM5100_LHPF1_COEFF_SHIFT 0 /* LHPF1_COEFF - [15:0] */ 45906d4baf08SMark Brown #define WM5100_LHPF1_COEFF_WIDTH 16 /* LHPF1_COEFF - [15:0] */ 45916d4baf08SMark Brown 45926d4baf08SMark Brown /* 45936d4baf08SMark Brown * R3780 (0xEC4) - HPLPF2_1 45946d4baf08SMark Brown */ 45956d4baf08SMark Brown #define WM5100_LHPF2_MODE 0x0002 /* LHPF2_MODE */ 45966d4baf08SMark Brown #define WM5100_LHPF2_MODE_MASK 0x0002 /* LHPF2_MODE */ 45976d4baf08SMark Brown #define WM5100_LHPF2_MODE_SHIFT 1 /* LHPF2_MODE */ 45986d4baf08SMark Brown #define WM5100_LHPF2_MODE_WIDTH 1 /* LHPF2_MODE */ 45996d4baf08SMark Brown #define WM5100_LHPF2_ENA 0x0001 /* LHPF2_ENA */ 46006d4baf08SMark Brown #define WM5100_LHPF2_ENA_MASK 0x0001 /* LHPF2_ENA */ 46016d4baf08SMark Brown #define WM5100_LHPF2_ENA_SHIFT 0 /* LHPF2_ENA */ 46026d4baf08SMark Brown #define WM5100_LHPF2_ENA_WIDTH 1 /* LHPF2_ENA */ 46036d4baf08SMark Brown 46046d4baf08SMark Brown /* 46056d4baf08SMark Brown * R3781 (0xEC5) - HPLPF2_2 46066d4baf08SMark Brown */ 46076d4baf08SMark Brown #define WM5100_LHPF2_COEFF_MASK 0xFFFF /* LHPF2_COEFF - [15:0] */ 46086d4baf08SMark Brown #define WM5100_LHPF2_COEFF_SHIFT 0 /* LHPF2_COEFF - [15:0] */ 46096d4baf08SMark Brown #define WM5100_LHPF2_COEFF_WIDTH 16 /* LHPF2_COEFF - [15:0] */ 46106d4baf08SMark Brown 46116d4baf08SMark Brown /* 46126d4baf08SMark Brown * R3784 (0xEC8) - HPLPF3_1 46136d4baf08SMark Brown */ 46146d4baf08SMark Brown #define WM5100_LHPF3_MODE 0x0002 /* LHPF3_MODE */ 46156d4baf08SMark Brown #define WM5100_LHPF3_MODE_MASK 0x0002 /* LHPF3_MODE */ 46166d4baf08SMark Brown #define WM5100_LHPF3_MODE_SHIFT 1 /* LHPF3_MODE */ 46176d4baf08SMark Brown #define WM5100_LHPF3_MODE_WIDTH 1 /* LHPF3_MODE */ 46186d4baf08SMark Brown #define WM5100_LHPF3_ENA 0x0001 /* LHPF3_ENA */ 46196d4baf08SMark Brown #define WM5100_LHPF3_ENA_MASK 0x0001 /* LHPF3_ENA */ 46206d4baf08SMark Brown #define WM5100_LHPF3_ENA_SHIFT 0 /* LHPF3_ENA */ 46216d4baf08SMark Brown #define WM5100_LHPF3_ENA_WIDTH 1 /* LHPF3_ENA */ 46226d4baf08SMark Brown 46236d4baf08SMark Brown /* 46246d4baf08SMark Brown * R3785 (0xEC9) - HPLPF3_2 46256d4baf08SMark Brown */ 46266d4baf08SMark Brown #define WM5100_LHPF3_COEFF_MASK 0xFFFF /* LHPF3_COEFF - [15:0] */ 46276d4baf08SMark Brown #define WM5100_LHPF3_COEFF_SHIFT 0 /* LHPF3_COEFF - [15:0] */ 46286d4baf08SMark Brown #define WM5100_LHPF3_COEFF_WIDTH 16 /* LHPF3_COEFF - [15:0] */ 46296d4baf08SMark Brown 46306d4baf08SMark Brown /* 46316d4baf08SMark Brown * R3788 (0xECC) - HPLPF4_1 46326d4baf08SMark Brown */ 46336d4baf08SMark Brown #define WM5100_LHPF4_MODE 0x0002 /* LHPF4_MODE */ 46346d4baf08SMark Brown #define WM5100_LHPF4_MODE_MASK 0x0002 /* LHPF4_MODE */ 46356d4baf08SMark Brown #define WM5100_LHPF4_MODE_SHIFT 1 /* LHPF4_MODE */ 46366d4baf08SMark Brown #define WM5100_LHPF4_MODE_WIDTH 1 /* LHPF4_MODE */ 46376d4baf08SMark Brown #define WM5100_LHPF4_ENA 0x0001 /* LHPF4_ENA */ 46386d4baf08SMark Brown #define WM5100_LHPF4_ENA_MASK 0x0001 /* LHPF4_ENA */ 46396d4baf08SMark Brown #define WM5100_LHPF4_ENA_SHIFT 0 /* LHPF4_ENA */ 46406d4baf08SMark Brown #define WM5100_LHPF4_ENA_WIDTH 1 /* LHPF4_ENA */ 46416d4baf08SMark Brown 46426d4baf08SMark Brown /* 46436d4baf08SMark Brown * R3789 (0xECD) - HPLPF4_2 46446d4baf08SMark Brown */ 46456d4baf08SMark Brown #define WM5100_LHPF4_COEFF_MASK 0xFFFF /* LHPF4_COEFF - [15:0] */ 46466d4baf08SMark Brown #define WM5100_LHPF4_COEFF_SHIFT 0 /* LHPF4_COEFF - [15:0] */ 46476d4baf08SMark Brown #define WM5100_LHPF4_COEFF_WIDTH 16 /* LHPF4_COEFF - [15:0] */ 46486d4baf08SMark Brown 46496d4baf08SMark Brown /* 4650fbe5c580SMark Brown * R4132 (0x1024) - DSP2 Control 30 4651fbe5c580SMark Brown */ 4652fbe5c580SMark Brown #define WM5100_DSP2_RATE_MASK 0xC000 /* DSP2_RATE - [15:14] */ 4653fbe5c580SMark Brown #define WM5100_DSP2_RATE_SHIFT 14 /* DSP2_RATE - [15:14] */ 4654fbe5c580SMark Brown #define WM5100_DSP2_RATE_WIDTH 2 /* DSP2_RATE - [15:14] */ 4655fbe5c580SMark Brown #define WM5100_DSP2_DBG_CLK_ENA 0x0008 /* DSP2_DBG_CLK_ENA */ 4656fbe5c580SMark Brown #define WM5100_DSP2_DBG_CLK_ENA_MASK 0x0008 /* DSP2_DBG_CLK_ENA */ 4657fbe5c580SMark Brown #define WM5100_DSP2_DBG_CLK_ENA_SHIFT 3 /* DSP2_DBG_CLK_ENA */ 4658fbe5c580SMark Brown #define WM5100_DSP2_DBG_CLK_ENA_WIDTH 1 /* DSP2_DBG_CLK_ENA */ 4659fbe5c580SMark Brown #define WM5100_DSP2_SYS_ENA 0x0004 /* DSP2_SYS_ENA */ 4660fbe5c580SMark Brown #define WM5100_DSP2_SYS_ENA_MASK 0x0004 /* DSP2_SYS_ENA */ 4661fbe5c580SMark Brown #define WM5100_DSP2_SYS_ENA_SHIFT 2 /* DSP2_SYS_ENA */ 4662fbe5c580SMark Brown #define WM5100_DSP2_SYS_ENA_WIDTH 1 /* DSP2_SYS_ENA */ 4663fbe5c580SMark Brown #define WM5100_DSP2_CORE_ENA 0x0002 /* DSP2_CORE_ENA */ 4664fbe5c580SMark Brown #define WM5100_DSP2_CORE_ENA_MASK 0x0002 /* DSP2_CORE_ENA */ 4665fbe5c580SMark Brown #define WM5100_DSP2_CORE_ENA_SHIFT 1 /* DSP2_CORE_ENA */ 4666fbe5c580SMark Brown #define WM5100_DSP2_CORE_ENA_WIDTH 1 /* DSP2_CORE_ENA */ 4667fbe5c580SMark Brown #define WM5100_DSP2_START 0x0001 /* DSP2_START */ 4668fbe5c580SMark Brown #define WM5100_DSP2_START_MASK 0x0001 /* DSP2_START */ 4669fbe5c580SMark Brown #define WM5100_DSP2_START_SHIFT 0 /* DSP2_START */ 4670fbe5c580SMark Brown #define WM5100_DSP2_START_WIDTH 1 /* DSP2_START */ 4671fbe5c580SMark Brown 4672fbe5c580SMark Brown /* 4673fbe5c580SMark Brown * R3876 (0xF24) - DSP1 Control 30 4674fbe5c580SMark Brown */ 4675fbe5c580SMark Brown #define WM5100_DSP1_RATE_MASK 0xC000 /* DSP1_RATE - [15:14] */ 4676fbe5c580SMark Brown #define WM5100_DSP1_RATE_SHIFT 14 /* DSP1_RATE - [15:14] */ 4677fbe5c580SMark Brown #define WM5100_DSP1_RATE_WIDTH 2 /* DSP1_RATE - [15:14] */ 4678fbe5c580SMark Brown #define WM5100_DSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */ 4679fbe5c580SMark Brown #define WM5100_DSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */ 4680fbe5c580SMark Brown #define WM5100_DSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */ 4681fbe5c580SMark Brown #define WM5100_DSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */ 4682fbe5c580SMark Brown #define WM5100_DSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ 4683fbe5c580SMark Brown #define WM5100_DSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ 4684fbe5c580SMark Brown #define WM5100_DSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ 4685fbe5c580SMark Brown #define WM5100_DSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ 4686fbe5c580SMark Brown #define WM5100_DSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ 4687fbe5c580SMark Brown #define WM5100_DSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ 4688fbe5c580SMark Brown #define WM5100_DSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ 4689fbe5c580SMark Brown #define WM5100_DSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ 4690fbe5c580SMark Brown #define WM5100_DSP1_START 0x0001 /* DSP1_START */ 4691fbe5c580SMark Brown #define WM5100_DSP1_START_MASK 0x0001 /* DSP1_START */ 4692fbe5c580SMark Brown #define WM5100_DSP1_START_SHIFT 0 /* DSP1_START */ 4693fbe5c580SMark Brown #define WM5100_DSP1_START_WIDTH 1 /* DSP1_START */ 4694fbe5c580SMark Brown 4695fbe5c580SMark Brown /* 4696fbe5c580SMark Brown * R4388 (0x1124) - DSP3 Control 30 4697fbe5c580SMark Brown */ 4698fbe5c580SMark Brown #define WM5100_DSP3_RATE_MASK 0xC000 /* DSP3_RATE - [15:14] */ 4699fbe5c580SMark Brown #define WM5100_DSP3_RATE_SHIFT 14 /* DSP3_RATE - [15:14] */ 4700fbe5c580SMark Brown #define WM5100_DSP3_RATE_WIDTH 2 /* DSP3_RATE - [15:14] */ 4701fbe5c580SMark Brown #define WM5100_DSP3_DBG_CLK_ENA 0x0008 /* DSP3_DBG_CLK_ENA */ 4702fbe5c580SMark Brown #define WM5100_DSP3_DBG_CLK_ENA_MASK 0x0008 /* DSP3_DBG_CLK_ENA */ 4703fbe5c580SMark Brown #define WM5100_DSP3_DBG_CLK_ENA_SHIFT 3 /* DSP3_DBG_CLK_ENA */ 4704fbe5c580SMark Brown #define WM5100_DSP3_DBG_CLK_ENA_WIDTH 1 /* DSP3_DBG_CLK_ENA */ 4705fbe5c580SMark Brown #define WM5100_DSP3_SYS_ENA 0x0004 /* DSP3_SYS_ENA */ 4706fbe5c580SMark Brown #define WM5100_DSP3_SYS_ENA_MASK 0x0004 /* DSP3_SYS_ENA */ 4707fbe5c580SMark Brown #define WM5100_DSP3_SYS_ENA_SHIFT 2 /* DSP3_SYS_ENA */ 4708fbe5c580SMark Brown #define WM5100_DSP3_SYS_ENA_WIDTH 1 /* DSP3_SYS_ENA */ 4709fbe5c580SMark Brown #define WM5100_DSP3_CORE_ENA 0x0002 /* DSP3_CORE_ENA */ 4710fbe5c580SMark Brown #define WM5100_DSP3_CORE_ENA_MASK 0x0002 /* DSP3_CORE_ENA */ 4711fbe5c580SMark Brown #define WM5100_DSP3_CORE_ENA_SHIFT 1 /* DSP3_CORE_ENA */ 4712fbe5c580SMark Brown #define WM5100_DSP3_CORE_ENA_WIDTH 1 /* DSP3_CORE_ENA */ 4713fbe5c580SMark Brown #define WM5100_DSP3_START 0x0001 /* DSP3_START */ 4714fbe5c580SMark Brown #define WM5100_DSP3_START_MASK 0x0001 /* DSP3_START */ 4715fbe5c580SMark Brown #define WM5100_DSP3_START_SHIFT 0 /* DSP3_START */ 4716fbe5c580SMark Brown #define WM5100_DSP3_START_WIDTH 1 /* DSP3_START */ 4717fbe5c580SMark Brown 4718fbe5c580SMark Brown /* 47196d4baf08SMark Brown * R16384 (0x4000) - DSP1 DM 0 47206d4baf08SMark Brown */ 47216d4baf08SMark Brown #define WM5100_DSP1_DM_START_1_MASK 0x00FF /* DSP1_DM_START - [7:0] */ 47226d4baf08SMark Brown #define WM5100_DSP1_DM_START_1_SHIFT 0 /* DSP1_DM_START - [7:0] */ 47236d4baf08SMark Brown #define WM5100_DSP1_DM_START_1_WIDTH 8 /* DSP1_DM_START - [7:0] */ 47246d4baf08SMark Brown 47256d4baf08SMark Brown /* 47266d4baf08SMark Brown * R16385 (0x4001) - DSP1 DM 1 47276d4baf08SMark Brown */ 47286d4baf08SMark Brown #define WM5100_DSP1_DM_START_MASK 0xFFFF /* DSP1_DM_START - [15:0] */ 47296d4baf08SMark Brown #define WM5100_DSP1_DM_START_SHIFT 0 /* DSP1_DM_START - [15:0] */ 47306d4baf08SMark Brown #define WM5100_DSP1_DM_START_WIDTH 16 /* DSP1_DM_START - [15:0] */ 47316d4baf08SMark Brown 47326d4baf08SMark Brown /* 47336d4baf08SMark Brown * R16386 (0x4002) - DSP1 DM 2 47346d4baf08SMark Brown */ 47356d4baf08SMark Brown #define WM5100_DSP1_DM_1_1_MASK 0x00FF /* DSP1_DM_1 - [7:0] */ 47366d4baf08SMark Brown #define WM5100_DSP1_DM_1_1_SHIFT 0 /* DSP1_DM_1 - [7:0] */ 47376d4baf08SMark Brown #define WM5100_DSP1_DM_1_1_WIDTH 8 /* DSP1_DM_1 - [7:0] */ 47386d4baf08SMark Brown 47396d4baf08SMark Brown /* 47406d4baf08SMark Brown * R16387 (0x4003) - DSP1 DM 3 47416d4baf08SMark Brown */ 47426d4baf08SMark Brown #define WM5100_DSP1_DM_1_MASK 0xFFFF /* DSP1_DM_1 - [15:0] */ 47436d4baf08SMark Brown #define WM5100_DSP1_DM_1_SHIFT 0 /* DSP1_DM_1 - [15:0] */ 47446d4baf08SMark Brown #define WM5100_DSP1_DM_1_WIDTH 16 /* DSP1_DM_1 - [15:0] */ 47456d4baf08SMark Brown 47466d4baf08SMark Brown /* 47476d4baf08SMark Brown * R16892 (0x41FC) - DSP1 DM 508 47486d4baf08SMark Brown */ 47496d4baf08SMark Brown #define WM5100_DSP1_DM_254_1_MASK 0x00FF /* DSP1_DM_254 - [7:0] */ 47506d4baf08SMark Brown #define WM5100_DSP1_DM_254_1_SHIFT 0 /* DSP1_DM_254 - [7:0] */ 47516d4baf08SMark Brown #define WM5100_DSP1_DM_254_1_WIDTH 8 /* DSP1_DM_254 - [7:0] */ 47526d4baf08SMark Brown 47536d4baf08SMark Brown /* 47546d4baf08SMark Brown * R16893 (0x41FD) - DSP1 DM 509 47556d4baf08SMark Brown */ 47566d4baf08SMark Brown #define WM5100_DSP1_DM_254_MASK 0xFFFF /* DSP1_DM_254 - [15:0] */ 47576d4baf08SMark Brown #define WM5100_DSP1_DM_254_SHIFT 0 /* DSP1_DM_254 - [15:0] */ 47586d4baf08SMark Brown #define WM5100_DSP1_DM_254_WIDTH 16 /* DSP1_DM_254 - [15:0] */ 47596d4baf08SMark Brown 47606d4baf08SMark Brown /* 47616d4baf08SMark Brown * R16894 (0x41FE) - DSP1 DM 510 47626d4baf08SMark Brown */ 47636d4baf08SMark Brown #define WM5100_DSP1_DM_END_1_MASK 0x00FF /* DSP1_DM_END - [7:0] */ 47646d4baf08SMark Brown #define WM5100_DSP1_DM_END_1_SHIFT 0 /* DSP1_DM_END - [7:0] */ 47656d4baf08SMark Brown #define WM5100_DSP1_DM_END_1_WIDTH 8 /* DSP1_DM_END - [7:0] */ 47666d4baf08SMark Brown 47676d4baf08SMark Brown /* 47686d4baf08SMark Brown * R16895 (0x41FF) - DSP1 DM 511 47696d4baf08SMark Brown */ 47706d4baf08SMark Brown #define WM5100_DSP1_DM_END_MASK 0xFFFF /* DSP1_DM_END - [15:0] */ 47716d4baf08SMark Brown #define WM5100_DSP1_DM_END_SHIFT 0 /* DSP1_DM_END - [15:0] */ 47726d4baf08SMark Brown #define WM5100_DSP1_DM_END_WIDTH 16 /* DSP1_DM_END - [15:0] */ 47736d4baf08SMark Brown 47746d4baf08SMark Brown /* 47756d4baf08SMark Brown * R18432 (0x4800) - DSP1 PM 0 47766d4baf08SMark Brown */ 47776d4baf08SMark Brown #define WM5100_DSP1_PM_START_2_MASK 0x00FF /* DSP1_PM_START - [7:0] */ 47786d4baf08SMark Brown #define WM5100_DSP1_PM_START_2_SHIFT 0 /* DSP1_PM_START - [7:0] */ 47796d4baf08SMark Brown #define WM5100_DSP1_PM_START_2_WIDTH 8 /* DSP1_PM_START - [7:0] */ 47806d4baf08SMark Brown 47816d4baf08SMark Brown /* 47826d4baf08SMark Brown * R18433 (0x4801) - DSP1 PM 1 47836d4baf08SMark Brown */ 47846d4baf08SMark Brown #define WM5100_DSP1_PM_START_1_MASK 0xFFFF /* DSP1_PM_START - [15:0] */ 47856d4baf08SMark Brown #define WM5100_DSP1_PM_START_1_SHIFT 0 /* DSP1_PM_START - [15:0] */ 47866d4baf08SMark Brown #define WM5100_DSP1_PM_START_1_WIDTH 16 /* DSP1_PM_START - [15:0] */ 47876d4baf08SMark Brown 47886d4baf08SMark Brown /* 47896d4baf08SMark Brown * R18434 (0x4802) - DSP1 PM 2 47906d4baf08SMark Brown */ 47916d4baf08SMark Brown #define WM5100_DSP1_PM_START_MASK 0xFFFF /* DSP1_PM_START - [15:0] */ 47926d4baf08SMark Brown #define WM5100_DSP1_PM_START_SHIFT 0 /* DSP1_PM_START - [15:0] */ 47936d4baf08SMark Brown #define WM5100_DSP1_PM_START_WIDTH 16 /* DSP1_PM_START - [15:0] */ 47946d4baf08SMark Brown 47956d4baf08SMark Brown /* 47966d4baf08SMark Brown * R18435 (0x4803) - DSP1 PM 3 47976d4baf08SMark Brown */ 47986d4baf08SMark Brown #define WM5100_DSP1_PM_1_2_MASK 0x00FF /* DSP1_PM_1 - [7:0] */ 47996d4baf08SMark Brown #define WM5100_DSP1_PM_1_2_SHIFT 0 /* DSP1_PM_1 - [7:0] */ 48006d4baf08SMark Brown #define WM5100_DSP1_PM_1_2_WIDTH 8 /* DSP1_PM_1 - [7:0] */ 48016d4baf08SMark Brown 48026d4baf08SMark Brown /* 48036d4baf08SMark Brown * R18436 (0x4804) - DSP1 PM 4 48046d4baf08SMark Brown */ 48056d4baf08SMark Brown #define WM5100_DSP1_PM_1_1_MASK 0xFFFF /* DSP1_PM_1 - [15:0] */ 48066d4baf08SMark Brown #define WM5100_DSP1_PM_1_1_SHIFT 0 /* DSP1_PM_1 - [15:0] */ 48076d4baf08SMark Brown #define WM5100_DSP1_PM_1_1_WIDTH 16 /* DSP1_PM_1 - [15:0] */ 48086d4baf08SMark Brown 48096d4baf08SMark Brown /* 48106d4baf08SMark Brown * R18437 (0x4805) - DSP1 PM 5 48116d4baf08SMark Brown */ 48126d4baf08SMark Brown #define WM5100_DSP1_PM_1_MASK 0xFFFF /* DSP1_PM_1 - [15:0] */ 48136d4baf08SMark Brown #define WM5100_DSP1_PM_1_SHIFT 0 /* DSP1_PM_1 - [15:0] */ 48146d4baf08SMark Brown #define WM5100_DSP1_PM_1_WIDTH 16 /* DSP1_PM_1 - [15:0] */ 48156d4baf08SMark Brown 48166d4baf08SMark Brown /* 48176d4baf08SMark Brown * R19962 (0x4DFA) - DSP1 PM 1530 48186d4baf08SMark Brown */ 48196d4baf08SMark Brown #define WM5100_DSP1_PM_510_2_MASK 0x00FF /* DSP1_PM_510 - [7:0] */ 48206d4baf08SMark Brown #define WM5100_DSP1_PM_510_2_SHIFT 0 /* DSP1_PM_510 - [7:0] */ 48216d4baf08SMark Brown #define WM5100_DSP1_PM_510_2_WIDTH 8 /* DSP1_PM_510 - [7:0] */ 48226d4baf08SMark Brown 48236d4baf08SMark Brown /* 48246d4baf08SMark Brown * R19963 (0x4DFB) - DSP1 PM 1531 48256d4baf08SMark Brown */ 48266d4baf08SMark Brown #define WM5100_DSP1_PM_510_1_MASK 0xFFFF /* DSP1_PM_510 - [15:0] */ 48276d4baf08SMark Brown #define WM5100_DSP1_PM_510_1_SHIFT 0 /* DSP1_PM_510 - [15:0] */ 48286d4baf08SMark Brown #define WM5100_DSP1_PM_510_1_WIDTH 16 /* DSP1_PM_510 - [15:0] */ 48296d4baf08SMark Brown 48306d4baf08SMark Brown /* 48316d4baf08SMark Brown * R19964 (0x4DFC) - DSP1 PM 1532 48326d4baf08SMark Brown */ 48336d4baf08SMark Brown #define WM5100_DSP1_PM_510_MASK 0xFFFF /* DSP1_PM_510 - [15:0] */ 48346d4baf08SMark Brown #define WM5100_DSP1_PM_510_SHIFT 0 /* DSP1_PM_510 - [15:0] */ 48356d4baf08SMark Brown #define WM5100_DSP1_PM_510_WIDTH 16 /* DSP1_PM_510 - [15:0] */ 48366d4baf08SMark Brown 48376d4baf08SMark Brown /* 48386d4baf08SMark Brown * R19965 (0x4DFD) - DSP1 PM 1533 48396d4baf08SMark Brown */ 48406d4baf08SMark Brown #define WM5100_DSP1_PM_END_2_MASK 0x00FF /* DSP1_PM_END - [7:0] */ 48416d4baf08SMark Brown #define WM5100_DSP1_PM_END_2_SHIFT 0 /* DSP1_PM_END - [7:0] */ 48426d4baf08SMark Brown #define WM5100_DSP1_PM_END_2_WIDTH 8 /* DSP1_PM_END - [7:0] */ 48436d4baf08SMark Brown 48446d4baf08SMark Brown /* 48456d4baf08SMark Brown * R19966 (0x4DFE) - DSP1 PM 1534 48466d4baf08SMark Brown */ 48476d4baf08SMark Brown #define WM5100_DSP1_PM_END_1_MASK 0xFFFF /* DSP1_PM_END - [15:0] */ 48486d4baf08SMark Brown #define WM5100_DSP1_PM_END_1_SHIFT 0 /* DSP1_PM_END - [15:0] */ 48496d4baf08SMark Brown #define WM5100_DSP1_PM_END_1_WIDTH 16 /* DSP1_PM_END - [15:0] */ 48506d4baf08SMark Brown 48516d4baf08SMark Brown /* 48526d4baf08SMark Brown * R19967 (0x4DFF) - DSP1 PM 1535 48536d4baf08SMark Brown */ 48546d4baf08SMark Brown #define WM5100_DSP1_PM_END_MASK 0xFFFF /* DSP1_PM_END - [15:0] */ 48556d4baf08SMark Brown #define WM5100_DSP1_PM_END_SHIFT 0 /* DSP1_PM_END - [15:0] */ 48566d4baf08SMark Brown #define WM5100_DSP1_PM_END_WIDTH 16 /* DSP1_PM_END - [15:0] */ 48576d4baf08SMark Brown 48586d4baf08SMark Brown /* 48596d4baf08SMark Brown * R20480 (0x5000) - DSP1 ZM 0 48606d4baf08SMark Brown */ 48616d4baf08SMark Brown #define WM5100_DSP1_ZM_START_1_MASK 0x00FF /* DSP1_ZM_START - [7:0] */ 48626d4baf08SMark Brown #define WM5100_DSP1_ZM_START_1_SHIFT 0 /* DSP1_ZM_START - [7:0] */ 48636d4baf08SMark Brown #define WM5100_DSP1_ZM_START_1_WIDTH 8 /* DSP1_ZM_START - [7:0] */ 48646d4baf08SMark Brown 48656d4baf08SMark Brown /* 48666d4baf08SMark Brown * R20481 (0x5001) - DSP1 ZM 1 48676d4baf08SMark Brown */ 48686d4baf08SMark Brown #define WM5100_DSP1_ZM_START_MASK 0xFFFF /* DSP1_ZM_START - [15:0] */ 48696d4baf08SMark Brown #define WM5100_DSP1_ZM_START_SHIFT 0 /* DSP1_ZM_START - [15:0] */ 48706d4baf08SMark Brown #define WM5100_DSP1_ZM_START_WIDTH 16 /* DSP1_ZM_START - [15:0] */ 48716d4baf08SMark Brown 48726d4baf08SMark Brown /* 48736d4baf08SMark Brown * R20482 (0x5002) - DSP1 ZM 2 48746d4baf08SMark Brown */ 48756d4baf08SMark Brown #define WM5100_DSP1_ZM_1_1_MASK 0x00FF /* DSP1_ZM_1 - [7:0] */ 48766d4baf08SMark Brown #define WM5100_DSP1_ZM_1_1_SHIFT 0 /* DSP1_ZM_1 - [7:0] */ 48776d4baf08SMark Brown #define WM5100_DSP1_ZM_1_1_WIDTH 8 /* DSP1_ZM_1 - [7:0] */ 48786d4baf08SMark Brown 48796d4baf08SMark Brown /* 48806d4baf08SMark Brown * R20483 (0x5003) - DSP1 ZM 3 48816d4baf08SMark Brown */ 48826d4baf08SMark Brown #define WM5100_DSP1_ZM_1_MASK 0xFFFF /* DSP1_ZM_1 - [15:0] */ 48836d4baf08SMark Brown #define WM5100_DSP1_ZM_1_SHIFT 0 /* DSP1_ZM_1 - [15:0] */ 48846d4baf08SMark Brown #define WM5100_DSP1_ZM_1_WIDTH 16 /* DSP1_ZM_1 - [15:0] */ 48856d4baf08SMark Brown 48866d4baf08SMark Brown /* 48876d4baf08SMark Brown * R22524 (0x57FC) - DSP1 ZM 2044 48886d4baf08SMark Brown */ 48896d4baf08SMark Brown #define WM5100_DSP1_ZM_1022_1_MASK 0x00FF /* DSP1_ZM_1022 - [7:0] */ 48906d4baf08SMark Brown #define WM5100_DSP1_ZM_1022_1_SHIFT 0 /* DSP1_ZM_1022 - [7:0] */ 48916d4baf08SMark Brown #define WM5100_DSP1_ZM_1022_1_WIDTH 8 /* DSP1_ZM_1022 - [7:0] */ 48926d4baf08SMark Brown 48936d4baf08SMark Brown /* 48946d4baf08SMark Brown * R22525 (0x57FD) - DSP1 ZM 2045 48956d4baf08SMark Brown */ 48966d4baf08SMark Brown #define WM5100_DSP1_ZM_1022_MASK 0xFFFF /* DSP1_ZM_1022 - [15:0] */ 48976d4baf08SMark Brown #define WM5100_DSP1_ZM_1022_SHIFT 0 /* DSP1_ZM_1022 - [15:0] */ 48986d4baf08SMark Brown #define WM5100_DSP1_ZM_1022_WIDTH 16 /* DSP1_ZM_1022 - [15:0] */ 48996d4baf08SMark Brown 49006d4baf08SMark Brown /* 49016d4baf08SMark Brown * R22526 (0x57FE) - DSP1 ZM 2046 49026d4baf08SMark Brown */ 49036d4baf08SMark Brown #define WM5100_DSP1_ZM_END_1_MASK 0x00FF /* DSP1_ZM_END - [7:0] */ 49046d4baf08SMark Brown #define WM5100_DSP1_ZM_END_1_SHIFT 0 /* DSP1_ZM_END - [7:0] */ 49056d4baf08SMark Brown #define WM5100_DSP1_ZM_END_1_WIDTH 8 /* DSP1_ZM_END - [7:0] */ 49066d4baf08SMark Brown 49076d4baf08SMark Brown /* 49086d4baf08SMark Brown * R22527 (0x57FF) - DSP1 ZM 2047 49096d4baf08SMark Brown */ 49106d4baf08SMark Brown #define WM5100_DSP1_ZM_END_MASK 0xFFFF /* DSP1_ZM_END - [15:0] */ 49116d4baf08SMark Brown #define WM5100_DSP1_ZM_END_SHIFT 0 /* DSP1_ZM_END - [15:0] */ 49126d4baf08SMark Brown #define WM5100_DSP1_ZM_END_WIDTH 16 /* DSP1_ZM_END - [15:0] */ 49136d4baf08SMark Brown 49146d4baf08SMark Brown /* 49156d4baf08SMark Brown * R24576 (0x6000) - DSP2 DM 0 49166d4baf08SMark Brown */ 49176d4baf08SMark Brown #define WM5100_DSP2_DM_START_1_MASK 0x00FF /* DSP2_DM_START - [7:0] */ 49186d4baf08SMark Brown #define WM5100_DSP2_DM_START_1_SHIFT 0 /* DSP2_DM_START - [7:0] */ 49196d4baf08SMark Brown #define WM5100_DSP2_DM_START_1_WIDTH 8 /* DSP2_DM_START - [7:0] */ 49206d4baf08SMark Brown 49216d4baf08SMark Brown /* 49226d4baf08SMark Brown * R24577 (0x6001) - DSP2 DM 1 49236d4baf08SMark Brown */ 49246d4baf08SMark Brown #define WM5100_DSP2_DM_START_MASK 0xFFFF /* DSP2_DM_START - [15:0] */ 49256d4baf08SMark Brown #define WM5100_DSP2_DM_START_SHIFT 0 /* DSP2_DM_START - [15:0] */ 49266d4baf08SMark Brown #define WM5100_DSP2_DM_START_WIDTH 16 /* DSP2_DM_START - [15:0] */ 49276d4baf08SMark Brown 49286d4baf08SMark Brown /* 49296d4baf08SMark Brown * R24578 (0x6002) - DSP2 DM 2 49306d4baf08SMark Brown */ 49316d4baf08SMark Brown #define WM5100_DSP2_DM_1_1_MASK 0x00FF /* DSP2_DM_1 - [7:0] */ 49326d4baf08SMark Brown #define WM5100_DSP2_DM_1_1_SHIFT 0 /* DSP2_DM_1 - [7:0] */ 49336d4baf08SMark Brown #define WM5100_DSP2_DM_1_1_WIDTH 8 /* DSP2_DM_1 - [7:0] */ 49346d4baf08SMark Brown 49356d4baf08SMark Brown /* 49366d4baf08SMark Brown * R24579 (0x6003) - DSP2 DM 3 49376d4baf08SMark Brown */ 49386d4baf08SMark Brown #define WM5100_DSP2_DM_1_MASK 0xFFFF /* DSP2_DM_1 - [15:0] */ 49396d4baf08SMark Brown #define WM5100_DSP2_DM_1_SHIFT 0 /* DSP2_DM_1 - [15:0] */ 49406d4baf08SMark Brown #define WM5100_DSP2_DM_1_WIDTH 16 /* DSP2_DM_1 - [15:0] */ 49416d4baf08SMark Brown 49426d4baf08SMark Brown /* 49436d4baf08SMark Brown * R25084 (0x61FC) - DSP2 DM 508 49446d4baf08SMark Brown */ 49456d4baf08SMark Brown #define WM5100_DSP2_DM_254_1_MASK 0x00FF /* DSP2_DM_254 - [7:0] */ 49466d4baf08SMark Brown #define WM5100_DSP2_DM_254_1_SHIFT 0 /* DSP2_DM_254 - [7:0] */ 49476d4baf08SMark Brown #define WM5100_DSP2_DM_254_1_WIDTH 8 /* DSP2_DM_254 - [7:0] */ 49486d4baf08SMark Brown 49496d4baf08SMark Brown /* 49506d4baf08SMark Brown * R25085 (0x61FD) - DSP2 DM 509 49516d4baf08SMark Brown */ 49526d4baf08SMark Brown #define WM5100_DSP2_DM_254_MASK 0xFFFF /* DSP2_DM_254 - [15:0] */ 49536d4baf08SMark Brown #define WM5100_DSP2_DM_254_SHIFT 0 /* DSP2_DM_254 - [15:0] */ 49546d4baf08SMark Brown #define WM5100_DSP2_DM_254_WIDTH 16 /* DSP2_DM_254 - [15:0] */ 49556d4baf08SMark Brown 49566d4baf08SMark Brown /* 49576d4baf08SMark Brown * R25086 (0x61FE) - DSP2 DM 510 49586d4baf08SMark Brown */ 49596d4baf08SMark Brown #define WM5100_DSP2_DM_END_1_MASK 0x00FF /* DSP2_DM_END - [7:0] */ 49606d4baf08SMark Brown #define WM5100_DSP2_DM_END_1_SHIFT 0 /* DSP2_DM_END - [7:0] */ 49616d4baf08SMark Brown #define WM5100_DSP2_DM_END_1_WIDTH 8 /* DSP2_DM_END - [7:0] */ 49626d4baf08SMark Brown 49636d4baf08SMark Brown /* 49646d4baf08SMark Brown * R25087 (0x61FF) - DSP2 DM 511 49656d4baf08SMark Brown */ 49666d4baf08SMark Brown #define WM5100_DSP2_DM_END_MASK 0xFFFF /* DSP2_DM_END - [15:0] */ 49676d4baf08SMark Brown #define WM5100_DSP2_DM_END_SHIFT 0 /* DSP2_DM_END - [15:0] */ 49686d4baf08SMark Brown #define WM5100_DSP2_DM_END_WIDTH 16 /* DSP2_DM_END - [15:0] */ 49696d4baf08SMark Brown 49706d4baf08SMark Brown /* 49716d4baf08SMark Brown * R26624 (0x6800) - DSP2 PM 0 49726d4baf08SMark Brown */ 49736d4baf08SMark Brown #define WM5100_DSP2_PM_START_2_MASK 0x00FF /* DSP2_PM_START - [7:0] */ 49746d4baf08SMark Brown #define WM5100_DSP2_PM_START_2_SHIFT 0 /* DSP2_PM_START - [7:0] */ 49756d4baf08SMark Brown #define WM5100_DSP2_PM_START_2_WIDTH 8 /* DSP2_PM_START - [7:0] */ 49766d4baf08SMark Brown 49776d4baf08SMark Brown /* 49786d4baf08SMark Brown * R26625 (0x6801) - DSP2 PM 1 49796d4baf08SMark Brown */ 49806d4baf08SMark Brown #define WM5100_DSP2_PM_START_1_MASK 0xFFFF /* DSP2_PM_START - [15:0] */ 49816d4baf08SMark Brown #define WM5100_DSP2_PM_START_1_SHIFT 0 /* DSP2_PM_START - [15:0] */ 49826d4baf08SMark Brown #define WM5100_DSP2_PM_START_1_WIDTH 16 /* DSP2_PM_START - [15:0] */ 49836d4baf08SMark Brown 49846d4baf08SMark Brown /* 49856d4baf08SMark Brown * R26626 (0x6802) - DSP2 PM 2 49866d4baf08SMark Brown */ 49876d4baf08SMark Brown #define WM5100_DSP2_PM_START_MASK 0xFFFF /* DSP2_PM_START - [15:0] */ 49886d4baf08SMark Brown #define WM5100_DSP2_PM_START_SHIFT 0 /* DSP2_PM_START - [15:0] */ 49896d4baf08SMark Brown #define WM5100_DSP2_PM_START_WIDTH 16 /* DSP2_PM_START - [15:0] */ 49906d4baf08SMark Brown 49916d4baf08SMark Brown /* 49926d4baf08SMark Brown * R26627 (0x6803) - DSP2 PM 3 49936d4baf08SMark Brown */ 49946d4baf08SMark Brown #define WM5100_DSP2_PM_1_2_MASK 0x00FF /* DSP2_PM_1 - [7:0] */ 49956d4baf08SMark Brown #define WM5100_DSP2_PM_1_2_SHIFT 0 /* DSP2_PM_1 - [7:0] */ 49966d4baf08SMark Brown #define WM5100_DSP2_PM_1_2_WIDTH 8 /* DSP2_PM_1 - [7:0] */ 49976d4baf08SMark Brown 49986d4baf08SMark Brown /* 49996d4baf08SMark Brown * R26628 (0x6804) - DSP2 PM 4 50006d4baf08SMark Brown */ 50016d4baf08SMark Brown #define WM5100_DSP2_PM_1_1_MASK 0xFFFF /* DSP2_PM_1 - [15:0] */ 50026d4baf08SMark Brown #define WM5100_DSP2_PM_1_1_SHIFT 0 /* DSP2_PM_1 - [15:0] */ 50036d4baf08SMark Brown #define WM5100_DSP2_PM_1_1_WIDTH 16 /* DSP2_PM_1 - [15:0] */ 50046d4baf08SMark Brown 50056d4baf08SMark Brown /* 50066d4baf08SMark Brown * R26629 (0x6805) - DSP2 PM 5 50076d4baf08SMark Brown */ 50086d4baf08SMark Brown #define WM5100_DSP2_PM_1_MASK 0xFFFF /* DSP2_PM_1 - [15:0] */ 50096d4baf08SMark Brown #define WM5100_DSP2_PM_1_SHIFT 0 /* DSP2_PM_1 - [15:0] */ 50106d4baf08SMark Brown #define WM5100_DSP2_PM_1_WIDTH 16 /* DSP2_PM_1 - [15:0] */ 50116d4baf08SMark Brown 50126d4baf08SMark Brown /* 50136d4baf08SMark Brown * R28154 (0x6DFA) - DSP2 PM 1530 50146d4baf08SMark Brown */ 50156d4baf08SMark Brown #define WM5100_DSP2_PM_510_2_MASK 0x00FF /* DSP2_PM_510 - [7:0] */ 50166d4baf08SMark Brown #define WM5100_DSP2_PM_510_2_SHIFT 0 /* DSP2_PM_510 - [7:0] */ 50176d4baf08SMark Brown #define WM5100_DSP2_PM_510_2_WIDTH 8 /* DSP2_PM_510 - [7:0] */ 50186d4baf08SMark Brown 50196d4baf08SMark Brown /* 50206d4baf08SMark Brown * R28155 (0x6DFB) - DSP2 PM 1531 50216d4baf08SMark Brown */ 50226d4baf08SMark Brown #define WM5100_DSP2_PM_510_1_MASK 0xFFFF /* DSP2_PM_510 - [15:0] */ 50236d4baf08SMark Brown #define WM5100_DSP2_PM_510_1_SHIFT 0 /* DSP2_PM_510 - [15:0] */ 50246d4baf08SMark Brown #define WM5100_DSP2_PM_510_1_WIDTH 16 /* DSP2_PM_510 - [15:0] */ 50256d4baf08SMark Brown 50266d4baf08SMark Brown /* 50276d4baf08SMark Brown * R28156 (0x6DFC) - DSP2 PM 1532 50286d4baf08SMark Brown */ 50296d4baf08SMark Brown #define WM5100_DSP2_PM_510_MASK 0xFFFF /* DSP2_PM_510 - [15:0] */ 50306d4baf08SMark Brown #define WM5100_DSP2_PM_510_SHIFT 0 /* DSP2_PM_510 - [15:0] */ 50316d4baf08SMark Brown #define WM5100_DSP2_PM_510_WIDTH 16 /* DSP2_PM_510 - [15:0] */ 50326d4baf08SMark Brown 50336d4baf08SMark Brown /* 50346d4baf08SMark Brown * R28157 (0x6DFD) - DSP2 PM 1533 50356d4baf08SMark Brown */ 50366d4baf08SMark Brown #define WM5100_DSP2_PM_END_2_MASK 0x00FF /* DSP2_PM_END - [7:0] */ 50376d4baf08SMark Brown #define WM5100_DSP2_PM_END_2_SHIFT 0 /* DSP2_PM_END - [7:0] */ 50386d4baf08SMark Brown #define WM5100_DSP2_PM_END_2_WIDTH 8 /* DSP2_PM_END - [7:0] */ 50396d4baf08SMark Brown 50406d4baf08SMark Brown /* 50416d4baf08SMark Brown * R28158 (0x6DFE) - DSP2 PM 1534 50426d4baf08SMark Brown */ 50436d4baf08SMark Brown #define WM5100_DSP2_PM_END_1_MASK 0xFFFF /* DSP2_PM_END - [15:0] */ 50446d4baf08SMark Brown #define WM5100_DSP2_PM_END_1_SHIFT 0 /* DSP2_PM_END - [15:0] */ 50456d4baf08SMark Brown #define WM5100_DSP2_PM_END_1_WIDTH 16 /* DSP2_PM_END - [15:0] */ 50466d4baf08SMark Brown 50476d4baf08SMark Brown /* 50486d4baf08SMark Brown * R28159 (0x6DFF) - DSP2 PM 1535 50496d4baf08SMark Brown */ 50506d4baf08SMark Brown #define WM5100_DSP2_PM_END_MASK 0xFFFF /* DSP2_PM_END - [15:0] */ 50516d4baf08SMark Brown #define WM5100_DSP2_PM_END_SHIFT 0 /* DSP2_PM_END - [15:0] */ 50526d4baf08SMark Brown #define WM5100_DSP2_PM_END_WIDTH 16 /* DSP2_PM_END - [15:0] */ 50536d4baf08SMark Brown 50546d4baf08SMark Brown /* 50556d4baf08SMark Brown * R28672 (0x7000) - DSP2 ZM 0 50566d4baf08SMark Brown */ 50576d4baf08SMark Brown #define WM5100_DSP2_ZM_START_1_MASK 0x00FF /* DSP2_ZM_START - [7:0] */ 50586d4baf08SMark Brown #define WM5100_DSP2_ZM_START_1_SHIFT 0 /* DSP2_ZM_START - [7:0] */ 50596d4baf08SMark Brown #define WM5100_DSP2_ZM_START_1_WIDTH 8 /* DSP2_ZM_START - [7:0] */ 50606d4baf08SMark Brown 50616d4baf08SMark Brown /* 50626d4baf08SMark Brown * R28673 (0x7001) - DSP2 ZM 1 50636d4baf08SMark Brown */ 50646d4baf08SMark Brown #define WM5100_DSP2_ZM_START_MASK 0xFFFF /* DSP2_ZM_START - [15:0] */ 50656d4baf08SMark Brown #define WM5100_DSP2_ZM_START_SHIFT 0 /* DSP2_ZM_START - [15:0] */ 50666d4baf08SMark Brown #define WM5100_DSP2_ZM_START_WIDTH 16 /* DSP2_ZM_START - [15:0] */ 50676d4baf08SMark Brown 50686d4baf08SMark Brown /* 50696d4baf08SMark Brown * R28674 (0x7002) - DSP2 ZM 2 50706d4baf08SMark Brown */ 50716d4baf08SMark Brown #define WM5100_DSP2_ZM_1_1_MASK 0x00FF /* DSP2_ZM_1 - [7:0] */ 50726d4baf08SMark Brown #define WM5100_DSP2_ZM_1_1_SHIFT 0 /* DSP2_ZM_1 - [7:0] */ 50736d4baf08SMark Brown #define WM5100_DSP2_ZM_1_1_WIDTH 8 /* DSP2_ZM_1 - [7:0] */ 50746d4baf08SMark Brown 50756d4baf08SMark Brown /* 50766d4baf08SMark Brown * R28675 (0x7003) - DSP2 ZM 3 50776d4baf08SMark Brown */ 50786d4baf08SMark Brown #define WM5100_DSP2_ZM_1_MASK 0xFFFF /* DSP2_ZM_1 - [15:0] */ 50796d4baf08SMark Brown #define WM5100_DSP2_ZM_1_SHIFT 0 /* DSP2_ZM_1 - [15:0] */ 50806d4baf08SMark Brown #define WM5100_DSP2_ZM_1_WIDTH 16 /* DSP2_ZM_1 - [15:0] */ 50816d4baf08SMark Brown 50826d4baf08SMark Brown /* 50836d4baf08SMark Brown * R30716 (0x77FC) - DSP2 ZM 2044 50846d4baf08SMark Brown */ 50856d4baf08SMark Brown #define WM5100_DSP2_ZM_1022_1_MASK 0x00FF /* DSP2_ZM_1022 - [7:0] */ 50866d4baf08SMark Brown #define WM5100_DSP2_ZM_1022_1_SHIFT 0 /* DSP2_ZM_1022 - [7:0] */ 50876d4baf08SMark Brown #define WM5100_DSP2_ZM_1022_1_WIDTH 8 /* DSP2_ZM_1022 - [7:0] */ 50886d4baf08SMark Brown 50896d4baf08SMark Brown /* 50906d4baf08SMark Brown * R30717 (0x77FD) - DSP2 ZM 2045 50916d4baf08SMark Brown */ 50926d4baf08SMark Brown #define WM5100_DSP2_ZM_1022_MASK 0xFFFF /* DSP2_ZM_1022 - [15:0] */ 50936d4baf08SMark Brown #define WM5100_DSP2_ZM_1022_SHIFT 0 /* DSP2_ZM_1022 - [15:0] */ 50946d4baf08SMark Brown #define WM5100_DSP2_ZM_1022_WIDTH 16 /* DSP2_ZM_1022 - [15:0] */ 50956d4baf08SMark Brown 50966d4baf08SMark Brown /* 50976d4baf08SMark Brown * R30718 (0x77FE) - DSP2 ZM 2046 50986d4baf08SMark Brown */ 50996d4baf08SMark Brown #define WM5100_DSP2_ZM_END_1_MASK 0x00FF /* DSP2_ZM_END - [7:0] */ 51006d4baf08SMark Brown #define WM5100_DSP2_ZM_END_1_SHIFT 0 /* DSP2_ZM_END - [7:0] */ 51016d4baf08SMark Brown #define WM5100_DSP2_ZM_END_1_WIDTH 8 /* DSP2_ZM_END - [7:0] */ 51026d4baf08SMark Brown 51036d4baf08SMark Brown /* 51046d4baf08SMark Brown * R30719 (0x77FF) - DSP2 ZM 2047 51056d4baf08SMark Brown */ 51066d4baf08SMark Brown #define WM5100_DSP2_ZM_END_MASK 0xFFFF /* DSP2_ZM_END - [15:0] */ 51076d4baf08SMark Brown #define WM5100_DSP2_ZM_END_SHIFT 0 /* DSP2_ZM_END - [15:0] */ 51086d4baf08SMark Brown #define WM5100_DSP2_ZM_END_WIDTH 16 /* DSP2_ZM_END - [15:0] */ 51096d4baf08SMark Brown 51106d4baf08SMark Brown /* 51116d4baf08SMark Brown * R32768 (0x8000) - DSP3 DM 0 51126d4baf08SMark Brown */ 51136d4baf08SMark Brown #define WM5100_DSP3_DM_START_1_MASK 0x00FF /* DSP3_DM_START - [7:0] */ 51146d4baf08SMark Brown #define WM5100_DSP3_DM_START_1_SHIFT 0 /* DSP3_DM_START - [7:0] */ 51156d4baf08SMark Brown #define WM5100_DSP3_DM_START_1_WIDTH 8 /* DSP3_DM_START - [7:0] */ 51166d4baf08SMark Brown 51176d4baf08SMark Brown /* 51186d4baf08SMark Brown * R32769 (0x8001) - DSP3 DM 1 51196d4baf08SMark Brown */ 51206d4baf08SMark Brown #define WM5100_DSP3_DM_START_MASK 0xFFFF /* DSP3_DM_START - [15:0] */ 51216d4baf08SMark Brown #define WM5100_DSP3_DM_START_SHIFT 0 /* DSP3_DM_START - [15:0] */ 51226d4baf08SMark Brown #define WM5100_DSP3_DM_START_WIDTH 16 /* DSP3_DM_START - [15:0] */ 51236d4baf08SMark Brown 51246d4baf08SMark Brown /* 51256d4baf08SMark Brown * R32770 (0x8002) - DSP3 DM 2 51266d4baf08SMark Brown */ 51276d4baf08SMark Brown #define WM5100_DSP3_DM_1_1_MASK 0x00FF /* DSP3_DM_1 - [7:0] */ 51286d4baf08SMark Brown #define WM5100_DSP3_DM_1_1_SHIFT 0 /* DSP3_DM_1 - [7:0] */ 51296d4baf08SMark Brown #define WM5100_DSP3_DM_1_1_WIDTH 8 /* DSP3_DM_1 - [7:0] */ 51306d4baf08SMark Brown 51316d4baf08SMark Brown /* 51326d4baf08SMark Brown * R32771 (0x8003) - DSP3 DM 3 51336d4baf08SMark Brown */ 51346d4baf08SMark Brown #define WM5100_DSP3_DM_1_MASK 0xFFFF /* DSP3_DM_1 - [15:0] */ 51356d4baf08SMark Brown #define WM5100_DSP3_DM_1_SHIFT 0 /* DSP3_DM_1 - [15:0] */ 51366d4baf08SMark Brown #define WM5100_DSP3_DM_1_WIDTH 16 /* DSP3_DM_1 - [15:0] */ 51376d4baf08SMark Brown 51386d4baf08SMark Brown /* 51396d4baf08SMark Brown * R33276 (0x81FC) - DSP3 DM 508 51406d4baf08SMark Brown */ 51416d4baf08SMark Brown #define WM5100_DSP3_DM_254_1_MASK 0x00FF /* DSP3_DM_254 - [7:0] */ 51426d4baf08SMark Brown #define WM5100_DSP3_DM_254_1_SHIFT 0 /* DSP3_DM_254 - [7:0] */ 51436d4baf08SMark Brown #define WM5100_DSP3_DM_254_1_WIDTH 8 /* DSP3_DM_254 - [7:0] */ 51446d4baf08SMark Brown 51456d4baf08SMark Brown /* 51466d4baf08SMark Brown * R33277 (0x81FD) - DSP3 DM 509 51476d4baf08SMark Brown */ 51486d4baf08SMark Brown #define WM5100_DSP3_DM_254_MASK 0xFFFF /* DSP3_DM_254 - [15:0] */ 51496d4baf08SMark Brown #define WM5100_DSP3_DM_254_SHIFT 0 /* DSP3_DM_254 - [15:0] */ 51506d4baf08SMark Brown #define WM5100_DSP3_DM_254_WIDTH 16 /* DSP3_DM_254 - [15:0] */ 51516d4baf08SMark Brown 51526d4baf08SMark Brown /* 51536d4baf08SMark Brown * R33278 (0x81FE) - DSP3 DM 510 51546d4baf08SMark Brown */ 51556d4baf08SMark Brown #define WM5100_DSP3_DM_END_1_MASK 0x00FF /* DSP3_DM_END - [7:0] */ 51566d4baf08SMark Brown #define WM5100_DSP3_DM_END_1_SHIFT 0 /* DSP3_DM_END - [7:0] */ 51576d4baf08SMark Brown #define WM5100_DSP3_DM_END_1_WIDTH 8 /* DSP3_DM_END - [7:0] */ 51586d4baf08SMark Brown 51596d4baf08SMark Brown /* 51606d4baf08SMark Brown * R33279 (0x81FF) - DSP3 DM 511 51616d4baf08SMark Brown */ 51626d4baf08SMark Brown #define WM5100_DSP3_DM_END_MASK 0xFFFF /* DSP3_DM_END - [15:0] */ 51636d4baf08SMark Brown #define WM5100_DSP3_DM_END_SHIFT 0 /* DSP3_DM_END - [15:0] */ 51646d4baf08SMark Brown #define WM5100_DSP3_DM_END_WIDTH 16 /* DSP3_DM_END - [15:0] */ 51656d4baf08SMark Brown 51666d4baf08SMark Brown /* 51676d4baf08SMark Brown * R34816 (0x8800) - DSP3 PM 0 51686d4baf08SMark Brown */ 51696d4baf08SMark Brown #define WM5100_DSP3_PM_START_2_MASK 0x00FF /* DSP3_PM_START - [7:0] */ 51706d4baf08SMark Brown #define WM5100_DSP3_PM_START_2_SHIFT 0 /* DSP3_PM_START - [7:0] */ 51716d4baf08SMark Brown #define WM5100_DSP3_PM_START_2_WIDTH 8 /* DSP3_PM_START - [7:0] */ 51726d4baf08SMark Brown 51736d4baf08SMark Brown /* 51746d4baf08SMark Brown * R34817 (0x8801) - DSP3 PM 1 51756d4baf08SMark Brown */ 51766d4baf08SMark Brown #define WM5100_DSP3_PM_START_1_MASK 0xFFFF /* DSP3_PM_START - [15:0] */ 51776d4baf08SMark Brown #define WM5100_DSP3_PM_START_1_SHIFT 0 /* DSP3_PM_START - [15:0] */ 51786d4baf08SMark Brown #define WM5100_DSP3_PM_START_1_WIDTH 16 /* DSP3_PM_START - [15:0] */ 51796d4baf08SMark Brown 51806d4baf08SMark Brown /* 51816d4baf08SMark Brown * R34818 (0x8802) - DSP3 PM 2 51826d4baf08SMark Brown */ 51836d4baf08SMark Brown #define WM5100_DSP3_PM_START_MASK 0xFFFF /* DSP3_PM_START - [15:0] */ 51846d4baf08SMark Brown #define WM5100_DSP3_PM_START_SHIFT 0 /* DSP3_PM_START - [15:0] */ 51856d4baf08SMark Brown #define WM5100_DSP3_PM_START_WIDTH 16 /* DSP3_PM_START - [15:0] */ 51866d4baf08SMark Brown 51876d4baf08SMark Brown /* 51886d4baf08SMark Brown * R34819 (0x8803) - DSP3 PM 3 51896d4baf08SMark Brown */ 51906d4baf08SMark Brown #define WM5100_DSP3_PM_1_2_MASK 0x00FF /* DSP3_PM_1 - [7:0] */ 51916d4baf08SMark Brown #define WM5100_DSP3_PM_1_2_SHIFT 0 /* DSP3_PM_1 - [7:0] */ 51926d4baf08SMark Brown #define WM5100_DSP3_PM_1_2_WIDTH 8 /* DSP3_PM_1 - [7:0] */ 51936d4baf08SMark Brown 51946d4baf08SMark Brown /* 51956d4baf08SMark Brown * R34820 (0x8804) - DSP3 PM 4 51966d4baf08SMark Brown */ 51976d4baf08SMark Brown #define WM5100_DSP3_PM_1_1_MASK 0xFFFF /* DSP3_PM_1 - [15:0] */ 51986d4baf08SMark Brown #define WM5100_DSP3_PM_1_1_SHIFT 0 /* DSP3_PM_1 - [15:0] */ 51996d4baf08SMark Brown #define WM5100_DSP3_PM_1_1_WIDTH 16 /* DSP3_PM_1 - [15:0] */ 52006d4baf08SMark Brown 52016d4baf08SMark Brown /* 52026d4baf08SMark Brown * R34821 (0x8805) - DSP3 PM 5 52036d4baf08SMark Brown */ 52046d4baf08SMark Brown #define WM5100_DSP3_PM_1_MASK 0xFFFF /* DSP3_PM_1 - [15:0] */ 52056d4baf08SMark Brown #define WM5100_DSP3_PM_1_SHIFT 0 /* DSP3_PM_1 - [15:0] */ 52066d4baf08SMark Brown #define WM5100_DSP3_PM_1_WIDTH 16 /* DSP3_PM_1 - [15:0] */ 52076d4baf08SMark Brown 52086d4baf08SMark Brown /* 52096d4baf08SMark Brown * R36346 (0x8DFA) - DSP3 PM 1530 52106d4baf08SMark Brown */ 52116d4baf08SMark Brown #define WM5100_DSP3_PM_510_2_MASK 0x00FF /* DSP3_PM_510 - [7:0] */ 52126d4baf08SMark Brown #define WM5100_DSP3_PM_510_2_SHIFT 0 /* DSP3_PM_510 - [7:0] */ 52136d4baf08SMark Brown #define WM5100_DSP3_PM_510_2_WIDTH 8 /* DSP3_PM_510 - [7:0] */ 52146d4baf08SMark Brown 52156d4baf08SMark Brown /* 52166d4baf08SMark Brown * R36347 (0x8DFB) - DSP3 PM 1531 52176d4baf08SMark Brown */ 52186d4baf08SMark Brown #define WM5100_DSP3_PM_510_1_MASK 0xFFFF /* DSP3_PM_510 - [15:0] */ 52196d4baf08SMark Brown #define WM5100_DSP3_PM_510_1_SHIFT 0 /* DSP3_PM_510 - [15:0] */ 52206d4baf08SMark Brown #define WM5100_DSP3_PM_510_1_WIDTH 16 /* DSP3_PM_510 - [15:0] */ 52216d4baf08SMark Brown 52226d4baf08SMark Brown /* 52236d4baf08SMark Brown * R36348 (0x8DFC) - DSP3 PM 1532 52246d4baf08SMark Brown */ 52256d4baf08SMark Brown #define WM5100_DSP3_PM_510_MASK 0xFFFF /* DSP3_PM_510 - [15:0] */ 52266d4baf08SMark Brown #define WM5100_DSP3_PM_510_SHIFT 0 /* DSP3_PM_510 - [15:0] */ 52276d4baf08SMark Brown #define WM5100_DSP3_PM_510_WIDTH 16 /* DSP3_PM_510 - [15:0] */ 52286d4baf08SMark Brown 52296d4baf08SMark Brown /* 52306d4baf08SMark Brown * R36349 (0x8DFD) - DSP3 PM 1533 52316d4baf08SMark Brown */ 52326d4baf08SMark Brown #define WM5100_DSP3_PM_END_2_MASK 0x00FF /* DSP3_PM_END - [7:0] */ 52336d4baf08SMark Brown #define WM5100_DSP3_PM_END_2_SHIFT 0 /* DSP3_PM_END - [7:0] */ 52346d4baf08SMark Brown #define WM5100_DSP3_PM_END_2_WIDTH 8 /* DSP3_PM_END - [7:0] */ 52356d4baf08SMark Brown 52366d4baf08SMark Brown /* 52376d4baf08SMark Brown * R36350 (0x8DFE) - DSP3 PM 1534 52386d4baf08SMark Brown */ 52396d4baf08SMark Brown #define WM5100_DSP3_PM_END_1_MASK 0xFFFF /* DSP3_PM_END - [15:0] */ 52406d4baf08SMark Brown #define WM5100_DSP3_PM_END_1_SHIFT 0 /* DSP3_PM_END - [15:0] */ 52416d4baf08SMark Brown #define WM5100_DSP3_PM_END_1_WIDTH 16 /* DSP3_PM_END - [15:0] */ 52426d4baf08SMark Brown 52436d4baf08SMark Brown /* 52446d4baf08SMark Brown * R36351 (0x8DFF) - DSP3 PM 1535 52456d4baf08SMark Brown */ 52466d4baf08SMark Brown #define WM5100_DSP3_PM_END_MASK 0xFFFF /* DSP3_PM_END - [15:0] */ 52476d4baf08SMark Brown #define WM5100_DSP3_PM_END_SHIFT 0 /* DSP3_PM_END - [15:0] */ 52486d4baf08SMark Brown #define WM5100_DSP3_PM_END_WIDTH 16 /* DSP3_PM_END - [15:0] */ 52496d4baf08SMark Brown 52506d4baf08SMark Brown /* 52516d4baf08SMark Brown * R36864 (0x9000) - DSP3 ZM 0 52526d4baf08SMark Brown */ 52536d4baf08SMark Brown #define WM5100_DSP3_ZM_START_1_MASK 0x00FF /* DSP3_ZM_START - [7:0] */ 52546d4baf08SMark Brown #define WM5100_DSP3_ZM_START_1_SHIFT 0 /* DSP3_ZM_START - [7:0] */ 52556d4baf08SMark Brown #define WM5100_DSP3_ZM_START_1_WIDTH 8 /* DSP3_ZM_START - [7:0] */ 52566d4baf08SMark Brown 52576d4baf08SMark Brown /* 52586d4baf08SMark Brown * R36865 (0x9001) - DSP3 ZM 1 52596d4baf08SMark Brown */ 52606d4baf08SMark Brown #define WM5100_DSP3_ZM_START_MASK 0xFFFF /* DSP3_ZM_START - [15:0] */ 52616d4baf08SMark Brown #define WM5100_DSP3_ZM_START_SHIFT 0 /* DSP3_ZM_START - [15:0] */ 52626d4baf08SMark Brown #define WM5100_DSP3_ZM_START_WIDTH 16 /* DSP3_ZM_START - [15:0] */ 52636d4baf08SMark Brown 52646d4baf08SMark Brown /* 52656d4baf08SMark Brown * R36866 (0x9002) - DSP3 ZM 2 52666d4baf08SMark Brown */ 52676d4baf08SMark Brown #define WM5100_DSP3_ZM_1_1_MASK 0x00FF /* DSP3_ZM_1 - [7:0] */ 52686d4baf08SMark Brown #define WM5100_DSP3_ZM_1_1_SHIFT 0 /* DSP3_ZM_1 - [7:0] */ 52696d4baf08SMark Brown #define WM5100_DSP3_ZM_1_1_WIDTH 8 /* DSP3_ZM_1 - [7:0] */ 52706d4baf08SMark Brown 52716d4baf08SMark Brown /* 52726d4baf08SMark Brown * R36867 (0x9003) - DSP3 ZM 3 52736d4baf08SMark Brown */ 52746d4baf08SMark Brown #define WM5100_DSP3_ZM_1_MASK 0xFFFF /* DSP3_ZM_1 - [15:0] */ 52756d4baf08SMark Brown #define WM5100_DSP3_ZM_1_SHIFT 0 /* DSP3_ZM_1 - [15:0] */ 52766d4baf08SMark Brown #define WM5100_DSP3_ZM_1_WIDTH 16 /* DSP3_ZM_1 - [15:0] */ 52776d4baf08SMark Brown 52786d4baf08SMark Brown /* 52796d4baf08SMark Brown * R38908 (0x97FC) - DSP3 ZM 2044 52806d4baf08SMark Brown */ 52816d4baf08SMark Brown #define WM5100_DSP3_ZM_1022_1_MASK 0x00FF /* DSP3_ZM_1022 - [7:0] */ 52826d4baf08SMark Brown #define WM5100_DSP3_ZM_1022_1_SHIFT 0 /* DSP3_ZM_1022 - [7:0] */ 52836d4baf08SMark Brown #define WM5100_DSP3_ZM_1022_1_WIDTH 8 /* DSP3_ZM_1022 - [7:0] */ 52846d4baf08SMark Brown 52856d4baf08SMark Brown /* 52866d4baf08SMark Brown * R38909 (0x97FD) - DSP3 ZM 2045 52876d4baf08SMark Brown */ 52886d4baf08SMark Brown #define WM5100_DSP3_ZM_1022_MASK 0xFFFF /* DSP3_ZM_1022 - [15:0] */ 52896d4baf08SMark Brown #define WM5100_DSP3_ZM_1022_SHIFT 0 /* DSP3_ZM_1022 - [15:0] */ 52906d4baf08SMark Brown #define WM5100_DSP3_ZM_1022_WIDTH 16 /* DSP3_ZM_1022 - [15:0] */ 52916d4baf08SMark Brown 52926d4baf08SMark Brown /* 52936d4baf08SMark Brown * R38910 (0x97FE) - DSP3 ZM 2046 52946d4baf08SMark Brown */ 52956d4baf08SMark Brown #define WM5100_DSP3_ZM_END_1_MASK 0x00FF /* DSP3_ZM_END - [7:0] */ 52966d4baf08SMark Brown #define WM5100_DSP3_ZM_END_1_SHIFT 0 /* DSP3_ZM_END - [7:0] */ 52976d4baf08SMark Brown #define WM5100_DSP3_ZM_END_1_WIDTH 8 /* DSP3_ZM_END - [7:0] */ 52986d4baf08SMark Brown 52996d4baf08SMark Brown /* 53006d4baf08SMark Brown * R38911 (0x97FF) - DSP3 ZM 2047 53016d4baf08SMark Brown */ 53026d4baf08SMark Brown #define WM5100_DSP3_ZM_END_MASK 0xFFFF /* DSP3_ZM_END - [15:0] */ 53036d4baf08SMark Brown #define WM5100_DSP3_ZM_END_SHIFT 0 /* DSP3_ZM_END - [15:0] */ 53046d4baf08SMark Brown #define WM5100_DSP3_ZM_END_WIDTH 16 /* DSP3_ZM_END - [15:0] */ 53056d4baf08SMark Brown 5306bd132ec5SMark Brown bool wm5100_readable_register(struct device *dev, unsigned int reg); 5307bd132ec5SMark Brown bool wm5100_volatile_register(struct device *dev, unsigned int reg); 53086d4baf08SMark Brown 5309bd132ec5SMark Brown extern struct reg_default wm5100_reg_defaults[WM5100_REGISTER_COUNT]; 53106d4baf08SMark Brown 53116d4baf08SMark Brown #endif 5312