1*2874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2d5315a23SMark Brown /* 3d5315a23SMark Brown * wm2200.h - WM2200 audio codec interface 4d5315a23SMark Brown * 5d5315a23SMark Brown * Copyright 2012 Wolfson Microelectronics PLC. 6d5315a23SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7d5315a23SMark Brown */ 8d5315a23SMark Brown 9d5315a23SMark Brown #ifndef _WM2200_H 10d5315a23SMark Brown #define _WM2200_H 11d5315a23SMark Brown 12d5315a23SMark Brown #define WM2200_CLK_SYSCLK 1 13d5315a23SMark Brown 14d5315a23SMark Brown #define WM2200_CLKSRC_MCLK1 0 15d5315a23SMark Brown #define WM2200_CLKSRC_MCLK2 1 16d5315a23SMark Brown #define WM2200_CLKSRC_FLL 4 17d5315a23SMark Brown #define WM2200_CLKSRC_BCLK1 8 18d5315a23SMark Brown 19d5315a23SMark Brown #define WM2200_FLL_SRC_MCLK1 0 20d5315a23SMark Brown #define WM2200_FLL_SRC_MCLK2 1 21d5315a23SMark Brown #define WM2200_FLL_SRC_BCLK 2 22d5315a23SMark Brown 23d5315a23SMark Brown /* 24d5315a23SMark Brown * Register values. 25d5315a23SMark Brown */ 26d5315a23SMark Brown #define WM2200_SOFTWARE_RESET 0x00 27d5315a23SMark Brown #define WM2200_DEVICE_REVISION 0x01 28d5315a23SMark Brown #define WM2200_TONE_GENERATOR_1 0x0B 29d5315a23SMark Brown #define WM2200_CLOCKING_3 0x102 30d5315a23SMark Brown #define WM2200_CLOCKING_4 0x103 31d5315a23SMark Brown #define WM2200_FLL_CONTROL_1 0x111 32d5315a23SMark Brown #define WM2200_FLL_CONTROL_2 0x112 33d5315a23SMark Brown #define WM2200_FLL_CONTROL_3 0x113 34d5315a23SMark Brown #define WM2200_FLL_CONTROL_4 0x114 35d5315a23SMark Brown #define WM2200_FLL_CONTROL_6 0x116 36d5315a23SMark Brown #define WM2200_FLL_CONTROL_7 0x117 37d5315a23SMark Brown #define WM2200_FLL_EFS_1 0x119 38d5315a23SMark Brown #define WM2200_FLL_EFS_2 0x11A 39d5315a23SMark Brown #define WM2200_MIC_CHARGE_PUMP_1 0x200 40d5315a23SMark Brown #define WM2200_MIC_CHARGE_PUMP_2 0x201 41d5315a23SMark Brown #define WM2200_DM_CHARGE_PUMP_1 0x202 42d5315a23SMark Brown #define WM2200_MIC_BIAS_CTRL_1 0x20C 43d5315a23SMark Brown #define WM2200_MIC_BIAS_CTRL_2 0x20D 44d5315a23SMark Brown #define WM2200_EAR_PIECE_CTRL_1 0x20F 45d5315a23SMark Brown #define WM2200_EAR_PIECE_CTRL_2 0x210 46d5315a23SMark Brown #define WM2200_INPUT_ENABLES 0x301 47d5315a23SMark Brown #define WM2200_IN1L_CONTROL 0x302 48d5315a23SMark Brown #define WM2200_IN1R_CONTROL 0x303 49d5315a23SMark Brown #define WM2200_IN2L_CONTROL 0x304 50d5315a23SMark Brown #define WM2200_IN2R_CONTROL 0x305 51d5315a23SMark Brown #define WM2200_IN3L_CONTROL 0x306 52d5315a23SMark Brown #define WM2200_IN3R_CONTROL 0x307 53d5315a23SMark Brown #define WM2200_RXANC_SRC 0x30A 54d5315a23SMark Brown #define WM2200_INPUT_VOLUME_RAMP 0x30B 55d5315a23SMark Brown #define WM2200_ADC_DIGITAL_VOLUME_1L 0x30C 56d5315a23SMark Brown #define WM2200_ADC_DIGITAL_VOLUME_1R 0x30D 57d5315a23SMark Brown #define WM2200_ADC_DIGITAL_VOLUME_2L 0x30E 58d5315a23SMark Brown #define WM2200_ADC_DIGITAL_VOLUME_2R 0x30F 59d5315a23SMark Brown #define WM2200_ADC_DIGITAL_VOLUME_3L 0x310 60d5315a23SMark Brown #define WM2200_ADC_DIGITAL_VOLUME_3R 0x311 61d5315a23SMark Brown #define WM2200_OUTPUT_ENABLES 0x400 62d5315a23SMark Brown #define WM2200_DAC_VOLUME_LIMIT_1L 0x401 63d5315a23SMark Brown #define WM2200_DAC_VOLUME_LIMIT_1R 0x402 64d5315a23SMark Brown #define WM2200_DAC_VOLUME_LIMIT_2L 0x403 65d5315a23SMark Brown #define WM2200_DAC_VOLUME_LIMIT_2R 0x404 66d5315a23SMark Brown #define WM2200_DAC_AEC_CONTROL_1 0x409 67d5315a23SMark Brown #define WM2200_OUTPUT_VOLUME_RAMP 0x40A 68d5315a23SMark Brown #define WM2200_DAC_DIGITAL_VOLUME_1L 0x40B 69d5315a23SMark Brown #define WM2200_DAC_DIGITAL_VOLUME_1R 0x40C 70d5315a23SMark Brown #define WM2200_DAC_DIGITAL_VOLUME_2L 0x40D 71d5315a23SMark Brown #define WM2200_DAC_DIGITAL_VOLUME_2R 0x40E 72d5315a23SMark Brown #define WM2200_PDM_1 0x417 73d5315a23SMark Brown #define WM2200_PDM_2 0x418 74d5315a23SMark Brown #define WM2200_AUDIO_IF_1_1 0x500 75d5315a23SMark Brown #define WM2200_AUDIO_IF_1_2 0x501 76d5315a23SMark Brown #define WM2200_AUDIO_IF_1_3 0x502 77d5315a23SMark Brown #define WM2200_AUDIO_IF_1_4 0x503 78d5315a23SMark Brown #define WM2200_AUDIO_IF_1_5 0x504 79d5315a23SMark Brown #define WM2200_AUDIO_IF_1_6 0x505 80d5315a23SMark Brown #define WM2200_AUDIO_IF_1_7 0x506 81d5315a23SMark Brown #define WM2200_AUDIO_IF_1_8 0x507 82d5315a23SMark Brown #define WM2200_AUDIO_IF_1_9 0x508 83d5315a23SMark Brown #define WM2200_AUDIO_IF_1_10 0x509 84d5315a23SMark Brown #define WM2200_AUDIO_IF_1_11 0x50A 85d5315a23SMark Brown #define WM2200_AUDIO_IF_1_12 0x50B 86d5315a23SMark Brown #define WM2200_AUDIO_IF_1_13 0x50C 87d5315a23SMark Brown #define WM2200_AUDIO_IF_1_14 0x50D 88d5315a23SMark Brown #define WM2200_AUDIO_IF_1_15 0x50E 89d5315a23SMark Brown #define WM2200_AUDIO_IF_1_16 0x50F 90d5315a23SMark Brown #define WM2200_AUDIO_IF_1_17 0x510 91d5315a23SMark Brown #define WM2200_AUDIO_IF_1_18 0x511 92d5315a23SMark Brown #define WM2200_AUDIO_IF_1_19 0x512 93d5315a23SMark Brown #define WM2200_AUDIO_IF_1_20 0x513 94d5315a23SMark Brown #define WM2200_AUDIO_IF_1_21 0x514 95d5315a23SMark Brown #define WM2200_AUDIO_IF_1_22 0x515 96d5315a23SMark Brown #define WM2200_OUT1LMIX_INPUT_1_SOURCE 0x600 97d5315a23SMark Brown #define WM2200_OUT1LMIX_INPUT_1_VOLUME 0x601 98d5315a23SMark Brown #define WM2200_OUT1LMIX_INPUT_2_SOURCE 0x602 99d5315a23SMark Brown #define WM2200_OUT1LMIX_INPUT_2_VOLUME 0x603 100d5315a23SMark Brown #define WM2200_OUT1LMIX_INPUT_3_SOURCE 0x604 101d5315a23SMark Brown #define WM2200_OUT1LMIX_INPUT_3_VOLUME 0x605 102d5315a23SMark Brown #define WM2200_OUT1LMIX_INPUT_4_SOURCE 0x606 103d5315a23SMark Brown #define WM2200_OUT1LMIX_INPUT_4_VOLUME 0x607 104d5315a23SMark Brown #define WM2200_OUT1RMIX_INPUT_1_SOURCE 0x608 105d5315a23SMark Brown #define WM2200_OUT1RMIX_INPUT_1_VOLUME 0x609 106d5315a23SMark Brown #define WM2200_OUT1RMIX_INPUT_2_SOURCE 0x60A 107d5315a23SMark Brown #define WM2200_OUT1RMIX_INPUT_2_VOLUME 0x60B 108d5315a23SMark Brown #define WM2200_OUT1RMIX_INPUT_3_SOURCE 0x60C 109d5315a23SMark Brown #define WM2200_OUT1RMIX_INPUT_3_VOLUME 0x60D 110d5315a23SMark Brown #define WM2200_OUT1RMIX_INPUT_4_SOURCE 0x60E 111d5315a23SMark Brown #define WM2200_OUT1RMIX_INPUT_4_VOLUME 0x60F 112d5315a23SMark Brown #define WM2200_OUT2LMIX_INPUT_1_SOURCE 0x610 113d5315a23SMark Brown #define WM2200_OUT2LMIX_INPUT_1_VOLUME 0x611 114d5315a23SMark Brown #define WM2200_OUT2LMIX_INPUT_2_SOURCE 0x612 115d5315a23SMark Brown #define WM2200_OUT2LMIX_INPUT_2_VOLUME 0x613 116d5315a23SMark Brown #define WM2200_OUT2LMIX_INPUT_3_SOURCE 0x614 117d5315a23SMark Brown #define WM2200_OUT2LMIX_INPUT_3_VOLUME 0x615 118d5315a23SMark Brown #define WM2200_OUT2LMIX_INPUT_4_SOURCE 0x616 119d5315a23SMark Brown #define WM2200_OUT2LMIX_INPUT_4_VOLUME 0x617 120d5315a23SMark Brown #define WM2200_OUT2RMIX_INPUT_1_SOURCE 0x618 121d5315a23SMark Brown #define WM2200_OUT2RMIX_INPUT_1_VOLUME 0x619 122d5315a23SMark Brown #define WM2200_OUT2RMIX_INPUT_2_SOURCE 0x61A 123d5315a23SMark Brown #define WM2200_OUT2RMIX_INPUT_2_VOLUME 0x61B 124d5315a23SMark Brown #define WM2200_OUT2RMIX_INPUT_3_SOURCE 0x61C 125d5315a23SMark Brown #define WM2200_OUT2RMIX_INPUT_3_VOLUME 0x61D 126d5315a23SMark Brown #define WM2200_OUT2RMIX_INPUT_4_SOURCE 0x61E 127d5315a23SMark Brown #define WM2200_OUT2RMIX_INPUT_4_VOLUME 0x61F 128d5315a23SMark Brown #define WM2200_AIF1TX1MIX_INPUT_1_SOURCE 0x620 129d5315a23SMark Brown #define WM2200_AIF1TX1MIX_INPUT_1_VOLUME 0x621 130d5315a23SMark Brown #define WM2200_AIF1TX1MIX_INPUT_2_SOURCE 0x622 131d5315a23SMark Brown #define WM2200_AIF1TX1MIX_INPUT_2_VOLUME 0x623 132d5315a23SMark Brown #define WM2200_AIF1TX1MIX_INPUT_3_SOURCE 0x624 133d5315a23SMark Brown #define WM2200_AIF1TX1MIX_INPUT_3_VOLUME 0x625 134d5315a23SMark Brown #define WM2200_AIF1TX1MIX_INPUT_4_SOURCE 0x626 135d5315a23SMark Brown #define WM2200_AIF1TX1MIX_INPUT_4_VOLUME 0x627 136d5315a23SMark Brown #define WM2200_AIF1TX2MIX_INPUT_1_SOURCE 0x628 137d5315a23SMark Brown #define WM2200_AIF1TX2MIX_INPUT_1_VOLUME 0x629 138d5315a23SMark Brown #define WM2200_AIF1TX2MIX_INPUT_2_SOURCE 0x62A 139d5315a23SMark Brown #define WM2200_AIF1TX2MIX_INPUT_2_VOLUME 0x62B 140d5315a23SMark Brown #define WM2200_AIF1TX2MIX_INPUT_3_SOURCE 0x62C 141d5315a23SMark Brown #define WM2200_AIF1TX2MIX_INPUT_3_VOLUME 0x62D 142d5315a23SMark Brown #define WM2200_AIF1TX2MIX_INPUT_4_SOURCE 0x62E 143d5315a23SMark Brown #define WM2200_AIF1TX2MIX_INPUT_4_VOLUME 0x62F 144d5315a23SMark Brown #define WM2200_AIF1TX3MIX_INPUT_1_SOURCE 0x630 145d5315a23SMark Brown #define WM2200_AIF1TX3MIX_INPUT_1_VOLUME 0x631 146d5315a23SMark Brown #define WM2200_AIF1TX3MIX_INPUT_2_SOURCE 0x632 147d5315a23SMark Brown #define WM2200_AIF1TX3MIX_INPUT_2_VOLUME 0x633 148d5315a23SMark Brown #define WM2200_AIF1TX3MIX_INPUT_3_SOURCE 0x634 149d5315a23SMark Brown #define WM2200_AIF1TX3MIX_INPUT_3_VOLUME 0x635 150d5315a23SMark Brown #define WM2200_AIF1TX3MIX_INPUT_4_SOURCE 0x636 151d5315a23SMark Brown #define WM2200_AIF1TX3MIX_INPUT_4_VOLUME 0x637 152d5315a23SMark Brown #define WM2200_AIF1TX4MIX_INPUT_1_SOURCE 0x638 153d5315a23SMark Brown #define WM2200_AIF1TX4MIX_INPUT_1_VOLUME 0x639 154d5315a23SMark Brown #define WM2200_AIF1TX4MIX_INPUT_2_SOURCE 0x63A 155d5315a23SMark Brown #define WM2200_AIF1TX4MIX_INPUT_2_VOLUME 0x63B 156d5315a23SMark Brown #define WM2200_AIF1TX4MIX_INPUT_3_SOURCE 0x63C 157d5315a23SMark Brown #define WM2200_AIF1TX4MIX_INPUT_3_VOLUME 0x63D 158d5315a23SMark Brown #define WM2200_AIF1TX4MIX_INPUT_4_SOURCE 0x63E 159d5315a23SMark Brown #define WM2200_AIF1TX4MIX_INPUT_4_VOLUME 0x63F 160d5315a23SMark Brown #define WM2200_AIF1TX5MIX_INPUT_1_SOURCE 0x640 161d5315a23SMark Brown #define WM2200_AIF1TX5MIX_INPUT_1_VOLUME 0x641 162d5315a23SMark Brown #define WM2200_AIF1TX5MIX_INPUT_2_SOURCE 0x642 163d5315a23SMark Brown #define WM2200_AIF1TX5MIX_INPUT_2_VOLUME 0x643 164d5315a23SMark Brown #define WM2200_AIF1TX5MIX_INPUT_3_SOURCE 0x644 165d5315a23SMark Brown #define WM2200_AIF1TX5MIX_INPUT_3_VOLUME 0x645 166d5315a23SMark Brown #define WM2200_AIF1TX5MIX_INPUT_4_SOURCE 0x646 167d5315a23SMark Brown #define WM2200_AIF1TX5MIX_INPUT_4_VOLUME 0x647 168d5315a23SMark Brown #define WM2200_AIF1TX6MIX_INPUT_1_SOURCE 0x648 169d5315a23SMark Brown #define WM2200_AIF1TX6MIX_INPUT_1_VOLUME 0x649 170d5315a23SMark Brown #define WM2200_AIF1TX6MIX_INPUT_2_SOURCE 0x64A 171d5315a23SMark Brown #define WM2200_AIF1TX6MIX_INPUT_2_VOLUME 0x64B 172d5315a23SMark Brown #define WM2200_AIF1TX6MIX_INPUT_3_SOURCE 0x64C 173d5315a23SMark Brown #define WM2200_AIF1TX6MIX_INPUT_3_VOLUME 0x64D 174d5315a23SMark Brown #define WM2200_AIF1TX6MIX_INPUT_4_SOURCE 0x64E 175d5315a23SMark Brown #define WM2200_AIF1TX6MIX_INPUT_4_VOLUME 0x64F 176d5315a23SMark Brown #define WM2200_EQLMIX_INPUT_1_SOURCE 0x650 177d5315a23SMark Brown #define WM2200_EQLMIX_INPUT_1_VOLUME 0x651 178d5315a23SMark Brown #define WM2200_EQLMIX_INPUT_2_SOURCE 0x652 179d5315a23SMark Brown #define WM2200_EQLMIX_INPUT_2_VOLUME 0x653 180d5315a23SMark Brown #define WM2200_EQLMIX_INPUT_3_SOURCE 0x654 181d5315a23SMark Brown #define WM2200_EQLMIX_INPUT_3_VOLUME 0x655 182d5315a23SMark Brown #define WM2200_EQLMIX_INPUT_4_SOURCE 0x656 183d5315a23SMark Brown #define WM2200_EQLMIX_INPUT_4_VOLUME 0x657 184d5315a23SMark Brown #define WM2200_EQRMIX_INPUT_1_SOURCE 0x658 185d5315a23SMark Brown #define WM2200_EQRMIX_INPUT_1_VOLUME 0x659 186d5315a23SMark Brown #define WM2200_EQRMIX_INPUT_2_SOURCE 0x65A 187d5315a23SMark Brown #define WM2200_EQRMIX_INPUT_2_VOLUME 0x65B 188d5315a23SMark Brown #define WM2200_EQRMIX_INPUT_3_SOURCE 0x65C 189d5315a23SMark Brown #define WM2200_EQRMIX_INPUT_3_VOLUME 0x65D 190d5315a23SMark Brown #define WM2200_EQRMIX_INPUT_4_SOURCE 0x65E 191d5315a23SMark Brown #define WM2200_EQRMIX_INPUT_4_VOLUME 0x65F 192d5315a23SMark Brown #define WM2200_LHPF1MIX_INPUT_1_SOURCE 0x660 193d5315a23SMark Brown #define WM2200_LHPF1MIX_INPUT_1_VOLUME 0x661 194d5315a23SMark Brown #define WM2200_LHPF1MIX_INPUT_2_SOURCE 0x662 195d5315a23SMark Brown #define WM2200_LHPF1MIX_INPUT_2_VOLUME 0x663 196d5315a23SMark Brown #define WM2200_LHPF1MIX_INPUT_3_SOURCE 0x664 197d5315a23SMark Brown #define WM2200_LHPF1MIX_INPUT_3_VOLUME 0x665 198d5315a23SMark Brown #define WM2200_LHPF1MIX_INPUT_4_SOURCE 0x666 199d5315a23SMark Brown #define WM2200_LHPF1MIX_INPUT_4_VOLUME 0x667 200d5315a23SMark Brown #define WM2200_LHPF2MIX_INPUT_1_SOURCE 0x668 201d5315a23SMark Brown #define WM2200_LHPF2MIX_INPUT_1_VOLUME 0x669 202d5315a23SMark Brown #define WM2200_LHPF2MIX_INPUT_2_SOURCE 0x66A 203d5315a23SMark Brown #define WM2200_LHPF2MIX_INPUT_2_VOLUME 0x66B 204d5315a23SMark Brown #define WM2200_LHPF2MIX_INPUT_3_SOURCE 0x66C 205d5315a23SMark Brown #define WM2200_LHPF2MIX_INPUT_3_VOLUME 0x66D 206d5315a23SMark Brown #define WM2200_LHPF2MIX_INPUT_4_SOURCE 0x66E 207d5315a23SMark Brown #define WM2200_LHPF2MIX_INPUT_4_VOLUME 0x66F 208d5315a23SMark Brown #define WM2200_DSP1LMIX_INPUT_1_SOURCE 0x670 209d5315a23SMark Brown #define WM2200_DSP1LMIX_INPUT_1_VOLUME 0x671 210d5315a23SMark Brown #define WM2200_DSP1LMIX_INPUT_2_SOURCE 0x672 211d5315a23SMark Brown #define WM2200_DSP1LMIX_INPUT_2_VOLUME 0x673 212d5315a23SMark Brown #define WM2200_DSP1LMIX_INPUT_3_SOURCE 0x674 213d5315a23SMark Brown #define WM2200_DSP1LMIX_INPUT_3_VOLUME 0x675 214d5315a23SMark Brown #define WM2200_DSP1LMIX_INPUT_4_SOURCE 0x676 215d5315a23SMark Brown #define WM2200_DSP1LMIX_INPUT_4_VOLUME 0x677 216d5315a23SMark Brown #define WM2200_DSP1RMIX_INPUT_1_SOURCE 0x678 217d5315a23SMark Brown #define WM2200_DSP1RMIX_INPUT_1_VOLUME 0x679 218d5315a23SMark Brown #define WM2200_DSP1RMIX_INPUT_2_SOURCE 0x67A 219d5315a23SMark Brown #define WM2200_DSP1RMIX_INPUT_2_VOLUME 0x67B 220d5315a23SMark Brown #define WM2200_DSP1RMIX_INPUT_3_SOURCE 0x67C 221d5315a23SMark Brown #define WM2200_DSP1RMIX_INPUT_3_VOLUME 0x67D 222d5315a23SMark Brown #define WM2200_DSP1RMIX_INPUT_4_SOURCE 0x67E 223d5315a23SMark Brown #define WM2200_DSP1RMIX_INPUT_4_VOLUME 0x67F 224d5315a23SMark Brown #define WM2200_DSP1AUX1MIX_INPUT_1_SOURCE 0x680 225d5315a23SMark Brown #define WM2200_DSP1AUX2MIX_INPUT_1_SOURCE 0x681 226d5315a23SMark Brown #define WM2200_DSP1AUX3MIX_INPUT_1_SOURCE 0x682 227d5315a23SMark Brown #define WM2200_DSP1AUX4MIX_INPUT_1_SOURCE 0x683 228d5315a23SMark Brown #define WM2200_DSP1AUX5MIX_INPUT_1_SOURCE 0x684 229d5315a23SMark Brown #define WM2200_DSP1AUX6MIX_INPUT_1_SOURCE 0x685 230d5315a23SMark Brown #define WM2200_DSP2LMIX_INPUT_1_SOURCE 0x686 231d5315a23SMark Brown #define WM2200_DSP2LMIX_INPUT_1_VOLUME 0x687 232d5315a23SMark Brown #define WM2200_DSP2LMIX_INPUT_2_SOURCE 0x688 233d5315a23SMark Brown #define WM2200_DSP2LMIX_INPUT_2_VOLUME 0x689 234d5315a23SMark Brown #define WM2200_DSP2LMIX_INPUT_3_SOURCE 0x68A 235d5315a23SMark Brown #define WM2200_DSP2LMIX_INPUT_3_VOLUME 0x68B 236d5315a23SMark Brown #define WM2200_DSP2LMIX_INPUT_4_SOURCE 0x68C 237d5315a23SMark Brown #define WM2200_DSP2LMIX_INPUT_4_VOLUME 0x68D 238d5315a23SMark Brown #define WM2200_DSP2RMIX_INPUT_1_SOURCE 0x68E 239d5315a23SMark Brown #define WM2200_DSP2RMIX_INPUT_1_VOLUME 0x68F 240d5315a23SMark Brown #define WM2200_DSP2RMIX_INPUT_2_SOURCE 0x690 241d5315a23SMark Brown #define WM2200_DSP2RMIX_INPUT_2_VOLUME 0x691 242d5315a23SMark Brown #define WM2200_DSP2RMIX_INPUT_3_SOURCE 0x692 243d5315a23SMark Brown #define WM2200_DSP2RMIX_INPUT_3_VOLUME 0x693 244d5315a23SMark Brown #define WM2200_DSP2RMIX_INPUT_4_SOURCE 0x694 245d5315a23SMark Brown #define WM2200_DSP2RMIX_INPUT_4_VOLUME 0x695 246d5315a23SMark Brown #define WM2200_DSP2AUX1MIX_INPUT_1_SOURCE 0x696 247d5315a23SMark Brown #define WM2200_DSP2AUX2MIX_INPUT_1_SOURCE 0x697 248d5315a23SMark Brown #define WM2200_DSP2AUX3MIX_INPUT_1_SOURCE 0x698 249d5315a23SMark Brown #define WM2200_DSP2AUX4MIX_INPUT_1_SOURCE 0x699 250d5315a23SMark Brown #define WM2200_DSP2AUX5MIX_INPUT_1_SOURCE 0x69A 251d5315a23SMark Brown #define WM2200_DSP2AUX6MIX_INPUT_1_SOURCE 0x69B 252d5315a23SMark Brown #define WM2200_GPIO_CTRL_1 0x700 253d5315a23SMark Brown #define WM2200_GPIO_CTRL_2 0x701 254d5315a23SMark Brown #define WM2200_GPIO_CTRL_3 0x702 255d5315a23SMark Brown #define WM2200_GPIO_CTRL_4 0x703 256d5315a23SMark Brown #define WM2200_ADPS1_IRQ0 0x707 257d5315a23SMark Brown #define WM2200_ADPS1_IRQ1 0x708 258d5315a23SMark Brown #define WM2200_MISC_PAD_CTRL_1 0x709 259d5315a23SMark Brown #define WM2200_INTERRUPT_STATUS_1 0x800 260d5315a23SMark Brown #define WM2200_INTERRUPT_STATUS_1_MASK 0x801 261d5315a23SMark Brown #define WM2200_INTERRUPT_STATUS_2 0x802 262d5315a23SMark Brown #define WM2200_INTERRUPT_RAW_STATUS_2 0x803 263d5315a23SMark Brown #define WM2200_INTERRUPT_STATUS_2_MASK 0x804 264d5315a23SMark Brown #define WM2200_INTERRUPT_CONTROL 0x808 265d5315a23SMark Brown #define WM2200_EQL_1 0x900 266d5315a23SMark Brown #define WM2200_EQL_2 0x901 267d5315a23SMark Brown #define WM2200_EQL_3 0x902 268d5315a23SMark Brown #define WM2200_EQL_4 0x903 269d5315a23SMark Brown #define WM2200_EQL_5 0x904 270d5315a23SMark Brown #define WM2200_EQL_6 0x905 271d5315a23SMark Brown #define WM2200_EQL_7 0x906 272d5315a23SMark Brown #define WM2200_EQL_8 0x907 273d5315a23SMark Brown #define WM2200_EQL_9 0x908 274d5315a23SMark Brown #define WM2200_EQL_10 0x909 275d5315a23SMark Brown #define WM2200_EQL_11 0x90A 276d5315a23SMark Brown #define WM2200_EQL_12 0x90B 277d5315a23SMark Brown #define WM2200_EQL_13 0x90C 278d5315a23SMark Brown #define WM2200_EQL_14 0x90D 279d5315a23SMark Brown #define WM2200_EQL_15 0x90E 280d5315a23SMark Brown #define WM2200_EQL_16 0x90F 281d5315a23SMark Brown #define WM2200_EQL_17 0x910 282d5315a23SMark Brown #define WM2200_EQL_18 0x911 283d5315a23SMark Brown #define WM2200_EQL_19 0x912 284d5315a23SMark Brown #define WM2200_EQL_20 0x913 285d5315a23SMark Brown #define WM2200_EQR_1 0x916 286d5315a23SMark Brown #define WM2200_EQR_2 0x917 287d5315a23SMark Brown #define WM2200_EQR_3 0x918 288d5315a23SMark Brown #define WM2200_EQR_4 0x919 289d5315a23SMark Brown #define WM2200_EQR_5 0x91A 290d5315a23SMark Brown #define WM2200_EQR_6 0x91B 291d5315a23SMark Brown #define WM2200_EQR_7 0x91C 292d5315a23SMark Brown #define WM2200_EQR_8 0x91D 293d5315a23SMark Brown #define WM2200_EQR_9 0x91E 294d5315a23SMark Brown #define WM2200_EQR_10 0x91F 295d5315a23SMark Brown #define WM2200_EQR_11 0x920 296d5315a23SMark Brown #define WM2200_EQR_12 0x921 297d5315a23SMark Brown #define WM2200_EQR_13 0x922 298d5315a23SMark Brown #define WM2200_EQR_14 0x923 299d5315a23SMark Brown #define WM2200_EQR_15 0x924 300d5315a23SMark Brown #define WM2200_EQR_16 0x925 301d5315a23SMark Brown #define WM2200_EQR_17 0x926 302d5315a23SMark Brown #define WM2200_EQR_18 0x927 303d5315a23SMark Brown #define WM2200_EQR_19 0x928 304d5315a23SMark Brown #define WM2200_EQR_20 0x929 305d5315a23SMark Brown #define WM2200_HPLPF1_1 0x93E 306d5315a23SMark Brown #define WM2200_HPLPF1_2 0x93F 307d5315a23SMark Brown #define WM2200_HPLPF2_1 0x942 308d5315a23SMark Brown #define WM2200_HPLPF2_2 0x943 309d5315a23SMark Brown #define WM2200_DSP1_CONTROL_1 0xA00 310d5315a23SMark Brown #define WM2200_DSP1_CONTROL_2 0xA02 311d5315a23SMark Brown #define WM2200_DSP1_CONTROL_3 0xA03 312d5315a23SMark Brown #define WM2200_DSP1_CONTROL_4 0xA04 313d5315a23SMark Brown #define WM2200_DSP1_CONTROL_5 0xA06 314d5315a23SMark Brown #define WM2200_DSP1_CONTROL_6 0xA07 315d5315a23SMark Brown #define WM2200_DSP1_CONTROL_7 0xA08 316d5315a23SMark Brown #define WM2200_DSP1_CONTROL_8 0xA09 317d5315a23SMark Brown #define WM2200_DSP1_CONTROL_9 0xA0A 318d5315a23SMark Brown #define WM2200_DSP1_CONTROL_10 0xA0B 319d5315a23SMark Brown #define WM2200_DSP1_CONTROL_11 0xA0C 320d5315a23SMark Brown #define WM2200_DSP1_CONTROL_12 0xA0D 321d5315a23SMark Brown #define WM2200_DSP1_CONTROL_13 0xA0F 322d5315a23SMark Brown #define WM2200_DSP1_CONTROL_14 0xA10 323d5315a23SMark Brown #define WM2200_DSP1_CONTROL_15 0xA11 324d5315a23SMark Brown #define WM2200_DSP1_CONTROL_16 0xA12 325d5315a23SMark Brown #define WM2200_DSP1_CONTROL_17 0xA13 326d5315a23SMark Brown #define WM2200_DSP1_CONTROL_18 0xA14 327d5315a23SMark Brown #define WM2200_DSP1_CONTROL_19 0xA16 328d5315a23SMark Brown #define WM2200_DSP1_CONTROL_20 0xA17 329d5315a23SMark Brown #define WM2200_DSP1_CONTROL_21 0xA18 330d5315a23SMark Brown #define WM2200_DSP1_CONTROL_22 0xA1A 331d5315a23SMark Brown #define WM2200_DSP1_CONTROL_23 0xA1B 332d5315a23SMark Brown #define WM2200_DSP1_CONTROL_24 0xA1C 333d5315a23SMark Brown #define WM2200_DSP1_CONTROL_25 0xA1E 334d5315a23SMark Brown #define WM2200_DSP1_CONTROL_26 0xA20 335d5315a23SMark Brown #define WM2200_DSP1_CONTROL_27 0xA21 336d5315a23SMark Brown #define WM2200_DSP1_CONTROL_28 0xA22 337d5315a23SMark Brown #define WM2200_DSP1_CONTROL_29 0xA23 338d5315a23SMark Brown #define WM2200_DSP1_CONTROL_30 0xA24 339d5315a23SMark Brown #define WM2200_DSP1_CONTROL_31 0xA26 340d5315a23SMark Brown #define WM2200_DSP2_CONTROL_1 0xB00 341d5315a23SMark Brown #define WM2200_DSP2_CONTROL_2 0xB02 342d5315a23SMark Brown #define WM2200_DSP2_CONTROL_3 0xB03 343d5315a23SMark Brown #define WM2200_DSP2_CONTROL_4 0xB04 344d5315a23SMark Brown #define WM2200_DSP2_CONTROL_5 0xB06 345d5315a23SMark Brown #define WM2200_DSP2_CONTROL_6 0xB07 346d5315a23SMark Brown #define WM2200_DSP2_CONTROL_7 0xB08 347d5315a23SMark Brown #define WM2200_DSP2_CONTROL_8 0xB09 348d5315a23SMark Brown #define WM2200_DSP2_CONTROL_9 0xB0A 349d5315a23SMark Brown #define WM2200_DSP2_CONTROL_10 0xB0B 350d5315a23SMark Brown #define WM2200_DSP2_CONTROL_11 0xB0C 351d5315a23SMark Brown #define WM2200_DSP2_CONTROL_12 0xB0D 352d5315a23SMark Brown #define WM2200_DSP2_CONTROL_13 0xB0F 353d5315a23SMark Brown #define WM2200_DSP2_CONTROL_14 0xB10 354d5315a23SMark Brown #define WM2200_DSP2_CONTROL_15 0xB11 355d5315a23SMark Brown #define WM2200_DSP2_CONTROL_16 0xB12 356d5315a23SMark Brown #define WM2200_DSP2_CONTROL_17 0xB13 357d5315a23SMark Brown #define WM2200_DSP2_CONTROL_18 0xB14 358d5315a23SMark Brown #define WM2200_DSP2_CONTROL_19 0xB16 359d5315a23SMark Brown #define WM2200_DSP2_CONTROL_20 0xB17 360d5315a23SMark Brown #define WM2200_DSP2_CONTROL_21 0xB18 361d5315a23SMark Brown #define WM2200_DSP2_CONTROL_22 0xB1A 362d5315a23SMark Brown #define WM2200_DSP2_CONTROL_23 0xB1B 363d5315a23SMark Brown #define WM2200_DSP2_CONTROL_24 0xB1C 364d5315a23SMark Brown #define WM2200_DSP2_CONTROL_25 0xB1E 365d5315a23SMark Brown #define WM2200_DSP2_CONTROL_26 0xB20 366d5315a23SMark Brown #define WM2200_DSP2_CONTROL_27 0xB21 367d5315a23SMark Brown #define WM2200_DSP2_CONTROL_28 0xB22 368d5315a23SMark Brown #define WM2200_DSP2_CONTROL_29 0xB23 369d5315a23SMark Brown #define WM2200_DSP2_CONTROL_30 0xB24 370d5315a23SMark Brown #define WM2200_DSP2_CONTROL_31 0xB26 371d5315a23SMark Brown #define WM2200_ANC_CTRL1 0xD00 372d5315a23SMark Brown #define WM2200_ANC_CTRL2 0xD01 373d5315a23SMark Brown #define WM2200_ANC_CTRL3 0xD02 374d5315a23SMark Brown #define WM2200_ANC_CTRL7 0xD08 375d5315a23SMark Brown #define WM2200_ANC_CTRL8 0xD09 376d5315a23SMark Brown #define WM2200_ANC_CTRL9 0xD0A 377d5315a23SMark Brown #define WM2200_ANC_CTRL10 0xD0B 378d5315a23SMark Brown #define WM2200_ANC_CTRL11 0xD0C 379d5315a23SMark Brown #define WM2200_ANC_CTRL12 0xD0D 380d5315a23SMark Brown #define WM2200_ANC_CTRL13 0xD0E 381d5315a23SMark Brown #define WM2200_ANC_CTRL14 0xD0F 382d5315a23SMark Brown #define WM2200_ANC_CTRL15 0xD10 383d5315a23SMark Brown #define WM2200_ANC_CTRL16 0xD11 384d5315a23SMark Brown #define WM2200_ANC_CTRL17 0xD12 385d5315a23SMark Brown #define WM2200_ANC_CTRL18 0xD15 386d5315a23SMark Brown #define WM2200_ANC_CTRL19 0xD16 387d5315a23SMark Brown #define WM2200_ANC_CTRL20 0xD17 388d5315a23SMark Brown #define WM2200_ANC_CTRL21 0xD18 389d5315a23SMark Brown #define WM2200_ANC_CTRL22 0xD19 390d5315a23SMark Brown #define WM2200_ANC_CTRL23 0xD1A 391d5315a23SMark Brown #define WM2200_ANC_CTRL24 0xD1B 392d5315a23SMark Brown #define WM2200_ANC_CTRL25 0xD1C 393d5315a23SMark Brown #define WM2200_ANC_CTRL26 0xD1D 394d5315a23SMark Brown #define WM2200_ANC_CTRL27 0xD1E 395d5315a23SMark Brown #define WM2200_ANC_CTRL28 0xD1F 396d5315a23SMark Brown #define WM2200_ANC_CTRL29 0xD20 397d5315a23SMark Brown #define WM2200_ANC_CTRL30 0xD21 398d5315a23SMark Brown #define WM2200_ANC_CTRL31 0xD23 399d5315a23SMark Brown #define WM2200_ANC_CTRL32 0xD24 400d5315a23SMark Brown #define WM2200_ANC_CTRL33 0xD25 401d5315a23SMark Brown #define WM2200_ANC_CTRL34 0xD27 402d5315a23SMark Brown #define WM2200_ANC_CTRL35 0xD28 403d5315a23SMark Brown #define WM2200_ANC_CTRL36 0xD29 404d5315a23SMark Brown #define WM2200_ANC_CTRL37 0xD2A 405d5315a23SMark Brown #define WM2200_ANC_CTRL38 0xD2B 406d5315a23SMark Brown #define WM2200_ANC_CTRL39 0xD2C 407d5315a23SMark Brown #define WM2200_ANC_CTRL40 0xD2D 408d5315a23SMark Brown #define WM2200_ANC_CTRL41 0xD2E 409d5315a23SMark Brown #define WM2200_ANC_CTRL42 0xD2F 410d5315a23SMark Brown #define WM2200_ANC_CTRL43 0xD30 411d5315a23SMark Brown #define WM2200_ANC_CTRL44 0xD31 412d5315a23SMark Brown #define WM2200_ANC_CTRL45 0xD32 413d5315a23SMark Brown #define WM2200_ANC_CTRL46 0xD33 414d5315a23SMark Brown #define WM2200_ANC_CTRL47 0xD34 415d5315a23SMark Brown #define WM2200_ANC_CTRL48 0xD35 416d5315a23SMark Brown #define WM2200_ANC_CTRL49 0xD36 417d5315a23SMark Brown #define WM2200_ANC_CTRL50 0xD37 418d5315a23SMark Brown #define WM2200_ANC_CTRL51 0xD38 419d5315a23SMark Brown #define WM2200_ANC_CTRL52 0xD39 420d5315a23SMark Brown #define WM2200_ANC_CTRL53 0xD3A 421d5315a23SMark Brown #define WM2200_ANC_CTRL54 0xD3B 422d5315a23SMark Brown #define WM2200_ANC_CTRL55 0xD3C 423d5315a23SMark Brown #define WM2200_ANC_CTRL56 0xD3D 424d5315a23SMark Brown #define WM2200_ANC_CTRL57 0xD3E 425d5315a23SMark Brown #define WM2200_ANC_CTRL58 0xD3F 426d5315a23SMark Brown #define WM2200_ANC_CTRL59 0xD40 427d5315a23SMark Brown #define WM2200_ANC_CTRL60 0xD41 428d5315a23SMark Brown #define WM2200_ANC_CTRL61 0xD42 429d5315a23SMark Brown #define WM2200_ANC_CTRL62 0xD43 430d5315a23SMark Brown #define WM2200_ANC_CTRL63 0xD44 431d5315a23SMark Brown #define WM2200_ANC_CTRL64 0xD45 432d5315a23SMark Brown #define WM2200_ANC_CTRL65 0xD46 433d5315a23SMark Brown #define WM2200_ANC_CTRL66 0xD47 434d5315a23SMark Brown #define WM2200_ANC_CTRL67 0xD48 435d5315a23SMark Brown #define WM2200_ANC_CTRL68 0xD49 436d5315a23SMark Brown #define WM2200_ANC_CTRL69 0xD4A 437d5315a23SMark Brown #define WM2200_ANC_CTRL70 0xD4B 438d5315a23SMark Brown #define WM2200_ANC_CTRL71 0xD4C 439d5315a23SMark Brown #define WM2200_ANC_CTRL72 0xD4D 440d5315a23SMark Brown #define WM2200_ANC_CTRL73 0xD4E 441d5315a23SMark Brown #define WM2200_ANC_CTRL74 0xD4F 442d5315a23SMark Brown #define WM2200_ANC_CTRL75 0xD50 443d5315a23SMark Brown #define WM2200_ANC_CTRL76 0xD51 444d5315a23SMark Brown #define WM2200_ANC_CTRL77 0xD52 445d5315a23SMark Brown #define WM2200_ANC_CTRL78 0xD53 446d5315a23SMark Brown #define WM2200_ANC_CTRL79 0xD54 447d5315a23SMark Brown #define WM2200_ANC_CTRL80 0xD55 448d5315a23SMark Brown #define WM2200_ANC_CTRL81 0xD56 449d5315a23SMark Brown #define WM2200_ANC_CTRL82 0xD57 450d5315a23SMark Brown #define WM2200_ANC_CTRL83 0xD58 451d5315a23SMark Brown #define WM2200_ANC_CTRL84 0xD5B 452d5315a23SMark Brown #define WM2200_ANC_CTRL85 0xD5C 453d5315a23SMark Brown #define WM2200_ANC_CTRL86 0xD5F 454d5315a23SMark Brown #define WM2200_ANC_CTRL87 0xD60 455d5315a23SMark Brown #define WM2200_ANC_CTRL88 0xD61 456d5315a23SMark Brown #define WM2200_ANC_CTRL89 0xD62 457d5315a23SMark Brown #define WM2200_ANC_CTRL90 0xD63 458d5315a23SMark Brown #define WM2200_ANC_CTRL91 0xD64 459d5315a23SMark Brown #define WM2200_ANC_CTRL92 0xD65 460d5315a23SMark Brown #define WM2200_ANC_CTRL93 0xD66 461d5315a23SMark Brown #define WM2200_ANC_CTRL94 0xD67 462d5315a23SMark Brown #define WM2200_ANC_CTRL95 0xD68 463d5315a23SMark Brown #define WM2200_ANC_CTRL96 0xD69 464d5315a23SMark Brown #define WM2200_DSP1_DM_0 0x3000 465d5315a23SMark Brown #define WM2200_DSP1_DM_1 0x3001 466d5315a23SMark Brown #define WM2200_DSP1_DM_2 0x3002 467d5315a23SMark Brown #define WM2200_DSP1_DM_3 0x3003 468d5315a23SMark Brown #define WM2200_DSP1_DM_2044 0x37FC 469d5315a23SMark Brown #define WM2200_DSP1_DM_2045 0x37FD 470d5315a23SMark Brown #define WM2200_DSP1_DM_2046 0x37FE 471d5315a23SMark Brown #define WM2200_DSP1_DM_2047 0x37FF 472d5315a23SMark Brown #define WM2200_DSP1_PM_0 0x3800 473d5315a23SMark Brown #define WM2200_DSP1_PM_1 0x3801 474d5315a23SMark Brown #define WM2200_DSP1_PM_2 0x3802 475d5315a23SMark Brown #define WM2200_DSP1_PM_3 0x3803 476d5315a23SMark Brown #define WM2200_DSP1_PM_4 0x3804 477d5315a23SMark Brown #define WM2200_DSP1_PM_5 0x3805 478d5315a23SMark Brown #define WM2200_DSP1_PM_762 0x3AFA 479d5315a23SMark Brown #define WM2200_DSP1_PM_763 0x3AFB 480d5315a23SMark Brown #define WM2200_DSP1_PM_764 0x3AFC 481d5315a23SMark Brown #define WM2200_DSP1_PM_765 0x3AFD 482d5315a23SMark Brown #define WM2200_DSP1_PM_766 0x3AFE 483d5315a23SMark Brown #define WM2200_DSP1_PM_767 0x3AFF 484d5315a23SMark Brown #define WM2200_DSP1_ZM_0 0x3C00 485d5315a23SMark Brown #define WM2200_DSP1_ZM_1 0x3C01 486d5315a23SMark Brown #define WM2200_DSP1_ZM_2 0x3C02 487d5315a23SMark Brown #define WM2200_DSP1_ZM_3 0x3C03 488d5315a23SMark Brown #define WM2200_DSP1_ZM_1020 0x3FFC 489d5315a23SMark Brown #define WM2200_DSP1_ZM_1021 0x3FFD 490d5315a23SMark Brown #define WM2200_DSP1_ZM_1022 0x3FFE 491d5315a23SMark Brown #define WM2200_DSP1_ZM_1023 0x3FFF 492d5315a23SMark Brown #define WM2200_DSP2_DM_0 0x4000 493d5315a23SMark Brown #define WM2200_DSP2_DM_1 0x4001 494d5315a23SMark Brown #define WM2200_DSP2_DM_2 0x4002 495d5315a23SMark Brown #define WM2200_DSP2_DM_3 0x4003 496d5315a23SMark Brown #define WM2200_DSP2_DM_2044 0x47FC 497d5315a23SMark Brown #define WM2200_DSP2_DM_2045 0x47FD 498d5315a23SMark Brown #define WM2200_DSP2_DM_2046 0x47FE 499d5315a23SMark Brown #define WM2200_DSP2_DM_2047 0x47FF 500d5315a23SMark Brown #define WM2200_DSP2_PM_0 0x4800 501d5315a23SMark Brown #define WM2200_DSP2_PM_1 0x4801 502d5315a23SMark Brown #define WM2200_DSP2_PM_2 0x4802 503d5315a23SMark Brown #define WM2200_DSP2_PM_3 0x4803 504d5315a23SMark Brown #define WM2200_DSP2_PM_4 0x4804 505d5315a23SMark Brown #define WM2200_DSP2_PM_5 0x4805 506d5315a23SMark Brown #define WM2200_DSP2_PM_762 0x4AFA 507d5315a23SMark Brown #define WM2200_DSP2_PM_763 0x4AFB 508d5315a23SMark Brown #define WM2200_DSP2_PM_764 0x4AFC 509d5315a23SMark Brown #define WM2200_DSP2_PM_765 0x4AFD 510d5315a23SMark Brown #define WM2200_DSP2_PM_766 0x4AFE 511d5315a23SMark Brown #define WM2200_DSP2_PM_767 0x4AFF 512d5315a23SMark Brown #define WM2200_DSP2_ZM_0 0x4C00 513d5315a23SMark Brown #define WM2200_DSP2_ZM_1 0x4C01 514d5315a23SMark Brown #define WM2200_DSP2_ZM_2 0x4C02 515d5315a23SMark Brown #define WM2200_DSP2_ZM_3 0x4C03 516d5315a23SMark Brown #define WM2200_DSP2_ZM_1020 0x4FFC 517d5315a23SMark Brown #define WM2200_DSP2_ZM_1021 0x4FFD 518d5315a23SMark Brown #define WM2200_DSP2_ZM_1022 0x4FFE 519d5315a23SMark Brown #define WM2200_DSP2_ZM_1023 0x4FFF 520d5315a23SMark Brown 521d5315a23SMark Brown #define WM2200_REGISTER_COUNT 494 522d5315a23SMark Brown #define WM2200_MAX_REGISTER 0x4FFF 523d5315a23SMark Brown 524d5315a23SMark Brown /* 525d5315a23SMark Brown * Field Definitions. 526d5315a23SMark Brown */ 527d5315a23SMark Brown 528d5315a23SMark Brown /* 529d5315a23SMark Brown * R0 (0x00) - software reset 530d5315a23SMark Brown */ 531d5315a23SMark Brown #define WM2200_SW_RESET_CHIP_ID1_MASK 0xFFFF /* SW_RESET_CHIP_ID1 - [15:0] */ 532d5315a23SMark Brown #define WM2200_SW_RESET_CHIP_ID1_SHIFT 0 /* SW_RESET_CHIP_ID1 - [15:0] */ 533d5315a23SMark Brown #define WM2200_SW_RESET_CHIP_ID1_WIDTH 16 /* SW_RESET_CHIP_ID1 - [15:0] */ 534d5315a23SMark Brown 535d5315a23SMark Brown /* 536d5315a23SMark Brown * R1 (0x01) - Device Revision 537d5315a23SMark Brown */ 538d5315a23SMark Brown #define WM2200_DEVICE_REVISION_MASK 0x000F /* DEVICE_REVISION - [3:0] */ 539d5315a23SMark Brown #define WM2200_DEVICE_REVISION_SHIFT 0 /* DEVICE_REVISION - [3:0] */ 540d5315a23SMark Brown #define WM2200_DEVICE_REVISION_WIDTH 4 /* DEVICE_REVISION - [3:0] */ 541d5315a23SMark Brown 542d5315a23SMark Brown /* 543d5315a23SMark Brown * R11 (0x0B) - Tone Generator 1 544d5315a23SMark Brown */ 545d5315a23SMark Brown #define WM2200_TONE_ENA 0x0001 /* TONE_ENA */ 546d5315a23SMark Brown #define WM2200_TONE_ENA_MASK 0x0001 /* TONE_ENA */ 547d5315a23SMark Brown #define WM2200_TONE_ENA_SHIFT 0 /* TONE_ENA */ 548d5315a23SMark Brown #define WM2200_TONE_ENA_WIDTH 1 /* TONE_ENA */ 549d5315a23SMark Brown 550d5315a23SMark Brown /* 551d5315a23SMark Brown * R258 (0x102) - Clocking 3 552d5315a23SMark Brown */ 553d5315a23SMark Brown #define WM2200_SYSCLK_FREQ_MASK 0x0700 /* SYSCLK_FREQ - [10:8] */ 554d5315a23SMark Brown #define WM2200_SYSCLK_FREQ_SHIFT 8 /* SYSCLK_FREQ - [10:8] */ 555d5315a23SMark Brown #define WM2200_SYSCLK_FREQ_WIDTH 3 /* SYSCLK_FREQ - [10:8] */ 556d5315a23SMark Brown #define WM2200_SYSCLK_ENA 0x0040 /* SYSCLK_ENA */ 557d5315a23SMark Brown #define WM2200_SYSCLK_ENA_MASK 0x0040 /* SYSCLK_ENA */ 558d5315a23SMark Brown #define WM2200_SYSCLK_ENA_SHIFT 6 /* SYSCLK_ENA */ 559d5315a23SMark Brown #define WM2200_SYSCLK_ENA_WIDTH 1 /* SYSCLK_ENA */ 560d5315a23SMark Brown #define WM2200_SYSCLK_SRC_MASK 0x000F /* SYSCLK_SRC - [3:0] */ 561d5315a23SMark Brown #define WM2200_SYSCLK_SRC_SHIFT 0 /* SYSCLK_SRC - [3:0] */ 562d5315a23SMark Brown #define WM2200_SYSCLK_SRC_WIDTH 4 /* SYSCLK_SRC - [3:0] */ 563d5315a23SMark Brown 564d5315a23SMark Brown /* 565d5315a23SMark Brown * R259 (0x103) - Clocking 4 566d5315a23SMark Brown */ 567d5315a23SMark Brown #define WM2200_SAMPLE_RATE_1_MASK 0x001F /* SAMPLE_RATE_1 - [4:0] */ 568d5315a23SMark Brown #define WM2200_SAMPLE_RATE_1_SHIFT 0 /* SAMPLE_RATE_1 - [4:0] */ 569d5315a23SMark Brown #define WM2200_SAMPLE_RATE_1_WIDTH 5 /* SAMPLE_RATE_1 - [4:0] */ 570d5315a23SMark Brown 571d5315a23SMark Brown /* 572d5315a23SMark Brown * R273 (0x111) - FLL Control 1 573d5315a23SMark Brown */ 574d5315a23SMark Brown #define WM2200_FLL_ENA 0x0001 /* FLL_ENA */ 575d5315a23SMark Brown #define WM2200_FLL_ENA_MASK 0x0001 /* FLL_ENA */ 576d5315a23SMark Brown #define WM2200_FLL_ENA_SHIFT 0 /* FLL_ENA */ 577d5315a23SMark Brown #define WM2200_FLL_ENA_WIDTH 1 /* FLL_ENA */ 578d5315a23SMark Brown 579d5315a23SMark Brown /* 580d5315a23SMark Brown * R274 (0x112) - FLL Control 2 581d5315a23SMark Brown */ 582d5315a23SMark Brown #define WM2200_FLL_OUTDIV_MASK 0x3F00 /* FLL_OUTDIV - [13:8] */ 583d5315a23SMark Brown #define WM2200_FLL_OUTDIV_SHIFT 8 /* FLL_OUTDIV - [13:8] */ 584d5315a23SMark Brown #define WM2200_FLL_OUTDIV_WIDTH 6 /* FLL_OUTDIV - [13:8] */ 585d5315a23SMark Brown #define WM2200_FLL_FRATIO_MASK 0x0007 /* FLL_FRATIO - [2:0] */ 586d5315a23SMark Brown #define WM2200_FLL_FRATIO_SHIFT 0 /* FLL_FRATIO - [2:0] */ 587d5315a23SMark Brown #define WM2200_FLL_FRATIO_WIDTH 3 /* FLL_FRATIO - [2:0] */ 588d5315a23SMark Brown 589d5315a23SMark Brown /* 590d5315a23SMark Brown * R275 (0x113) - FLL Control 3 591d5315a23SMark Brown */ 592d5315a23SMark Brown #define WM2200_FLL_FRACN_ENA 0x0001 /* FLL_FRACN_ENA */ 593d5315a23SMark Brown #define WM2200_FLL_FRACN_ENA_MASK 0x0001 /* FLL_FRACN_ENA */ 594d5315a23SMark Brown #define WM2200_FLL_FRACN_ENA_SHIFT 0 /* FLL_FRACN_ENA */ 595d5315a23SMark Brown #define WM2200_FLL_FRACN_ENA_WIDTH 1 /* FLL_FRACN_ENA */ 596d5315a23SMark Brown 597d5315a23SMark Brown /* 598d5315a23SMark Brown * R276 (0x114) - FLL Control 4 599d5315a23SMark Brown */ 600d5315a23SMark Brown #define WM2200_FLL_THETA_MASK 0xFFFF /* FLL_THETA - [15:0] */ 601d5315a23SMark Brown #define WM2200_FLL_THETA_SHIFT 0 /* FLL_THETA - [15:0] */ 602d5315a23SMark Brown #define WM2200_FLL_THETA_WIDTH 16 /* FLL_THETA - [15:0] */ 603d5315a23SMark Brown 604d5315a23SMark Brown /* 605d5315a23SMark Brown * R278 (0x116) - FLL Control 6 606d5315a23SMark Brown */ 607d5315a23SMark Brown #define WM2200_FLL_N_MASK 0x03FF /* FLL_N - [9:0] */ 608d5315a23SMark Brown #define WM2200_FLL_N_SHIFT 0 /* FLL_N - [9:0] */ 609d5315a23SMark Brown #define WM2200_FLL_N_WIDTH 10 /* FLL_N - [9:0] */ 610d5315a23SMark Brown 611d5315a23SMark Brown /* 612d5315a23SMark Brown * R279 (0x117) - FLL Control 7 613d5315a23SMark Brown */ 614d5315a23SMark Brown #define WM2200_FLL_CLK_REF_DIV_MASK 0x0030 /* FLL_CLK_REF_DIV - [5:4] */ 615d5315a23SMark Brown #define WM2200_FLL_CLK_REF_DIV_SHIFT 4 /* FLL_CLK_REF_DIV - [5:4] */ 616d5315a23SMark Brown #define WM2200_FLL_CLK_REF_DIV_WIDTH 2 /* FLL_CLK_REF_DIV - [5:4] */ 617d5315a23SMark Brown #define WM2200_FLL_CLK_REF_SRC_MASK 0x0003 /* FLL_CLK_REF_SRC - [1:0] */ 618d5315a23SMark Brown #define WM2200_FLL_CLK_REF_SRC_SHIFT 0 /* FLL_CLK_REF_SRC - [1:0] */ 619d5315a23SMark Brown #define WM2200_FLL_CLK_REF_SRC_WIDTH 2 /* FLL_CLK_REF_SRC - [1:0] */ 620d5315a23SMark Brown 621d5315a23SMark Brown /* 622d5315a23SMark Brown * R281 (0x119) - FLL EFS 1 623d5315a23SMark Brown */ 624d5315a23SMark Brown #define WM2200_FLL_LAMBDA_MASK 0xFFFF /* FLL_LAMBDA - [15:0] */ 625d5315a23SMark Brown #define WM2200_FLL_LAMBDA_SHIFT 0 /* FLL_LAMBDA - [15:0] */ 626d5315a23SMark Brown #define WM2200_FLL_LAMBDA_WIDTH 16 /* FLL_LAMBDA - [15:0] */ 627d5315a23SMark Brown 628d5315a23SMark Brown /* 629d5315a23SMark Brown * R282 (0x11A) - FLL EFS 2 630d5315a23SMark Brown */ 631d5315a23SMark Brown #define WM2200_FLL_EFS_ENA 0x0001 /* FLL_EFS_ENA */ 632d5315a23SMark Brown #define WM2200_FLL_EFS_ENA_MASK 0x0001 /* FLL_EFS_ENA */ 633d5315a23SMark Brown #define WM2200_FLL_EFS_ENA_SHIFT 0 /* FLL_EFS_ENA */ 634d5315a23SMark Brown #define WM2200_FLL_EFS_ENA_WIDTH 1 /* FLL_EFS_ENA */ 635d5315a23SMark Brown 636d5315a23SMark Brown /* 637d5315a23SMark Brown * R512 (0x200) - Mic Charge Pump 1 638d5315a23SMark Brown */ 639d5315a23SMark Brown #define WM2200_CPMIC_BYPASS_MODE 0x0020 /* CPMIC_BYPASS_MODE */ 640d5315a23SMark Brown #define WM2200_CPMIC_BYPASS_MODE_MASK 0x0020 /* CPMIC_BYPASS_MODE */ 641d5315a23SMark Brown #define WM2200_CPMIC_BYPASS_MODE_SHIFT 5 /* CPMIC_BYPASS_MODE */ 642d5315a23SMark Brown #define WM2200_CPMIC_BYPASS_MODE_WIDTH 1 /* CPMIC_BYPASS_MODE */ 643d5315a23SMark Brown #define WM2200_CPMIC_ENA 0x0001 /* CPMIC_ENA */ 644d5315a23SMark Brown #define WM2200_CPMIC_ENA_MASK 0x0001 /* CPMIC_ENA */ 645d5315a23SMark Brown #define WM2200_CPMIC_ENA_SHIFT 0 /* CPMIC_ENA */ 646d5315a23SMark Brown #define WM2200_CPMIC_ENA_WIDTH 1 /* CPMIC_ENA */ 647d5315a23SMark Brown 648d5315a23SMark Brown /* 649d5315a23SMark Brown * R513 (0x201) - Mic Charge Pump 2 650d5315a23SMark Brown */ 651d5315a23SMark Brown #define WM2200_CPMIC_LDO_VSEL_OVERRIDE_MASK 0xF800 /* CPMIC_LDO_VSEL_OVERRIDE - [15:11] */ 652d5315a23SMark Brown #define WM2200_CPMIC_LDO_VSEL_OVERRIDE_SHIFT 11 /* CPMIC_LDO_VSEL_OVERRIDE - [15:11] */ 653d5315a23SMark Brown #define WM2200_CPMIC_LDO_VSEL_OVERRIDE_WIDTH 5 /* CPMIC_LDO_VSEL_OVERRIDE - [15:11] */ 654d5315a23SMark Brown 655d5315a23SMark Brown /* 656d5315a23SMark Brown * R514 (0x202) - DM Charge Pump 1 657d5315a23SMark Brown */ 658d5315a23SMark Brown #define WM2200_CPDM_ENA 0x0001 /* CPDM_ENA */ 659d5315a23SMark Brown #define WM2200_CPDM_ENA_MASK 0x0001 /* CPDM_ENA */ 660d5315a23SMark Brown #define WM2200_CPDM_ENA_SHIFT 0 /* CPDM_ENA */ 661d5315a23SMark Brown #define WM2200_CPDM_ENA_WIDTH 1 /* CPDM_ENA */ 662d5315a23SMark Brown 663d5315a23SMark Brown /* 664d5315a23SMark Brown * R524 (0x20C) - Mic Bias Ctrl 1 665d5315a23SMark Brown */ 666d5315a23SMark Brown #define WM2200_MICB1_DISCH 0x0040 /* MICB1_DISCH */ 667d5315a23SMark Brown #define WM2200_MICB1_DISCH_MASK 0x0040 /* MICB1_DISCH */ 668d5315a23SMark Brown #define WM2200_MICB1_DISCH_SHIFT 6 /* MICB1_DISCH */ 669d5315a23SMark Brown #define WM2200_MICB1_DISCH_WIDTH 1 /* MICB1_DISCH */ 670d5315a23SMark Brown #define WM2200_MICB1_RATE 0x0020 /* MICB1_RATE */ 671d5315a23SMark Brown #define WM2200_MICB1_RATE_MASK 0x0020 /* MICB1_RATE */ 672d5315a23SMark Brown #define WM2200_MICB1_RATE_SHIFT 5 /* MICB1_RATE */ 673d5315a23SMark Brown #define WM2200_MICB1_RATE_WIDTH 1 /* MICB1_RATE */ 674d5315a23SMark Brown #define WM2200_MICB1_LVL_MASK 0x001C /* MICB1_LVL - [4:2] */ 675d5315a23SMark Brown #define WM2200_MICB1_LVL_SHIFT 2 /* MICB1_LVL - [4:2] */ 676d5315a23SMark Brown #define WM2200_MICB1_LVL_WIDTH 3 /* MICB1_LVL - [4:2] */ 677d5315a23SMark Brown #define WM2200_MICB1_MODE 0x0002 /* MICB1_MODE */ 678d5315a23SMark Brown #define WM2200_MICB1_MODE_MASK 0x0002 /* MICB1_MODE */ 679d5315a23SMark Brown #define WM2200_MICB1_MODE_SHIFT 1 /* MICB1_MODE */ 680d5315a23SMark Brown #define WM2200_MICB1_MODE_WIDTH 1 /* MICB1_MODE */ 681d5315a23SMark Brown #define WM2200_MICB1_ENA 0x0001 /* MICB1_ENA */ 682d5315a23SMark Brown #define WM2200_MICB1_ENA_MASK 0x0001 /* MICB1_ENA */ 683d5315a23SMark Brown #define WM2200_MICB1_ENA_SHIFT 0 /* MICB1_ENA */ 684d5315a23SMark Brown #define WM2200_MICB1_ENA_WIDTH 1 /* MICB1_ENA */ 685d5315a23SMark Brown 686d5315a23SMark Brown /* 687d5315a23SMark Brown * R525 (0x20D) - Mic Bias Ctrl 2 688d5315a23SMark Brown */ 689d5315a23SMark Brown #define WM2200_MICB2_DISCH 0x0040 /* MICB2_DISCH */ 690d5315a23SMark Brown #define WM2200_MICB2_DISCH_MASK 0x0040 /* MICB2_DISCH */ 691d5315a23SMark Brown #define WM2200_MICB2_DISCH_SHIFT 6 /* MICB2_DISCH */ 692d5315a23SMark Brown #define WM2200_MICB2_DISCH_WIDTH 1 /* MICB2_DISCH */ 693d5315a23SMark Brown #define WM2200_MICB2_RATE 0x0020 /* MICB2_RATE */ 694d5315a23SMark Brown #define WM2200_MICB2_RATE_MASK 0x0020 /* MICB2_RATE */ 695d5315a23SMark Brown #define WM2200_MICB2_RATE_SHIFT 5 /* MICB2_RATE */ 696d5315a23SMark Brown #define WM2200_MICB2_RATE_WIDTH 1 /* MICB2_RATE */ 697d5315a23SMark Brown #define WM2200_MICB2_LVL_MASK 0x001C /* MICB2_LVL - [4:2] */ 698d5315a23SMark Brown #define WM2200_MICB2_LVL_SHIFT 2 /* MICB2_LVL - [4:2] */ 699d5315a23SMark Brown #define WM2200_MICB2_LVL_WIDTH 3 /* MICB2_LVL - [4:2] */ 700d5315a23SMark Brown #define WM2200_MICB2_MODE 0x0002 /* MICB2_MODE */ 701d5315a23SMark Brown #define WM2200_MICB2_MODE_MASK 0x0002 /* MICB2_MODE */ 702d5315a23SMark Brown #define WM2200_MICB2_MODE_SHIFT 1 /* MICB2_MODE */ 703d5315a23SMark Brown #define WM2200_MICB2_MODE_WIDTH 1 /* MICB2_MODE */ 704d5315a23SMark Brown #define WM2200_MICB2_ENA 0x0001 /* MICB2_ENA */ 705d5315a23SMark Brown #define WM2200_MICB2_ENA_MASK 0x0001 /* MICB2_ENA */ 706d5315a23SMark Brown #define WM2200_MICB2_ENA_SHIFT 0 /* MICB2_ENA */ 707d5315a23SMark Brown #define WM2200_MICB2_ENA_WIDTH 1 /* MICB2_ENA */ 708d5315a23SMark Brown 709d5315a23SMark Brown /* 710d5315a23SMark Brown * R527 (0x20F) - Ear Piece Ctrl 1 711d5315a23SMark Brown */ 712d5315a23SMark Brown #define WM2200_EPD_LP_ENA 0x4000 /* EPD_LP_ENA */ 713d5315a23SMark Brown #define WM2200_EPD_LP_ENA_MASK 0x4000 /* EPD_LP_ENA */ 714d5315a23SMark Brown #define WM2200_EPD_LP_ENA_SHIFT 14 /* EPD_LP_ENA */ 715d5315a23SMark Brown #define WM2200_EPD_LP_ENA_WIDTH 1 /* EPD_LP_ENA */ 716d5315a23SMark Brown #define WM2200_EPD_OUTP_LP_ENA 0x2000 /* EPD_OUTP_LP_ENA */ 717d5315a23SMark Brown #define WM2200_EPD_OUTP_LP_ENA_MASK 0x2000 /* EPD_OUTP_LP_ENA */ 718d5315a23SMark Brown #define WM2200_EPD_OUTP_LP_ENA_SHIFT 13 /* EPD_OUTP_LP_ENA */ 719d5315a23SMark Brown #define WM2200_EPD_OUTP_LP_ENA_WIDTH 1 /* EPD_OUTP_LP_ENA */ 720d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_LP 0x1000 /* EPD_RMV_SHRT_LP */ 721d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_LP_MASK 0x1000 /* EPD_RMV_SHRT_LP */ 722d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_LP_SHIFT 12 /* EPD_RMV_SHRT_LP */ 723d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_LP_WIDTH 1 /* EPD_RMV_SHRT_LP */ 724d5315a23SMark Brown #define WM2200_EPD_LN_ENA 0x0800 /* EPD_LN_ENA */ 725d5315a23SMark Brown #define WM2200_EPD_LN_ENA_MASK 0x0800 /* EPD_LN_ENA */ 726d5315a23SMark Brown #define WM2200_EPD_LN_ENA_SHIFT 11 /* EPD_LN_ENA */ 727d5315a23SMark Brown #define WM2200_EPD_LN_ENA_WIDTH 1 /* EPD_LN_ENA */ 728d5315a23SMark Brown #define WM2200_EPD_OUTP_LN_ENA 0x0400 /* EPD_OUTP_LN_ENA */ 729d5315a23SMark Brown #define WM2200_EPD_OUTP_LN_ENA_MASK 0x0400 /* EPD_OUTP_LN_ENA */ 730d5315a23SMark Brown #define WM2200_EPD_OUTP_LN_ENA_SHIFT 10 /* EPD_OUTP_LN_ENA */ 731d5315a23SMark Brown #define WM2200_EPD_OUTP_LN_ENA_WIDTH 1 /* EPD_OUTP_LN_ENA */ 732d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_LN 0x0200 /* EPD_RMV_SHRT_LN */ 733d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_LN_MASK 0x0200 /* EPD_RMV_SHRT_LN */ 734d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_LN_SHIFT 9 /* EPD_RMV_SHRT_LN */ 735d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_LN_WIDTH 1 /* EPD_RMV_SHRT_LN */ 736d5315a23SMark Brown 737d5315a23SMark Brown /* 738d5315a23SMark Brown * R528 (0x210) - Ear Piece Ctrl 2 739d5315a23SMark Brown */ 740d5315a23SMark Brown #define WM2200_EPD_RP_ENA 0x4000 /* EPD_RP_ENA */ 741d5315a23SMark Brown #define WM2200_EPD_RP_ENA_MASK 0x4000 /* EPD_RP_ENA */ 742d5315a23SMark Brown #define WM2200_EPD_RP_ENA_SHIFT 14 /* EPD_RP_ENA */ 743d5315a23SMark Brown #define WM2200_EPD_RP_ENA_WIDTH 1 /* EPD_RP_ENA */ 744d5315a23SMark Brown #define WM2200_EPD_OUTP_RP_ENA 0x2000 /* EPD_OUTP_RP_ENA */ 745d5315a23SMark Brown #define WM2200_EPD_OUTP_RP_ENA_MASK 0x2000 /* EPD_OUTP_RP_ENA */ 746d5315a23SMark Brown #define WM2200_EPD_OUTP_RP_ENA_SHIFT 13 /* EPD_OUTP_RP_ENA */ 747d5315a23SMark Brown #define WM2200_EPD_OUTP_RP_ENA_WIDTH 1 /* EPD_OUTP_RP_ENA */ 748d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_RP 0x1000 /* EPD_RMV_SHRT_RP */ 749d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_RP_MASK 0x1000 /* EPD_RMV_SHRT_RP */ 750d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_RP_SHIFT 12 /* EPD_RMV_SHRT_RP */ 751d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_RP_WIDTH 1 /* EPD_RMV_SHRT_RP */ 752d5315a23SMark Brown #define WM2200_EPD_RN_ENA 0x0800 /* EPD_RN_ENA */ 753d5315a23SMark Brown #define WM2200_EPD_RN_ENA_MASK 0x0800 /* EPD_RN_ENA */ 754d5315a23SMark Brown #define WM2200_EPD_RN_ENA_SHIFT 11 /* EPD_RN_ENA */ 755d5315a23SMark Brown #define WM2200_EPD_RN_ENA_WIDTH 1 /* EPD_RN_ENA */ 756d5315a23SMark Brown #define WM2200_EPD_OUTP_RN_ENA 0x0400 /* EPD_OUTP_RN_ENA */ 757d5315a23SMark Brown #define WM2200_EPD_OUTP_RN_ENA_MASK 0x0400 /* EPD_OUTP_RN_ENA */ 758d5315a23SMark Brown #define WM2200_EPD_OUTP_RN_ENA_SHIFT 10 /* EPD_OUTP_RN_ENA */ 759d5315a23SMark Brown #define WM2200_EPD_OUTP_RN_ENA_WIDTH 1 /* EPD_OUTP_RN_ENA */ 760d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_RN 0x0200 /* EPD_RMV_SHRT_RN */ 761d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_RN_MASK 0x0200 /* EPD_RMV_SHRT_RN */ 762d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_RN_SHIFT 9 /* EPD_RMV_SHRT_RN */ 763d5315a23SMark Brown #define WM2200_EPD_RMV_SHRT_RN_WIDTH 1 /* EPD_RMV_SHRT_RN */ 764d5315a23SMark Brown 765d5315a23SMark Brown /* 766d5315a23SMark Brown * R769 (0x301) - Input Enables 767d5315a23SMark Brown */ 768d5315a23SMark Brown #define WM2200_IN3L_ENA 0x0020 /* IN3L_ENA */ 769d5315a23SMark Brown #define WM2200_IN3L_ENA_MASK 0x0020 /* IN3L_ENA */ 770d5315a23SMark Brown #define WM2200_IN3L_ENA_SHIFT 5 /* IN3L_ENA */ 771d5315a23SMark Brown #define WM2200_IN3L_ENA_WIDTH 1 /* IN3L_ENA */ 772d5315a23SMark Brown #define WM2200_IN3R_ENA 0x0010 /* IN3R_ENA */ 773d5315a23SMark Brown #define WM2200_IN3R_ENA_MASK 0x0010 /* IN3R_ENA */ 774d5315a23SMark Brown #define WM2200_IN3R_ENA_SHIFT 4 /* IN3R_ENA */ 775d5315a23SMark Brown #define WM2200_IN3R_ENA_WIDTH 1 /* IN3R_ENA */ 776d5315a23SMark Brown #define WM2200_IN2L_ENA 0x0008 /* IN2L_ENA */ 777d5315a23SMark Brown #define WM2200_IN2L_ENA_MASK 0x0008 /* IN2L_ENA */ 778d5315a23SMark Brown #define WM2200_IN2L_ENA_SHIFT 3 /* IN2L_ENA */ 779d5315a23SMark Brown #define WM2200_IN2L_ENA_WIDTH 1 /* IN2L_ENA */ 780d5315a23SMark Brown #define WM2200_IN2R_ENA 0x0004 /* IN2R_ENA */ 781d5315a23SMark Brown #define WM2200_IN2R_ENA_MASK 0x0004 /* IN2R_ENA */ 782d5315a23SMark Brown #define WM2200_IN2R_ENA_SHIFT 2 /* IN2R_ENA */ 783d5315a23SMark Brown #define WM2200_IN2R_ENA_WIDTH 1 /* IN2R_ENA */ 784d5315a23SMark Brown #define WM2200_IN1L_ENA 0x0002 /* IN1L_ENA */ 785d5315a23SMark Brown #define WM2200_IN1L_ENA_MASK 0x0002 /* IN1L_ENA */ 786d5315a23SMark Brown #define WM2200_IN1L_ENA_SHIFT 1 /* IN1L_ENA */ 787d5315a23SMark Brown #define WM2200_IN1L_ENA_WIDTH 1 /* IN1L_ENA */ 788d5315a23SMark Brown #define WM2200_IN1R_ENA 0x0001 /* IN1R_ENA */ 789d5315a23SMark Brown #define WM2200_IN1R_ENA_MASK 0x0001 /* IN1R_ENA */ 790d5315a23SMark Brown #define WM2200_IN1R_ENA_SHIFT 0 /* IN1R_ENA */ 791d5315a23SMark Brown #define WM2200_IN1R_ENA_WIDTH 1 /* IN1R_ENA */ 792d5315a23SMark Brown 793d5315a23SMark Brown /* 794d5315a23SMark Brown * R770 (0x302) - IN1L Control 795d5315a23SMark Brown */ 796d5315a23SMark Brown #define WM2200_IN1_OSR 0x2000 /* IN1_OSR */ 797d5315a23SMark Brown #define WM2200_IN1_OSR_MASK 0x2000 /* IN1_OSR */ 798d5315a23SMark Brown #define WM2200_IN1_OSR_SHIFT 13 /* IN1_OSR */ 799d5315a23SMark Brown #define WM2200_IN1_OSR_WIDTH 1 /* IN1_OSR */ 800d5315a23SMark Brown #define WM2200_IN1_DMIC_SUP_MASK 0x1800 /* IN1_DMIC_SUP - [12:11] */ 801d5315a23SMark Brown #define WM2200_IN1_DMIC_SUP_SHIFT 11 /* IN1_DMIC_SUP - [12:11] */ 802d5315a23SMark Brown #define WM2200_IN1_DMIC_SUP_WIDTH 2 /* IN1_DMIC_SUP - [12:11] */ 803d5315a23SMark Brown #define WM2200_IN1_MODE_MASK 0x0600 /* IN1_MODE - [10:9] */ 804d5315a23SMark Brown #define WM2200_IN1_MODE_SHIFT 9 /* IN1_MODE - [10:9] */ 805d5315a23SMark Brown #define WM2200_IN1_MODE_WIDTH 2 /* IN1_MODE - [10:9] */ 806d5315a23SMark Brown #define WM2200_IN1L_PGA_VOL_MASK 0x00FE /* IN1L_PGA_VOL - [7:1] */ 807d5315a23SMark Brown #define WM2200_IN1L_PGA_VOL_SHIFT 1 /* IN1L_PGA_VOL - [7:1] */ 808d5315a23SMark Brown #define WM2200_IN1L_PGA_VOL_WIDTH 7 /* IN1L_PGA_VOL - [7:1] */ 809d5315a23SMark Brown 810d5315a23SMark Brown /* 811d5315a23SMark Brown * R771 (0x303) - IN1R Control 812d5315a23SMark Brown */ 813d5315a23SMark Brown #define WM2200_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */ 814d5315a23SMark Brown #define WM2200_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */ 815d5315a23SMark Brown #define WM2200_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */ 816d5315a23SMark Brown 817d5315a23SMark Brown /* 818d5315a23SMark Brown * R772 (0x304) - IN2L Control 819d5315a23SMark Brown */ 820d5315a23SMark Brown #define WM2200_IN2_OSR 0x2000 /* IN2_OSR */ 821d5315a23SMark Brown #define WM2200_IN2_OSR_MASK 0x2000 /* IN2_OSR */ 822d5315a23SMark Brown #define WM2200_IN2_OSR_SHIFT 13 /* IN2_OSR */ 823d5315a23SMark Brown #define WM2200_IN2_OSR_WIDTH 1 /* IN2_OSR */ 824d5315a23SMark Brown #define WM2200_IN2_DMIC_SUP_MASK 0x1800 /* IN2_DMIC_SUP - [12:11] */ 825d5315a23SMark Brown #define WM2200_IN2_DMIC_SUP_SHIFT 11 /* IN2_DMIC_SUP - [12:11] */ 826d5315a23SMark Brown #define WM2200_IN2_DMIC_SUP_WIDTH 2 /* IN2_DMIC_SUP - [12:11] */ 827d5315a23SMark Brown #define WM2200_IN2_MODE_MASK 0x0600 /* IN2_MODE - [10:9] */ 828d5315a23SMark Brown #define WM2200_IN2_MODE_SHIFT 9 /* IN2_MODE - [10:9] */ 829d5315a23SMark Brown #define WM2200_IN2_MODE_WIDTH 2 /* IN2_MODE - [10:9] */ 830d5315a23SMark Brown #define WM2200_IN2L_PGA_VOL_MASK 0x00FE /* IN2L_PGA_VOL - [7:1] */ 831d5315a23SMark Brown #define WM2200_IN2L_PGA_VOL_SHIFT 1 /* IN2L_PGA_VOL - [7:1] */ 832d5315a23SMark Brown #define WM2200_IN2L_PGA_VOL_WIDTH 7 /* IN2L_PGA_VOL - [7:1] */ 833d5315a23SMark Brown 834d5315a23SMark Brown /* 835d5315a23SMark Brown * R773 (0x305) - IN2R Control 836d5315a23SMark Brown */ 837d5315a23SMark Brown #define WM2200_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */ 838d5315a23SMark Brown #define WM2200_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */ 839d5315a23SMark Brown #define WM2200_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */ 840d5315a23SMark Brown 841d5315a23SMark Brown /* 842d5315a23SMark Brown * R774 (0x306) - IN3L Control 843d5315a23SMark Brown */ 844d5315a23SMark Brown #define WM2200_IN3_OSR 0x2000 /* IN3_OSR */ 845d5315a23SMark Brown #define WM2200_IN3_OSR_MASK 0x2000 /* IN3_OSR */ 846d5315a23SMark Brown #define WM2200_IN3_OSR_SHIFT 13 /* IN3_OSR */ 847d5315a23SMark Brown #define WM2200_IN3_OSR_WIDTH 1 /* IN3_OSR */ 848d5315a23SMark Brown #define WM2200_IN3_DMIC_SUP_MASK 0x1800 /* IN3_DMIC_SUP - [12:11] */ 849d5315a23SMark Brown #define WM2200_IN3_DMIC_SUP_SHIFT 11 /* IN3_DMIC_SUP - [12:11] */ 850d5315a23SMark Brown #define WM2200_IN3_DMIC_SUP_WIDTH 2 /* IN3_DMIC_SUP - [12:11] */ 851d5315a23SMark Brown #define WM2200_IN3_MODE_MASK 0x0600 /* IN3_MODE - [10:9] */ 852d5315a23SMark Brown #define WM2200_IN3_MODE_SHIFT 9 /* IN3_MODE - [10:9] */ 853d5315a23SMark Brown #define WM2200_IN3_MODE_WIDTH 2 /* IN3_MODE - [10:9] */ 854d5315a23SMark Brown #define WM2200_IN3L_PGA_VOL_MASK 0x00FE /* IN3L_PGA_VOL - [7:1] */ 855d5315a23SMark Brown #define WM2200_IN3L_PGA_VOL_SHIFT 1 /* IN3L_PGA_VOL - [7:1] */ 856d5315a23SMark Brown #define WM2200_IN3L_PGA_VOL_WIDTH 7 /* IN3L_PGA_VOL - [7:1] */ 857d5315a23SMark Brown 858d5315a23SMark Brown /* 859d5315a23SMark Brown * R775 (0x307) - IN3R Control 860d5315a23SMark Brown */ 861d5315a23SMark Brown #define WM2200_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */ 862d5315a23SMark Brown #define WM2200_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */ 863d5315a23SMark Brown #define WM2200_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */ 864d5315a23SMark Brown 865d5315a23SMark Brown /* 866d5315a23SMark Brown * R778 (0x30A) - RXANC_SRC 867d5315a23SMark Brown */ 868d5315a23SMark Brown #define WM2200_IN_RXANC_SEL_MASK 0x0007 /* IN_RXANC_SEL - [2:0] */ 869d5315a23SMark Brown #define WM2200_IN_RXANC_SEL_SHIFT 0 /* IN_RXANC_SEL - [2:0] */ 870d5315a23SMark Brown #define WM2200_IN_RXANC_SEL_WIDTH 3 /* IN_RXANC_SEL - [2:0] */ 871d5315a23SMark Brown 872d5315a23SMark Brown /* 873d5315a23SMark Brown * R779 (0x30B) - Input Volume Ramp 874d5315a23SMark Brown */ 875d5315a23SMark Brown #define WM2200_IN_VD_RAMP_MASK 0x0070 /* IN_VD_RAMP - [6:4] */ 876d5315a23SMark Brown #define WM2200_IN_VD_RAMP_SHIFT 4 /* IN_VD_RAMP - [6:4] */ 877d5315a23SMark Brown #define WM2200_IN_VD_RAMP_WIDTH 3 /* IN_VD_RAMP - [6:4] */ 878d5315a23SMark Brown #define WM2200_IN_VI_RAMP_MASK 0x0007 /* IN_VI_RAMP - [2:0] */ 879d5315a23SMark Brown #define WM2200_IN_VI_RAMP_SHIFT 0 /* IN_VI_RAMP - [2:0] */ 880d5315a23SMark Brown #define WM2200_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */ 881d5315a23SMark Brown 882d5315a23SMark Brown /* 883d5315a23SMark Brown * R780 (0x30C) - ADC Digital Volume 1L 884d5315a23SMark Brown */ 885d5315a23SMark Brown #define WM2200_IN_VU 0x0200 /* IN_VU */ 886d5315a23SMark Brown #define WM2200_IN_VU_MASK 0x0200 /* IN_VU */ 887d5315a23SMark Brown #define WM2200_IN_VU_SHIFT 9 /* IN_VU */ 888d5315a23SMark Brown #define WM2200_IN_VU_WIDTH 1 /* IN_VU */ 889d5315a23SMark Brown #define WM2200_IN1L_MUTE 0x0100 /* IN1L_MUTE */ 890d5315a23SMark Brown #define WM2200_IN1L_MUTE_MASK 0x0100 /* IN1L_MUTE */ 891d5315a23SMark Brown #define WM2200_IN1L_MUTE_SHIFT 8 /* IN1L_MUTE */ 892d5315a23SMark Brown #define WM2200_IN1L_MUTE_WIDTH 1 /* IN1L_MUTE */ 893d5315a23SMark Brown #define WM2200_IN1L_DIG_VOL_MASK 0x00FF /* IN1L_DIG_VOL - [7:0] */ 894d5315a23SMark Brown #define WM2200_IN1L_DIG_VOL_SHIFT 0 /* IN1L_DIG_VOL - [7:0] */ 895d5315a23SMark Brown #define WM2200_IN1L_DIG_VOL_WIDTH 8 /* IN1L_DIG_VOL - [7:0] */ 896d5315a23SMark Brown 897d5315a23SMark Brown /* 898d5315a23SMark Brown * R781 (0x30D) - ADC Digital Volume 1R 899d5315a23SMark Brown */ 900d5315a23SMark Brown #define WM2200_IN_VU 0x0200 /* IN_VU */ 901d5315a23SMark Brown #define WM2200_IN_VU_MASK 0x0200 /* IN_VU */ 902d5315a23SMark Brown #define WM2200_IN_VU_SHIFT 9 /* IN_VU */ 903d5315a23SMark Brown #define WM2200_IN_VU_WIDTH 1 /* IN_VU */ 904d5315a23SMark Brown #define WM2200_IN1R_MUTE 0x0100 /* IN1R_MUTE */ 905d5315a23SMark Brown #define WM2200_IN1R_MUTE_MASK 0x0100 /* IN1R_MUTE */ 906d5315a23SMark Brown #define WM2200_IN1R_MUTE_SHIFT 8 /* IN1R_MUTE */ 907d5315a23SMark Brown #define WM2200_IN1R_MUTE_WIDTH 1 /* IN1R_MUTE */ 908d5315a23SMark Brown #define WM2200_IN1R_DIG_VOL_MASK 0x00FF /* IN1R_DIG_VOL - [7:0] */ 909d5315a23SMark Brown #define WM2200_IN1R_DIG_VOL_SHIFT 0 /* IN1R_DIG_VOL - [7:0] */ 910d5315a23SMark Brown #define WM2200_IN1R_DIG_VOL_WIDTH 8 /* IN1R_DIG_VOL - [7:0] */ 911d5315a23SMark Brown 912d5315a23SMark Brown /* 913d5315a23SMark Brown * R782 (0x30E) - ADC Digital Volume 2L 914d5315a23SMark Brown */ 915d5315a23SMark Brown #define WM2200_IN_VU 0x0200 /* IN_VU */ 916d5315a23SMark Brown #define WM2200_IN_VU_MASK 0x0200 /* IN_VU */ 917d5315a23SMark Brown #define WM2200_IN_VU_SHIFT 9 /* IN_VU */ 918d5315a23SMark Brown #define WM2200_IN_VU_WIDTH 1 /* IN_VU */ 919d5315a23SMark Brown #define WM2200_IN2L_MUTE 0x0100 /* IN2L_MUTE */ 920d5315a23SMark Brown #define WM2200_IN2L_MUTE_MASK 0x0100 /* IN2L_MUTE */ 921d5315a23SMark Brown #define WM2200_IN2L_MUTE_SHIFT 8 /* IN2L_MUTE */ 922d5315a23SMark Brown #define WM2200_IN2L_MUTE_WIDTH 1 /* IN2L_MUTE */ 923d5315a23SMark Brown #define WM2200_IN2L_DIG_VOL_MASK 0x00FF /* IN2L_DIG_VOL - [7:0] */ 924d5315a23SMark Brown #define WM2200_IN2L_DIG_VOL_SHIFT 0 /* IN2L_DIG_VOL - [7:0] */ 925d5315a23SMark Brown #define WM2200_IN2L_DIG_VOL_WIDTH 8 /* IN2L_DIG_VOL - [7:0] */ 926d5315a23SMark Brown 927d5315a23SMark Brown /* 928d5315a23SMark Brown * R783 (0x30F) - ADC Digital Volume 2R 929d5315a23SMark Brown */ 930d5315a23SMark Brown #define WM2200_IN_VU 0x0200 /* IN_VU */ 931d5315a23SMark Brown #define WM2200_IN_VU_MASK 0x0200 /* IN_VU */ 932d5315a23SMark Brown #define WM2200_IN_VU_SHIFT 9 /* IN_VU */ 933d5315a23SMark Brown #define WM2200_IN_VU_WIDTH 1 /* IN_VU */ 934d5315a23SMark Brown #define WM2200_IN2R_MUTE 0x0100 /* IN2R_MUTE */ 935d5315a23SMark Brown #define WM2200_IN2R_MUTE_MASK 0x0100 /* IN2R_MUTE */ 936d5315a23SMark Brown #define WM2200_IN2R_MUTE_SHIFT 8 /* IN2R_MUTE */ 937d5315a23SMark Brown #define WM2200_IN2R_MUTE_WIDTH 1 /* IN2R_MUTE */ 938d5315a23SMark Brown #define WM2200_IN2R_DIG_VOL_MASK 0x00FF /* IN2R_DIG_VOL - [7:0] */ 939d5315a23SMark Brown #define WM2200_IN2R_DIG_VOL_SHIFT 0 /* IN2R_DIG_VOL - [7:0] */ 940d5315a23SMark Brown #define WM2200_IN2R_DIG_VOL_WIDTH 8 /* IN2R_DIG_VOL - [7:0] */ 941d5315a23SMark Brown 942d5315a23SMark Brown /* 943d5315a23SMark Brown * R784 (0x310) - ADC Digital Volume 3L 944d5315a23SMark Brown */ 945d5315a23SMark Brown #define WM2200_IN_VU 0x0200 /* IN_VU */ 946d5315a23SMark Brown #define WM2200_IN_VU_MASK 0x0200 /* IN_VU */ 947d5315a23SMark Brown #define WM2200_IN_VU_SHIFT 9 /* IN_VU */ 948d5315a23SMark Brown #define WM2200_IN_VU_WIDTH 1 /* IN_VU */ 949d5315a23SMark Brown #define WM2200_IN3L_MUTE 0x0100 /* IN3L_MUTE */ 950d5315a23SMark Brown #define WM2200_IN3L_MUTE_MASK 0x0100 /* IN3L_MUTE */ 951d5315a23SMark Brown #define WM2200_IN3L_MUTE_SHIFT 8 /* IN3L_MUTE */ 952d5315a23SMark Brown #define WM2200_IN3L_MUTE_WIDTH 1 /* IN3L_MUTE */ 953d5315a23SMark Brown #define WM2200_IN3L_DIG_VOL_MASK 0x00FF /* IN3L_DIG_VOL - [7:0] */ 954d5315a23SMark Brown #define WM2200_IN3L_DIG_VOL_SHIFT 0 /* IN3L_DIG_VOL - [7:0] */ 955d5315a23SMark Brown #define WM2200_IN3L_DIG_VOL_WIDTH 8 /* IN3L_DIG_VOL - [7:0] */ 956d5315a23SMark Brown 957d5315a23SMark Brown /* 958d5315a23SMark Brown * R785 (0x311) - ADC Digital Volume 3R 959d5315a23SMark Brown */ 960d5315a23SMark Brown #define WM2200_IN_VU 0x0200 /* IN_VU */ 961d5315a23SMark Brown #define WM2200_IN_VU_MASK 0x0200 /* IN_VU */ 962d5315a23SMark Brown #define WM2200_IN_VU_SHIFT 9 /* IN_VU */ 963d5315a23SMark Brown #define WM2200_IN_VU_WIDTH 1 /* IN_VU */ 964d5315a23SMark Brown #define WM2200_IN3R_MUTE 0x0100 /* IN3R_MUTE */ 965d5315a23SMark Brown #define WM2200_IN3R_MUTE_MASK 0x0100 /* IN3R_MUTE */ 966d5315a23SMark Brown #define WM2200_IN3R_MUTE_SHIFT 8 /* IN3R_MUTE */ 967d5315a23SMark Brown #define WM2200_IN3R_MUTE_WIDTH 1 /* IN3R_MUTE */ 968d5315a23SMark Brown #define WM2200_IN3R_DIG_VOL_MASK 0x00FF /* IN3R_DIG_VOL - [7:0] */ 969d5315a23SMark Brown #define WM2200_IN3R_DIG_VOL_SHIFT 0 /* IN3R_DIG_VOL - [7:0] */ 970d5315a23SMark Brown #define WM2200_IN3R_DIG_VOL_WIDTH 8 /* IN3R_DIG_VOL - [7:0] */ 971d5315a23SMark Brown 972d5315a23SMark Brown /* 973d5315a23SMark Brown * R1024 (0x400) - Output Enables 974d5315a23SMark Brown */ 975d5315a23SMark Brown #define WM2200_OUT2L_ENA 0x0008 /* OUT2L_ENA */ 976d5315a23SMark Brown #define WM2200_OUT2L_ENA_MASK 0x0008 /* OUT2L_ENA */ 977d5315a23SMark Brown #define WM2200_OUT2L_ENA_SHIFT 3 /* OUT2L_ENA */ 978d5315a23SMark Brown #define WM2200_OUT2L_ENA_WIDTH 1 /* OUT2L_ENA */ 979d5315a23SMark Brown #define WM2200_OUT2R_ENA 0x0004 /* OUT2R_ENA */ 980d5315a23SMark Brown #define WM2200_OUT2R_ENA_MASK 0x0004 /* OUT2R_ENA */ 981d5315a23SMark Brown #define WM2200_OUT2R_ENA_SHIFT 2 /* OUT2R_ENA */ 982d5315a23SMark Brown #define WM2200_OUT2R_ENA_WIDTH 1 /* OUT2R_ENA */ 983d5315a23SMark Brown #define WM2200_OUT1L_ENA 0x0002 /* OUT1L_ENA */ 984d5315a23SMark Brown #define WM2200_OUT1L_ENA_MASK 0x0002 /* OUT1L_ENA */ 985d5315a23SMark Brown #define WM2200_OUT1L_ENA_SHIFT 1 /* OUT1L_ENA */ 986d5315a23SMark Brown #define WM2200_OUT1L_ENA_WIDTH 1 /* OUT1L_ENA */ 987d5315a23SMark Brown #define WM2200_OUT1R_ENA 0x0001 /* OUT1R_ENA */ 988d5315a23SMark Brown #define WM2200_OUT1R_ENA_MASK 0x0001 /* OUT1R_ENA */ 989d5315a23SMark Brown #define WM2200_OUT1R_ENA_SHIFT 0 /* OUT1R_ENA */ 990d5315a23SMark Brown #define WM2200_OUT1R_ENA_WIDTH 1 /* OUT1R_ENA */ 991d5315a23SMark Brown 992d5315a23SMark Brown /* 993d5315a23SMark Brown * R1025 (0x401) - DAC Volume Limit 1L 994d5315a23SMark Brown */ 995d5315a23SMark Brown #define WM2200_OUT1_OSR 0x2000 /* OUT1_OSR */ 996d5315a23SMark Brown #define WM2200_OUT1_OSR_MASK 0x2000 /* OUT1_OSR */ 997d5315a23SMark Brown #define WM2200_OUT1_OSR_SHIFT 13 /* OUT1_OSR */ 998d5315a23SMark Brown #define WM2200_OUT1_OSR_WIDTH 1 /* OUT1_OSR */ 999d5315a23SMark Brown #define WM2200_OUT1L_ANC_SRC 0x0800 /* OUT1L_ANC_SRC */ 1000d5315a23SMark Brown #define WM2200_OUT1L_ANC_SRC_MASK 0x0800 /* OUT1L_ANC_SRC */ 1001d5315a23SMark Brown #define WM2200_OUT1L_ANC_SRC_SHIFT 11 /* OUT1L_ANC_SRC */ 1002d5315a23SMark Brown #define WM2200_OUT1L_ANC_SRC_WIDTH 1 /* OUT1L_ANC_SRC */ 1003d5315a23SMark Brown #define WM2200_OUT1L_PGA_VOL_MASK 0x00FE /* OUT1L_PGA_VOL - [7:1] */ 1004d5315a23SMark Brown #define WM2200_OUT1L_PGA_VOL_SHIFT 1 /* OUT1L_PGA_VOL - [7:1] */ 1005d5315a23SMark Brown #define WM2200_OUT1L_PGA_VOL_WIDTH 7 /* OUT1L_PGA_VOL - [7:1] */ 1006d5315a23SMark Brown 1007d5315a23SMark Brown /* 1008d5315a23SMark Brown * R1026 (0x402) - DAC Volume Limit 1R 1009d5315a23SMark Brown */ 1010d5315a23SMark Brown #define WM2200_OUT1R_ANC_SRC 0x0800 /* OUT1R_ANC_SRC */ 1011d5315a23SMark Brown #define WM2200_OUT1R_ANC_SRC_MASK 0x0800 /* OUT1R_ANC_SRC */ 1012d5315a23SMark Brown #define WM2200_OUT1R_ANC_SRC_SHIFT 11 /* OUT1R_ANC_SRC */ 1013d5315a23SMark Brown #define WM2200_OUT1R_ANC_SRC_WIDTH 1 /* OUT1R_ANC_SRC */ 1014d5315a23SMark Brown #define WM2200_OUT1R_PGA_VOL_MASK 0x00FE /* OUT1R_PGA_VOL - [7:1] */ 1015d5315a23SMark Brown #define WM2200_OUT1R_PGA_VOL_SHIFT 1 /* OUT1R_PGA_VOL - [7:1] */ 1016d5315a23SMark Brown #define WM2200_OUT1R_PGA_VOL_WIDTH 7 /* OUT1R_PGA_VOL - [7:1] */ 1017d5315a23SMark Brown 1018d5315a23SMark Brown /* 1019d5315a23SMark Brown * R1027 (0x403) - DAC Volume Limit 2L 1020d5315a23SMark Brown */ 1021d5315a23SMark Brown #define WM2200_OUT2_OSR 0x2000 /* OUT2_OSR */ 1022d5315a23SMark Brown #define WM2200_OUT2_OSR_MASK 0x2000 /* OUT2_OSR */ 1023d5315a23SMark Brown #define WM2200_OUT2_OSR_SHIFT 13 /* OUT2_OSR */ 1024d5315a23SMark Brown #define WM2200_OUT2_OSR_WIDTH 1 /* OUT2_OSR */ 1025d5315a23SMark Brown #define WM2200_OUT2L_ANC_SRC 0x0800 /* OUT2L_ANC_SRC */ 1026d5315a23SMark Brown #define WM2200_OUT2L_ANC_SRC_MASK 0x0800 /* OUT2L_ANC_SRC */ 1027d5315a23SMark Brown #define WM2200_OUT2L_ANC_SRC_SHIFT 11 /* OUT2L_ANC_SRC */ 1028d5315a23SMark Brown #define WM2200_OUT2L_ANC_SRC_WIDTH 1 /* OUT2L_ANC_SRC */ 1029d5315a23SMark Brown 1030d5315a23SMark Brown /* 1031d5315a23SMark Brown * R1028 (0x404) - DAC Volume Limit 2R 1032d5315a23SMark Brown */ 1033d5315a23SMark Brown #define WM2200_OUT2R_ANC_SRC 0x0800 /* OUT2R_ANC_SRC */ 1034d5315a23SMark Brown #define WM2200_OUT2R_ANC_SRC_MASK 0x0800 /* OUT2R_ANC_SRC */ 1035d5315a23SMark Brown #define WM2200_OUT2R_ANC_SRC_SHIFT 11 /* OUT2R_ANC_SRC */ 1036d5315a23SMark Brown #define WM2200_OUT2R_ANC_SRC_WIDTH 1 /* OUT2R_ANC_SRC */ 1037d5315a23SMark Brown 1038d5315a23SMark Brown /* 1039d5315a23SMark Brown * R1033 (0x409) - DAC AEC Control 1 1040d5315a23SMark Brown */ 1041d5315a23SMark Brown #define WM2200_AEC_LOOPBACK_ENA 0x0004 /* AEC_LOOPBACK_ENA */ 1042d5315a23SMark Brown #define WM2200_AEC_LOOPBACK_ENA_MASK 0x0004 /* AEC_LOOPBACK_ENA */ 1043d5315a23SMark Brown #define WM2200_AEC_LOOPBACK_ENA_SHIFT 2 /* AEC_LOOPBACK_ENA */ 1044d5315a23SMark Brown #define WM2200_AEC_LOOPBACK_ENA_WIDTH 1 /* AEC_LOOPBACK_ENA */ 1045d5315a23SMark Brown #define WM2200_AEC_LOOPBACK_SRC_MASK 0x0003 /* AEC_LOOPBACK_SRC - [1:0] */ 1046d5315a23SMark Brown #define WM2200_AEC_LOOPBACK_SRC_SHIFT 0 /* AEC_LOOPBACK_SRC - [1:0] */ 1047d5315a23SMark Brown #define WM2200_AEC_LOOPBACK_SRC_WIDTH 2 /* AEC_LOOPBACK_SRC - [1:0] */ 1048d5315a23SMark Brown 1049d5315a23SMark Brown /* 1050d5315a23SMark Brown * R1034 (0x40A) - Output Volume Ramp 1051d5315a23SMark Brown */ 1052d5315a23SMark Brown #define WM2200_OUT_VD_RAMP_MASK 0x0070 /* OUT_VD_RAMP - [6:4] */ 1053d5315a23SMark Brown #define WM2200_OUT_VD_RAMP_SHIFT 4 /* OUT_VD_RAMP - [6:4] */ 1054d5315a23SMark Brown #define WM2200_OUT_VD_RAMP_WIDTH 3 /* OUT_VD_RAMP - [6:4] */ 1055d5315a23SMark Brown #define WM2200_OUT_VI_RAMP_MASK 0x0007 /* OUT_VI_RAMP - [2:0] */ 1056d5315a23SMark Brown #define WM2200_OUT_VI_RAMP_SHIFT 0 /* OUT_VI_RAMP - [2:0] */ 1057d5315a23SMark Brown #define WM2200_OUT_VI_RAMP_WIDTH 3 /* OUT_VI_RAMP - [2:0] */ 1058d5315a23SMark Brown 1059d5315a23SMark Brown /* 1060d5315a23SMark Brown * R1035 (0x40B) - DAC Digital Volume 1L 1061d5315a23SMark Brown */ 1062d5315a23SMark Brown #define WM2200_OUT_VU 0x0200 /* OUT_VU */ 1063d5315a23SMark Brown #define WM2200_OUT_VU_MASK 0x0200 /* OUT_VU */ 1064d5315a23SMark Brown #define WM2200_OUT_VU_SHIFT 9 /* OUT_VU */ 1065d5315a23SMark Brown #define WM2200_OUT_VU_WIDTH 1 /* OUT_VU */ 1066d5315a23SMark Brown #define WM2200_OUT1L_MUTE 0x0100 /* OUT1L_MUTE */ 1067d5315a23SMark Brown #define WM2200_OUT1L_MUTE_MASK 0x0100 /* OUT1L_MUTE */ 1068d5315a23SMark Brown #define WM2200_OUT1L_MUTE_SHIFT 8 /* OUT1L_MUTE */ 1069d5315a23SMark Brown #define WM2200_OUT1L_MUTE_WIDTH 1 /* OUT1L_MUTE */ 1070d5315a23SMark Brown #define WM2200_OUT1L_VOL_MASK 0x00FF /* OUT1L_VOL - [7:0] */ 1071d5315a23SMark Brown #define WM2200_OUT1L_VOL_SHIFT 0 /* OUT1L_VOL - [7:0] */ 1072d5315a23SMark Brown #define WM2200_OUT1L_VOL_WIDTH 8 /* OUT1L_VOL - [7:0] */ 1073d5315a23SMark Brown 1074d5315a23SMark Brown /* 1075d5315a23SMark Brown * R1036 (0x40C) - DAC Digital Volume 1R 1076d5315a23SMark Brown */ 1077d5315a23SMark Brown #define WM2200_OUT_VU 0x0200 /* OUT_VU */ 1078d5315a23SMark Brown #define WM2200_OUT_VU_MASK 0x0200 /* OUT_VU */ 1079d5315a23SMark Brown #define WM2200_OUT_VU_SHIFT 9 /* OUT_VU */ 1080d5315a23SMark Brown #define WM2200_OUT_VU_WIDTH 1 /* OUT_VU */ 1081d5315a23SMark Brown #define WM2200_OUT1R_MUTE 0x0100 /* OUT1R_MUTE */ 1082d5315a23SMark Brown #define WM2200_OUT1R_MUTE_MASK 0x0100 /* OUT1R_MUTE */ 1083d5315a23SMark Brown #define WM2200_OUT1R_MUTE_SHIFT 8 /* OUT1R_MUTE */ 1084d5315a23SMark Brown #define WM2200_OUT1R_MUTE_WIDTH 1 /* OUT1R_MUTE */ 1085d5315a23SMark Brown #define WM2200_OUT1R_VOL_MASK 0x00FF /* OUT1R_VOL - [7:0] */ 1086d5315a23SMark Brown #define WM2200_OUT1R_VOL_SHIFT 0 /* OUT1R_VOL - [7:0] */ 1087d5315a23SMark Brown #define WM2200_OUT1R_VOL_WIDTH 8 /* OUT1R_VOL - [7:0] */ 1088d5315a23SMark Brown 1089d5315a23SMark Brown /* 1090d5315a23SMark Brown * R1037 (0x40D) - DAC Digital Volume 2L 1091d5315a23SMark Brown */ 1092d5315a23SMark Brown #define WM2200_OUT_VU 0x0200 /* OUT_VU */ 1093d5315a23SMark Brown #define WM2200_OUT_VU_MASK 0x0200 /* OUT_VU */ 1094d5315a23SMark Brown #define WM2200_OUT_VU_SHIFT 9 /* OUT_VU */ 1095d5315a23SMark Brown #define WM2200_OUT_VU_WIDTH 1 /* OUT_VU */ 1096d5315a23SMark Brown #define WM2200_OUT2L_MUTE 0x0100 /* OUT2L_MUTE */ 1097d5315a23SMark Brown #define WM2200_OUT2L_MUTE_MASK 0x0100 /* OUT2L_MUTE */ 1098d5315a23SMark Brown #define WM2200_OUT2L_MUTE_SHIFT 8 /* OUT2L_MUTE */ 1099d5315a23SMark Brown #define WM2200_OUT2L_MUTE_WIDTH 1 /* OUT2L_MUTE */ 1100d5315a23SMark Brown #define WM2200_OUT2L_VOL_MASK 0x00FF /* OUT2L_VOL - [7:0] */ 1101d5315a23SMark Brown #define WM2200_OUT2L_VOL_SHIFT 0 /* OUT2L_VOL - [7:0] */ 1102d5315a23SMark Brown #define WM2200_OUT2L_VOL_WIDTH 8 /* OUT2L_VOL - [7:0] */ 1103d5315a23SMark Brown 1104d5315a23SMark Brown /* 1105d5315a23SMark Brown * R1038 (0x40E) - DAC Digital Volume 2R 1106d5315a23SMark Brown */ 1107d5315a23SMark Brown #define WM2200_OUT_VU 0x0200 /* OUT_VU */ 1108d5315a23SMark Brown #define WM2200_OUT_VU_MASK 0x0200 /* OUT_VU */ 1109d5315a23SMark Brown #define WM2200_OUT_VU_SHIFT 9 /* OUT_VU */ 1110d5315a23SMark Brown #define WM2200_OUT_VU_WIDTH 1 /* OUT_VU */ 1111d5315a23SMark Brown #define WM2200_OUT2R_MUTE 0x0100 /* OUT2R_MUTE */ 1112d5315a23SMark Brown #define WM2200_OUT2R_MUTE_MASK 0x0100 /* OUT2R_MUTE */ 1113d5315a23SMark Brown #define WM2200_OUT2R_MUTE_SHIFT 8 /* OUT2R_MUTE */ 1114d5315a23SMark Brown #define WM2200_OUT2R_MUTE_WIDTH 1 /* OUT2R_MUTE */ 1115d5315a23SMark Brown #define WM2200_OUT2R_VOL_MASK 0x00FF /* OUT2R_VOL - [7:0] */ 1116d5315a23SMark Brown #define WM2200_OUT2R_VOL_SHIFT 0 /* OUT2R_VOL - [7:0] */ 1117d5315a23SMark Brown #define WM2200_OUT2R_VOL_WIDTH 8 /* OUT2R_VOL - [7:0] */ 1118d5315a23SMark Brown 1119d5315a23SMark Brown /* 1120d5315a23SMark Brown * R1047 (0x417) - PDM 1 1121d5315a23SMark Brown */ 1122d5315a23SMark Brown #define WM2200_SPK1R_MUTE 0x2000 /* SPK1R_MUTE */ 1123d5315a23SMark Brown #define WM2200_SPK1R_MUTE_MASK 0x2000 /* SPK1R_MUTE */ 1124d5315a23SMark Brown #define WM2200_SPK1R_MUTE_SHIFT 13 /* SPK1R_MUTE */ 1125d5315a23SMark Brown #define WM2200_SPK1R_MUTE_WIDTH 1 /* SPK1R_MUTE */ 1126d5315a23SMark Brown #define WM2200_SPK1L_MUTE 0x1000 /* SPK1L_MUTE */ 1127d5315a23SMark Brown #define WM2200_SPK1L_MUTE_MASK 0x1000 /* SPK1L_MUTE */ 1128d5315a23SMark Brown #define WM2200_SPK1L_MUTE_SHIFT 12 /* SPK1L_MUTE */ 1129d5315a23SMark Brown #define WM2200_SPK1L_MUTE_WIDTH 1 /* SPK1L_MUTE */ 1130d5315a23SMark Brown #define WM2200_SPK1_MUTE_ENDIAN 0x0100 /* SPK1_MUTE_ENDIAN */ 1131d5315a23SMark Brown #define WM2200_SPK1_MUTE_ENDIAN_MASK 0x0100 /* SPK1_MUTE_ENDIAN */ 1132d5315a23SMark Brown #define WM2200_SPK1_MUTE_ENDIAN_SHIFT 8 /* SPK1_MUTE_ENDIAN */ 1133d5315a23SMark Brown #define WM2200_SPK1_MUTE_ENDIAN_WIDTH 1 /* SPK1_MUTE_ENDIAN */ 1134d5315a23SMark Brown #define WM2200_SPK1_MUTE_SEQL_MASK 0x00FF /* SPK1_MUTE_SEQL - [7:0] */ 1135d5315a23SMark Brown #define WM2200_SPK1_MUTE_SEQL_SHIFT 0 /* SPK1_MUTE_SEQL - [7:0] */ 1136d5315a23SMark Brown #define WM2200_SPK1_MUTE_SEQL_WIDTH 8 /* SPK1_MUTE_SEQL - [7:0] */ 1137d5315a23SMark Brown 1138d5315a23SMark Brown /* 1139d5315a23SMark Brown * R1048 (0x418) - PDM 2 1140d5315a23SMark Brown */ 1141d5315a23SMark Brown #define WM2200_SPK1_FMT 0x0001 /* SPK1_FMT */ 1142d5315a23SMark Brown #define WM2200_SPK1_FMT_MASK 0x0001 /* SPK1_FMT */ 1143d5315a23SMark Brown #define WM2200_SPK1_FMT_SHIFT 0 /* SPK1_FMT */ 1144d5315a23SMark Brown #define WM2200_SPK1_FMT_WIDTH 1 /* SPK1_FMT */ 1145d5315a23SMark Brown 1146d5315a23SMark Brown /* 1147d5315a23SMark Brown * R1280 (0x500) - Audio IF 1_1 1148d5315a23SMark Brown */ 1149d5315a23SMark Brown #define WM2200_AIF1_BCLK_INV 0x0040 /* AIF1_BCLK_INV */ 1150d5315a23SMark Brown #define WM2200_AIF1_BCLK_INV_MASK 0x0040 /* AIF1_BCLK_INV */ 1151d5315a23SMark Brown #define WM2200_AIF1_BCLK_INV_SHIFT 6 /* AIF1_BCLK_INV */ 1152d5315a23SMark Brown #define WM2200_AIF1_BCLK_INV_WIDTH 1 /* AIF1_BCLK_INV */ 1153d5315a23SMark Brown #define WM2200_AIF1_BCLK_FRC 0x0020 /* AIF1_BCLK_FRC */ 1154d5315a23SMark Brown #define WM2200_AIF1_BCLK_FRC_MASK 0x0020 /* AIF1_BCLK_FRC */ 1155d5315a23SMark Brown #define WM2200_AIF1_BCLK_FRC_SHIFT 5 /* AIF1_BCLK_FRC */ 1156d5315a23SMark Brown #define WM2200_AIF1_BCLK_FRC_WIDTH 1 /* AIF1_BCLK_FRC */ 1157d5315a23SMark Brown #define WM2200_AIF1_BCLK_MSTR 0x0010 /* AIF1_BCLK_MSTR */ 1158d5315a23SMark Brown #define WM2200_AIF1_BCLK_MSTR_MASK 0x0010 /* AIF1_BCLK_MSTR */ 1159d5315a23SMark Brown #define WM2200_AIF1_BCLK_MSTR_SHIFT 4 /* AIF1_BCLK_MSTR */ 1160d5315a23SMark Brown #define WM2200_AIF1_BCLK_MSTR_WIDTH 1 /* AIF1_BCLK_MSTR */ 1161d5315a23SMark Brown #define WM2200_AIF1_BCLK_DIV_MASK 0x000F /* AIF1_BCLK_DIV - [3:0] */ 1162d5315a23SMark Brown #define WM2200_AIF1_BCLK_DIV_SHIFT 0 /* AIF1_BCLK_DIV - [3:0] */ 1163d5315a23SMark Brown #define WM2200_AIF1_BCLK_DIV_WIDTH 4 /* AIF1_BCLK_DIV - [3:0] */ 1164d5315a23SMark Brown 1165d5315a23SMark Brown /* 1166d5315a23SMark Brown * R1281 (0x501) - Audio IF 1_2 1167d5315a23SMark Brown */ 1168d5315a23SMark Brown #define WM2200_AIF1TX_DAT_TRI 0x0020 /* AIF1TX_DAT_TRI */ 1169d5315a23SMark Brown #define WM2200_AIF1TX_DAT_TRI_MASK 0x0020 /* AIF1TX_DAT_TRI */ 1170d5315a23SMark Brown #define WM2200_AIF1TX_DAT_TRI_SHIFT 5 /* AIF1TX_DAT_TRI */ 1171d5315a23SMark Brown #define WM2200_AIF1TX_DAT_TRI_WIDTH 1 /* AIF1TX_DAT_TRI */ 1172d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_SRC 0x0008 /* AIF1TX_LRCLK_SRC */ 1173d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_SRC_MASK 0x0008 /* AIF1TX_LRCLK_SRC */ 1174d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_SRC_SHIFT 3 /* AIF1TX_LRCLK_SRC */ 1175d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_SRC_WIDTH 1 /* AIF1TX_LRCLK_SRC */ 1176d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_INV 0x0004 /* AIF1TX_LRCLK_INV */ 1177d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_INV_MASK 0x0004 /* AIF1TX_LRCLK_INV */ 1178d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_INV_SHIFT 2 /* AIF1TX_LRCLK_INV */ 1179d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_INV_WIDTH 1 /* AIF1TX_LRCLK_INV */ 1180d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_FRC 0x0002 /* AIF1TX_LRCLK_FRC */ 1181d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_FRC_MASK 0x0002 /* AIF1TX_LRCLK_FRC */ 1182d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_FRC_SHIFT 1 /* AIF1TX_LRCLK_FRC */ 1183d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_FRC_WIDTH 1 /* AIF1TX_LRCLK_FRC */ 1184d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_MSTR 0x0001 /* AIF1TX_LRCLK_MSTR */ 1185d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_MSTR_MASK 0x0001 /* AIF1TX_LRCLK_MSTR */ 1186d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_MSTR_SHIFT 0 /* AIF1TX_LRCLK_MSTR */ 1187d5315a23SMark Brown #define WM2200_AIF1TX_LRCLK_MSTR_WIDTH 1 /* AIF1TX_LRCLK_MSTR */ 1188d5315a23SMark Brown 1189d5315a23SMark Brown /* 1190d5315a23SMark Brown * R1282 (0x502) - Audio IF 1_3 1191d5315a23SMark Brown */ 1192d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_INV 0x0004 /* AIF1RX_LRCLK_INV */ 1193d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_INV_MASK 0x0004 /* AIF1RX_LRCLK_INV */ 1194d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_INV_SHIFT 2 /* AIF1RX_LRCLK_INV */ 1195d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_INV_WIDTH 1 /* AIF1RX_LRCLK_INV */ 1196d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_FRC 0x0002 /* AIF1RX_LRCLK_FRC */ 1197d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_FRC_MASK 0x0002 /* AIF1RX_LRCLK_FRC */ 1198d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_FRC_SHIFT 1 /* AIF1RX_LRCLK_FRC */ 1199d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_FRC_WIDTH 1 /* AIF1RX_LRCLK_FRC */ 1200d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_MSTR 0x0001 /* AIF1RX_LRCLK_MSTR */ 1201d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_MSTR_MASK 0x0001 /* AIF1RX_LRCLK_MSTR */ 1202d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_MSTR_SHIFT 0 /* AIF1RX_LRCLK_MSTR */ 1203d5315a23SMark Brown #define WM2200_AIF1RX_LRCLK_MSTR_WIDTH 1 /* AIF1RX_LRCLK_MSTR */ 1204d5315a23SMark Brown 1205d5315a23SMark Brown /* 1206d5315a23SMark Brown * R1283 (0x503) - Audio IF 1_4 1207d5315a23SMark Brown */ 1208d5315a23SMark Brown #define WM2200_AIF1_TRI 0x0040 /* AIF1_TRI */ 1209d5315a23SMark Brown #define WM2200_AIF1_TRI_MASK 0x0040 /* AIF1_TRI */ 1210d5315a23SMark Brown #define WM2200_AIF1_TRI_SHIFT 6 /* AIF1_TRI */ 1211d5315a23SMark Brown #define WM2200_AIF1_TRI_WIDTH 1 /* AIF1_TRI */ 1212d5315a23SMark Brown 1213d5315a23SMark Brown /* 1214d5315a23SMark Brown * R1284 (0x504) - Audio IF 1_5 1215d5315a23SMark Brown */ 1216d5315a23SMark Brown #define WM2200_AIF1_FMT_MASK 0x0007 /* AIF1_FMT - [2:0] */ 1217d5315a23SMark Brown #define WM2200_AIF1_FMT_SHIFT 0 /* AIF1_FMT - [2:0] */ 1218d5315a23SMark Brown #define WM2200_AIF1_FMT_WIDTH 3 /* AIF1_FMT - [2:0] */ 1219d5315a23SMark Brown 1220d5315a23SMark Brown /* 1221d5315a23SMark Brown * R1285 (0x505) - Audio IF 1_6 1222d5315a23SMark Brown */ 1223d5315a23SMark Brown #define WM2200_AIF1TX_BCPF_MASK 0x07FF /* AIF1TX_BCPF - [10:0] */ 1224d5315a23SMark Brown #define WM2200_AIF1TX_BCPF_SHIFT 0 /* AIF1TX_BCPF - [10:0] */ 1225d5315a23SMark Brown #define WM2200_AIF1TX_BCPF_WIDTH 11 /* AIF1TX_BCPF - [10:0] */ 1226d5315a23SMark Brown 1227d5315a23SMark Brown /* 1228d5315a23SMark Brown * R1286 (0x506) - Audio IF 1_7 1229d5315a23SMark Brown */ 1230d5315a23SMark Brown #define WM2200_AIF1RX_BCPF_MASK 0x07FF /* AIF1RX_BCPF - [10:0] */ 1231d5315a23SMark Brown #define WM2200_AIF1RX_BCPF_SHIFT 0 /* AIF1RX_BCPF - [10:0] */ 1232d5315a23SMark Brown #define WM2200_AIF1RX_BCPF_WIDTH 11 /* AIF1RX_BCPF - [10:0] */ 1233d5315a23SMark Brown 1234d5315a23SMark Brown /* 1235d5315a23SMark Brown * R1287 (0x507) - Audio IF 1_8 1236d5315a23SMark Brown */ 1237d5315a23SMark Brown #define WM2200_AIF1TX_WL_MASK 0x3F00 /* AIF1TX_WL - [13:8] */ 1238d5315a23SMark Brown #define WM2200_AIF1TX_WL_SHIFT 8 /* AIF1TX_WL - [13:8] */ 1239d5315a23SMark Brown #define WM2200_AIF1TX_WL_WIDTH 6 /* AIF1TX_WL - [13:8] */ 1240d5315a23SMark Brown #define WM2200_AIF1TX_SLOT_LEN_MASK 0x00FF /* AIF1TX_SLOT_LEN - [7:0] */ 1241d5315a23SMark Brown #define WM2200_AIF1TX_SLOT_LEN_SHIFT 0 /* AIF1TX_SLOT_LEN - [7:0] */ 1242d5315a23SMark Brown #define WM2200_AIF1TX_SLOT_LEN_WIDTH 8 /* AIF1TX_SLOT_LEN - [7:0] */ 1243d5315a23SMark Brown 1244d5315a23SMark Brown /* 1245d5315a23SMark Brown * R1288 (0x508) - Audio IF 1_9 1246d5315a23SMark Brown */ 1247d5315a23SMark Brown #define WM2200_AIF1RX_WL_MASK 0x3F00 /* AIF1RX_WL - [13:8] */ 1248d5315a23SMark Brown #define WM2200_AIF1RX_WL_SHIFT 8 /* AIF1RX_WL - [13:8] */ 1249d5315a23SMark Brown #define WM2200_AIF1RX_WL_WIDTH 6 /* AIF1RX_WL - [13:8] */ 1250d5315a23SMark Brown #define WM2200_AIF1RX_SLOT_LEN_MASK 0x00FF /* AIF1RX_SLOT_LEN - [7:0] */ 1251d5315a23SMark Brown #define WM2200_AIF1RX_SLOT_LEN_SHIFT 0 /* AIF1RX_SLOT_LEN - [7:0] */ 1252d5315a23SMark Brown #define WM2200_AIF1RX_SLOT_LEN_WIDTH 8 /* AIF1RX_SLOT_LEN - [7:0] */ 1253d5315a23SMark Brown 1254d5315a23SMark Brown /* 1255d5315a23SMark Brown * R1289 (0x509) - Audio IF 1_10 1256d5315a23SMark Brown */ 1257d5315a23SMark Brown #define WM2200_AIF1TX1_SLOT_MASK 0x003F /* AIF1TX1_SLOT - [5:0] */ 1258d5315a23SMark Brown #define WM2200_AIF1TX1_SLOT_SHIFT 0 /* AIF1TX1_SLOT - [5:0] */ 1259d5315a23SMark Brown #define WM2200_AIF1TX1_SLOT_WIDTH 6 /* AIF1TX1_SLOT - [5:0] */ 1260d5315a23SMark Brown 1261d5315a23SMark Brown /* 1262d5315a23SMark Brown * R1290 (0x50A) - Audio IF 1_11 1263d5315a23SMark Brown */ 1264d5315a23SMark Brown #define WM2200_AIF1TX2_SLOT_MASK 0x003F /* AIF1TX2_SLOT - [5:0] */ 1265d5315a23SMark Brown #define WM2200_AIF1TX2_SLOT_SHIFT 0 /* AIF1TX2_SLOT - [5:0] */ 1266d5315a23SMark Brown #define WM2200_AIF1TX2_SLOT_WIDTH 6 /* AIF1TX2_SLOT - [5:0] */ 1267d5315a23SMark Brown 1268d5315a23SMark Brown /* 1269d5315a23SMark Brown * R1291 (0x50B) - Audio IF 1_12 1270d5315a23SMark Brown */ 1271d5315a23SMark Brown #define WM2200_AIF1TX3_SLOT_MASK 0x003F /* AIF1TX3_SLOT - [5:0] */ 1272d5315a23SMark Brown #define WM2200_AIF1TX3_SLOT_SHIFT 0 /* AIF1TX3_SLOT - [5:0] */ 1273d5315a23SMark Brown #define WM2200_AIF1TX3_SLOT_WIDTH 6 /* AIF1TX3_SLOT - [5:0] */ 1274d5315a23SMark Brown 1275d5315a23SMark Brown /* 1276d5315a23SMark Brown * R1292 (0x50C) - Audio IF 1_13 1277d5315a23SMark Brown */ 1278d5315a23SMark Brown #define WM2200_AIF1TX4_SLOT_MASK 0x003F /* AIF1TX4_SLOT - [5:0] */ 1279d5315a23SMark Brown #define WM2200_AIF1TX4_SLOT_SHIFT 0 /* AIF1TX4_SLOT - [5:0] */ 1280d5315a23SMark Brown #define WM2200_AIF1TX4_SLOT_WIDTH 6 /* AIF1TX4_SLOT - [5:0] */ 1281d5315a23SMark Brown 1282d5315a23SMark Brown /* 1283d5315a23SMark Brown * R1293 (0x50D) - Audio IF 1_14 1284d5315a23SMark Brown */ 1285d5315a23SMark Brown #define WM2200_AIF1TX5_SLOT_MASK 0x003F /* AIF1TX5_SLOT - [5:0] */ 1286d5315a23SMark Brown #define WM2200_AIF1TX5_SLOT_SHIFT 0 /* AIF1TX5_SLOT - [5:0] */ 1287d5315a23SMark Brown #define WM2200_AIF1TX5_SLOT_WIDTH 6 /* AIF1TX5_SLOT - [5:0] */ 1288d5315a23SMark Brown 1289d5315a23SMark Brown /* 1290d5315a23SMark Brown * R1294 (0x50E) - Audio IF 1_15 1291d5315a23SMark Brown */ 1292d5315a23SMark Brown #define WM2200_AIF1TX6_SLOT_MASK 0x003F /* AIF1TX6_SLOT - [5:0] */ 1293d5315a23SMark Brown #define WM2200_AIF1TX6_SLOT_SHIFT 0 /* AIF1TX6_SLOT - [5:0] */ 1294d5315a23SMark Brown #define WM2200_AIF1TX6_SLOT_WIDTH 6 /* AIF1TX6_SLOT - [5:0] */ 1295d5315a23SMark Brown 1296d5315a23SMark Brown /* 1297d5315a23SMark Brown * R1295 (0x50F) - Audio IF 1_16 1298d5315a23SMark Brown */ 1299d5315a23SMark Brown #define WM2200_AIF1RX1_SLOT_MASK 0x003F /* AIF1RX1_SLOT - [5:0] */ 1300d5315a23SMark Brown #define WM2200_AIF1RX1_SLOT_SHIFT 0 /* AIF1RX1_SLOT - [5:0] */ 1301d5315a23SMark Brown #define WM2200_AIF1RX1_SLOT_WIDTH 6 /* AIF1RX1_SLOT - [5:0] */ 1302d5315a23SMark Brown 1303d5315a23SMark Brown /* 1304d5315a23SMark Brown * R1296 (0x510) - Audio IF 1_17 1305d5315a23SMark Brown */ 1306d5315a23SMark Brown #define WM2200_AIF1RX2_SLOT_MASK 0x003F /* AIF1RX2_SLOT - [5:0] */ 1307d5315a23SMark Brown #define WM2200_AIF1RX2_SLOT_SHIFT 0 /* AIF1RX2_SLOT - [5:0] */ 1308d5315a23SMark Brown #define WM2200_AIF1RX2_SLOT_WIDTH 6 /* AIF1RX2_SLOT - [5:0] */ 1309d5315a23SMark Brown 1310d5315a23SMark Brown /* 1311d5315a23SMark Brown * R1297 (0x511) - Audio IF 1_18 1312d5315a23SMark Brown */ 1313d5315a23SMark Brown #define WM2200_AIF1RX3_SLOT_MASK 0x003F /* AIF1RX3_SLOT - [5:0] */ 1314d5315a23SMark Brown #define WM2200_AIF1RX3_SLOT_SHIFT 0 /* AIF1RX3_SLOT - [5:0] */ 1315d5315a23SMark Brown #define WM2200_AIF1RX3_SLOT_WIDTH 6 /* AIF1RX3_SLOT - [5:0] */ 1316d5315a23SMark Brown 1317d5315a23SMark Brown /* 1318d5315a23SMark Brown * R1298 (0x512) - Audio IF 1_19 1319d5315a23SMark Brown */ 1320d5315a23SMark Brown #define WM2200_AIF1RX4_SLOT_MASK 0x003F /* AIF1RX4_SLOT - [5:0] */ 1321d5315a23SMark Brown #define WM2200_AIF1RX4_SLOT_SHIFT 0 /* AIF1RX4_SLOT - [5:0] */ 1322d5315a23SMark Brown #define WM2200_AIF1RX4_SLOT_WIDTH 6 /* AIF1RX4_SLOT - [5:0] */ 1323d5315a23SMark Brown 1324d5315a23SMark Brown /* 1325d5315a23SMark Brown * R1299 (0x513) - Audio IF 1_20 1326d5315a23SMark Brown */ 1327d5315a23SMark Brown #define WM2200_AIF1RX5_SLOT_MASK 0x003F /* AIF1RX5_SLOT - [5:0] */ 1328d5315a23SMark Brown #define WM2200_AIF1RX5_SLOT_SHIFT 0 /* AIF1RX5_SLOT - [5:0] */ 1329d5315a23SMark Brown #define WM2200_AIF1RX5_SLOT_WIDTH 6 /* AIF1RX5_SLOT - [5:0] */ 1330d5315a23SMark Brown 1331d5315a23SMark Brown /* 1332d5315a23SMark Brown * R1300 (0x514) - Audio IF 1_21 1333d5315a23SMark Brown */ 1334d5315a23SMark Brown #define WM2200_AIF1RX6_SLOT_MASK 0x003F /* AIF1RX6_SLOT - [5:0] */ 1335d5315a23SMark Brown #define WM2200_AIF1RX6_SLOT_SHIFT 0 /* AIF1RX6_SLOT - [5:0] */ 1336d5315a23SMark Brown #define WM2200_AIF1RX6_SLOT_WIDTH 6 /* AIF1RX6_SLOT - [5:0] */ 1337d5315a23SMark Brown 1338d5315a23SMark Brown /* 1339d5315a23SMark Brown * R1301 (0x515) - Audio IF 1_22 1340d5315a23SMark Brown */ 1341d5315a23SMark Brown #define WM2200_AIF1RX6_ENA 0x0800 /* AIF1RX6_ENA */ 1342d5315a23SMark Brown #define WM2200_AIF1RX6_ENA_MASK 0x0800 /* AIF1RX6_ENA */ 1343d5315a23SMark Brown #define WM2200_AIF1RX6_ENA_SHIFT 11 /* AIF1RX6_ENA */ 1344d5315a23SMark Brown #define WM2200_AIF1RX6_ENA_WIDTH 1 /* AIF1RX6_ENA */ 1345d5315a23SMark Brown #define WM2200_AIF1RX5_ENA 0x0400 /* AIF1RX5_ENA */ 1346d5315a23SMark Brown #define WM2200_AIF1RX5_ENA_MASK 0x0400 /* AIF1RX5_ENA */ 1347d5315a23SMark Brown #define WM2200_AIF1RX5_ENA_SHIFT 10 /* AIF1RX5_ENA */ 1348d5315a23SMark Brown #define WM2200_AIF1RX5_ENA_WIDTH 1 /* AIF1RX5_ENA */ 1349d5315a23SMark Brown #define WM2200_AIF1RX4_ENA 0x0200 /* AIF1RX4_ENA */ 1350d5315a23SMark Brown #define WM2200_AIF1RX4_ENA_MASK 0x0200 /* AIF1RX4_ENA */ 1351d5315a23SMark Brown #define WM2200_AIF1RX4_ENA_SHIFT 9 /* AIF1RX4_ENA */ 1352d5315a23SMark Brown #define WM2200_AIF1RX4_ENA_WIDTH 1 /* AIF1RX4_ENA */ 1353d5315a23SMark Brown #define WM2200_AIF1RX3_ENA 0x0100 /* AIF1RX3_ENA */ 1354d5315a23SMark Brown #define WM2200_AIF1RX3_ENA_MASK 0x0100 /* AIF1RX3_ENA */ 1355d5315a23SMark Brown #define WM2200_AIF1RX3_ENA_SHIFT 8 /* AIF1RX3_ENA */ 1356d5315a23SMark Brown #define WM2200_AIF1RX3_ENA_WIDTH 1 /* AIF1RX3_ENA */ 1357d5315a23SMark Brown #define WM2200_AIF1RX2_ENA 0x0080 /* AIF1RX2_ENA */ 1358d5315a23SMark Brown #define WM2200_AIF1RX2_ENA_MASK 0x0080 /* AIF1RX2_ENA */ 1359d5315a23SMark Brown #define WM2200_AIF1RX2_ENA_SHIFT 7 /* AIF1RX2_ENA */ 1360d5315a23SMark Brown #define WM2200_AIF1RX2_ENA_WIDTH 1 /* AIF1RX2_ENA */ 1361d5315a23SMark Brown #define WM2200_AIF1RX1_ENA 0x0040 /* AIF1RX1_ENA */ 1362d5315a23SMark Brown #define WM2200_AIF1RX1_ENA_MASK 0x0040 /* AIF1RX1_ENA */ 1363d5315a23SMark Brown #define WM2200_AIF1RX1_ENA_SHIFT 6 /* AIF1RX1_ENA */ 1364d5315a23SMark Brown #define WM2200_AIF1RX1_ENA_WIDTH 1 /* AIF1RX1_ENA */ 1365d5315a23SMark Brown #define WM2200_AIF1TX6_ENA 0x0020 /* AIF1TX6_ENA */ 1366d5315a23SMark Brown #define WM2200_AIF1TX6_ENA_MASK 0x0020 /* AIF1TX6_ENA */ 1367d5315a23SMark Brown #define WM2200_AIF1TX6_ENA_SHIFT 5 /* AIF1TX6_ENA */ 1368d5315a23SMark Brown #define WM2200_AIF1TX6_ENA_WIDTH 1 /* AIF1TX6_ENA */ 1369d5315a23SMark Brown #define WM2200_AIF1TX5_ENA 0x0010 /* AIF1TX5_ENA */ 1370d5315a23SMark Brown #define WM2200_AIF1TX5_ENA_MASK 0x0010 /* AIF1TX5_ENA */ 1371d5315a23SMark Brown #define WM2200_AIF1TX5_ENA_SHIFT 4 /* AIF1TX5_ENA */ 1372d5315a23SMark Brown #define WM2200_AIF1TX5_ENA_WIDTH 1 /* AIF1TX5_ENA */ 1373d5315a23SMark Brown #define WM2200_AIF1TX4_ENA 0x0008 /* AIF1TX4_ENA */ 1374d5315a23SMark Brown #define WM2200_AIF1TX4_ENA_MASK 0x0008 /* AIF1TX4_ENA */ 1375d5315a23SMark Brown #define WM2200_AIF1TX4_ENA_SHIFT 3 /* AIF1TX4_ENA */ 1376d5315a23SMark Brown #define WM2200_AIF1TX4_ENA_WIDTH 1 /* AIF1TX4_ENA */ 1377d5315a23SMark Brown #define WM2200_AIF1TX3_ENA 0x0004 /* AIF1TX3_ENA */ 1378d5315a23SMark Brown #define WM2200_AIF1TX3_ENA_MASK 0x0004 /* AIF1TX3_ENA */ 1379d5315a23SMark Brown #define WM2200_AIF1TX3_ENA_SHIFT 2 /* AIF1TX3_ENA */ 1380d5315a23SMark Brown #define WM2200_AIF1TX3_ENA_WIDTH 1 /* AIF1TX3_ENA */ 1381d5315a23SMark Brown #define WM2200_AIF1TX2_ENA 0x0002 /* AIF1TX2_ENA */ 1382d5315a23SMark Brown #define WM2200_AIF1TX2_ENA_MASK 0x0002 /* AIF1TX2_ENA */ 1383d5315a23SMark Brown #define WM2200_AIF1TX2_ENA_SHIFT 1 /* AIF1TX2_ENA */ 1384d5315a23SMark Brown #define WM2200_AIF1TX2_ENA_WIDTH 1 /* AIF1TX2_ENA */ 1385d5315a23SMark Brown #define WM2200_AIF1TX1_ENA 0x0001 /* AIF1TX1_ENA */ 1386d5315a23SMark Brown #define WM2200_AIF1TX1_ENA_MASK 0x0001 /* AIF1TX1_ENA */ 1387d5315a23SMark Brown #define WM2200_AIF1TX1_ENA_SHIFT 0 /* AIF1TX1_ENA */ 1388d5315a23SMark Brown #define WM2200_AIF1TX1_ENA_WIDTH 1 /* AIF1TX1_ENA */ 1389d5315a23SMark Brown 1390d5315a23SMark Brown /* 1391d5315a23SMark Brown * R1536 (0x600) - OUT1LMIX Input 1 Source 1392d5315a23SMark Brown */ 1393d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC1_MASK 0x007F /* OUT1LMIX_SRC1 - [6:0] */ 1394d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC1_SHIFT 0 /* OUT1LMIX_SRC1 - [6:0] */ 1395d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC1_WIDTH 7 /* OUT1LMIX_SRC1 - [6:0] */ 1396d5315a23SMark Brown 1397d5315a23SMark Brown /* 1398d5315a23SMark Brown * R1537 (0x601) - OUT1LMIX Input 1 Volume 1399d5315a23SMark Brown */ 1400d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL1_MASK 0x00FE /* OUT1LMIX_VOL1 - [7:1] */ 1401d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL1_SHIFT 1 /* OUT1LMIX_VOL1 - [7:1] */ 1402d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL1_WIDTH 7 /* OUT1LMIX_VOL1 - [7:1] */ 1403d5315a23SMark Brown 1404d5315a23SMark Brown /* 1405d5315a23SMark Brown * R1538 (0x602) - OUT1LMIX Input 2 Source 1406d5315a23SMark Brown */ 1407d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC2_MASK 0x007F /* OUT1LMIX_SRC2 - [6:0] */ 1408d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC2_SHIFT 0 /* OUT1LMIX_SRC2 - [6:0] */ 1409d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC2_WIDTH 7 /* OUT1LMIX_SRC2 - [6:0] */ 1410d5315a23SMark Brown 1411d5315a23SMark Brown /* 1412d5315a23SMark Brown * R1539 (0x603) - OUT1LMIX Input 2 Volume 1413d5315a23SMark Brown */ 1414d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL2_MASK 0x00FE /* OUT1LMIX_VOL2 - [7:1] */ 1415d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL2_SHIFT 1 /* OUT1LMIX_VOL2 - [7:1] */ 1416d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL2_WIDTH 7 /* OUT1LMIX_VOL2 - [7:1] */ 1417d5315a23SMark Brown 1418d5315a23SMark Brown /* 1419d5315a23SMark Brown * R1540 (0x604) - OUT1LMIX Input 3 Source 1420d5315a23SMark Brown */ 1421d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC3_MASK 0x007F /* OUT1LMIX_SRC3 - [6:0] */ 1422d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC3_SHIFT 0 /* OUT1LMIX_SRC3 - [6:0] */ 1423d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC3_WIDTH 7 /* OUT1LMIX_SRC3 - [6:0] */ 1424d5315a23SMark Brown 1425d5315a23SMark Brown /* 1426d5315a23SMark Brown * R1541 (0x605) - OUT1LMIX Input 3 Volume 1427d5315a23SMark Brown */ 1428d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL3_MASK 0x00FE /* OUT1LMIX_VOL3 - [7:1] */ 1429d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL3_SHIFT 1 /* OUT1LMIX_VOL3 - [7:1] */ 1430d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL3_WIDTH 7 /* OUT1LMIX_VOL3 - [7:1] */ 1431d5315a23SMark Brown 1432d5315a23SMark Brown /* 1433d5315a23SMark Brown * R1542 (0x606) - OUT1LMIX Input 4 Source 1434d5315a23SMark Brown */ 1435d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC4_MASK 0x007F /* OUT1LMIX_SRC4 - [6:0] */ 1436d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC4_SHIFT 0 /* OUT1LMIX_SRC4 - [6:0] */ 1437d5315a23SMark Brown #define WM2200_OUT1LMIX_SRC4_WIDTH 7 /* OUT1LMIX_SRC4 - [6:0] */ 1438d5315a23SMark Brown 1439d5315a23SMark Brown /* 1440d5315a23SMark Brown * R1543 (0x607) - OUT1LMIX Input 4 Volume 1441d5315a23SMark Brown */ 1442d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL4_MASK 0x00FE /* OUT1LMIX_VOL4 - [7:1] */ 1443d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL4_SHIFT 1 /* OUT1LMIX_VOL4 - [7:1] */ 1444d5315a23SMark Brown #define WM2200_OUT1LMIX_VOL4_WIDTH 7 /* OUT1LMIX_VOL4 - [7:1] */ 1445d5315a23SMark Brown 1446d5315a23SMark Brown /* 1447d5315a23SMark Brown * R1544 (0x608) - OUT1RMIX Input 1 Source 1448d5315a23SMark Brown */ 1449d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC1_MASK 0x007F /* OUT1RMIX_SRC1 - [6:0] */ 1450d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC1_SHIFT 0 /* OUT1RMIX_SRC1 - [6:0] */ 1451d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC1_WIDTH 7 /* OUT1RMIX_SRC1 - [6:0] */ 1452d5315a23SMark Brown 1453d5315a23SMark Brown /* 1454d5315a23SMark Brown * R1545 (0x609) - OUT1RMIX Input 1 Volume 1455d5315a23SMark Brown */ 1456d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL1_MASK 0x00FE /* OUT1RMIX_VOL1 - [7:1] */ 1457d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL1_SHIFT 1 /* OUT1RMIX_VOL1 - [7:1] */ 1458d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL1_WIDTH 7 /* OUT1RMIX_VOL1 - [7:1] */ 1459d5315a23SMark Brown 1460d5315a23SMark Brown /* 1461d5315a23SMark Brown * R1546 (0x60A) - OUT1RMIX Input 2 Source 1462d5315a23SMark Brown */ 1463d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC2_MASK 0x007F /* OUT1RMIX_SRC2 - [6:0] */ 1464d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC2_SHIFT 0 /* OUT1RMIX_SRC2 - [6:0] */ 1465d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC2_WIDTH 7 /* OUT1RMIX_SRC2 - [6:0] */ 1466d5315a23SMark Brown 1467d5315a23SMark Brown /* 1468d5315a23SMark Brown * R1547 (0x60B) - OUT1RMIX Input 2 Volume 1469d5315a23SMark Brown */ 1470d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL2_MASK 0x00FE /* OUT1RMIX_VOL2 - [7:1] */ 1471d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL2_SHIFT 1 /* OUT1RMIX_VOL2 - [7:1] */ 1472d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL2_WIDTH 7 /* OUT1RMIX_VOL2 - [7:1] */ 1473d5315a23SMark Brown 1474d5315a23SMark Brown /* 1475d5315a23SMark Brown * R1548 (0x60C) - OUT1RMIX Input 3 Source 1476d5315a23SMark Brown */ 1477d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC3_MASK 0x007F /* OUT1RMIX_SRC3 - [6:0] */ 1478d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC3_SHIFT 0 /* OUT1RMIX_SRC3 - [6:0] */ 1479d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC3_WIDTH 7 /* OUT1RMIX_SRC3 - [6:0] */ 1480d5315a23SMark Brown 1481d5315a23SMark Brown /* 1482d5315a23SMark Brown * R1549 (0x60D) - OUT1RMIX Input 3 Volume 1483d5315a23SMark Brown */ 1484d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL3_MASK 0x00FE /* OUT1RMIX_VOL3 - [7:1] */ 1485d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL3_SHIFT 1 /* OUT1RMIX_VOL3 - [7:1] */ 1486d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL3_WIDTH 7 /* OUT1RMIX_VOL3 - [7:1] */ 1487d5315a23SMark Brown 1488d5315a23SMark Brown /* 1489d5315a23SMark Brown * R1550 (0x60E) - OUT1RMIX Input 4 Source 1490d5315a23SMark Brown */ 1491d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC4_MASK 0x007F /* OUT1RMIX_SRC4 - [6:0] */ 1492d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC4_SHIFT 0 /* OUT1RMIX_SRC4 - [6:0] */ 1493d5315a23SMark Brown #define WM2200_OUT1RMIX_SRC4_WIDTH 7 /* OUT1RMIX_SRC4 - [6:0] */ 1494d5315a23SMark Brown 1495d5315a23SMark Brown /* 1496d5315a23SMark Brown * R1551 (0x60F) - OUT1RMIX Input 4 Volume 1497d5315a23SMark Brown */ 1498d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL4_MASK 0x00FE /* OUT1RMIX_VOL4 - [7:1] */ 1499d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL4_SHIFT 1 /* OUT1RMIX_VOL4 - [7:1] */ 1500d5315a23SMark Brown #define WM2200_OUT1RMIX_VOL4_WIDTH 7 /* OUT1RMIX_VOL4 - [7:1] */ 1501d5315a23SMark Brown 1502d5315a23SMark Brown /* 1503d5315a23SMark Brown * R1552 (0x610) - OUT2LMIX Input 1 Source 1504d5315a23SMark Brown */ 1505d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC1_MASK 0x007F /* OUT2LMIX_SRC1 - [6:0] */ 1506d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC1_SHIFT 0 /* OUT2LMIX_SRC1 - [6:0] */ 1507d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC1_WIDTH 7 /* OUT2LMIX_SRC1 - [6:0] */ 1508d5315a23SMark Brown 1509d5315a23SMark Brown /* 1510d5315a23SMark Brown * R1553 (0x611) - OUT2LMIX Input 1 Volume 1511d5315a23SMark Brown */ 1512d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL1_MASK 0x00FE /* OUT2LMIX_VOL1 - [7:1] */ 1513d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL1_SHIFT 1 /* OUT2LMIX_VOL1 - [7:1] */ 1514d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL1_WIDTH 7 /* OUT2LMIX_VOL1 - [7:1] */ 1515d5315a23SMark Brown 1516d5315a23SMark Brown /* 1517d5315a23SMark Brown * R1554 (0x612) - OUT2LMIX Input 2 Source 1518d5315a23SMark Brown */ 1519d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC2_MASK 0x007F /* OUT2LMIX_SRC2 - [6:0] */ 1520d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC2_SHIFT 0 /* OUT2LMIX_SRC2 - [6:0] */ 1521d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC2_WIDTH 7 /* OUT2LMIX_SRC2 - [6:0] */ 1522d5315a23SMark Brown 1523d5315a23SMark Brown /* 1524d5315a23SMark Brown * R1555 (0x613) - OUT2LMIX Input 2 Volume 1525d5315a23SMark Brown */ 1526d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL2_MASK 0x00FE /* OUT2LMIX_VOL2 - [7:1] */ 1527d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL2_SHIFT 1 /* OUT2LMIX_VOL2 - [7:1] */ 1528d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL2_WIDTH 7 /* OUT2LMIX_VOL2 - [7:1] */ 1529d5315a23SMark Brown 1530d5315a23SMark Brown /* 1531d5315a23SMark Brown * R1556 (0x614) - OUT2LMIX Input 3 Source 1532d5315a23SMark Brown */ 1533d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC3_MASK 0x007F /* OUT2LMIX_SRC3 - [6:0] */ 1534d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC3_SHIFT 0 /* OUT2LMIX_SRC3 - [6:0] */ 1535d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC3_WIDTH 7 /* OUT2LMIX_SRC3 - [6:0] */ 1536d5315a23SMark Brown 1537d5315a23SMark Brown /* 1538d5315a23SMark Brown * R1557 (0x615) - OUT2LMIX Input 3 Volume 1539d5315a23SMark Brown */ 1540d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL3_MASK 0x00FE /* OUT2LMIX_VOL3 - [7:1] */ 1541d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL3_SHIFT 1 /* OUT2LMIX_VOL3 - [7:1] */ 1542d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL3_WIDTH 7 /* OUT2LMIX_VOL3 - [7:1] */ 1543d5315a23SMark Brown 1544d5315a23SMark Brown /* 1545d5315a23SMark Brown * R1558 (0x616) - OUT2LMIX Input 4 Source 1546d5315a23SMark Brown */ 1547d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC4_MASK 0x007F /* OUT2LMIX_SRC4 - [6:0] */ 1548d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC4_SHIFT 0 /* OUT2LMIX_SRC4 - [6:0] */ 1549d5315a23SMark Brown #define WM2200_OUT2LMIX_SRC4_WIDTH 7 /* OUT2LMIX_SRC4 - [6:0] */ 1550d5315a23SMark Brown 1551d5315a23SMark Brown /* 1552d5315a23SMark Brown * R1559 (0x617) - OUT2LMIX Input 4 Volume 1553d5315a23SMark Brown */ 1554d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL4_MASK 0x00FE /* OUT2LMIX_VOL4 - [7:1] */ 1555d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL4_SHIFT 1 /* OUT2LMIX_VOL4 - [7:1] */ 1556d5315a23SMark Brown #define WM2200_OUT2LMIX_VOL4_WIDTH 7 /* OUT2LMIX_VOL4 - [7:1] */ 1557d5315a23SMark Brown 1558d5315a23SMark Brown /* 1559d5315a23SMark Brown * R1560 (0x618) - OUT2RMIX Input 1 Source 1560d5315a23SMark Brown */ 1561d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC1_MASK 0x007F /* OUT2RMIX_SRC1 - [6:0] */ 1562d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC1_SHIFT 0 /* OUT2RMIX_SRC1 - [6:0] */ 1563d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC1_WIDTH 7 /* OUT2RMIX_SRC1 - [6:0] */ 1564d5315a23SMark Brown 1565d5315a23SMark Brown /* 1566d5315a23SMark Brown * R1561 (0x619) - OUT2RMIX Input 1 Volume 1567d5315a23SMark Brown */ 1568d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL1_MASK 0x00FE /* OUT2RMIX_VOL1 - [7:1] */ 1569d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL1_SHIFT 1 /* OUT2RMIX_VOL1 - [7:1] */ 1570d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL1_WIDTH 7 /* OUT2RMIX_VOL1 - [7:1] */ 1571d5315a23SMark Brown 1572d5315a23SMark Brown /* 1573d5315a23SMark Brown * R1562 (0x61A) - OUT2RMIX Input 2 Source 1574d5315a23SMark Brown */ 1575d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC2_MASK 0x007F /* OUT2RMIX_SRC2 - [6:0] */ 1576d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC2_SHIFT 0 /* OUT2RMIX_SRC2 - [6:0] */ 1577d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC2_WIDTH 7 /* OUT2RMIX_SRC2 - [6:0] */ 1578d5315a23SMark Brown 1579d5315a23SMark Brown /* 1580d5315a23SMark Brown * R1563 (0x61B) - OUT2RMIX Input 2 Volume 1581d5315a23SMark Brown */ 1582d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL2_MASK 0x00FE /* OUT2RMIX_VOL2 - [7:1] */ 1583d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL2_SHIFT 1 /* OUT2RMIX_VOL2 - [7:1] */ 1584d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL2_WIDTH 7 /* OUT2RMIX_VOL2 - [7:1] */ 1585d5315a23SMark Brown 1586d5315a23SMark Brown /* 1587d5315a23SMark Brown * R1564 (0x61C) - OUT2RMIX Input 3 Source 1588d5315a23SMark Brown */ 1589d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC3_MASK 0x007F /* OUT2RMIX_SRC3 - [6:0] */ 1590d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC3_SHIFT 0 /* OUT2RMIX_SRC3 - [6:0] */ 1591d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC3_WIDTH 7 /* OUT2RMIX_SRC3 - [6:0] */ 1592d5315a23SMark Brown 1593d5315a23SMark Brown /* 1594d5315a23SMark Brown * R1565 (0x61D) - OUT2RMIX Input 3 Volume 1595d5315a23SMark Brown */ 1596d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL3_MASK 0x00FE /* OUT2RMIX_VOL3 - [7:1] */ 1597d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL3_SHIFT 1 /* OUT2RMIX_VOL3 - [7:1] */ 1598d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL3_WIDTH 7 /* OUT2RMIX_VOL3 - [7:1] */ 1599d5315a23SMark Brown 1600d5315a23SMark Brown /* 1601d5315a23SMark Brown * R1566 (0x61E) - OUT2RMIX Input 4 Source 1602d5315a23SMark Brown */ 1603d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC4_MASK 0x007F /* OUT2RMIX_SRC4 - [6:0] */ 1604d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC4_SHIFT 0 /* OUT2RMIX_SRC4 - [6:0] */ 1605d5315a23SMark Brown #define WM2200_OUT2RMIX_SRC4_WIDTH 7 /* OUT2RMIX_SRC4 - [6:0] */ 1606d5315a23SMark Brown 1607d5315a23SMark Brown /* 1608d5315a23SMark Brown * R1567 (0x61F) - OUT2RMIX Input 4 Volume 1609d5315a23SMark Brown */ 1610d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL4_MASK 0x00FE /* OUT2RMIX_VOL4 - [7:1] */ 1611d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL4_SHIFT 1 /* OUT2RMIX_VOL4 - [7:1] */ 1612d5315a23SMark Brown #define WM2200_OUT2RMIX_VOL4_WIDTH 7 /* OUT2RMIX_VOL4 - [7:1] */ 1613d5315a23SMark Brown 1614d5315a23SMark Brown /* 1615d5315a23SMark Brown * R1568 (0x620) - AIF1TX1MIX Input 1 Source 1616d5315a23SMark Brown */ 1617d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC1_MASK 0x007F /* AIF1TX1MIX_SRC1 - [6:0] */ 1618d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC1_SHIFT 0 /* AIF1TX1MIX_SRC1 - [6:0] */ 1619d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC1_WIDTH 7 /* AIF1TX1MIX_SRC1 - [6:0] */ 1620d5315a23SMark Brown 1621d5315a23SMark Brown /* 1622d5315a23SMark Brown * R1569 (0x621) - AIF1TX1MIX Input 1 Volume 1623d5315a23SMark Brown */ 1624d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL1_MASK 0x00FE /* AIF1TX1MIX_VOL1 - [7:1] */ 1625d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL1_SHIFT 1 /* AIF1TX1MIX_VOL1 - [7:1] */ 1626d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL1_WIDTH 7 /* AIF1TX1MIX_VOL1 - [7:1] */ 1627d5315a23SMark Brown 1628d5315a23SMark Brown /* 1629d5315a23SMark Brown * R1570 (0x622) - AIF1TX1MIX Input 2 Source 1630d5315a23SMark Brown */ 1631d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC2_MASK 0x007F /* AIF1TX1MIX_SRC2 - [6:0] */ 1632d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC2_SHIFT 0 /* AIF1TX1MIX_SRC2 - [6:0] */ 1633d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC2_WIDTH 7 /* AIF1TX1MIX_SRC2 - [6:0] */ 1634d5315a23SMark Brown 1635d5315a23SMark Brown /* 1636d5315a23SMark Brown * R1571 (0x623) - AIF1TX1MIX Input 2 Volume 1637d5315a23SMark Brown */ 1638d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL2_MASK 0x00FE /* AIF1TX1MIX_VOL2 - [7:1] */ 1639d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL2_SHIFT 1 /* AIF1TX1MIX_VOL2 - [7:1] */ 1640d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL2_WIDTH 7 /* AIF1TX1MIX_VOL2 - [7:1] */ 1641d5315a23SMark Brown 1642d5315a23SMark Brown /* 1643d5315a23SMark Brown * R1572 (0x624) - AIF1TX1MIX Input 3 Source 1644d5315a23SMark Brown */ 1645d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC3_MASK 0x007F /* AIF1TX1MIX_SRC3 - [6:0] */ 1646d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC3_SHIFT 0 /* AIF1TX1MIX_SRC3 - [6:0] */ 1647d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC3_WIDTH 7 /* AIF1TX1MIX_SRC3 - [6:0] */ 1648d5315a23SMark Brown 1649d5315a23SMark Brown /* 1650d5315a23SMark Brown * R1573 (0x625) - AIF1TX1MIX Input 3 Volume 1651d5315a23SMark Brown */ 1652d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL3_MASK 0x00FE /* AIF1TX1MIX_VOL3 - [7:1] */ 1653d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL3_SHIFT 1 /* AIF1TX1MIX_VOL3 - [7:1] */ 1654d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL3_WIDTH 7 /* AIF1TX1MIX_VOL3 - [7:1] */ 1655d5315a23SMark Brown 1656d5315a23SMark Brown /* 1657d5315a23SMark Brown * R1574 (0x626) - AIF1TX1MIX Input 4 Source 1658d5315a23SMark Brown */ 1659d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC4_MASK 0x007F /* AIF1TX1MIX_SRC4 - [6:0] */ 1660d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC4_SHIFT 0 /* AIF1TX1MIX_SRC4 - [6:0] */ 1661d5315a23SMark Brown #define WM2200_AIF1TX1MIX_SRC4_WIDTH 7 /* AIF1TX1MIX_SRC4 - [6:0] */ 1662d5315a23SMark Brown 1663d5315a23SMark Brown /* 1664d5315a23SMark Brown * R1575 (0x627) - AIF1TX1MIX Input 4 Volume 1665d5315a23SMark Brown */ 1666d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL4_MASK 0x00FE /* AIF1TX1MIX_VOL4 - [7:1] */ 1667d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL4_SHIFT 1 /* AIF1TX1MIX_VOL4 - [7:1] */ 1668d5315a23SMark Brown #define WM2200_AIF1TX1MIX_VOL4_WIDTH 7 /* AIF1TX1MIX_VOL4 - [7:1] */ 1669d5315a23SMark Brown 1670d5315a23SMark Brown /* 1671d5315a23SMark Brown * R1576 (0x628) - AIF1TX2MIX Input 1 Source 1672d5315a23SMark Brown */ 1673d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC1_MASK 0x007F /* AIF1TX2MIX_SRC1 - [6:0] */ 1674d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC1_SHIFT 0 /* AIF1TX2MIX_SRC1 - [6:0] */ 1675d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC1_WIDTH 7 /* AIF1TX2MIX_SRC1 - [6:0] */ 1676d5315a23SMark Brown 1677d5315a23SMark Brown /* 1678d5315a23SMark Brown * R1577 (0x629) - AIF1TX2MIX Input 1 Volume 1679d5315a23SMark Brown */ 1680d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL1_MASK 0x00FE /* AIF1TX2MIX_VOL1 - [7:1] */ 1681d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL1_SHIFT 1 /* AIF1TX2MIX_VOL1 - [7:1] */ 1682d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL1_WIDTH 7 /* AIF1TX2MIX_VOL1 - [7:1] */ 1683d5315a23SMark Brown 1684d5315a23SMark Brown /* 1685d5315a23SMark Brown * R1578 (0x62A) - AIF1TX2MIX Input 2 Source 1686d5315a23SMark Brown */ 1687d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC2_MASK 0x007F /* AIF1TX2MIX_SRC2 - [6:0] */ 1688d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC2_SHIFT 0 /* AIF1TX2MIX_SRC2 - [6:0] */ 1689d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC2_WIDTH 7 /* AIF1TX2MIX_SRC2 - [6:0] */ 1690d5315a23SMark Brown 1691d5315a23SMark Brown /* 1692d5315a23SMark Brown * R1579 (0x62B) - AIF1TX2MIX Input 2 Volume 1693d5315a23SMark Brown */ 1694d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL2_MASK 0x00FE /* AIF1TX2MIX_VOL2 - [7:1] */ 1695d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL2_SHIFT 1 /* AIF1TX2MIX_VOL2 - [7:1] */ 1696d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL2_WIDTH 7 /* AIF1TX2MIX_VOL2 - [7:1] */ 1697d5315a23SMark Brown 1698d5315a23SMark Brown /* 1699d5315a23SMark Brown * R1580 (0x62C) - AIF1TX2MIX Input 3 Source 1700d5315a23SMark Brown */ 1701d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC3_MASK 0x007F /* AIF1TX2MIX_SRC3 - [6:0] */ 1702d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC3_SHIFT 0 /* AIF1TX2MIX_SRC3 - [6:0] */ 1703d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC3_WIDTH 7 /* AIF1TX2MIX_SRC3 - [6:0] */ 1704d5315a23SMark Brown 1705d5315a23SMark Brown /* 1706d5315a23SMark Brown * R1581 (0x62D) - AIF1TX2MIX Input 3 Volume 1707d5315a23SMark Brown */ 1708d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL3_MASK 0x00FE /* AIF1TX2MIX_VOL3 - [7:1] */ 1709d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL3_SHIFT 1 /* AIF1TX2MIX_VOL3 - [7:1] */ 1710d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL3_WIDTH 7 /* AIF1TX2MIX_VOL3 - [7:1] */ 1711d5315a23SMark Brown 1712d5315a23SMark Brown /* 1713d5315a23SMark Brown * R1582 (0x62E) - AIF1TX2MIX Input 4 Source 1714d5315a23SMark Brown */ 1715d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC4_MASK 0x007F /* AIF1TX2MIX_SRC4 - [6:0] */ 1716d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC4_SHIFT 0 /* AIF1TX2MIX_SRC4 - [6:0] */ 1717d5315a23SMark Brown #define WM2200_AIF1TX2MIX_SRC4_WIDTH 7 /* AIF1TX2MIX_SRC4 - [6:0] */ 1718d5315a23SMark Brown 1719d5315a23SMark Brown /* 1720d5315a23SMark Brown * R1583 (0x62F) - AIF1TX2MIX Input 4 Volume 1721d5315a23SMark Brown */ 1722d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL4_MASK 0x00FE /* AIF1TX2MIX_VOL4 - [7:1] */ 1723d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL4_SHIFT 1 /* AIF1TX2MIX_VOL4 - [7:1] */ 1724d5315a23SMark Brown #define WM2200_AIF1TX2MIX_VOL4_WIDTH 7 /* AIF1TX2MIX_VOL4 - [7:1] */ 1725d5315a23SMark Brown 1726d5315a23SMark Brown /* 1727d5315a23SMark Brown * R1584 (0x630) - AIF1TX3MIX Input 1 Source 1728d5315a23SMark Brown */ 1729d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC1_MASK 0x007F /* AIF1TX3MIX_SRC1 - [6:0] */ 1730d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC1_SHIFT 0 /* AIF1TX3MIX_SRC1 - [6:0] */ 1731d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC1_WIDTH 7 /* AIF1TX3MIX_SRC1 - [6:0] */ 1732d5315a23SMark Brown 1733d5315a23SMark Brown /* 1734d5315a23SMark Brown * R1585 (0x631) - AIF1TX3MIX Input 1 Volume 1735d5315a23SMark Brown */ 1736d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL1_MASK 0x00FE /* AIF1TX3MIX_VOL1 - [7:1] */ 1737d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL1_SHIFT 1 /* AIF1TX3MIX_VOL1 - [7:1] */ 1738d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL1_WIDTH 7 /* AIF1TX3MIX_VOL1 - [7:1] */ 1739d5315a23SMark Brown 1740d5315a23SMark Brown /* 1741d5315a23SMark Brown * R1586 (0x632) - AIF1TX3MIX Input 2 Source 1742d5315a23SMark Brown */ 1743d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC2_MASK 0x007F /* AIF1TX3MIX_SRC2 - [6:0] */ 1744d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC2_SHIFT 0 /* AIF1TX3MIX_SRC2 - [6:0] */ 1745d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC2_WIDTH 7 /* AIF1TX3MIX_SRC2 - [6:0] */ 1746d5315a23SMark Brown 1747d5315a23SMark Brown /* 1748d5315a23SMark Brown * R1587 (0x633) - AIF1TX3MIX Input 2 Volume 1749d5315a23SMark Brown */ 1750d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL2_MASK 0x00FE /* AIF1TX3MIX_VOL2 - [7:1] */ 1751d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL2_SHIFT 1 /* AIF1TX3MIX_VOL2 - [7:1] */ 1752d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL2_WIDTH 7 /* AIF1TX3MIX_VOL2 - [7:1] */ 1753d5315a23SMark Brown 1754d5315a23SMark Brown /* 1755d5315a23SMark Brown * R1588 (0x634) - AIF1TX3MIX Input 3 Source 1756d5315a23SMark Brown */ 1757d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC3_MASK 0x007F /* AIF1TX3MIX_SRC3 - [6:0] */ 1758d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC3_SHIFT 0 /* AIF1TX3MIX_SRC3 - [6:0] */ 1759d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC3_WIDTH 7 /* AIF1TX3MIX_SRC3 - [6:0] */ 1760d5315a23SMark Brown 1761d5315a23SMark Brown /* 1762d5315a23SMark Brown * R1589 (0x635) - AIF1TX3MIX Input 3 Volume 1763d5315a23SMark Brown */ 1764d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL3_MASK 0x00FE /* AIF1TX3MIX_VOL3 - [7:1] */ 1765d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL3_SHIFT 1 /* AIF1TX3MIX_VOL3 - [7:1] */ 1766d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL3_WIDTH 7 /* AIF1TX3MIX_VOL3 - [7:1] */ 1767d5315a23SMark Brown 1768d5315a23SMark Brown /* 1769d5315a23SMark Brown * R1590 (0x636) - AIF1TX3MIX Input 4 Source 1770d5315a23SMark Brown */ 1771d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC4_MASK 0x007F /* AIF1TX3MIX_SRC4 - [6:0] */ 1772d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC4_SHIFT 0 /* AIF1TX3MIX_SRC4 - [6:0] */ 1773d5315a23SMark Brown #define WM2200_AIF1TX3MIX_SRC4_WIDTH 7 /* AIF1TX3MIX_SRC4 - [6:0] */ 1774d5315a23SMark Brown 1775d5315a23SMark Brown /* 1776d5315a23SMark Brown * R1591 (0x637) - AIF1TX3MIX Input 4 Volume 1777d5315a23SMark Brown */ 1778d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL4_MASK 0x00FE /* AIF1TX3MIX_VOL4 - [7:1] */ 1779d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL4_SHIFT 1 /* AIF1TX3MIX_VOL4 - [7:1] */ 1780d5315a23SMark Brown #define WM2200_AIF1TX3MIX_VOL4_WIDTH 7 /* AIF1TX3MIX_VOL4 - [7:1] */ 1781d5315a23SMark Brown 1782d5315a23SMark Brown /* 1783d5315a23SMark Brown * R1592 (0x638) - AIF1TX4MIX Input 1 Source 1784d5315a23SMark Brown */ 1785d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC1_MASK 0x007F /* AIF1TX4MIX_SRC1 - [6:0] */ 1786d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC1_SHIFT 0 /* AIF1TX4MIX_SRC1 - [6:0] */ 1787d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC1_WIDTH 7 /* AIF1TX4MIX_SRC1 - [6:0] */ 1788d5315a23SMark Brown 1789d5315a23SMark Brown /* 1790d5315a23SMark Brown * R1593 (0x639) - AIF1TX4MIX Input 1 Volume 1791d5315a23SMark Brown */ 1792d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL1_MASK 0x00FE /* AIF1TX4MIX_VOL1 - [7:1] */ 1793d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL1_SHIFT 1 /* AIF1TX4MIX_VOL1 - [7:1] */ 1794d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL1_WIDTH 7 /* AIF1TX4MIX_VOL1 - [7:1] */ 1795d5315a23SMark Brown 1796d5315a23SMark Brown /* 1797d5315a23SMark Brown * R1594 (0x63A) - AIF1TX4MIX Input 2 Source 1798d5315a23SMark Brown */ 1799d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC2_MASK 0x007F /* AIF1TX4MIX_SRC2 - [6:0] */ 1800d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC2_SHIFT 0 /* AIF1TX4MIX_SRC2 - [6:0] */ 1801d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC2_WIDTH 7 /* AIF1TX4MIX_SRC2 - [6:0] */ 1802d5315a23SMark Brown 1803d5315a23SMark Brown /* 1804d5315a23SMark Brown * R1595 (0x63B) - AIF1TX4MIX Input 2 Volume 1805d5315a23SMark Brown */ 1806d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL2_MASK 0x00FE /* AIF1TX4MIX_VOL2 - [7:1] */ 1807d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL2_SHIFT 1 /* AIF1TX4MIX_VOL2 - [7:1] */ 1808d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL2_WIDTH 7 /* AIF1TX4MIX_VOL2 - [7:1] */ 1809d5315a23SMark Brown 1810d5315a23SMark Brown /* 1811d5315a23SMark Brown * R1596 (0x63C) - AIF1TX4MIX Input 3 Source 1812d5315a23SMark Brown */ 1813d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC3_MASK 0x007F /* AIF1TX4MIX_SRC3 - [6:0] */ 1814d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC3_SHIFT 0 /* AIF1TX4MIX_SRC3 - [6:0] */ 1815d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC3_WIDTH 7 /* AIF1TX4MIX_SRC3 - [6:0] */ 1816d5315a23SMark Brown 1817d5315a23SMark Brown /* 1818d5315a23SMark Brown * R1597 (0x63D) - AIF1TX4MIX Input 3 Volume 1819d5315a23SMark Brown */ 1820d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL3_MASK 0x00FE /* AIF1TX4MIX_VOL3 - [7:1] */ 1821d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL3_SHIFT 1 /* AIF1TX4MIX_VOL3 - [7:1] */ 1822d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL3_WIDTH 7 /* AIF1TX4MIX_VOL3 - [7:1] */ 1823d5315a23SMark Brown 1824d5315a23SMark Brown /* 1825d5315a23SMark Brown * R1598 (0x63E) - AIF1TX4MIX Input 4 Source 1826d5315a23SMark Brown */ 1827d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC4_MASK 0x007F /* AIF1TX4MIX_SRC4 - [6:0] */ 1828d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC4_SHIFT 0 /* AIF1TX4MIX_SRC4 - [6:0] */ 1829d5315a23SMark Brown #define WM2200_AIF1TX4MIX_SRC4_WIDTH 7 /* AIF1TX4MIX_SRC4 - [6:0] */ 1830d5315a23SMark Brown 1831d5315a23SMark Brown /* 1832d5315a23SMark Brown * R1599 (0x63F) - AIF1TX4MIX Input 4 Volume 1833d5315a23SMark Brown */ 1834d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL4_MASK 0x00FE /* AIF1TX4MIX_VOL4 - [7:1] */ 1835d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL4_SHIFT 1 /* AIF1TX4MIX_VOL4 - [7:1] */ 1836d5315a23SMark Brown #define WM2200_AIF1TX4MIX_VOL4_WIDTH 7 /* AIF1TX4MIX_VOL4 - [7:1] */ 1837d5315a23SMark Brown 1838d5315a23SMark Brown /* 1839d5315a23SMark Brown * R1600 (0x640) - AIF1TX5MIX Input 1 Source 1840d5315a23SMark Brown */ 1841d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC1_MASK 0x007F /* AIF1TX5MIX_SRC1 - [6:0] */ 1842d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC1_SHIFT 0 /* AIF1TX5MIX_SRC1 - [6:0] */ 1843d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC1_WIDTH 7 /* AIF1TX5MIX_SRC1 - [6:0] */ 1844d5315a23SMark Brown 1845d5315a23SMark Brown /* 1846d5315a23SMark Brown * R1601 (0x641) - AIF1TX5MIX Input 1 Volume 1847d5315a23SMark Brown */ 1848d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL1_MASK 0x00FE /* AIF1TX5MIX_VOL1 - [7:1] */ 1849d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL1_SHIFT 1 /* AIF1TX5MIX_VOL1 - [7:1] */ 1850d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL1_WIDTH 7 /* AIF1TX5MIX_VOL1 - [7:1] */ 1851d5315a23SMark Brown 1852d5315a23SMark Brown /* 1853d5315a23SMark Brown * R1602 (0x642) - AIF1TX5MIX Input 2 Source 1854d5315a23SMark Brown */ 1855d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC2_MASK 0x007F /* AIF1TX5MIX_SRC2 - [6:0] */ 1856d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC2_SHIFT 0 /* AIF1TX5MIX_SRC2 - [6:0] */ 1857d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC2_WIDTH 7 /* AIF1TX5MIX_SRC2 - [6:0] */ 1858d5315a23SMark Brown 1859d5315a23SMark Brown /* 1860d5315a23SMark Brown * R1603 (0x643) - AIF1TX5MIX Input 2 Volume 1861d5315a23SMark Brown */ 1862d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL2_MASK 0x00FE /* AIF1TX5MIX_VOL2 - [7:1] */ 1863d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL2_SHIFT 1 /* AIF1TX5MIX_VOL2 - [7:1] */ 1864d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL2_WIDTH 7 /* AIF1TX5MIX_VOL2 - [7:1] */ 1865d5315a23SMark Brown 1866d5315a23SMark Brown /* 1867d5315a23SMark Brown * R1604 (0x644) - AIF1TX5MIX Input 3 Source 1868d5315a23SMark Brown */ 1869d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC3_MASK 0x007F /* AIF1TX5MIX_SRC3 - [6:0] */ 1870d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC3_SHIFT 0 /* AIF1TX5MIX_SRC3 - [6:0] */ 1871d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC3_WIDTH 7 /* AIF1TX5MIX_SRC3 - [6:0] */ 1872d5315a23SMark Brown 1873d5315a23SMark Brown /* 1874d5315a23SMark Brown * R1605 (0x645) - AIF1TX5MIX Input 3 Volume 1875d5315a23SMark Brown */ 1876d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL3_MASK 0x00FE /* AIF1TX5MIX_VOL3 - [7:1] */ 1877d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL3_SHIFT 1 /* AIF1TX5MIX_VOL3 - [7:1] */ 1878d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL3_WIDTH 7 /* AIF1TX5MIX_VOL3 - [7:1] */ 1879d5315a23SMark Brown 1880d5315a23SMark Brown /* 1881d5315a23SMark Brown * R1606 (0x646) - AIF1TX5MIX Input 4 Source 1882d5315a23SMark Brown */ 1883d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC4_MASK 0x007F /* AIF1TX5MIX_SRC4 - [6:0] */ 1884d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC4_SHIFT 0 /* AIF1TX5MIX_SRC4 - [6:0] */ 1885d5315a23SMark Brown #define WM2200_AIF1TX5MIX_SRC4_WIDTH 7 /* AIF1TX5MIX_SRC4 - [6:0] */ 1886d5315a23SMark Brown 1887d5315a23SMark Brown /* 1888d5315a23SMark Brown * R1607 (0x647) - AIF1TX5MIX Input 4 Volume 1889d5315a23SMark Brown */ 1890d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL4_MASK 0x00FE /* AIF1TX5MIX_VOL4 - [7:1] */ 1891d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL4_SHIFT 1 /* AIF1TX5MIX_VOL4 - [7:1] */ 1892d5315a23SMark Brown #define WM2200_AIF1TX5MIX_VOL4_WIDTH 7 /* AIF1TX5MIX_VOL4 - [7:1] */ 1893d5315a23SMark Brown 1894d5315a23SMark Brown /* 1895d5315a23SMark Brown * R1608 (0x648) - AIF1TX6MIX Input 1 Source 1896d5315a23SMark Brown */ 1897d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC1_MASK 0x007F /* AIF1TX6MIX_SRC1 - [6:0] */ 1898d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC1_SHIFT 0 /* AIF1TX6MIX_SRC1 - [6:0] */ 1899d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC1_WIDTH 7 /* AIF1TX6MIX_SRC1 - [6:0] */ 1900d5315a23SMark Brown 1901d5315a23SMark Brown /* 1902d5315a23SMark Brown * R1609 (0x649) - AIF1TX6MIX Input 1 Volume 1903d5315a23SMark Brown */ 1904d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL1_MASK 0x00FE /* AIF1TX6MIX_VOL1 - [7:1] */ 1905d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL1_SHIFT 1 /* AIF1TX6MIX_VOL1 - [7:1] */ 1906d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL1_WIDTH 7 /* AIF1TX6MIX_VOL1 - [7:1] */ 1907d5315a23SMark Brown 1908d5315a23SMark Brown /* 1909d5315a23SMark Brown * R1610 (0x64A) - AIF1TX6MIX Input 2 Source 1910d5315a23SMark Brown */ 1911d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC2_MASK 0x007F /* AIF1TX6MIX_SRC2 - [6:0] */ 1912d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC2_SHIFT 0 /* AIF1TX6MIX_SRC2 - [6:0] */ 1913d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC2_WIDTH 7 /* AIF1TX6MIX_SRC2 - [6:0] */ 1914d5315a23SMark Brown 1915d5315a23SMark Brown /* 1916d5315a23SMark Brown * R1611 (0x64B) - AIF1TX6MIX Input 2 Volume 1917d5315a23SMark Brown */ 1918d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL2_MASK 0x00FE /* AIF1TX6MIX_VOL2 - [7:1] */ 1919d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL2_SHIFT 1 /* AIF1TX6MIX_VOL2 - [7:1] */ 1920d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL2_WIDTH 7 /* AIF1TX6MIX_VOL2 - [7:1] */ 1921d5315a23SMark Brown 1922d5315a23SMark Brown /* 1923d5315a23SMark Brown * R1612 (0x64C) - AIF1TX6MIX Input 3 Source 1924d5315a23SMark Brown */ 1925d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC3_MASK 0x007F /* AIF1TX6MIX_SRC3 - [6:0] */ 1926d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC3_SHIFT 0 /* AIF1TX6MIX_SRC3 - [6:0] */ 1927d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC3_WIDTH 7 /* AIF1TX6MIX_SRC3 - [6:0] */ 1928d5315a23SMark Brown 1929d5315a23SMark Brown /* 1930d5315a23SMark Brown * R1613 (0x64D) - AIF1TX6MIX Input 3 Volume 1931d5315a23SMark Brown */ 1932d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL3_MASK 0x00FE /* AIF1TX6MIX_VOL3 - [7:1] */ 1933d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL3_SHIFT 1 /* AIF1TX6MIX_VOL3 - [7:1] */ 1934d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL3_WIDTH 7 /* AIF1TX6MIX_VOL3 - [7:1] */ 1935d5315a23SMark Brown 1936d5315a23SMark Brown /* 1937d5315a23SMark Brown * R1614 (0x64E) - AIF1TX6MIX Input 4 Source 1938d5315a23SMark Brown */ 1939d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC4_MASK 0x007F /* AIF1TX6MIX_SRC4 - [6:0] */ 1940d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC4_SHIFT 0 /* AIF1TX6MIX_SRC4 - [6:0] */ 1941d5315a23SMark Brown #define WM2200_AIF1TX6MIX_SRC4_WIDTH 7 /* AIF1TX6MIX_SRC4 - [6:0] */ 1942d5315a23SMark Brown 1943d5315a23SMark Brown /* 1944d5315a23SMark Brown * R1615 (0x64F) - AIF1TX6MIX Input 4 Volume 1945d5315a23SMark Brown */ 1946d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL4_MASK 0x00FE /* AIF1TX6MIX_VOL4 - [7:1] */ 1947d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL4_SHIFT 1 /* AIF1TX6MIX_VOL4 - [7:1] */ 1948d5315a23SMark Brown #define WM2200_AIF1TX6MIX_VOL4_WIDTH 7 /* AIF1TX6MIX_VOL4 - [7:1] */ 1949d5315a23SMark Brown 1950d5315a23SMark Brown /* 1951d5315a23SMark Brown * R1616 (0x650) - EQLMIX Input 1 Source 1952d5315a23SMark Brown */ 1953d5315a23SMark Brown #define WM2200_EQLMIX_SRC1_MASK 0x007F /* EQLMIX_SRC1 - [6:0] */ 1954d5315a23SMark Brown #define WM2200_EQLMIX_SRC1_SHIFT 0 /* EQLMIX_SRC1 - [6:0] */ 1955d5315a23SMark Brown #define WM2200_EQLMIX_SRC1_WIDTH 7 /* EQLMIX_SRC1 - [6:0] */ 1956d5315a23SMark Brown 1957d5315a23SMark Brown /* 1958d5315a23SMark Brown * R1617 (0x651) - EQLMIX Input 1 Volume 1959d5315a23SMark Brown */ 1960d5315a23SMark Brown #define WM2200_EQLMIX_VOL1_MASK 0x00FE /* EQLMIX_VOL1 - [7:1] */ 1961d5315a23SMark Brown #define WM2200_EQLMIX_VOL1_SHIFT 1 /* EQLMIX_VOL1 - [7:1] */ 1962d5315a23SMark Brown #define WM2200_EQLMIX_VOL1_WIDTH 7 /* EQLMIX_VOL1 - [7:1] */ 1963d5315a23SMark Brown 1964d5315a23SMark Brown /* 1965d5315a23SMark Brown * R1618 (0x652) - EQLMIX Input 2 Source 1966d5315a23SMark Brown */ 1967d5315a23SMark Brown #define WM2200_EQLMIX_SRC2_MASK 0x007F /* EQLMIX_SRC2 - [6:0] */ 1968d5315a23SMark Brown #define WM2200_EQLMIX_SRC2_SHIFT 0 /* EQLMIX_SRC2 - [6:0] */ 1969d5315a23SMark Brown #define WM2200_EQLMIX_SRC2_WIDTH 7 /* EQLMIX_SRC2 - [6:0] */ 1970d5315a23SMark Brown 1971d5315a23SMark Brown /* 1972d5315a23SMark Brown * R1619 (0x653) - EQLMIX Input 2 Volume 1973d5315a23SMark Brown */ 1974d5315a23SMark Brown #define WM2200_EQLMIX_VOL2_MASK 0x00FE /* EQLMIX_VOL2 - [7:1] */ 1975d5315a23SMark Brown #define WM2200_EQLMIX_VOL2_SHIFT 1 /* EQLMIX_VOL2 - [7:1] */ 1976d5315a23SMark Brown #define WM2200_EQLMIX_VOL2_WIDTH 7 /* EQLMIX_VOL2 - [7:1] */ 1977d5315a23SMark Brown 1978d5315a23SMark Brown /* 1979d5315a23SMark Brown * R1620 (0x654) - EQLMIX Input 3 Source 1980d5315a23SMark Brown */ 1981d5315a23SMark Brown #define WM2200_EQLMIX_SRC3_MASK 0x007F /* EQLMIX_SRC3 - [6:0] */ 1982d5315a23SMark Brown #define WM2200_EQLMIX_SRC3_SHIFT 0 /* EQLMIX_SRC3 - [6:0] */ 1983d5315a23SMark Brown #define WM2200_EQLMIX_SRC3_WIDTH 7 /* EQLMIX_SRC3 - [6:0] */ 1984d5315a23SMark Brown 1985d5315a23SMark Brown /* 1986d5315a23SMark Brown * R1621 (0x655) - EQLMIX Input 3 Volume 1987d5315a23SMark Brown */ 1988d5315a23SMark Brown #define WM2200_EQLMIX_VOL3_MASK 0x00FE /* EQLMIX_VOL3 - [7:1] */ 1989d5315a23SMark Brown #define WM2200_EQLMIX_VOL3_SHIFT 1 /* EQLMIX_VOL3 - [7:1] */ 1990d5315a23SMark Brown #define WM2200_EQLMIX_VOL3_WIDTH 7 /* EQLMIX_VOL3 - [7:1] */ 1991d5315a23SMark Brown 1992d5315a23SMark Brown /* 1993d5315a23SMark Brown * R1622 (0x656) - EQLMIX Input 4 Source 1994d5315a23SMark Brown */ 1995d5315a23SMark Brown #define WM2200_EQLMIX_SRC4_MASK 0x007F /* EQLMIX_SRC4 - [6:0] */ 1996d5315a23SMark Brown #define WM2200_EQLMIX_SRC4_SHIFT 0 /* EQLMIX_SRC4 - [6:0] */ 1997d5315a23SMark Brown #define WM2200_EQLMIX_SRC4_WIDTH 7 /* EQLMIX_SRC4 - [6:0] */ 1998d5315a23SMark Brown 1999d5315a23SMark Brown /* 2000d5315a23SMark Brown * R1623 (0x657) - EQLMIX Input 4 Volume 2001d5315a23SMark Brown */ 2002d5315a23SMark Brown #define WM2200_EQLMIX_VOL4_MASK 0x00FE /* EQLMIX_VOL4 - [7:1] */ 2003d5315a23SMark Brown #define WM2200_EQLMIX_VOL4_SHIFT 1 /* EQLMIX_VOL4 - [7:1] */ 2004d5315a23SMark Brown #define WM2200_EQLMIX_VOL4_WIDTH 7 /* EQLMIX_VOL4 - [7:1] */ 2005d5315a23SMark Brown 2006d5315a23SMark Brown /* 2007d5315a23SMark Brown * R1624 (0x658) - EQRMIX Input 1 Source 2008d5315a23SMark Brown */ 2009d5315a23SMark Brown #define WM2200_EQRMIX_SRC1_MASK 0x007F /* EQRMIX_SRC1 - [6:0] */ 2010d5315a23SMark Brown #define WM2200_EQRMIX_SRC1_SHIFT 0 /* EQRMIX_SRC1 - [6:0] */ 2011d5315a23SMark Brown #define WM2200_EQRMIX_SRC1_WIDTH 7 /* EQRMIX_SRC1 - [6:0] */ 2012d5315a23SMark Brown 2013d5315a23SMark Brown /* 2014d5315a23SMark Brown * R1625 (0x659) - EQRMIX Input 1 Volume 2015d5315a23SMark Brown */ 2016d5315a23SMark Brown #define WM2200_EQRMIX_VOL1_MASK 0x00FE /* EQRMIX_VOL1 - [7:1] */ 2017d5315a23SMark Brown #define WM2200_EQRMIX_VOL1_SHIFT 1 /* EQRMIX_VOL1 - [7:1] */ 2018d5315a23SMark Brown #define WM2200_EQRMIX_VOL1_WIDTH 7 /* EQRMIX_VOL1 - [7:1] */ 2019d5315a23SMark Brown 2020d5315a23SMark Brown /* 2021d5315a23SMark Brown * R1626 (0x65A) - EQRMIX Input 2 Source 2022d5315a23SMark Brown */ 2023d5315a23SMark Brown #define WM2200_EQRMIX_SRC2_MASK 0x007F /* EQRMIX_SRC2 - [6:0] */ 2024d5315a23SMark Brown #define WM2200_EQRMIX_SRC2_SHIFT 0 /* EQRMIX_SRC2 - [6:0] */ 2025d5315a23SMark Brown #define WM2200_EQRMIX_SRC2_WIDTH 7 /* EQRMIX_SRC2 - [6:0] */ 2026d5315a23SMark Brown 2027d5315a23SMark Brown /* 2028d5315a23SMark Brown * R1627 (0x65B) - EQRMIX Input 2 Volume 2029d5315a23SMark Brown */ 2030d5315a23SMark Brown #define WM2200_EQRMIX_VOL2_MASK 0x00FE /* EQRMIX_VOL2 - [7:1] */ 2031d5315a23SMark Brown #define WM2200_EQRMIX_VOL2_SHIFT 1 /* EQRMIX_VOL2 - [7:1] */ 2032d5315a23SMark Brown #define WM2200_EQRMIX_VOL2_WIDTH 7 /* EQRMIX_VOL2 - [7:1] */ 2033d5315a23SMark Brown 2034d5315a23SMark Brown /* 2035d5315a23SMark Brown * R1628 (0x65C) - EQRMIX Input 3 Source 2036d5315a23SMark Brown */ 2037d5315a23SMark Brown #define WM2200_EQRMIX_SRC3_MASK 0x007F /* EQRMIX_SRC3 - [6:0] */ 2038d5315a23SMark Brown #define WM2200_EQRMIX_SRC3_SHIFT 0 /* EQRMIX_SRC3 - [6:0] */ 2039d5315a23SMark Brown #define WM2200_EQRMIX_SRC3_WIDTH 7 /* EQRMIX_SRC3 - [6:0] */ 2040d5315a23SMark Brown 2041d5315a23SMark Brown /* 2042d5315a23SMark Brown * R1629 (0x65D) - EQRMIX Input 3 Volume 2043d5315a23SMark Brown */ 2044d5315a23SMark Brown #define WM2200_EQRMIX_VOL3_MASK 0x00FE /* EQRMIX_VOL3 - [7:1] */ 2045d5315a23SMark Brown #define WM2200_EQRMIX_VOL3_SHIFT 1 /* EQRMIX_VOL3 - [7:1] */ 2046d5315a23SMark Brown #define WM2200_EQRMIX_VOL3_WIDTH 7 /* EQRMIX_VOL3 - [7:1] */ 2047d5315a23SMark Brown 2048d5315a23SMark Brown /* 2049d5315a23SMark Brown * R1630 (0x65E) - EQRMIX Input 4 Source 2050d5315a23SMark Brown */ 2051d5315a23SMark Brown #define WM2200_EQRMIX_SRC4_MASK 0x007F /* EQRMIX_SRC4 - [6:0] */ 2052d5315a23SMark Brown #define WM2200_EQRMIX_SRC4_SHIFT 0 /* EQRMIX_SRC4 - [6:0] */ 2053d5315a23SMark Brown #define WM2200_EQRMIX_SRC4_WIDTH 7 /* EQRMIX_SRC4 - [6:0] */ 2054d5315a23SMark Brown 2055d5315a23SMark Brown /* 2056d5315a23SMark Brown * R1631 (0x65F) - EQRMIX Input 4 Volume 2057d5315a23SMark Brown */ 2058d5315a23SMark Brown #define WM2200_EQRMIX_VOL4_MASK 0x00FE /* EQRMIX_VOL4 - [7:1] */ 2059d5315a23SMark Brown #define WM2200_EQRMIX_VOL4_SHIFT 1 /* EQRMIX_VOL4 - [7:1] */ 2060d5315a23SMark Brown #define WM2200_EQRMIX_VOL4_WIDTH 7 /* EQRMIX_VOL4 - [7:1] */ 2061d5315a23SMark Brown 2062d5315a23SMark Brown /* 2063d5315a23SMark Brown * R1632 (0x660) - LHPF1MIX Input 1 Source 2064d5315a23SMark Brown */ 2065d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC1_MASK 0x007F /* LHPF1MIX_SRC1 - [6:0] */ 2066d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC1_SHIFT 0 /* LHPF1MIX_SRC1 - [6:0] */ 2067d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC1_WIDTH 7 /* LHPF1MIX_SRC1 - [6:0] */ 2068d5315a23SMark Brown 2069d5315a23SMark Brown /* 2070d5315a23SMark Brown * R1633 (0x661) - LHPF1MIX Input 1 Volume 2071d5315a23SMark Brown */ 2072d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL1_MASK 0x00FE /* LHPF1MIX_VOL1 - [7:1] */ 2073d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL1_SHIFT 1 /* LHPF1MIX_VOL1 - [7:1] */ 2074d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL1_WIDTH 7 /* LHPF1MIX_VOL1 - [7:1] */ 2075d5315a23SMark Brown 2076d5315a23SMark Brown /* 2077d5315a23SMark Brown * R1634 (0x662) - LHPF1MIX Input 2 Source 2078d5315a23SMark Brown */ 2079d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC2_MASK 0x007F /* LHPF1MIX_SRC2 - [6:0] */ 2080d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC2_SHIFT 0 /* LHPF1MIX_SRC2 - [6:0] */ 2081d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC2_WIDTH 7 /* LHPF1MIX_SRC2 - [6:0] */ 2082d5315a23SMark Brown 2083d5315a23SMark Brown /* 2084d5315a23SMark Brown * R1635 (0x663) - LHPF1MIX Input 2 Volume 2085d5315a23SMark Brown */ 2086d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL2_MASK 0x00FE /* LHPF1MIX_VOL2 - [7:1] */ 2087d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL2_SHIFT 1 /* LHPF1MIX_VOL2 - [7:1] */ 2088d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL2_WIDTH 7 /* LHPF1MIX_VOL2 - [7:1] */ 2089d5315a23SMark Brown 2090d5315a23SMark Brown /* 2091d5315a23SMark Brown * R1636 (0x664) - LHPF1MIX Input 3 Source 2092d5315a23SMark Brown */ 2093d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC3_MASK 0x007F /* LHPF1MIX_SRC3 - [6:0] */ 2094d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC3_SHIFT 0 /* LHPF1MIX_SRC3 - [6:0] */ 2095d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC3_WIDTH 7 /* LHPF1MIX_SRC3 - [6:0] */ 2096d5315a23SMark Brown 2097d5315a23SMark Brown /* 2098d5315a23SMark Brown * R1637 (0x665) - LHPF1MIX Input 3 Volume 2099d5315a23SMark Brown */ 2100d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL3_MASK 0x00FE /* LHPF1MIX_VOL3 - [7:1] */ 2101d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL3_SHIFT 1 /* LHPF1MIX_VOL3 - [7:1] */ 2102d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL3_WIDTH 7 /* LHPF1MIX_VOL3 - [7:1] */ 2103d5315a23SMark Brown 2104d5315a23SMark Brown /* 2105d5315a23SMark Brown * R1638 (0x666) - LHPF1MIX Input 4 Source 2106d5315a23SMark Brown */ 2107d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC4_MASK 0x007F /* LHPF1MIX_SRC4 - [6:0] */ 2108d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC4_SHIFT 0 /* LHPF1MIX_SRC4 - [6:0] */ 2109d5315a23SMark Brown #define WM2200_LHPF1MIX_SRC4_WIDTH 7 /* LHPF1MIX_SRC4 - [6:0] */ 2110d5315a23SMark Brown 2111d5315a23SMark Brown /* 2112d5315a23SMark Brown * R1639 (0x667) - LHPF1MIX Input 4 Volume 2113d5315a23SMark Brown */ 2114d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL4_MASK 0x00FE /* LHPF1MIX_VOL4 - [7:1] */ 2115d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL4_SHIFT 1 /* LHPF1MIX_VOL4 - [7:1] */ 2116d5315a23SMark Brown #define WM2200_LHPF1MIX_VOL4_WIDTH 7 /* LHPF1MIX_VOL4 - [7:1] */ 2117d5315a23SMark Brown 2118d5315a23SMark Brown /* 2119d5315a23SMark Brown * R1640 (0x668) - LHPF2MIX Input 1 Source 2120d5315a23SMark Brown */ 2121d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC1_MASK 0x007F /* LHPF2MIX_SRC1 - [6:0] */ 2122d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC1_SHIFT 0 /* LHPF2MIX_SRC1 - [6:0] */ 2123d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC1_WIDTH 7 /* LHPF2MIX_SRC1 - [6:0] */ 2124d5315a23SMark Brown 2125d5315a23SMark Brown /* 2126d5315a23SMark Brown * R1641 (0x669) - LHPF2MIX Input 1 Volume 2127d5315a23SMark Brown */ 2128d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL1_MASK 0x00FE /* LHPF2MIX_VOL1 - [7:1] */ 2129d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL1_SHIFT 1 /* LHPF2MIX_VOL1 - [7:1] */ 2130d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL1_WIDTH 7 /* LHPF2MIX_VOL1 - [7:1] */ 2131d5315a23SMark Brown 2132d5315a23SMark Brown /* 2133d5315a23SMark Brown * R1642 (0x66A) - LHPF2MIX Input 2 Source 2134d5315a23SMark Brown */ 2135d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC2_MASK 0x007F /* LHPF2MIX_SRC2 - [6:0] */ 2136d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC2_SHIFT 0 /* LHPF2MIX_SRC2 - [6:0] */ 2137d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC2_WIDTH 7 /* LHPF2MIX_SRC2 - [6:0] */ 2138d5315a23SMark Brown 2139d5315a23SMark Brown /* 2140d5315a23SMark Brown * R1643 (0x66B) - LHPF2MIX Input 2 Volume 2141d5315a23SMark Brown */ 2142d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL2_MASK 0x00FE /* LHPF2MIX_VOL2 - [7:1] */ 2143d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL2_SHIFT 1 /* LHPF2MIX_VOL2 - [7:1] */ 2144d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL2_WIDTH 7 /* LHPF2MIX_VOL2 - [7:1] */ 2145d5315a23SMark Brown 2146d5315a23SMark Brown /* 2147d5315a23SMark Brown * R1644 (0x66C) - LHPF2MIX Input 3 Source 2148d5315a23SMark Brown */ 2149d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC3_MASK 0x007F /* LHPF2MIX_SRC3 - [6:0] */ 2150d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC3_SHIFT 0 /* LHPF2MIX_SRC3 - [6:0] */ 2151d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC3_WIDTH 7 /* LHPF2MIX_SRC3 - [6:0] */ 2152d5315a23SMark Brown 2153d5315a23SMark Brown /* 2154d5315a23SMark Brown * R1645 (0x66D) - LHPF2MIX Input 3 Volume 2155d5315a23SMark Brown */ 2156d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL3_MASK 0x00FE /* LHPF2MIX_VOL3 - [7:1] */ 2157d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL3_SHIFT 1 /* LHPF2MIX_VOL3 - [7:1] */ 2158d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL3_WIDTH 7 /* LHPF2MIX_VOL3 - [7:1] */ 2159d5315a23SMark Brown 2160d5315a23SMark Brown /* 2161d5315a23SMark Brown * R1646 (0x66E) - LHPF2MIX Input 4 Source 2162d5315a23SMark Brown */ 2163d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC4_MASK 0x007F /* LHPF2MIX_SRC4 - [6:0] */ 2164d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC4_SHIFT 0 /* LHPF2MIX_SRC4 - [6:0] */ 2165d5315a23SMark Brown #define WM2200_LHPF2MIX_SRC4_WIDTH 7 /* LHPF2MIX_SRC4 - [6:0] */ 2166d5315a23SMark Brown 2167d5315a23SMark Brown /* 2168d5315a23SMark Brown * R1647 (0x66F) - LHPF2MIX Input 4 Volume 2169d5315a23SMark Brown */ 2170d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL4_MASK 0x00FE /* LHPF2MIX_VOL4 - [7:1] */ 2171d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL4_SHIFT 1 /* LHPF2MIX_VOL4 - [7:1] */ 2172d5315a23SMark Brown #define WM2200_LHPF2MIX_VOL4_WIDTH 7 /* LHPF2MIX_VOL4 - [7:1] */ 2173d5315a23SMark Brown 2174d5315a23SMark Brown /* 2175d5315a23SMark Brown * R1648 (0x670) - DSP1LMIX Input 1 Source 2176d5315a23SMark Brown */ 2177d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC1_MASK 0x007F /* DSP1LMIX_SRC1 - [6:0] */ 2178d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC1_SHIFT 0 /* DSP1LMIX_SRC1 - [6:0] */ 2179d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC1_WIDTH 7 /* DSP1LMIX_SRC1 - [6:0] */ 2180d5315a23SMark Brown 2181d5315a23SMark Brown /* 2182d5315a23SMark Brown * R1649 (0x671) - DSP1LMIX Input 1 Volume 2183d5315a23SMark Brown */ 2184d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL1_MASK 0x00FE /* DSP1LMIX_VOL1 - [7:1] */ 2185d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL1_SHIFT 1 /* DSP1LMIX_VOL1 - [7:1] */ 2186d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL1_WIDTH 7 /* DSP1LMIX_VOL1 - [7:1] */ 2187d5315a23SMark Brown 2188d5315a23SMark Brown /* 2189d5315a23SMark Brown * R1650 (0x672) - DSP1LMIX Input 2 Source 2190d5315a23SMark Brown */ 2191d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC2_MASK 0x007F /* DSP1LMIX_SRC2 - [6:0] */ 2192d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC2_SHIFT 0 /* DSP1LMIX_SRC2 - [6:0] */ 2193d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC2_WIDTH 7 /* DSP1LMIX_SRC2 - [6:0] */ 2194d5315a23SMark Brown 2195d5315a23SMark Brown /* 2196d5315a23SMark Brown * R1651 (0x673) - DSP1LMIX Input 2 Volume 2197d5315a23SMark Brown */ 2198d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL2_MASK 0x00FE /* DSP1LMIX_VOL2 - [7:1] */ 2199d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL2_SHIFT 1 /* DSP1LMIX_VOL2 - [7:1] */ 2200d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL2_WIDTH 7 /* DSP1LMIX_VOL2 - [7:1] */ 2201d5315a23SMark Brown 2202d5315a23SMark Brown /* 2203d5315a23SMark Brown * R1652 (0x674) - DSP1LMIX Input 3 Source 2204d5315a23SMark Brown */ 2205d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC3_MASK 0x007F /* DSP1LMIX_SRC3 - [6:0] */ 2206d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC3_SHIFT 0 /* DSP1LMIX_SRC3 - [6:0] */ 2207d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC3_WIDTH 7 /* DSP1LMIX_SRC3 - [6:0] */ 2208d5315a23SMark Brown 2209d5315a23SMark Brown /* 2210d5315a23SMark Brown * R1653 (0x675) - DSP1LMIX Input 3 Volume 2211d5315a23SMark Brown */ 2212d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL3_MASK 0x00FE /* DSP1LMIX_VOL3 - [7:1] */ 2213d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL3_SHIFT 1 /* DSP1LMIX_VOL3 - [7:1] */ 2214d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL3_WIDTH 7 /* DSP1LMIX_VOL3 - [7:1] */ 2215d5315a23SMark Brown 2216d5315a23SMark Brown /* 2217d5315a23SMark Brown * R1654 (0x676) - DSP1LMIX Input 4 Source 2218d5315a23SMark Brown */ 2219d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC4_MASK 0x007F /* DSP1LMIX_SRC4 - [6:0] */ 2220d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC4_SHIFT 0 /* DSP1LMIX_SRC4 - [6:0] */ 2221d5315a23SMark Brown #define WM2200_DSP1LMIX_SRC4_WIDTH 7 /* DSP1LMIX_SRC4 - [6:0] */ 2222d5315a23SMark Brown 2223d5315a23SMark Brown /* 2224d5315a23SMark Brown * R1655 (0x677) - DSP1LMIX Input 4 Volume 2225d5315a23SMark Brown */ 2226d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL4_MASK 0x00FE /* DSP1LMIX_VOL4 - [7:1] */ 2227d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL4_SHIFT 1 /* DSP1LMIX_VOL4 - [7:1] */ 2228d5315a23SMark Brown #define WM2200_DSP1LMIX_VOL4_WIDTH 7 /* DSP1LMIX_VOL4 - [7:1] */ 2229d5315a23SMark Brown 2230d5315a23SMark Brown /* 2231d5315a23SMark Brown * R1656 (0x678) - DSP1RMIX Input 1 Source 2232d5315a23SMark Brown */ 2233d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC1_MASK 0x007F /* DSP1RMIX_SRC1 - [6:0] */ 2234d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC1_SHIFT 0 /* DSP1RMIX_SRC1 - [6:0] */ 2235d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC1_WIDTH 7 /* DSP1RMIX_SRC1 - [6:0] */ 2236d5315a23SMark Brown 2237d5315a23SMark Brown /* 2238d5315a23SMark Brown * R1657 (0x679) - DSP1RMIX Input 1 Volume 2239d5315a23SMark Brown */ 2240d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL1_MASK 0x00FE /* DSP1RMIX_VOL1 - [7:1] */ 2241d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL1_SHIFT 1 /* DSP1RMIX_VOL1 - [7:1] */ 2242d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL1_WIDTH 7 /* DSP1RMIX_VOL1 - [7:1] */ 2243d5315a23SMark Brown 2244d5315a23SMark Brown /* 2245d5315a23SMark Brown * R1658 (0x67A) - DSP1RMIX Input 2 Source 2246d5315a23SMark Brown */ 2247d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC2_MASK 0x007F /* DSP1RMIX_SRC2 - [6:0] */ 2248d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC2_SHIFT 0 /* DSP1RMIX_SRC2 - [6:0] */ 2249d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC2_WIDTH 7 /* DSP1RMIX_SRC2 - [6:0] */ 2250d5315a23SMark Brown 2251d5315a23SMark Brown /* 2252d5315a23SMark Brown * R1659 (0x67B) - DSP1RMIX Input 2 Volume 2253d5315a23SMark Brown */ 2254d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL2_MASK 0x00FE /* DSP1RMIX_VOL2 - [7:1] */ 2255d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL2_SHIFT 1 /* DSP1RMIX_VOL2 - [7:1] */ 2256d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL2_WIDTH 7 /* DSP1RMIX_VOL2 - [7:1] */ 2257d5315a23SMark Brown 2258d5315a23SMark Brown /* 2259d5315a23SMark Brown * R1660 (0x67C) - DSP1RMIX Input 3 Source 2260d5315a23SMark Brown */ 2261d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC3_MASK 0x007F /* DSP1RMIX_SRC3 - [6:0] */ 2262d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC3_SHIFT 0 /* DSP1RMIX_SRC3 - [6:0] */ 2263d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC3_WIDTH 7 /* DSP1RMIX_SRC3 - [6:0] */ 2264d5315a23SMark Brown 2265d5315a23SMark Brown /* 2266d5315a23SMark Brown * R1661 (0x67D) - DSP1RMIX Input 3 Volume 2267d5315a23SMark Brown */ 2268d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL3_MASK 0x00FE /* DSP1RMIX_VOL3 - [7:1] */ 2269d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL3_SHIFT 1 /* DSP1RMIX_VOL3 - [7:1] */ 2270d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL3_WIDTH 7 /* DSP1RMIX_VOL3 - [7:1] */ 2271d5315a23SMark Brown 2272d5315a23SMark Brown /* 2273d5315a23SMark Brown * R1662 (0x67E) - DSP1RMIX Input 4 Source 2274d5315a23SMark Brown */ 2275d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC4_MASK 0x007F /* DSP1RMIX_SRC4 - [6:0] */ 2276d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC4_SHIFT 0 /* DSP1RMIX_SRC4 - [6:0] */ 2277d5315a23SMark Brown #define WM2200_DSP1RMIX_SRC4_WIDTH 7 /* DSP1RMIX_SRC4 - [6:0] */ 2278d5315a23SMark Brown 2279d5315a23SMark Brown /* 2280d5315a23SMark Brown * R1663 (0x67F) - DSP1RMIX Input 4 Volume 2281d5315a23SMark Brown */ 2282d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL4_MASK 0x00FE /* DSP1RMIX_VOL4 - [7:1] */ 2283d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL4_SHIFT 1 /* DSP1RMIX_VOL4 - [7:1] */ 2284d5315a23SMark Brown #define WM2200_DSP1RMIX_VOL4_WIDTH 7 /* DSP1RMIX_VOL4 - [7:1] */ 2285d5315a23SMark Brown 2286d5315a23SMark Brown /* 2287d5315a23SMark Brown * R1664 (0x680) - DSP1AUX1MIX Input 1 Source 2288d5315a23SMark Brown */ 2289d5315a23SMark Brown #define WM2200_DSP1AUX1MIX_SRC1_MASK 0x007F /* DSP1AUX1MIX_SRC1 - [6:0] */ 2290d5315a23SMark Brown #define WM2200_DSP1AUX1MIX_SRC1_SHIFT 0 /* DSP1AUX1MIX_SRC1 - [6:0] */ 2291d5315a23SMark Brown #define WM2200_DSP1AUX1MIX_SRC1_WIDTH 7 /* DSP1AUX1MIX_SRC1 - [6:0] */ 2292d5315a23SMark Brown 2293d5315a23SMark Brown /* 2294d5315a23SMark Brown * R1665 (0x681) - DSP1AUX2MIX Input 1 Source 2295d5315a23SMark Brown */ 2296d5315a23SMark Brown #define WM2200_DSP1AUX2MIX_SRC1_MASK 0x007F /* DSP1AUX2MIX_SRC1 - [6:0] */ 2297d5315a23SMark Brown #define WM2200_DSP1AUX2MIX_SRC1_SHIFT 0 /* DSP1AUX2MIX_SRC1 - [6:0] */ 2298d5315a23SMark Brown #define WM2200_DSP1AUX2MIX_SRC1_WIDTH 7 /* DSP1AUX2MIX_SRC1 - [6:0] */ 2299d5315a23SMark Brown 2300d5315a23SMark Brown /* 2301d5315a23SMark Brown * R1666 (0x682) - DSP1AUX3MIX Input 1 Source 2302d5315a23SMark Brown */ 2303d5315a23SMark Brown #define WM2200_DSP1AUX3MIX_SRC1_MASK 0x007F /* DSP1AUX3MIX_SRC1 - [6:0] */ 2304d5315a23SMark Brown #define WM2200_DSP1AUX3MIX_SRC1_SHIFT 0 /* DSP1AUX3MIX_SRC1 - [6:0] */ 2305d5315a23SMark Brown #define WM2200_DSP1AUX3MIX_SRC1_WIDTH 7 /* DSP1AUX3MIX_SRC1 - [6:0] */ 2306d5315a23SMark Brown 2307d5315a23SMark Brown /* 2308d5315a23SMark Brown * R1667 (0x683) - DSP1AUX4MIX Input 1 Source 2309d5315a23SMark Brown */ 2310d5315a23SMark Brown #define WM2200_DSP1AUX4MIX_SRC1_MASK 0x007F /* DSP1AUX4MIX_SRC1 - [6:0] */ 2311d5315a23SMark Brown #define WM2200_DSP1AUX4MIX_SRC1_SHIFT 0 /* DSP1AUX4MIX_SRC1 - [6:0] */ 2312d5315a23SMark Brown #define WM2200_DSP1AUX4MIX_SRC1_WIDTH 7 /* DSP1AUX4MIX_SRC1 - [6:0] */ 2313d5315a23SMark Brown 2314d5315a23SMark Brown /* 2315d5315a23SMark Brown * R1668 (0x684) - DSP1AUX5MIX Input 1 Source 2316d5315a23SMark Brown */ 2317d5315a23SMark Brown #define WM2200_DSP1AUX5MIX_SRC1_MASK 0x007F /* DSP1AUX5MIX_SRC1 - [6:0] */ 2318d5315a23SMark Brown #define WM2200_DSP1AUX5MIX_SRC1_SHIFT 0 /* DSP1AUX5MIX_SRC1 - [6:0] */ 2319d5315a23SMark Brown #define WM2200_DSP1AUX5MIX_SRC1_WIDTH 7 /* DSP1AUX5MIX_SRC1 - [6:0] */ 2320d5315a23SMark Brown 2321d5315a23SMark Brown /* 2322d5315a23SMark Brown * R1669 (0x685) - DSP1AUX6MIX Input 1 Source 2323d5315a23SMark Brown */ 2324d5315a23SMark Brown #define WM2200_DSP1AUX6MIX_SRC1_MASK 0x007F /* DSP1AUX6MIX_SRC1 - [6:0] */ 2325d5315a23SMark Brown #define WM2200_DSP1AUX6MIX_SRC1_SHIFT 0 /* DSP1AUX6MIX_SRC1 - [6:0] */ 2326d5315a23SMark Brown #define WM2200_DSP1AUX6MIX_SRC1_WIDTH 7 /* DSP1AUX6MIX_SRC1 - [6:0] */ 2327d5315a23SMark Brown 2328d5315a23SMark Brown /* 2329d5315a23SMark Brown * R1670 (0x686) - DSP2LMIX Input 1 Source 2330d5315a23SMark Brown */ 2331d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC1_MASK 0x007F /* DSP2LMIX_SRC1 - [6:0] */ 2332d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC1_SHIFT 0 /* DSP2LMIX_SRC1 - [6:0] */ 2333d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC1_WIDTH 7 /* DSP2LMIX_SRC1 - [6:0] */ 2334d5315a23SMark Brown 2335d5315a23SMark Brown /* 2336d5315a23SMark Brown * R1671 (0x687) - DSP2LMIX Input 1 Volume 2337d5315a23SMark Brown */ 2338d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL1_MASK 0x00FE /* DSP2LMIX_VOL1 - [7:1] */ 2339d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL1_SHIFT 1 /* DSP2LMIX_VOL1 - [7:1] */ 2340d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL1_WIDTH 7 /* DSP2LMIX_VOL1 - [7:1] */ 2341d5315a23SMark Brown 2342d5315a23SMark Brown /* 2343d5315a23SMark Brown * R1672 (0x688) - DSP2LMIX Input 2 Source 2344d5315a23SMark Brown */ 2345d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC2_MASK 0x007F /* DSP2LMIX_SRC2 - [6:0] */ 2346d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC2_SHIFT 0 /* DSP2LMIX_SRC2 - [6:0] */ 2347d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC2_WIDTH 7 /* DSP2LMIX_SRC2 - [6:0] */ 2348d5315a23SMark Brown 2349d5315a23SMark Brown /* 2350d5315a23SMark Brown * R1673 (0x689) - DSP2LMIX Input 2 Volume 2351d5315a23SMark Brown */ 2352d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL2_MASK 0x00FE /* DSP2LMIX_VOL2 - [7:1] */ 2353d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL2_SHIFT 1 /* DSP2LMIX_VOL2 - [7:1] */ 2354d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL2_WIDTH 7 /* DSP2LMIX_VOL2 - [7:1] */ 2355d5315a23SMark Brown 2356d5315a23SMark Brown /* 2357d5315a23SMark Brown * R1674 (0x68A) - DSP2LMIX Input 3 Source 2358d5315a23SMark Brown */ 2359d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC3_MASK 0x007F /* DSP2LMIX_SRC3 - [6:0] */ 2360d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC3_SHIFT 0 /* DSP2LMIX_SRC3 - [6:0] */ 2361d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC3_WIDTH 7 /* DSP2LMIX_SRC3 - [6:0] */ 2362d5315a23SMark Brown 2363d5315a23SMark Brown /* 2364d5315a23SMark Brown * R1675 (0x68B) - DSP2LMIX Input 3 Volume 2365d5315a23SMark Brown */ 2366d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL3_MASK 0x00FE /* DSP2LMIX_VOL3 - [7:1] */ 2367d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL3_SHIFT 1 /* DSP2LMIX_VOL3 - [7:1] */ 2368d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL3_WIDTH 7 /* DSP2LMIX_VOL3 - [7:1] */ 2369d5315a23SMark Brown 2370d5315a23SMark Brown /* 2371d5315a23SMark Brown * R1676 (0x68C) - DSP2LMIX Input 4 Source 2372d5315a23SMark Brown */ 2373d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC4_MASK 0x007F /* DSP2LMIX_SRC4 - [6:0] */ 2374d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC4_SHIFT 0 /* DSP2LMIX_SRC4 - [6:0] */ 2375d5315a23SMark Brown #define WM2200_DSP2LMIX_SRC4_WIDTH 7 /* DSP2LMIX_SRC4 - [6:0] */ 2376d5315a23SMark Brown 2377d5315a23SMark Brown /* 2378d5315a23SMark Brown * R1677 (0x68D) - DSP2LMIX Input 4 Volume 2379d5315a23SMark Brown */ 2380d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL4_MASK 0x00FE /* DSP2LMIX_VOL4 - [7:1] */ 2381d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL4_SHIFT 1 /* DSP2LMIX_VOL4 - [7:1] */ 2382d5315a23SMark Brown #define WM2200_DSP2LMIX_VOL4_WIDTH 7 /* DSP2LMIX_VOL4 - [7:1] */ 2383d5315a23SMark Brown 2384d5315a23SMark Brown /* 2385d5315a23SMark Brown * R1678 (0x68E) - DSP2RMIX Input 1 Source 2386d5315a23SMark Brown */ 2387d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC1_MASK 0x007F /* DSP2RMIX_SRC1 - [6:0] */ 2388d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC1_SHIFT 0 /* DSP2RMIX_SRC1 - [6:0] */ 2389d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC1_WIDTH 7 /* DSP2RMIX_SRC1 - [6:0] */ 2390d5315a23SMark Brown 2391d5315a23SMark Brown /* 2392d5315a23SMark Brown * R1679 (0x68F) - DSP2RMIX Input 1 Volume 2393d5315a23SMark Brown */ 2394d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL1_MASK 0x00FE /* DSP2RMIX_VOL1 - [7:1] */ 2395d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL1_SHIFT 1 /* DSP2RMIX_VOL1 - [7:1] */ 2396d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL1_WIDTH 7 /* DSP2RMIX_VOL1 - [7:1] */ 2397d5315a23SMark Brown 2398d5315a23SMark Brown /* 2399d5315a23SMark Brown * R1680 (0x690) - DSP2RMIX Input 2 Source 2400d5315a23SMark Brown */ 2401d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC2_MASK 0x007F /* DSP2RMIX_SRC2 - [6:0] */ 2402d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC2_SHIFT 0 /* DSP2RMIX_SRC2 - [6:0] */ 2403d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC2_WIDTH 7 /* DSP2RMIX_SRC2 - [6:0] */ 2404d5315a23SMark Brown 2405d5315a23SMark Brown /* 2406d5315a23SMark Brown * R1681 (0x691) - DSP2RMIX Input 2 Volume 2407d5315a23SMark Brown */ 2408d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL2_MASK 0x00FE /* DSP2RMIX_VOL2 - [7:1] */ 2409d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL2_SHIFT 1 /* DSP2RMIX_VOL2 - [7:1] */ 2410d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL2_WIDTH 7 /* DSP2RMIX_VOL2 - [7:1] */ 2411d5315a23SMark Brown 2412d5315a23SMark Brown /* 2413d5315a23SMark Brown * R1682 (0x692) - DSP2RMIX Input 3 Source 2414d5315a23SMark Brown */ 2415d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC3_MASK 0x007F /* DSP2RMIX_SRC3 - [6:0] */ 2416d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC3_SHIFT 0 /* DSP2RMIX_SRC3 - [6:0] */ 2417d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC3_WIDTH 7 /* DSP2RMIX_SRC3 - [6:0] */ 2418d5315a23SMark Brown 2419d5315a23SMark Brown /* 2420d5315a23SMark Brown * R1683 (0x693) - DSP2RMIX Input 3 Volume 2421d5315a23SMark Brown */ 2422d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL3_MASK 0x00FE /* DSP2RMIX_VOL3 - [7:1] */ 2423d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL3_SHIFT 1 /* DSP2RMIX_VOL3 - [7:1] */ 2424d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL3_WIDTH 7 /* DSP2RMIX_VOL3 - [7:1] */ 2425d5315a23SMark Brown 2426d5315a23SMark Brown /* 2427d5315a23SMark Brown * R1684 (0x694) - DSP2RMIX Input 4 Source 2428d5315a23SMark Brown */ 2429d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC4_MASK 0x007F /* DSP2RMIX_SRC4 - [6:0] */ 2430d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC4_SHIFT 0 /* DSP2RMIX_SRC4 - [6:0] */ 2431d5315a23SMark Brown #define WM2200_DSP2RMIX_SRC4_WIDTH 7 /* DSP2RMIX_SRC4 - [6:0] */ 2432d5315a23SMark Brown 2433d5315a23SMark Brown /* 2434d5315a23SMark Brown * R1685 (0x695) - DSP2RMIX Input 4 Volume 2435d5315a23SMark Brown */ 2436d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL4_MASK 0x00FE /* DSP2RMIX_VOL4 - [7:1] */ 2437d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL4_SHIFT 1 /* DSP2RMIX_VOL4 - [7:1] */ 2438d5315a23SMark Brown #define WM2200_DSP2RMIX_VOL4_WIDTH 7 /* DSP2RMIX_VOL4 - [7:1] */ 2439d5315a23SMark Brown 2440d5315a23SMark Brown /* 2441d5315a23SMark Brown * R1686 (0x696) - DSP2AUX1MIX Input 1 Source 2442d5315a23SMark Brown */ 2443d5315a23SMark Brown #define WM2200_DSP2AUX1MIX_SRC1_MASK 0x007F /* DSP2AUX1MIX_SRC1 - [6:0] */ 2444d5315a23SMark Brown #define WM2200_DSP2AUX1MIX_SRC1_SHIFT 0 /* DSP2AUX1MIX_SRC1 - [6:0] */ 2445d5315a23SMark Brown #define WM2200_DSP2AUX1MIX_SRC1_WIDTH 7 /* DSP2AUX1MIX_SRC1 - [6:0] */ 2446d5315a23SMark Brown 2447d5315a23SMark Brown /* 2448d5315a23SMark Brown * R1687 (0x697) - DSP2AUX2MIX Input 1 Source 2449d5315a23SMark Brown */ 2450d5315a23SMark Brown #define WM2200_DSP2AUX2MIX_SRC1_MASK 0x007F /* DSP2AUX2MIX_SRC1 - [6:0] */ 2451d5315a23SMark Brown #define WM2200_DSP2AUX2MIX_SRC1_SHIFT 0 /* DSP2AUX2MIX_SRC1 - [6:0] */ 2452d5315a23SMark Brown #define WM2200_DSP2AUX2MIX_SRC1_WIDTH 7 /* DSP2AUX2MIX_SRC1 - [6:0] */ 2453d5315a23SMark Brown 2454d5315a23SMark Brown /* 2455d5315a23SMark Brown * R1688 (0x698) - DSP2AUX3MIX Input 1 Source 2456d5315a23SMark Brown */ 2457d5315a23SMark Brown #define WM2200_DSP2AUX3MIX_SRC1_MASK 0x007F /* DSP2AUX3MIX_SRC1 - [6:0] */ 2458d5315a23SMark Brown #define WM2200_DSP2AUX3MIX_SRC1_SHIFT 0 /* DSP2AUX3MIX_SRC1 - [6:0] */ 2459d5315a23SMark Brown #define WM2200_DSP2AUX3MIX_SRC1_WIDTH 7 /* DSP2AUX3MIX_SRC1 - [6:0] */ 2460d5315a23SMark Brown 2461d5315a23SMark Brown /* 2462d5315a23SMark Brown * R1689 (0x699) - DSP2AUX4MIX Input 1 Source 2463d5315a23SMark Brown */ 2464d5315a23SMark Brown #define WM2200_DSP2AUX4MIX_SRC1_MASK 0x007F /* DSP2AUX4MIX_SRC1 - [6:0] */ 2465d5315a23SMark Brown #define WM2200_DSP2AUX4MIX_SRC1_SHIFT 0 /* DSP2AUX4MIX_SRC1 - [6:0] */ 2466d5315a23SMark Brown #define WM2200_DSP2AUX4MIX_SRC1_WIDTH 7 /* DSP2AUX4MIX_SRC1 - [6:0] */ 2467d5315a23SMark Brown 2468d5315a23SMark Brown /* 2469d5315a23SMark Brown * R1690 (0x69A) - DSP2AUX5MIX Input 1 Source 2470d5315a23SMark Brown */ 2471d5315a23SMark Brown #define WM2200_DSP2AUX5MIX_SRC1_MASK 0x007F /* DSP2AUX5MIX_SRC1 - [6:0] */ 2472d5315a23SMark Brown #define WM2200_DSP2AUX5MIX_SRC1_SHIFT 0 /* DSP2AUX5MIX_SRC1 - [6:0] */ 2473d5315a23SMark Brown #define WM2200_DSP2AUX5MIX_SRC1_WIDTH 7 /* DSP2AUX5MIX_SRC1 - [6:0] */ 2474d5315a23SMark Brown 2475d5315a23SMark Brown /* 2476d5315a23SMark Brown * R1691 (0x69B) - DSP2AUX6MIX Input 1 Source 2477d5315a23SMark Brown */ 2478d5315a23SMark Brown #define WM2200_DSP2AUX6MIX_SRC1_MASK 0x007F /* DSP2AUX6MIX_SRC1 - [6:0] */ 2479d5315a23SMark Brown #define WM2200_DSP2AUX6MIX_SRC1_SHIFT 0 /* DSP2AUX6MIX_SRC1 - [6:0] */ 2480d5315a23SMark Brown #define WM2200_DSP2AUX6MIX_SRC1_WIDTH 7 /* DSP2AUX6MIX_SRC1 - [6:0] */ 2481d5315a23SMark Brown 2482d5315a23SMark Brown /* 2483d5315a23SMark Brown * R1792 (0x700) - GPIO CTRL 1 2484d5315a23SMark Brown */ 2485d5315a23SMark Brown #define WM2200_GP1_DIR 0x8000 /* GP1_DIR */ 2486d5315a23SMark Brown #define WM2200_GP1_DIR_MASK 0x8000 /* GP1_DIR */ 2487d5315a23SMark Brown #define WM2200_GP1_DIR_SHIFT 15 /* GP1_DIR */ 2488d5315a23SMark Brown #define WM2200_GP1_DIR_WIDTH 1 /* GP1_DIR */ 2489d5315a23SMark Brown #define WM2200_GP1_PU 0x4000 /* GP1_PU */ 2490d5315a23SMark Brown #define WM2200_GP1_PU_MASK 0x4000 /* GP1_PU */ 2491d5315a23SMark Brown #define WM2200_GP1_PU_SHIFT 14 /* GP1_PU */ 2492d5315a23SMark Brown #define WM2200_GP1_PU_WIDTH 1 /* GP1_PU */ 2493d5315a23SMark Brown #define WM2200_GP1_PD 0x2000 /* GP1_PD */ 2494d5315a23SMark Brown #define WM2200_GP1_PD_MASK 0x2000 /* GP1_PD */ 2495d5315a23SMark Brown #define WM2200_GP1_PD_SHIFT 13 /* GP1_PD */ 2496d5315a23SMark Brown #define WM2200_GP1_PD_WIDTH 1 /* GP1_PD */ 2497d5315a23SMark Brown #define WM2200_GP1_POL 0x0400 /* GP1_POL */ 2498d5315a23SMark Brown #define WM2200_GP1_POL_MASK 0x0400 /* GP1_POL */ 2499d5315a23SMark Brown #define WM2200_GP1_POL_SHIFT 10 /* GP1_POL */ 2500d5315a23SMark Brown #define WM2200_GP1_POL_WIDTH 1 /* GP1_POL */ 2501d5315a23SMark Brown #define WM2200_GP1_OP_CFG 0x0200 /* GP1_OP_CFG */ 2502d5315a23SMark Brown #define WM2200_GP1_OP_CFG_MASK 0x0200 /* GP1_OP_CFG */ 2503d5315a23SMark Brown #define WM2200_GP1_OP_CFG_SHIFT 9 /* GP1_OP_CFG */ 2504d5315a23SMark Brown #define WM2200_GP1_OP_CFG_WIDTH 1 /* GP1_OP_CFG */ 2505d5315a23SMark Brown #define WM2200_GP1_DB 0x0100 /* GP1_DB */ 2506d5315a23SMark Brown #define WM2200_GP1_DB_MASK 0x0100 /* GP1_DB */ 2507d5315a23SMark Brown #define WM2200_GP1_DB_SHIFT 8 /* GP1_DB */ 2508d5315a23SMark Brown #define WM2200_GP1_DB_WIDTH 1 /* GP1_DB */ 2509d5315a23SMark Brown #define WM2200_GP1_LVL 0x0040 /* GP1_LVL */ 2510d5315a23SMark Brown #define WM2200_GP1_LVL_MASK 0x0040 /* GP1_LVL */ 2511d5315a23SMark Brown #define WM2200_GP1_LVL_SHIFT 6 /* GP1_LVL */ 2512d5315a23SMark Brown #define WM2200_GP1_LVL_WIDTH 1 /* GP1_LVL */ 2513d5315a23SMark Brown #define WM2200_GP1_FN_MASK 0x003F /* GP1_FN - [5:0] */ 2514d5315a23SMark Brown #define WM2200_GP1_FN_SHIFT 0 /* GP1_FN - [5:0] */ 2515d5315a23SMark Brown #define WM2200_GP1_FN_WIDTH 6 /* GP1_FN - [5:0] */ 2516d5315a23SMark Brown 2517d5315a23SMark Brown /* 2518d5315a23SMark Brown * R1793 (0x701) - GPIO CTRL 2 2519d5315a23SMark Brown */ 2520d5315a23SMark Brown #define WM2200_GP2_DIR 0x8000 /* GP2_DIR */ 2521d5315a23SMark Brown #define WM2200_GP2_DIR_MASK 0x8000 /* GP2_DIR */ 2522d5315a23SMark Brown #define WM2200_GP2_DIR_SHIFT 15 /* GP2_DIR */ 2523d5315a23SMark Brown #define WM2200_GP2_DIR_WIDTH 1 /* GP2_DIR */ 2524d5315a23SMark Brown #define WM2200_GP2_PU 0x4000 /* GP2_PU */ 2525d5315a23SMark Brown #define WM2200_GP2_PU_MASK 0x4000 /* GP2_PU */ 2526d5315a23SMark Brown #define WM2200_GP2_PU_SHIFT 14 /* GP2_PU */ 2527d5315a23SMark Brown #define WM2200_GP2_PU_WIDTH 1 /* GP2_PU */ 2528d5315a23SMark Brown #define WM2200_GP2_PD 0x2000 /* GP2_PD */ 2529d5315a23SMark Brown #define WM2200_GP2_PD_MASK 0x2000 /* GP2_PD */ 2530d5315a23SMark Brown #define WM2200_GP2_PD_SHIFT 13 /* GP2_PD */ 2531d5315a23SMark Brown #define WM2200_GP2_PD_WIDTH 1 /* GP2_PD */ 2532d5315a23SMark Brown #define WM2200_GP2_POL 0x0400 /* GP2_POL */ 2533d5315a23SMark Brown #define WM2200_GP2_POL_MASK 0x0400 /* GP2_POL */ 2534d5315a23SMark Brown #define WM2200_GP2_POL_SHIFT 10 /* GP2_POL */ 2535d5315a23SMark Brown #define WM2200_GP2_POL_WIDTH 1 /* GP2_POL */ 2536d5315a23SMark Brown #define WM2200_GP2_OP_CFG 0x0200 /* GP2_OP_CFG */ 2537d5315a23SMark Brown #define WM2200_GP2_OP_CFG_MASK 0x0200 /* GP2_OP_CFG */ 2538d5315a23SMark Brown #define WM2200_GP2_OP_CFG_SHIFT 9 /* GP2_OP_CFG */ 2539d5315a23SMark Brown #define WM2200_GP2_OP_CFG_WIDTH 1 /* GP2_OP_CFG */ 2540d5315a23SMark Brown #define WM2200_GP2_DB 0x0100 /* GP2_DB */ 2541d5315a23SMark Brown #define WM2200_GP2_DB_MASK 0x0100 /* GP2_DB */ 2542d5315a23SMark Brown #define WM2200_GP2_DB_SHIFT 8 /* GP2_DB */ 2543d5315a23SMark Brown #define WM2200_GP2_DB_WIDTH 1 /* GP2_DB */ 2544d5315a23SMark Brown #define WM2200_GP2_LVL 0x0040 /* GP2_LVL */ 2545d5315a23SMark Brown #define WM2200_GP2_LVL_MASK 0x0040 /* GP2_LVL */ 2546d5315a23SMark Brown #define WM2200_GP2_LVL_SHIFT 6 /* GP2_LVL */ 2547d5315a23SMark Brown #define WM2200_GP2_LVL_WIDTH 1 /* GP2_LVL */ 2548d5315a23SMark Brown #define WM2200_GP2_FN_MASK 0x003F /* GP2_FN - [5:0] */ 2549d5315a23SMark Brown #define WM2200_GP2_FN_SHIFT 0 /* GP2_FN - [5:0] */ 2550d5315a23SMark Brown #define WM2200_GP2_FN_WIDTH 6 /* GP2_FN - [5:0] */ 2551d5315a23SMark Brown 2552d5315a23SMark Brown /* 2553d5315a23SMark Brown * R1794 (0x702) - GPIO CTRL 3 2554d5315a23SMark Brown */ 2555d5315a23SMark Brown #define WM2200_GP3_DIR 0x8000 /* GP3_DIR */ 2556d5315a23SMark Brown #define WM2200_GP3_DIR_MASK 0x8000 /* GP3_DIR */ 2557d5315a23SMark Brown #define WM2200_GP3_DIR_SHIFT 15 /* GP3_DIR */ 2558d5315a23SMark Brown #define WM2200_GP3_DIR_WIDTH 1 /* GP3_DIR */ 2559d5315a23SMark Brown #define WM2200_GP3_PU 0x4000 /* GP3_PU */ 2560d5315a23SMark Brown #define WM2200_GP3_PU_MASK 0x4000 /* GP3_PU */ 2561d5315a23SMark Brown #define WM2200_GP3_PU_SHIFT 14 /* GP3_PU */ 2562d5315a23SMark Brown #define WM2200_GP3_PU_WIDTH 1 /* GP3_PU */ 2563d5315a23SMark Brown #define WM2200_GP3_PD 0x2000 /* GP3_PD */ 2564d5315a23SMark Brown #define WM2200_GP3_PD_MASK 0x2000 /* GP3_PD */ 2565d5315a23SMark Brown #define WM2200_GP3_PD_SHIFT 13 /* GP3_PD */ 2566d5315a23SMark Brown #define WM2200_GP3_PD_WIDTH 1 /* GP3_PD */ 2567d5315a23SMark Brown #define WM2200_GP3_POL 0x0400 /* GP3_POL */ 2568d5315a23SMark Brown #define WM2200_GP3_POL_MASK 0x0400 /* GP3_POL */ 2569d5315a23SMark Brown #define WM2200_GP3_POL_SHIFT 10 /* GP3_POL */ 2570d5315a23SMark Brown #define WM2200_GP3_POL_WIDTH 1 /* GP3_POL */ 2571d5315a23SMark Brown #define WM2200_GP3_OP_CFG 0x0200 /* GP3_OP_CFG */ 2572d5315a23SMark Brown #define WM2200_GP3_OP_CFG_MASK 0x0200 /* GP3_OP_CFG */ 2573d5315a23SMark Brown #define WM2200_GP3_OP_CFG_SHIFT 9 /* GP3_OP_CFG */ 2574d5315a23SMark Brown #define WM2200_GP3_OP_CFG_WIDTH 1 /* GP3_OP_CFG */ 2575d5315a23SMark Brown #define WM2200_GP3_DB 0x0100 /* GP3_DB */ 2576d5315a23SMark Brown #define WM2200_GP3_DB_MASK 0x0100 /* GP3_DB */ 2577d5315a23SMark Brown #define WM2200_GP3_DB_SHIFT 8 /* GP3_DB */ 2578d5315a23SMark Brown #define WM2200_GP3_DB_WIDTH 1 /* GP3_DB */ 2579d5315a23SMark Brown #define WM2200_GP3_LVL 0x0040 /* GP3_LVL */ 2580d5315a23SMark Brown #define WM2200_GP3_LVL_MASK 0x0040 /* GP3_LVL */ 2581d5315a23SMark Brown #define WM2200_GP3_LVL_SHIFT 6 /* GP3_LVL */ 2582d5315a23SMark Brown #define WM2200_GP3_LVL_WIDTH 1 /* GP3_LVL */ 2583d5315a23SMark Brown #define WM2200_GP3_FN_MASK 0x003F /* GP3_FN - [5:0] */ 2584d5315a23SMark Brown #define WM2200_GP3_FN_SHIFT 0 /* GP3_FN - [5:0] */ 2585d5315a23SMark Brown #define WM2200_GP3_FN_WIDTH 6 /* GP3_FN - [5:0] */ 2586d5315a23SMark Brown 2587d5315a23SMark Brown /* 2588d5315a23SMark Brown * R1795 (0x703) - GPIO CTRL 4 2589d5315a23SMark Brown */ 2590d5315a23SMark Brown #define WM2200_GP4_DIR 0x8000 /* GP4_DIR */ 2591d5315a23SMark Brown #define WM2200_GP4_DIR_MASK 0x8000 /* GP4_DIR */ 2592d5315a23SMark Brown #define WM2200_GP4_DIR_SHIFT 15 /* GP4_DIR */ 2593d5315a23SMark Brown #define WM2200_GP4_DIR_WIDTH 1 /* GP4_DIR */ 2594d5315a23SMark Brown #define WM2200_GP4_PU 0x4000 /* GP4_PU */ 2595d5315a23SMark Brown #define WM2200_GP4_PU_MASK 0x4000 /* GP4_PU */ 2596d5315a23SMark Brown #define WM2200_GP4_PU_SHIFT 14 /* GP4_PU */ 2597d5315a23SMark Brown #define WM2200_GP4_PU_WIDTH 1 /* GP4_PU */ 2598d5315a23SMark Brown #define WM2200_GP4_PD 0x2000 /* GP4_PD */ 2599d5315a23SMark Brown #define WM2200_GP4_PD_MASK 0x2000 /* GP4_PD */ 2600d5315a23SMark Brown #define WM2200_GP4_PD_SHIFT 13 /* GP4_PD */ 2601d5315a23SMark Brown #define WM2200_GP4_PD_WIDTH 1 /* GP4_PD */ 2602d5315a23SMark Brown #define WM2200_GP4_POL 0x0400 /* GP4_POL */ 2603d5315a23SMark Brown #define WM2200_GP4_POL_MASK 0x0400 /* GP4_POL */ 2604d5315a23SMark Brown #define WM2200_GP4_POL_SHIFT 10 /* GP4_POL */ 2605d5315a23SMark Brown #define WM2200_GP4_POL_WIDTH 1 /* GP4_POL */ 2606d5315a23SMark Brown #define WM2200_GP4_OP_CFG 0x0200 /* GP4_OP_CFG */ 2607d5315a23SMark Brown #define WM2200_GP4_OP_CFG_MASK 0x0200 /* GP4_OP_CFG */ 2608d5315a23SMark Brown #define WM2200_GP4_OP_CFG_SHIFT 9 /* GP4_OP_CFG */ 2609d5315a23SMark Brown #define WM2200_GP4_OP_CFG_WIDTH 1 /* GP4_OP_CFG */ 2610d5315a23SMark Brown #define WM2200_GP4_DB 0x0100 /* GP4_DB */ 2611d5315a23SMark Brown #define WM2200_GP4_DB_MASK 0x0100 /* GP4_DB */ 2612d5315a23SMark Brown #define WM2200_GP4_DB_SHIFT 8 /* GP4_DB */ 2613d5315a23SMark Brown #define WM2200_GP4_DB_WIDTH 1 /* GP4_DB */ 2614d5315a23SMark Brown #define WM2200_GP4_LVL 0x0040 /* GP4_LVL */ 2615d5315a23SMark Brown #define WM2200_GP4_LVL_MASK 0x0040 /* GP4_LVL */ 2616d5315a23SMark Brown #define WM2200_GP4_LVL_SHIFT 6 /* GP4_LVL */ 2617d5315a23SMark Brown #define WM2200_GP4_LVL_WIDTH 1 /* GP4_LVL */ 2618d5315a23SMark Brown #define WM2200_GP4_FN_MASK 0x003F /* GP4_FN - [5:0] */ 2619d5315a23SMark Brown #define WM2200_GP4_FN_SHIFT 0 /* GP4_FN - [5:0] */ 2620d5315a23SMark Brown #define WM2200_GP4_FN_WIDTH 6 /* GP4_FN - [5:0] */ 2621d5315a23SMark Brown 2622d5315a23SMark Brown /* 2623d5315a23SMark Brown * R1799 (0x707) - ADPS1 IRQ0 2624d5315a23SMark Brown */ 2625d5315a23SMark Brown #define WM2200_DSP_IRQ1 0x0002 /* DSP_IRQ1 */ 2626d5315a23SMark Brown #define WM2200_DSP_IRQ1_MASK 0x0002 /* DSP_IRQ1 */ 2627d5315a23SMark Brown #define WM2200_DSP_IRQ1_SHIFT 1 /* DSP_IRQ1 */ 2628d5315a23SMark Brown #define WM2200_DSP_IRQ1_WIDTH 1 /* DSP_IRQ1 */ 2629d5315a23SMark Brown #define WM2200_DSP_IRQ0 0x0001 /* DSP_IRQ0 */ 2630d5315a23SMark Brown #define WM2200_DSP_IRQ0_MASK 0x0001 /* DSP_IRQ0 */ 2631d5315a23SMark Brown #define WM2200_DSP_IRQ0_SHIFT 0 /* DSP_IRQ0 */ 2632d5315a23SMark Brown #define WM2200_DSP_IRQ0_WIDTH 1 /* DSP_IRQ0 */ 2633d5315a23SMark Brown 2634d5315a23SMark Brown /* 2635d5315a23SMark Brown * R1800 (0x708) - ADPS1 IRQ1 2636d5315a23SMark Brown */ 2637d5315a23SMark Brown #define WM2200_DSP_IRQ3 0x0002 /* DSP_IRQ3 */ 2638d5315a23SMark Brown #define WM2200_DSP_IRQ3_MASK 0x0002 /* DSP_IRQ3 */ 2639d5315a23SMark Brown #define WM2200_DSP_IRQ3_SHIFT 1 /* DSP_IRQ3 */ 2640d5315a23SMark Brown #define WM2200_DSP_IRQ3_WIDTH 1 /* DSP_IRQ3 */ 2641d5315a23SMark Brown #define WM2200_DSP_IRQ2 0x0001 /* DSP_IRQ2 */ 2642d5315a23SMark Brown #define WM2200_DSP_IRQ2_MASK 0x0001 /* DSP_IRQ2 */ 2643d5315a23SMark Brown #define WM2200_DSP_IRQ2_SHIFT 0 /* DSP_IRQ2 */ 2644d5315a23SMark Brown #define WM2200_DSP_IRQ2_WIDTH 1 /* DSP_IRQ2 */ 2645d5315a23SMark Brown 2646d5315a23SMark Brown /* 2647d5315a23SMark Brown * R1801 (0x709) - Misc Pad Ctrl 1 2648d5315a23SMark Brown */ 2649d5315a23SMark Brown #define WM2200_LDO1ENA_PD 0x8000 /* LDO1ENA_PD */ 2650d5315a23SMark Brown #define WM2200_LDO1ENA_PD_MASK 0x8000 /* LDO1ENA_PD */ 2651d5315a23SMark Brown #define WM2200_LDO1ENA_PD_SHIFT 15 /* LDO1ENA_PD */ 2652d5315a23SMark Brown #define WM2200_LDO1ENA_PD_WIDTH 1 /* LDO1ENA_PD */ 2653d5315a23SMark Brown #define WM2200_MCLK2_PD 0x2000 /* MCLK2_PD */ 2654d5315a23SMark Brown #define WM2200_MCLK2_PD_MASK 0x2000 /* MCLK2_PD */ 2655d5315a23SMark Brown #define WM2200_MCLK2_PD_SHIFT 13 /* MCLK2_PD */ 2656d5315a23SMark Brown #define WM2200_MCLK2_PD_WIDTH 1 /* MCLK2_PD */ 2657d5315a23SMark Brown #define WM2200_MCLK1_PD 0x1000 /* MCLK1_PD */ 2658d5315a23SMark Brown #define WM2200_MCLK1_PD_MASK 0x1000 /* MCLK1_PD */ 2659d5315a23SMark Brown #define WM2200_MCLK1_PD_SHIFT 12 /* MCLK1_PD */ 2660d5315a23SMark Brown #define WM2200_MCLK1_PD_WIDTH 1 /* MCLK1_PD */ 2661d5315a23SMark Brown #define WM2200_DACLRCLK1_PU 0x0400 /* DACLRCLK1_PU */ 2662d5315a23SMark Brown #define WM2200_DACLRCLK1_PU_MASK 0x0400 /* DACLRCLK1_PU */ 2663d5315a23SMark Brown #define WM2200_DACLRCLK1_PU_SHIFT 10 /* DACLRCLK1_PU */ 2664d5315a23SMark Brown #define WM2200_DACLRCLK1_PU_WIDTH 1 /* DACLRCLK1_PU */ 2665d5315a23SMark Brown #define WM2200_DACLRCLK1_PD 0x0200 /* DACLRCLK1_PD */ 2666d5315a23SMark Brown #define WM2200_DACLRCLK1_PD_MASK 0x0200 /* DACLRCLK1_PD */ 2667d5315a23SMark Brown #define WM2200_DACLRCLK1_PD_SHIFT 9 /* DACLRCLK1_PD */ 2668d5315a23SMark Brown #define WM2200_DACLRCLK1_PD_WIDTH 1 /* DACLRCLK1_PD */ 2669d5315a23SMark Brown #define WM2200_BCLK1_PU 0x0100 /* BCLK1_PU */ 2670d5315a23SMark Brown #define WM2200_BCLK1_PU_MASK 0x0100 /* BCLK1_PU */ 2671d5315a23SMark Brown #define WM2200_BCLK1_PU_SHIFT 8 /* BCLK1_PU */ 2672d5315a23SMark Brown #define WM2200_BCLK1_PU_WIDTH 1 /* BCLK1_PU */ 2673d5315a23SMark Brown #define WM2200_BCLK1_PD 0x0080 /* BCLK1_PD */ 2674d5315a23SMark Brown #define WM2200_BCLK1_PD_MASK 0x0080 /* BCLK1_PD */ 2675d5315a23SMark Brown #define WM2200_BCLK1_PD_SHIFT 7 /* BCLK1_PD */ 2676d5315a23SMark Brown #define WM2200_BCLK1_PD_WIDTH 1 /* BCLK1_PD */ 2677d5315a23SMark Brown #define WM2200_DACDAT1_PU 0x0040 /* DACDAT1_PU */ 2678d5315a23SMark Brown #define WM2200_DACDAT1_PU_MASK 0x0040 /* DACDAT1_PU */ 2679d5315a23SMark Brown #define WM2200_DACDAT1_PU_SHIFT 6 /* DACDAT1_PU */ 2680d5315a23SMark Brown #define WM2200_DACDAT1_PU_WIDTH 1 /* DACDAT1_PU */ 2681d5315a23SMark Brown #define WM2200_DACDAT1_PD 0x0020 /* DACDAT1_PD */ 2682d5315a23SMark Brown #define WM2200_DACDAT1_PD_MASK 0x0020 /* DACDAT1_PD */ 2683d5315a23SMark Brown #define WM2200_DACDAT1_PD_SHIFT 5 /* DACDAT1_PD */ 2684d5315a23SMark Brown #define WM2200_DACDAT1_PD_WIDTH 1 /* DACDAT1_PD */ 2685d5315a23SMark Brown #define WM2200_DMICDAT3_PD 0x0010 /* DMICDAT3_PD */ 2686d5315a23SMark Brown #define WM2200_DMICDAT3_PD_MASK 0x0010 /* DMICDAT3_PD */ 2687d5315a23SMark Brown #define WM2200_DMICDAT3_PD_SHIFT 4 /* DMICDAT3_PD */ 2688d5315a23SMark Brown #define WM2200_DMICDAT3_PD_WIDTH 1 /* DMICDAT3_PD */ 2689d5315a23SMark Brown #define WM2200_DMICDAT2_PD 0x0008 /* DMICDAT2_PD */ 2690d5315a23SMark Brown #define WM2200_DMICDAT2_PD_MASK 0x0008 /* DMICDAT2_PD */ 2691d5315a23SMark Brown #define WM2200_DMICDAT2_PD_SHIFT 3 /* DMICDAT2_PD */ 2692d5315a23SMark Brown #define WM2200_DMICDAT2_PD_WIDTH 1 /* DMICDAT2_PD */ 2693d5315a23SMark Brown #define WM2200_DMICDAT1_PD 0x0004 /* DMICDAT1_PD */ 2694d5315a23SMark Brown #define WM2200_DMICDAT1_PD_MASK 0x0004 /* DMICDAT1_PD */ 2695d5315a23SMark Brown #define WM2200_DMICDAT1_PD_SHIFT 2 /* DMICDAT1_PD */ 2696d5315a23SMark Brown #define WM2200_DMICDAT1_PD_WIDTH 1 /* DMICDAT1_PD */ 2697d5315a23SMark Brown #define WM2200_RSTB_PU 0x0002 /* RSTB_PU */ 2698d5315a23SMark Brown #define WM2200_RSTB_PU_MASK 0x0002 /* RSTB_PU */ 2699d5315a23SMark Brown #define WM2200_RSTB_PU_SHIFT 1 /* RSTB_PU */ 2700d5315a23SMark Brown #define WM2200_RSTB_PU_WIDTH 1 /* RSTB_PU */ 2701d5315a23SMark Brown #define WM2200_ADDR_PD 0x0001 /* ADDR_PD */ 2702d5315a23SMark Brown #define WM2200_ADDR_PD_MASK 0x0001 /* ADDR_PD */ 2703d5315a23SMark Brown #define WM2200_ADDR_PD_SHIFT 0 /* ADDR_PD */ 2704d5315a23SMark Brown #define WM2200_ADDR_PD_WIDTH 1 /* ADDR_PD */ 2705d5315a23SMark Brown 2706d5315a23SMark Brown /* 2707d5315a23SMark Brown * R2048 (0x800) - Interrupt Status 1 2708d5315a23SMark Brown */ 2709d5315a23SMark Brown #define WM2200_DSP_IRQ0_EINT 0x0080 /* DSP_IRQ0_EINT */ 2710d5315a23SMark Brown #define WM2200_DSP_IRQ0_EINT_MASK 0x0080 /* DSP_IRQ0_EINT */ 2711d5315a23SMark Brown #define WM2200_DSP_IRQ0_EINT_SHIFT 7 /* DSP_IRQ0_EINT */ 2712d5315a23SMark Brown #define WM2200_DSP_IRQ0_EINT_WIDTH 1 /* DSP_IRQ0_EINT */ 2713d5315a23SMark Brown #define WM2200_DSP_IRQ1_EINT 0x0040 /* DSP_IRQ1_EINT */ 2714d5315a23SMark Brown #define WM2200_DSP_IRQ1_EINT_MASK 0x0040 /* DSP_IRQ1_EINT */ 2715d5315a23SMark Brown #define WM2200_DSP_IRQ1_EINT_SHIFT 6 /* DSP_IRQ1_EINT */ 2716d5315a23SMark Brown #define WM2200_DSP_IRQ1_EINT_WIDTH 1 /* DSP_IRQ1_EINT */ 2717d5315a23SMark Brown #define WM2200_DSP_IRQ2_EINT 0x0020 /* DSP_IRQ2_EINT */ 2718d5315a23SMark Brown #define WM2200_DSP_IRQ2_EINT_MASK 0x0020 /* DSP_IRQ2_EINT */ 2719d5315a23SMark Brown #define WM2200_DSP_IRQ2_EINT_SHIFT 5 /* DSP_IRQ2_EINT */ 2720d5315a23SMark Brown #define WM2200_DSP_IRQ2_EINT_WIDTH 1 /* DSP_IRQ2_EINT */ 2721d5315a23SMark Brown #define WM2200_DSP_IRQ3_EINT 0x0010 /* DSP_IRQ3_EINT */ 2722d5315a23SMark Brown #define WM2200_DSP_IRQ3_EINT_MASK 0x0010 /* DSP_IRQ3_EINT */ 2723d5315a23SMark Brown #define WM2200_DSP_IRQ3_EINT_SHIFT 4 /* DSP_IRQ3_EINT */ 2724d5315a23SMark Brown #define WM2200_DSP_IRQ3_EINT_WIDTH 1 /* DSP_IRQ3_EINT */ 2725d5315a23SMark Brown #define WM2200_GP4_EINT 0x0008 /* GP4_EINT */ 2726d5315a23SMark Brown #define WM2200_GP4_EINT_MASK 0x0008 /* GP4_EINT */ 2727d5315a23SMark Brown #define WM2200_GP4_EINT_SHIFT 3 /* GP4_EINT */ 2728d5315a23SMark Brown #define WM2200_GP4_EINT_WIDTH 1 /* GP4_EINT */ 2729d5315a23SMark Brown #define WM2200_GP3_EINT 0x0004 /* GP3_EINT */ 2730d5315a23SMark Brown #define WM2200_GP3_EINT_MASK 0x0004 /* GP3_EINT */ 2731d5315a23SMark Brown #define WM2200_GP3_EINT_SHIFT 2 /* GP3_EINT */ 2732d5315a23SMark Brown #define WM2200_GP3_EINT_WIDTH 1 /* GP3_EINT */ 2733d5315a23SMark Brown #define WM2200_GP2_EINT 0x0002 /* GP2_EINT */ 2734d5315a23SMark Brown #define WM2200_GP2_EINT_MASK 0x0002 /* GP2_EINT */ 2735d5315a23SMark Brown #define WM2200_GP2_EINT_SHIFT 1 /* GP2_EINT */ 2736d5315a23SMark Brown #define WM2200_GP2_EINT_WIDTH 1 /* GP2_EINT */ 2737d5315a23SMark Brown #define WM2200_GP1_EINT 0x0001 /* GP1_EINT */ 2738d5315a23SMark Brown #define WM2200_GP1_EINT_MASK 0x0001 /* GP1_EINT */ 2739d5315a23SMark Brown #define WM2200_GP1_EINT_SHIFT 0 /* GP1_EINT */ 2740d5315a23SMark Brown #define WM2200_GP1_EINT_WIDTH 1 /* GP1_EINT */ 2741d5315a23SMark Brown 2742d5315a23SMark Brown /* 2743d5315a23SMark Brown * R2049 (0x801) - Interrupt Status 1 Mask 2744d5315a23SMark Brown */ 2745d5315a23SMark Brown #define WM2200_IM_DSP_IRQ0_EINT 0x0080 /* IM_DSP_IRQ0_EINT */ 2746d5315a23SMark Brown #define WM2200_IM_DSP_IRQ0_EINT_MASK 0x0080 /* IM_DSP_IRQ0_EINT */ 2747d5315a23SMark Brown #define WM2200_IM_DSP_IRQ0_EINT_SHIFT 7 /* IM_DSP_IRQ0_EINT */ 2748d5315a23SMark Brown #define WM2200_IM_DSP_IRQ0_EINT_WIDTH 1 /* IM_DSP_IRQ0_EINT */ 2749d5315a23SMark Brown #define WM2200_IM_DSP_IRQ1_EINT 0x0040 /* IM_DSP_IRQ1_EINT */ 2750d5315a23SMark Brown #define WM2200_IM_DSP_IRQ1_EINT_MASK 0x0040 /* IM_DSP_IRQ1_EINT */ 2751d5315a23SMark Brown #define WM2200_IM_DSP_IRQ1_EINT_SHIFT 6 /* IM_DSP_IRQ1_EINT */ 2752d5315a23SMark Brown #define WM2200_IM_DSP_IRQ1_EINT_WIDTH 1 /* IM_DSP_IRQ1_EINT */ 2753d5315a23SMark Brown #define WM2200_IM_DSP_IRQ2_EINT 0x0020 /* IM_DSP_IRQ2_EINT */ 2754d5315a23SMark Brown #define WM2200_IM_DSP_IRQ2_EINT_MASK 0x0020 /* IM_DSP_IRQ2_EINT */ 2755d5315a23SMark Brown #define WM2200_IM_DSP_IRQ2_EINT_SHIFT 5 /* IM_DSP_IRQ2_EINT */ 2756d5315a23SMark Brown #define WM2200_IM_DSP_IRQ2_EINT_WIDTH 1 /* IM_DSP_IRQ2_EINT */ 2757d5315a23SMark Brown #define WM2200_IM_DSP_IRQ3_EINT 0x0010 /* IM_DSP_IRQ3_EINT */ 2758d5315a23SMark Brown #define WM2200_IM_DSP_IRQ3_EINT_MASK 0x0010 /* IM_DSP_IRQ3_EINT */ 2759d5315a23SMark Brown #define WM2200_IM_DSP_IRQ3_EINT_SHIFT 4 /* IM_DSP_IRQ3_EINT */ 2760d5315a23SMark Brown #define WM2200_IM_DSP_IRQ3_EINT_WIDTH 1 /* IM_DSP_IRQ3_EINT */ 2761d5315a23SMark Brown #define WM2200_IM_GP4_EINT 0x0008 /* IM_GP4_EINT */ 2762d5315a23SMark Brown #define WM2200_IM_GP4_EINT_MASK 0x0008 /* IM_GP4_EINT */ 2763d5315a23SMark Brown #define WM2200_IM_GP4_EINT_SHIFT 3 /* IM_GP4_EINT */ 2764d5315a23SMark Brown #define WM2200_IM_GP4_EINT_WIDTH 1 /* IM_GP4_EINT */ 2765d5315a23SMark Brown #define WM2200_IM_GP3_EINT 0x0004 /* IM_GP3_EINT */ 2766d5315a23SMark Brown #define WM2200_IM_GP3_EINT_MASK 0x0004 /* IM_GP3_EINT */ 2767d5315a23SMark Brown #define WM2200_IM_GP3_EINT_SHIFT 2 /* IM_GP3_EINT */ 2768d5315a23SMark Brown #define WM2200_IM_GP3_EINT_WIDTH 1 /* IM_GP3_EINT */ 2769d5315a23SMark Brown #define WM2200_IM_GP2_EINT 0x0002 /* IM_GP2_EINT */ 2770d5315a23SMark Brown #define WM2200_IM_GP2_EINT_MASK 0x0002 /* IM_GP2_EINT */ 2771d5315a23SMark Brown #define WM2200_IM_GP2_EINT_SHIFT 1 /* IM_GP2_EINT */ 2772d5315a23SMark Brown #define WM2200_IM_GP2_EINT_WIDTH 1 /* IM_GP2_EINT */ 2773d5315a23SMark Brown #define WM2200_IM_GP1_EINT 0x0001 /* IM_GP1_EINT */ 2774d5315a23SMark Brown #define WM2200_IM_GP1_EINT_MASK 0x0001 /* IM_GP1_EINT */ 2775d5315a23SMark Brown #define WM2200_IM_GP1_EINT_SHIFT 0 /* IM_GP1_EINT */ 2776d5315a23SMark Brown #define WM2200_IM_GP1_EINT_WIDTH 1 /* IM_GP1_EINT */ 2777d5315a23SMark Brown 2778d5315a23SMark Brown /* 2779d5315a23SMark Brown * R2050 (0x802) - Interrupt Status 2 2780d5315a23SMark Brown */ 2781d5315a23SMark Brown #define WM2200_WSEQ_BUSY_EINT 0x0100 /* WSEQ_BUSY_EINT */ 2782d5315a23SMark Brown #define WM2200_WSEQ_BUSY_EINT_MASK 0x0100 /* WSEQ_BUSY_EINT */ 2783d5315a23SMark Brown #define WM2200_WSEQ_BUSY_EINT_SHIFT 8 /* WSEQ_BUSY_EINT */ 2784d5315a23SMark Brown #define WM2200_WSEQ_BUSY_EINT_WIDTH 1 /* WSEQ_BUSY_EINT */ 2785d5315a23SMark Brown #define WM2200_FLL_LOCK_EINT 0x0002 /* FLL_LOCK_EINT */ 2786d5315a23SMark Brown #define WM2200_FLL_LOCK_EINT_MASK 0x0002 /* FLL_LOCK_EINT */ 2787d5315a23SMark Brown #define WM2200_FLL_LOCK_EINT_SHIFT 1 /* FLL_LOCK_EINT */ 2788d5315a23SMark Brown #define WM2200_FLL_LOCK_EINT_WIDTH 1 /* FLL_LOCK_EINT */ 2789d5315a23SMark Brown #define WM2200_CLKGEN_EINT 0x0001 /* CLKGEN_EINT */ 2790d5315a23SMark Brown #define WM2200_CLKGEN_EINT_MASK 0x0001 /* CLKGEN_EINT */ 2791d5315a23SMark Brown #define WM2200_CLKGEN_EINT_SHIFT 0 /* CLKGEN_EINT */ 2792d5315a23SMark Brown #define WM2200_CLKGEN_EINT_WIDTH 1 /* CLKGEN_EINT */ 2793d5315a23SMark Brown 2794d5315a23SMark Brown /* 2795d5315a23SMark Brown * R2051 (0x803) - Interrupt Raw Status 2 2796d5315a23SMark Brown */ 2797d5315a23SMark Brown #define WM2200_WSEQ_BUSY_STS 0x0100 /* WSEQ_BUSY_STS */ 2798d5315a23SMark Brown #define WM2200_WSEQ_BUSY_STS_MASK 0x0100 /* WSEQ_BUSY_STS */ 2799d5315a23SMark Brown #define WM2200_WSEQ_BUSY_STS_SHIFT 8 /* WSEQ_BUSY_STS */ 2800d5315a23SMark Brown #define WM2200_WSEQ_BUSY_STS_WIDTH 1 /* WSEQ_BUSY_STS */ 2801d5315a23SMark Brown #define WM2200_FLL_LOCK_STS 0x0002 /* FLL_LOCK_STS */ 2802d5315a23SMark Brown #define WM2200_FLL_LOCK_STS_MASK 0x0002 /* FLL_LOCK_STS */ 2803d5315a23SMark Brown #define WM2200_FLL_LOCK_STS_SHIFT 1 /* FLL_LOCK_STS */ 2804d5315a23SMark Brown #define WM2200_FLL_LOCK_STS_WIDTH 1 /* FLL_LOCK_STS */ 2805d5315a23SMark Brown #define WM2200_CLKGEN_STS 0x0001 /* CLKGEN_STS */ 2806d5315a23SMark Brown #define WM2200_CLKGEN_STS_MASK 0x0001 /* CLKGEN_STS */ 2807d5315a23SMark Brown #define WM2200_CLKGEN_STS_SHIFT 0 /* CLKGEN_STS */ 2808d5315a23SMark Brown #define WM2200_CLKGEN_STS_WIDTH 1 /* CLKGEN_STS */ 2809d5315a23SMark Brown 2810d5315a23SMark Brown /* 2811d5315a23SMark Brown * R2052 (0x804) - Interrupt Status 2 Mask 2812d5315a23SMark Brown */ 2813d5315a23SMark Brown #define WM2200_IM_WSEQ_BUSY_EINT 0x0100 /* IM_WSEQ_BUSY_EINT */ 2814d5315a23SMark Brown #define WM2200_IM_WSEQ_BUSY_EINT_MASK 0x0100 /* IM_WSEQ_BUSY_EINT */ 2815d5315a23SMark Brown #define WM2200_IM_WSEQ_BUSY_EINT_SHIFT 8 /* IM_WSEQ_BUSY_EINT */ 2816d5315a23SMark Brown #define WM2200_IM_WSEQ_BUSY_EINT_WIDTH 1 /* IM_WSEQ_BUSY_EINT */ 2817d5315a23SMark Brown #define WM2200_IM_FLL_LOCK_EINT 0x0002 /* IM_FLL_LOCK_EINT */ 2818d5315a23SMark Brown #define WM2200_IM_FLL_LOCK_EINT_MASK 0x0002 /* IM_FLL_LOCK_EINT */ 2819d5315a23SMark Brown #define WM2200_IM_FLL_LOCK_EINT_SHIFT 1 /* IM_FLL_LOCK_EINT */ 2820d5315a23SMark Brown #define WM2200_IM_FLL_LOCK_EINT_WIDTH 1 /* IM_FLL_LOCK_EINT */ 2821d5315a23SMark Brown #define WM2200_IM_CLKGEN_EINT 0x0001 /* IM_CLKGEN_EINT */ 2822d5315a23SMark Brown #define WM2200_IM_CLKGEN_EINT_MASK 0x0001 /* IM_CLKGEN_EINT */ 2823d5315a23SMark Brown #define WM2200_IM_CLKGEN_EINT_SHIFT 0 /* IM_CLKGEN_EINT */ 2824d5315a23SMark Brown #define WM2200_IM_CLKGEN_EINT_WIDTH 1 /* IM_CLKGEN_EINT */ 2825d5315a23SMark Brown 2826d5315a23SMark Brown /* 2827d5315a23SMark Brown * R2056 (0x808) - Interrupt Control 2828d5315a23SMark Brown */ 2829d5315a23SMark Brown #define WM2200_IM_IRQ 0x0001 /* IM_IRQ */ 2830d5315a23SMark Brown #define WM2200_IM_IRQ_MASK 0x0001 /* IM_IRQ */ 2831d5315a23SMark Brown #define WM2200_IM_IRQ_SHIFT 0 /* IM_IRQ */ 2832d5315a23SMark Brown #define WM2200_IM_IRQ_WIDTH 1 /* IM_IRQ */ 2833d5315a23SMark Brown 2834d5315a23SMark Brown /* 2835d5315a23SMark Brown * R2304 (0x900) - EQL_1 2836d5315a23SMark Brown */ 2837d5315a23SMark Brown #define WM2200_EQL_B1_GAIN_MASK 0xF800 /* EQL_B1_GAIN - [15:11] */ 2838d5315a23SMark Brown #define WM2200_EQL_B1_GAIN_SHIFT 11 /* EQL_B1_GAIN - [15:11] */ 2839d5315a23SMark Brown #define WM2200_EQL_B1_GAIN_WIDTH 5 /* EQL_B1_GAIN - [15:11] */ 2840d5315a23SMark Brown #define WM2200_EQL_B2_GAIN_MASK 0x07C0 /* EQL_B2_GAIN - [10:6] */ 2841d5315a23SMark Brown #define WM2200_EQL_B2_GAIN_SHIFT 6 /* EQL_B2_GAIN - [10:6] */ 2842d5315a23SMark Brown #define WM2200_EQL_B2_GAIN_WIDTH 5 /* EQL_B2_GAIN - [10:6] */ 2843d5315a23SMark Brown #define WM2200_EQL_B3_GAIN_MASK 0x003E /* EQL_B3_GAIN - [5:1] */ 2844d5315a23SMark Brown #define WM2200_EQL_B3_GAIN_SHIFT 1 /* EQL_B3_GAIN - [5:1] */ 2845d5315a23SMark Brown #define WM2200_EQL_B3_GAIN_WIDTH 5 /* EQL_B3_GAIN - [5:1] */ 2846d5315a23SMark Brown #define WM2200_EQL_ENA 0x0001 /* EQL_ENA */ 2847d5315a23SMark Brown #define WM2200_EQL_ENA_MASK 0x0001 /* EQL_ENA */ 2848d5315a23SMark Brown #define WM2200_EQL_ENA_SHIFT 0 /* EQL_ENA */ 2849d5315a23SMark Brown #define WM2200_EQL_ENA_WIDTH 1 /* EQL_ENA */ 2850d5315a23SMark Brown 2851d5315a23SMark Brown /* 2852d5315a23SMark Brown * R2305 (0x901) - EQL_2 2853d5315a23SMark Brown */ 2854d5315a23SMark Brown #define WM2200_EQL_B4_GAIN_MASK 0xF800 /* EQL_B4_GAIN - [15:11] */ 2855d5315a23SMark Brown #define WM2200_EQL_B4_GAIN_SHIFT 11 /* EQL_B4_GAIN - [15:11] */ 2856d5315a23SMark Brown #define WM2200_EQL_B4_GAIN_WIDTH 5 /* EQL_B4_GAIN - [15:11] */ 2857d5315a23SMark Brown #define WM2200_EQL_B5_GAIN_MASK 0x07C0 /* EQL_B5_GAIN - [10:6] */ 2858d5315a23SMark Brown #define WM2200_EQL_B5_GAIN_SHIFT 6 /* EQL_B5_GAIN - [10:6] */ 2859d5315a23SMark Brown #define WM2200_EQL_B5_GAIN_WIDTH 5 /* EQL_B5_GAIN - [10:6] */ 2860d5315a23SMark Brown 2861d5315a23SMark Brown /* 2862d5315a23SMark Brown * R2306 (0x902) - EQL_3 2863d5315a23SMark Brown */ 2864d5315a23SMark Brown #define WM2200_EQL_B1_A_MASK 0xFFFF /* EQL_B1_A - [15:0] */ 2865d5315a23SMark Brown #define WM2200_EQL_B1_A_SHIFT 0 /* EQL_B1_A - [15:0] */ 2866d5315a23SMark Brown #define WM2200_EQL_B1_A_WIDTH 16 /* EQL_B1_A - [15:0] */ 2867d5315a23SMark Brown 2868d5315a23SMark Brown /* 2869d5315a23SMark Brown * R2307 (0x903) - EQL_4 2870d5315a23SMark Brown */ 2871d5315a23SMark Brown #define WM2200_EQL_B1_B_MASK 0xFFFF /* EQL_B1_B - [15:0] */ 2872d5315a23SMark Brown #define WM2200_EQL_B1_B_SHIFT 0 /* EQL_B1_B - [15:0] */ 2873d5315a23SMark Brown #define WM2200_EQL_B1_B_WIDTH 16 /* EQL_B1_B - [15:0] */ 2874d5315a23SMark Brown 2875d5315a23SMark Brown /* 2876d5315a23SMark Brown * R2308 (0x904) - EQL_5 2877d5315a23SMark Brown */ 2878d5315a23SMark Brown #define WM2200_EQL_B1_PG_MASK 0xFFFF /* EQL_B1_PG - [15:0] */ 2879d5315a23SMark Brown #define WM2200_EQL_B1_PG_SHIFT 0 /* EQL_B1_PG - [15:0] */ 2880d5315a23SMark Brown #define WM2200_EQL_B1_PG_WIDTH 16 /* EQL_B1_PG - [15:0] */ 2881d5315a23SMark Brown 2882d5315a23SMark Brown /* 2883d5315a23SMark Brown * R2309 (0x905) - EQL_6 2884d5315a23SMark Brown */ 2885d5315a23SMark Brown #define WM2200_EQL_B2_A_MASK 0xFFFF /* EQL_B2_A - [15:0] */ 2886d5315a23SMark Brown #define WM2200_EQL_B2_A_SHIFT 0 /* EQL_B2_A - [15:0] */ 2887d5315a23SMark Brown #define WM2200_EQL_B2_A_WIDTH 16 /* EQL_B2_A - [15:0] */ 2888d5315a23SMark Brown 2889d5315a23SMark Brown /* 2890d5315a23SMark Brown * R2310 (0x906) - EQL_7 2891d5315a23SMark Brown */ 2892d5315a23SMark Brown #define WM2200_EQL_B2_B_MASK 0xFFFF /* EQL_B2_B - [15:0] */ 2893d5315a23SMark Brown #define WM2200_EQL_B2_B_SHIFT 0 /* EQL_B2_B - [15:0] */ 2894d5315a23SMark Brown #define WM2200_EQL_B2_B_WIDTH 16 /* EQL_B2_B - [15:0] */ 2895d5315a23SMark Brown 2896d5315a23SMark Brown /* 2897d5315a23SMark Brown * R2311 (0x907) - EQL_8 2898d5315a23SMark Brown */ 2899d5315a23SMark Brown #define WM2200_EQL_B2_C_MASK 0xFFFF /* EQL_B2_C - [15:0] */ 2900d5315a23SMark Brown #define WM2200_EQL_B2_C_SHIFT 0 /* EQL_B2_C - [15:0] */ 2901d5315a23SMark Brown #define WM2200_EQL_B2_C_WIDTH 16 /* EQL_B2_C - [15:0] */ 2902d5315a23SMark Brown 2903d5315a23SMark Brown /* 2904d5315a23SMark Brown * R2312 (0x908) - EQL_9 2905d5315a23SMark Brown */ 2906d5315a23SMark Brown #define WM2200_EQL_B2_PG_MASK 0xFFFF /* EQL_B2_PG - [15:0] */ 2907d5315a23SMark Brown #define WM2200_EQL_B2_PG_SHIFT 0 /* EQL_B2_PG - [15:0] */ 2908d5315a23SMark Brown #define WM2200_EQL_B2_PG_WIDTH 16 /* EQL_B2_PG - [15:0] */ 2909d5315a23SMark Brown 2910d5315a23SMark Brown /* 2911d5315a23SMark Brown * R2313 (0x909) - EQL_10 2912d5315a23SMark Brown */ 2913d5315a23SMark Brown #define WM2200_EQL_B3_A_MASK 0xFFFF /* EQL_B3_A - [15:0] */ 2914d5315a23SMark Brown #define WM2200_EQL_B3_A_SHIFT 0 /* EQL_B3_A - [15:0] */ 2915d5315a23SMark Brown #define WM2200_EQL_B3_A_WIDTH 16 /* EQL_B3_A - [15:0] */ 2916d5315a23SMark Brown 2917d5315a23SMark Brown /* 2918d5315a23SMark Brown * R2314 (0x90A) - EQL_11 2919d5315a23SMark Brown */ 2920d5315a23SMark Brown #define WM2200_EQL_B3_B_MASK 0xFFFF /* EQL_B3_B - [15:0] */ 2921d5315a23SMark Brown #define WM2200_EQL_B3_B_SHIFT 0 /* EQL_B3_B - [15:0] */ 2922d5315a23SMark Brown #define WM2200_EQL_B3_B_WIDTH 16 /* EQL_B3_B - [15:0] */ 2923d5315a23SMark Brown 2924d5315a23SMark Brown /* 2925d5315a23SMark Brown * R2315 (0x90B) - EQL_12 2926d5315a23SMark Brown */ 2927d5315a23SMark Brown #define WM2200_EQL_B3_C_MASK 0xFFFF /* EQL_B3_C - [15:0] */ 2928d5315a23SMark Brown #define WM2200_EQL_B3_C_SHIFT 0 /* EQL_B3_C - [15:0] */ 2929d5315a23SMark Brown #define WM2200_EQL_B3_C_WIDTH 16 /* EQL_B3_C - [15:0] */ 2930d5315a23SMark Brown 2931d5315a23SMark Brown /* 2932d5315a23SMark Brown * R2316 (0x90C) - EQL_13 2933d5315a23SMark Brown */ 2934d5315a23SMark Brown #define WM2200_EQL_B3_PG_MASK 0xFFFF /* EQL_B3_PG - [15:0] */ 2935d5315a23SMark Brown #define WM2200_EQL_B3_PG_SHIFT 0 /* EQL_B3_PG - [15:0] */ 2936d5315a23SMark Brown #define WM2200_EQL_B3_PG_WIDTH 16 /* EQL_B3_PG - [15:0] */ 2937d5315a23SMark Brown 2938d5315a23SMark Brown /* 2939d5315a23SMark Brown * R2317 (0x90D) - EQL_14 2940d5315a23SMark Brown */ 2941d5315a23SMark Brown #define WM2200_EQL_B4_A_MASK 0xFFFF /* EQL_B4_A - [15:0] */ 2942d5315a23SMark Brown #define WM2200_EQL_B4_A_SHIFT 0 /* EQL_B4_A - [15:0] */ 2943d5315a23SMark Brown #define WM2200_EQL_B4_A_WIDTH 16 /* EQL_B4_A - [15:0] */ 2944d5315a23SMark Brown 2945d5315a23SMark Brown /* 2946d5315a23SMark Brown * R2318 (0x90E) - EQL_15 2947d5315a23SMark Brown */ 2948d5315a23SMark Brown #define WM2200_EQL_B4_B_MASK 0xFFFF /* EQL_B4_B - [15:0] */ 2949d5315a23SMark Brown #define WM2200_EQL_B4_B_SHIFT 0 /* EQL_B4_B - [15:0] */ 2950d5315a23SMark Brown #define WM2200_EQL_B4_B_WIDTH 16 /* EQL_B4_B - [15:0] */ 2951d5315a23SMark Brown 2952d5315a23SMark Brown /* 2953d5315a23SMark Brown * R2319 (0x90F) - EQL_16 2954d5315a23SMark Brown */ 2955d5315a23SMark Brown #define WM2200_EQL_B4_C_MASK 0xFFFF /* EQL_B4_C - [15:0] */ 2956d5315a23SMark Brown #define WM2200_EQL_B4_C_SHIFT 0 /* EQL_B4_C - [15:0] */ 2957d5315a23SMark Brown #define WM2200_EQL_B4_C_WIDTH 16 /* EQL_B4_C - [15:0] */ 2958d5315a23SMark Brown 2959d5315a23SMark Brown /* 2960d5315a23SMark Brown * R2320 (0x910) - EQL_17 2961d5315a23SMark Brown */ 2962d5315a23SMark Brown #define WM2200_EQL_B4_PG_MASK 0xFFFF /* EQL_B4_PG - [15:0] */ 2963d5315a23SMark Brown #define WM2200_EQL_B4_PG_SHIFT 0 /* EQL_B4_PG - [15:0] */ 2964d5315a23SMark Brown #define WM2200_EQL_B4_PG_WIDTH 16 /* EQL_B4_PG - [15:0] */ 2965d5315a23SMark Brown 2966d5315a23SMark Brown /* 2967d5315a23SMark Brown * R2321 (0x911) - EQL_18 2968d5315a23SMark Brown */ 2969d5315a23SMark Brown #define WM2200_EQL_B5_A_MASK 0xFFFF /* EQL_B5_A - [15:0] */ 2970d5315a23SMark Brown #define WM2200_EQL_B5_A_SHIFT 0 /* EQL_B5_A - [15:0] */ 2971d5315a23SMark Brown #define WM2200_EQL_B5_A_WIDTH 16 /* EQL_B5_A - [15:0] */ 2972d5315a23SMark Brown 2973d5315a23SMark Brown /* 2974d5315a23SMark Brown * R2322 (0x912) - EQL_19 2975d5315a23SMark Brown */ 2976d5315a23SMark Brown #define WM2200_EQL_B5_B_MASK 0xFFFF /* EQL_B5_B - [15:0] */ 2977d5315a23SMark Brown #define WM2200_EQL_B5_B_SHIFT 0 /* EQL_B5_B - [15:0] */ 2978d5315a23SMark Brown #define WM2200_EQL_B5_B_WIDTH 16 /* EQL_B5_B - [15:0] */ 2979d5315a23SMark Brown 2980d5315a23SMark Brown /* 2981d5315a23SMark Brown * R2323 (0x913) - EQL_20 2982d5315a23SMark Brown */ 2983d5315a23SMark Brown #define WM2200_EQL_B5_PG_MASK 0xFFFF /* EQL_B5_PG - [15:0] */ 2984d5315a23SMark Brown #define WM2200_EQL_B5_PG_SHIFT 0 /* EQL_B5_PG - [15:0] */ 2985d5315a23SMark Brown #define WM2200_EQL_B5_PG_WIDTH 16 /* EQL_B5_PG - [15:0] */ 2986d5315a23SMark Brown 2987d5315a23SMark Brown /* 2988d5315a23SMark Brown * R2326 (0x916) - EQR_1 2989d5315a23SMark Brown */ 2990d5315a23SMark Brown #define WM2200_EQR_B1_GAIN_MASK 0xF800 /* EQR_B1_GAIN - [15:11] */ 2991d5315a23SMark Brown #define WM2200_EQR_B1_GAIN_SHIFT 11 /* EQR_B1_GAIN - [15:11] */ 2992d5315a23SMark Brown #define WM2200_EQR_B1_GAIN_WIDTH 5 /* EQR_B1_GAIN - [15:11] */ 2993d5315a23SMark Brown #define WM2200_EQR_B2_GAIN_MASK 0x07C0 /* EQR_B2_GAIN - [10:6] */ 2994d5315a23SMark Brown #define WM2200_EQR_B2_GAIN_SHIFT 6 /* EQR_B2_GAIN - [10:6] */ 2995d5315a23SMark Brown #define WM2200_EQR_B2_GAIN_WIDTH 5 /* EQR_B2_GAIN - [10:6] */ 2996d5315a23SMark Brown #define WM2200_EQR_B3_GAIN_MASK 0x003E /* EQR_B3_GAIN - [5:1] */ 2997d5315a23SMark Brown #define WM2200_EQR_B3_GAIN_SHIFT 1 /* EQR_B3_GAIN - [5:1] */ 2998d5315a23SMark Brown #define WM2200_EQR_B3_GAIN_WIDTH 5 /* EQR_B3_GAIN - [5:1] */ 2999d5315a23SMark Brown #define WM2200_EQR_ENA 0x0001 /* EQR_ENA */ 3000d5315a23SMark Brown #define WM2200_EQR_ENA_MASK 0x0001 /* EQR_ENA */ 3001d5315a23SMark Brown #define WM2200_EQR_ENA_SHIFT 0 /* EQR_ENA */ 3002d5315a23SMark Brown #define WM2200_EQR_ENA_WIDTH 1 /* EQR_ENA */ 3003d5315a23SMark Brown 3004d5315a23SMark Brown /* 3005d5315a23SMark Brown * R2327 (0x917) - EQR_2 3006d5315a23SMark Brown */ 3007d5315a23SMark Brown #define WM2200_EQR_B4_GAIN_MASK 0xF800 /* EQR_B4_GAIN - [15:11] */ 3008d5315a23SMark Brown #define WM2200_EQR_B4_GAIN_SHIFT 11 /* EQR_B4_GAIN - [15:11] */ 3009d5315a23SMark Brown #define WM2200_EQR_B4_GAIN_WIDTH 5 /* EQR_B4_GAIN - [15:11] */ 3010d5315a23SMark Brown #define WM2200_EQR_B5_GAIN_MASK 0x07C0 /* EQR_B5_GAIN - [10:6] */ 3011d5315a23SMark Brown #define WM2200_EQR_B5_GAIN_SHIFT 6 /* EQR_B5_GAIN - [10:6] */ 3012d5315a23SMark Brown #define WM2200_EQR_B5_GAIN_WIDTH 5 /* EQR_B5_GAIN - [10:6] */ 3013d5315a23SMark Brown 3014d5315a23SMark Brown /* 3015d5315a23SMark Brown * R2328 (0x918) - EQR_3 3016d5315a23SMark Brown */ 3017d5315a23SMark Brown #define WM2200_EQR_B1_A_MASK 0xFFFF /* EQR_B1_A - [15:0] */ 3018d5315a23SMark Brown #define WM2200_EQR_B1_A_SHIFT 0 /* EQR_B1_A - [15:0] */ 3019d5315a23SMark Brown #define WM2200_EQR_B1_A_WIDTH 16 /* EQR_B1_A - [15:0] */ 3020d5315a23SMark Brown 3021d5315a23SMark Brown /* 3022d5315a23SMark Brown * R2329 (0x919) - EQR_4 3023d5315a23SMark Brown */ 3024d5315a23SMark Brown #define WM2200_EQR_B1_B_MASK 0xFFFF /* EQR_B1_B - [15:0] */ 3025d5315a23SMark Brown #define WM2200_EQR_B1_B_SHIFT 0 /* EQR_B1_B - [15:0] */ 3026d5315a23SMark Brown #define WM2200_EQR_B1_B_WIDTH 16 /* EQR_B1_B - [15:0] */ 3027d5315a23SMark Brown 3028d5315a23SMark Brown /* 3029d5315a23SMark Brown * R2330 (0x91A) - EQR_5 3030d5315a23SMark Brown */ 3031d5315a23SMark Brown #define WM2200_EQR_B1_PG_MASK 0xFFFF /* EQR_B1_PG - [15:0] */ 3032d5315a23SMark Brown #define WM2200_EQR_B1_PG_SHIFT 0 /* EQR_B1_PG - [15:0] */ 3033d5315a23SMark Brown #define WM2200_EQR_B1_PG_WIDTH 16 /* EQR_B1_PG - [15:0] */ 3034d5315a23SMark Brown 3035d5315a23SMark Brown /* 3036d5315a23SMark Brown * R2331 (0x91B) - EQR_6 3037d5315a23SMark Brown */ 3038d5315a23SMark Brown #define WM2200_EQR_B2_A_MASK 0xFFFF /* EQR_B2_A - [15:0] */ 3039d5315a23SMark Brown #define WM2200_EQR_B2_A_SHIFT 0 /* EQR_B2_A - [15:0] */ 3040d5315a23SMark Brown #define WM2200_EQR_B2_A_WIDTH 16 /* EQR_B2_A - [15:0] */ 3041d5315a23SMark Brown 3042d5315a23SMark Brown /* 3043d5315a23SMark Brown * R2332 (0x91C) - EQR_7 3044d5315a23SMark Brown */ 3045d5315a23SMark Brown #define WM2200_EQR_B2_B_MASK 0xFFFF /* EQR_B2_B - [15:0] */ 3046d5315a23SMark Brown #define WM2200_EQR_B2_B_SHIFT 0 /* EQR_B2_B - [15:0] */ 3047d5315a23SMark Brown #define WM2200_EQR_B2_B_WIDTH 16 /* EQR_B2_B - [15:0] */ 3048d5315a23SMark Brown 3049d5315a23SMark Brown /* 3050d5315a23SMark Brown * R2333 (0x91D) - EQR_8 3051d5315a23SMark Brown */ 3052d5315a23SMark Brown #define WM2200_EQR_B2_C_MASK 0xFFFF /* EQR_B2_C - [15:0] */ 3053d5315a23SMark Brown #define WM2200_EQR_B2_C_SHIFT 0 /* EQR_B2_C - [15:0] */ 3054d5315a23SMark Brown #define WM2200_EQR_B2_C_WIDTH 16 /* EQR_B2_C - [15:0] */ 3055d5315a23SMark Brown 3056d5315a23SMark Brown /* 3057d5315a23SMark Brown * R2334 (0x91E) - EQR_9 3058d5315a23SMark Brown */ 3059d5315a23SMark Brown #define WM2200_EQR_B2_PG_MASK 0xFFFF /* EQR_B2_PG - [15:0] */ 3060d5315a23SMark Brown #define WM2200_EQR_B2_PG_SHIFT 0 /* EQR_B2_PG - [15:0] */ 3061d5315a23SMark Brown #define WM2200_EQR_B2_PG_WIDTH 16 /* EQR_B2_PG - [15:0] */ 3062d5315a23SMark Brown 3063d5315a23SMark Brown /* 3064d5315a23SMark Brown * R2335 (0x91F) - EQR_10 3065d5315a23SMark Brown */ 3066d5315a23SMark Brown #define WM2200_EQR_B3_A_MASK 0xFFFF /* EQR_B3_A - [15:0] */ 3067d5315a23SMark Brown #define WM2200_EQR_B3_A_SHIFT 0 /* EQR_B3_A - [15:0] */ 3068d5315a23SMark Brown #define WM2200_EQR_B3_A_WIDTH 16 /* EQR_B3_A - [15:0] */ 3069d5315a23SMark Brown 3070d5315a23SMark Brown /* 3071d5315a23SMark Brown * R2336 (0x920) - EQR_11 3072d5315a23SMark Brown */ 3073d5315a23SMark Brown #define WM2200_EQR_B3_B_MASK 0xFFFF /* EQR_B3_B - [15:0] */ 3074d5315a23SMark Brown #define WM2200_EQR_B3_B_SHIFT 0 /* EQR_B3_B - [15:0] */ 3075d5315a23SMark Brown #define WM2200_EQR_B3_B_WIDTH 16 /* EQR_B3_B - [15:0] */ 3076d5315a23SMark Brown 3077d5315a23SMark Brown /* 3078d5315a23SMark Brown * R2337 (0x921) - EQR_12 3079d5315a23SMark Brown */ 3080d5315a23SMark Brown #define WM2200_EQR_B3_C_MASK 0xFFFF /* EQR_B3_C - [15:0] */ 3081d5315a23SMark Brown #define WM2200_EQR_B3_C_SHIFT 0 /* EQR_B3_C - [15:0] */ 3082d5315a23SMark Brown #define WM2200_EQR_B3_C_WIDTH 16 /* EQR_B3_C - [15:0] */ 3083d5315a23SMark Brown 3084d5315a23SMark Brown /* 3085d5315a23SMark Brown * R2338 (0x922) - EQR_13 3086d5315a23SMark Brown */ 3087d5315a23SMark Brown #define WM2200_EQR_B3_PG_MASK 0xFFFF /* EQR_B3_PG - [15:0] */ 3088d5315a23SMark Brown #define WM2200_EQR_B3_PG_SHIFT 0 /* EQR_B3_PG - [15:0] */ 3089d5315a23SMark Brown #define WM2200_EQR_B3_PG_WIDTH 16 /* EQR_B3_PG - [15:0] */ 3090d5315a23SMark Brown 3091d5315a23SMark Brown /* 3092d5315a23SMark Brown * R2339 (0x923) - EQR_14 3093d5315a23SMark Brown */ 3094d5315a23SMark Brown #define WM2200_EQR_B4_A_MASK 0xFFFF /* EQR_B4_A - [15:0] */ 3095d5315a23SMark Brown #define WM2200_EQR_B4_A_SHIFT 0 /* EQR_B4_A - [15:0] */ 3096d5315a23SMark Brown #define WM2200_EQR_B4_A_WIDTH 16 /* EQR_B4_A - [15:0] */ 3097d5315a23SMark Brown 3098d5315a23SMark Brown /* 3099d5315a23SMark Brown * R2340 (0x924) - EQR_15 3100d5315a23SMark Brown */ 3101d5315a23SMark Brown #define WM2200_EQR_B4_B_MASK 0xFFFF /* EQR_B4_B - [15:0] */ 3102d5315a23SMark Brown #define WM2200_EQR_B4_B_SHIFT 0 /* EQR_B4_B - [15:0] */ 3103d5315a23SMark Brown #define WM2200_EQR_B4_B_WIDTH 16 /* EQR_B4_B - [15:0] */ 3104d5315a23SMark Brown 3105d5315a23SMark Brown /* 3106d5315a23SMark Brown * R2341 (0x925) - EQR_16 3107d5315a23SMark Brown */ 3108d5315a23SMark Brown #define WM2200_EQR_B4_C_MASK 0xFFFF /* EQR_B4_C - [15:0] */ 3109d5315a23SMark Brown #define WM2200_EQR_B4_C_SHIFT 0 /* EQR_B4_C - [15:0] */ 3110d5315a23SMark Brown #define WM2200_EQR_B4_C_WIDTH 16 /* EQR_B4_C - [15:0] */ 3111d5315a23SMark Brown 3112d5315a23SMark Brown /* 3113d5315a23SMark Brown * R2342 (0x926) - EQR_17 3114d5315a23SMark Brown */ 3115d5315a23SMark Brown #define WM2200_EQR_B4_PG_MASK 0xFFFF /* EQR_B4_PG - [15:0] */ 3116d5315a23SMark Brown #define WM2200_EQR_B4_PG_SHIFT 0 /* EQR_B4_PG - [15:0] */ 3117d5315a23SMark Brown #define WM2200_EQR_B4_PG_WIDTH 16 /* EQR_B4_PG - [15:0] */ 3118d5315a23SMark Brown 3119d5315a23SMark Brown /* 3120d5315a23SMark Brown * R2343 (0x927) - EQR_18 3121d5315a23SMark Brown */ 3122d5315a23SMark Brown #define WM2200_EQR_B5_A_MASK 0xFFFF /* EQR_B5_A - [15:0] */ 3123d5315a23SMark Brown #define WM2200_EQR_B5_A_SHIFT 0 /* EQR_B5_A - [15:0] */ 3124d5315a23SMark Brown #define WM2200_EQR_B5_A_WIDTH 16 /* EQR_B5_A - [15:0] */ 3125d5315a23SMark Brown 3126d5315a23SMark Brown /* 3127d5315a23SMark Brown * R2344 (0x928) - EQR_19 3128d5315a23SMark Brown */ 3129d5315a23SMark Brown #define WM2200_EQR_B5_B_MASK 0xFFFF /* EQR_B5_B - [15:0] */ 3130d5315a23SMark Brown #define WM2200_EQR_B5_B_SHIFT 0 /* EQR_B5_B - [15:0] */ 3131d5315a23SMark Brown #define WM2200_EQR_B5_B_WIDTH 16 /* EQR_B5_B - [15:0] */ 3132d5315a23SMark Brown 3133d5315a23SMark Brown /* 3134d5315a23SMark Brown * R2345 (0x929) - EQR_20 3135d5315a23SMark Brown */ 3136d5315a23SMark Brown #define WM2200_EQR_B5_PG_MASK 0xFFFF /* EQR_B5_PG - [15:0] */ 3137d5315a23SMark Brown #define WM2200_EQR_B5_PG_SHIFT 0 /* EQR_B5_PG - [15:0] */ 3138d5315a23SMark Brown #define WM2200_EQR_B5_PG_WIDTH 16 /* EQR_B5_PG - [15:0] */ 3139d5315a23SMark Brown 3140d5315a23SMark Brown /* 3141d5315a23SMark Brown * R2366 (0x93E) - HPLPF1_1 3142d5315a23SMark Brown */ 3143d5315a23SMark Brown #define WM2200_LHPF1_MODE 0x0002 /* LHPF1_MODE */ 3144d5315a23SMark Brown #define WM2200_LHPF1_MODE_MASK 0x0002 /* LHPF1_MODE */ 3145d5315a23SMark Brown #define WM2200_LHPF1_MODE_SHIFT 1 /* LHPF1_MODE */ 3146d5315a23SMark Brown #define WM2200_LHPF1_MODE_WIDTH 1 /* LHPF1_MODE */ 3147d5315a23SMark Brown #define WM2200_LHPF1_ENA 0x0001 /* LHPF1_ENA */ 3148d5315a23SMark Brown #define WM2200_LHPF1_ENA_MASK 0x0001 /* LHPF1_ENA */ 3149d5315a23SMark Brown #define WM2200_LHPF1_ENA_SHIFT 0 /* LHPF1_ENA */ 3150d5315a23SMark Brown #define WM2200_LHPF1_ENA_WIDTH 1 /* LHPF1_ENA */ 3151d5315a23SMark Brown 3152d5315a23SMark Brown /* 3153d5315a23SMark Brown * R2367 (0x93F) - HPLPF1_2 3154d5315a23SMark Brown */ 3155d5315a23SMark Brown #define WM2200_LHPF1_COEFF_MASK 0xFFFF /* LHPF1_COEFF - [15:0] */ 3156d5315a23SMark Brown #define WM2200_LHPF1_COEFF_SHIFT 0 /* LHPF1_COEFF - [15:0] */ 3157d5315a23SMark Brown #define WM2200_LHPF1_COEFF_WIDTH 16 /* LHPF1_COEFF - [15:0] */ 3158d5315a23SMark Brown 3159d5315a23SMark Brown /* 3160d5315a23SMark Brown * R2370 (0x942) - HPLPF2_1 3161d5315a23SMark Brown */ 3162d5315a23SMark Brown #define WM2200_LHPF2_MODE 0x0002 /* LHPF2_MODE */ 3163d5315a23SMark Brown #define WM2200_LHPF2_MODE_MASK 0x0002 /* LHPF2_MODE */ 3164d5315a23SMark Brown #define WM2200_LHPF2_MODE_SHIFT 1 /* LHPF2_MODE */ 3165d5315a23SMark Brown #define WM2200_LHPF2_MODE_WIDTH 1 /* LHPF2_MODE */ 3166d5315a23SMark Brown #define WM2200_LHPF2_ENA 0x0001 /* LHPF2_ENA */ 3167d5315a23SMark Brown #define WM2200_LHPF2_ENA_MASK 0x0001 /* LHPF2_ENA */ 3168d5315a23SMark Brown #define WM2200_LHPF2_ENA_SHIFT 0 /* LHPF2_ENA */ 3169d5315a23SMark Brown #define WM2200_LHPF2_ENA_WIDTH 1 /* LHPF2_ENA */ 3170d5315a23SMark Brown 3171d5315a23SMark Brown /* 3172d5315a23SMark Brown * R2371 (0x943) - HPLPF2_2 3173d5315a23SMark Brown */ 3174d5315a23SMark Brown #define WM2200_LHPF2_COEFF_MASK 0xFFFF /* LHPF2_COEFF - [15:0] */ 3175d5315a23SMark Brown #define WM2200_LHPF2_COEFF_SHIFT 0 /* LHPF2_COEFF - [15:0] */ 3176d5315a23SMark Brown #define WM2200_LHPF2_COEFF_WIDTH 16 /* LHPF2_COEFF - [15:0] */ 3177d5315a23SMark Brown 3178d5315a23SMark Brown /* 3179d5315a23SMark Brown * R2560 (0xA00) - DSP1 Control 1 3180d5315a23SMark Brown */ 3181d5315a23SMark Brown #define WM2200_DSP1_RW_SEQUENCE_ENA 0x0001 /* DSP1_RW_SEQUENCE_ENA */ 3182d5315a23SMark Brown #define WM2200_DSP1_RW_SEQUENCE_ENA_MASK 0x0001 /* DSP1_RW_SEQUENCE_ENA */ 3183d5315a23SMark Brown #define WM2200_DSP1_RW_SEQUENCE_ENA_SHIFT 0 /* DSP1_RW_SEQUENCE_ENA */ 3184d5315a23SMark Brown #define WM2200_DSP1_RW_SEQUENCE_ENA_WIDTH 1 /* DSP1_RW_SEQUENCE_ENA */ 3185d5315a23SMark Brown 3186d5315a23SMark Brown /* 3187d5315a23SMark Brown * R2562 (0xA02) - DSP1 Control 2 3188d5315a23SMark Brown */ 3189d5315a23SMark Brown #define WM2200_DSP1_PAGE_BASE_PM_0_MASK 0xFF00 /* DSP1_PAGE_BASE_PM - [15:8] */ 3190d5315a23SMark Brown #define WM2200_DSP1_PAGE_BASE_PM_0_SHIFT 8 /* DSP1_PAGE_BASE_PM - [15:8] */ 3191d5315a23SMark Brown #define WM2200_DSP1_PAGE_BASE_PM_0_WIDTH 8 /* DSP1_PAGE_BASE_PM - [15:8] */ 3192d5315a23SMark Brown 3193d5315a23SMark Brown /* 3194d5315a23SMark Brown * R2563 (0xA03) - DSP1 Control 3 3195d5315a23SMark Brown */ 3196d5315a23SMark Brown #define WM2200_DSP1_PAGE_BASE_DM_0_MASK 0xFF00 /* DSP1_PAGE_BASE_DM - [15:8] */ 3197d5315a23SMark Brown #define WM2200_DSP1_PAGE_BASE_DM_0_SHIFT 8 /* DSP1_PAGE_BASE_DM - [15:8] */ 3198d5315a23SMark Brown #define WM2200_DSP1_PAGE_BASE_DM_0_WIDTH 8 /* DSP1_PAGE_BASE_DM - [15:8] */ 3199d5315a23SMark Brown 3200d5315a23SMark Brown /* 3201d5315a23SMark Brown * R2564 (0xA04) - DSP1 Control 4 3202d5315a23SMark Brown */ 3203d5315a23SMark Brown #define WM2200_DSP1_PAGE_BASE_ZM_0_MASK 0xFF00 /* DSP1_PAGE_BASE_ZM - [15:8] */ 3204d5315a23SMark Brown #define WM2200_DSP1_PAGE_BASE_ZM_0_SHIFT 8 /* DSP1_PAGE_BASE_ZM - [15:8] */ 3205d5315a23SMark Brown #define WM2200_DSP1_PAGE_BASE_ZM_0_WIDTH 8 /* DSP1_PAGE_BASE_ZM - [15:8] */ 3206d5315a23SMark Brown 3207d5315a23SMark Brown /* 3208d5315a23SMark Brown * R2566 (0xA06) - DSP1 Control 5 3209d5315a23SMark Brown */ 3210d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_0_MASK 0x3FFF /* DSP1_START_ADDRESS_WDMA_BUFFER_0 - [13:0] */ 3211d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_0_SHIFT 0 /* DSP1_START_ADDRESS_WDMA_BUFFER_0 - [13:0] */ 3212d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_0_WIDTH 14 /* DSP1_START_ADDRESS_WDMA_BUFFER_0 - [13:0] */ 3213d5315a23SMark Brown 3214d5315a23SMark Brown /* 3215d5315a23SMark Brown * R2567 (0xA07) - DSP1 Control 6 3216d5315a23SMark Brown */ 3217d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_1_MASK 0x3FFF /* DSP1_START_ADDRESS_WDMA_BUFFER_1 - [13:0] */ 3218d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_1_SHIFT 0 /* DSP1_START_ADDRESS_WDMA_BUFFER_1 - [13:0] */ 3219d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_1_WIDTH 14 /* DSP1_START_ADDRESS_WDMA_BUFFER_1 - [13:0] */ 3220d5315a23SMark Brown 3221d5315a23SMark Brown /* 3222d5315a23SMark Brown * R2568 (0xA08) - DSP1 Control 7 3223d5315a23SMark Brown */ 3224d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_2_MASK 0x3FFF /* DSP1_START_ADDRESS_WDMA_BUFFER_2 - [13:0] */ 3225d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_2_SHIFT 0 /* DSP1_START_ADDRESS_WDMA_BUFFER_2 - [13:0] */ 3226d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_2_WIDTH 14 /* DSP1_START_ADDRESS_WDMA_BUFFER_2 - [13:0] */ 3227d5315a23SMark Brown 3228d5315a23SMark Brown /* 3229d5315a23SMark Brown * R2569 (0xA09) - DSP1 Control 8 3230d5315a23SMark Brown */ 3231d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_3_MASK 0x3FFF /* DSP1_START_ADDRESS_WDMA_BUFFER_3 - [13:0] */ 3232d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_3_SHIFT 0 /* DSP1_START_ADDRESS_WDMA_BUFFER_3 - [13:0] */ 3233d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_3_WIDTH 14 /* DSP1_START_ADDRESS_WDMA_BUFFER_3 - [13:0] */ 3234d5315a23SMark Brown 3235d5315a23SMark Brown /* 3236d5315a23SMark Brown * R2570 (0xA0A) - DSP1 Control 9 3237d5315a23SMark Brown */ 3238d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_4_MASK 0x3FFF /* DSP1_START_ADDRESS_WDMA_BUFFER_4 - [13:0] */ 3239d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_4_SHIFT 0 /* DSP1_START_ADDRESS_WDMA_BUFFER_4 - [13:0] */ 3240d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_4_WIDTH 14 /* DSP1_START_ADDRESS_WDMA_BUFFER_4 - [13:0] */ 3241d5315a23SMark Brown 3242d5315a23SMark Brown /* 3243d5315a23SMark Brown * R2571 (0xA0B) - DSP1 Control 10 3244d5315a23SMark Brown */ 3245d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_5_MASK 0x3FFF /* DSP1_START_ADDRESS_WDMA_BUFFER_5 - [13:0] */ 3246d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_5_SHIFT 0 /* DSP1_START_ADDRESS_WDMA_BUFFER_5 - [13:0] */ 3247d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_5_WIDTH 14 /* DSP1_START_ADDRESS_WDMA_BUFFER_5 - [13:0] */ 3248d5315a23SMark Brown 3249d5315a23SMark Brown /* 3250d5315a23SMark Brown * R2572 (0xA0C) - DSP1 Control 11 3251d5315a23SMark Brown */ 3252d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_6_MASK 0x3FFF /* DSP1_START_ADDRESS_WDMA_BUFFER_6 - [13:0] */ 3253d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_6_SHIFT 0 /* DSP1_START_ADDRESS_WDMA_BUFFER_6 - [13:0] */ 3254d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_6_WIDTH 14 /* DSP1_START_ADDRESS_WDMA_BUFFER_6 - [13:0] */ 3255d5315a23SMark Brown 3256d5315a23SMark Brown /* 3257d5315a23SMark Brown * R2573 (0xA0D) - DSP1 Control 12 3258d5315a23SMark Brown */ 3259d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_7_MASK 0x3FFF /* DSP1_START_ADDRESS_WDMA_BUFFER_7 - [13:0] */ 3260d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_7_SHIFT 0 /* DSP1_START_ADDRESS_WDMA_BUFFER_7 - [13:0] */ 3261d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_WDMA_BUFFER_7_WIDTH 14 /* DSP1_START_ADDRESS_WDMA_BUFFER_7 - [13:0] */ 3262d5315a23SMark Brown 3263d5315a23SMark Brown /* 3264d5315a23SMark Brown * R2575 (0xA0F) - DSP1 Control 13 3265d5315a23SMark Brown */ 3266d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_0_MASK 0x3FFF /* DSP1_START_ADDRESS_RDMA_BUFFER_0 - [13:0] */ 3267d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_0_SHIFT 0 /* DSP1_START_ADDRESS_RDMA_BUFFER_0 - [13:0] */ 3268d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_0_WIDTH 14 /* DSP1_START_ADDRESS_RDMA_BUFFER_0 - [13:0] */ 3269d5315a23SMark Brown 3270d5315a23SMark Brown /* 3271d5315a23SMark Brown * R2576 (0xA10) - DSP1 Control 14 3272d5315a23SMark Brown */ 3273d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_1_MASK 0x3FFF /* DSP1_START_ADDRESS_RDMA_BUFFER_1 - [13:0] */ 3274d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_1_SHIFT 0 /* DSP1_START_ADDRESS_RDMA_BUFFER_1 - [13:0] */ 3275d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_1_WIDTH 14 /* DSP1_START_ADDRESS_RDMA_BUFFER_1 - [13:0] */ 3276d5315a23SMark Brown 3277d5315a23SMark Brown /* 3278d5315a23SMark Brown * R2577 (0xA11) - DSP1 Control 15 3279d5315a23SMark Brown */ 3280d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_2_MASK 0x3FFF /* DSP1_START_ADDRESS_RDMA_BUFFER_2 - [13:0] */ 3281d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_2_SHIFT 0 /* DSP1_START_ADDRESS_RDMA_BUFFER_2 - [13:0] */ 3282d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_2_WIDTH 14 /* DSP1_START_ADDRESS_RDMA_BUFFER_2 - [13:0] */ 3283d5315a23SMark Brown 3284d5315a23SMark Brown /* 3285d5315a23SMark Brown * R2578 (0xA12) - DSP1 Control 16 3286d5315a23SMark Brown */ 3287d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_3_MASK 0x3FFF /* DSP1_START_ADDRESS_RDMA_BUFFER_3 - [13:0] */ 3288d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_3_SHIFT 0 /* DSP1_START_ADDRESS_RDMA_BUFFER_3 - [13:0] */ 3289d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_3_WIDTH 14 /* DSP1_START_ADDRESS_RDMA_BUFFER_3 - [13:0] */ 3290d5315a23SMark Brown 3291d5315a23SMark Brown /* 3292d5315a23SMark Brown * R2579 (0xA13) - DSP1 Control 17 3293d5315a23SMark Brown */ 3294d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_4_MASK 0x3FFF /* DSP1_START_ADDRESS_RDMA_BUFFER_4 - [13:0] */ 3295d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_4_SHIFT 0 /* DSP1_START_ADDRESS_RDMA_BUFFER_4 - [13:0] */ 3296d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_4_WIDTH 14 /* DSP1_START_ADDRESS_RDMA_BUFFER_4 - [13:0] */ 3297d5315a23SMark Brown 3298d5315a23SMark Brown /* 3299d5315a23SMark Brown * R2580 (0xA14) - DSP1 Control 18 3300d5315a23SMark Brown */ 3301d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_5_MASK 0x3FFF /* DSP1_START_ADDRESS_RDMA_BUFFER_5 - [13:0] */ 3302d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_5_SHIFT 0 /* DSP1_START_ADDRESS_RDMA_BUFFER_5 - [13:0] */ 3303d5315a23SMark Brown #define WM2200_DSP1_START_ADDRESS_RDMA_BUFFER_5_WIDTH 14 /* DSP1_START_ADDRESS_RDMA_BUFFER_5 - [13:0] */ 3304d5315a23SMark Brown 3305d5315a23SMark Brown /* 3306d5315a23SMark Brown * R2582 (0xA16) - DSP1 Control 19 3307d5315a23SMark Brown */ 3308d5315a23SMark Brown #define WM2200_DSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ 3309d5315a23SMark Brown #define WM2200_DSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ 3310d5315a23SMark Brown #define WM2200_DSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ 3311d5315a23SMark Brown 3312d5315a23SMark Brown /* 3313d5315a23SMark Brown * R2583 (0xA17) - DSP1 Control 20 3314d5315a23SMark Brown */ 3315d5315a23SMark Brown #define WM2200_DSP1_WDMA_CHANNEL_ENABLE_MASK 0x00FF /* DSP1_WDMA_CHANNEL_ENABLE - [7:0] */ 3316d5315a23SMark Brown #define WM2200_DSP1_WDMA_CHANNEL_ENABLE_SHIFT 0 /* DSP1_WDMA_CHANNEL_ENABLE - [7:0] */ 3317d5315a23SMark Brown #define WM2200_DSP1_WDMA_CHANNEL_ENABLE_WIDTH 8 /* DSP1_WDMA_CHANNEL_ENABLE - [7:0] */ 3318d5315a23SMark Brown 3319d5315a23SMark Brown /* 3320d5315a23SMark Brown * R2584 (0xA18) - DSP1 Control 21 3321d5315a23SMark Brown */ 3322d5315a23SMark Brown #define WM2200_DSP1_RDMA_CHANNEL_ENABLE_MASK 0x003F /* DSP1_RDMA_CHANNEL_ENABLE - [5:0] */ 3323d5315a23SMark Brown #define WM2200_DSP1_RDMA_CHANNEL_ENABLE_SHIFT 0 /* DSP1_RDMA_CHANNEL_ENABLE - [5:0] */ 3324d5315a23SMark Brown #define WM2200_DSP1_RDMA_CHANNEL_ENABLE_WIDTH 6 /* DSP1_RDMA_CHANNEL_ENABLE - [5:0] */ 3325d5315a23SMark Brown 3326d5315a23SMark Brown /* 3327d5315a23SMark Brown * R2586 (0xA1A) - DSP1 Control 22 3328d5315a23SMark Brown */ 3329d5315a23SMark Brown #define WM2200_DSP1_DM_SIZE_MASK 0xFFFF /* DSP1_DM_SIZE - [15:0] */ 3330d5315a23SMark Brown #define WM2200_DSP1_DM_SIZE_SHIFT 0 /* DSP1_DM_SIZE - [15:0] */ 3331d5315a23SMark Brown #define WM2200_DSP1_DM_SIZE_WIDTH 16 /* DSP1_DM_SIZE - [15:0] */ 3332d5315a23SMark Brown 3333d5315a23SMark Brown /* 3334d5315a23SMark Brown * R2587 (0xA1B) - DSP1 Control 23 3335d5315a23SMark Brown */ 3336d5315a23SMark Brown #define WM2200_DSP1_PM_SIZE_MASK 0xFFFF /* DSP1_PM_SIZE - [15:0] */ 3337d5315a23SMark Brown #define WM2200_DSP1_PM_SIZE_SHIFT 0 /* DSP1_PM_SIZE - [15:0] */ 3338d5315a23SMark Brown #define WM2200_DSP1_PM_SIZE_WIDTH 16 /* DSP1_PM_SIZE - [15:0] */ 3339d5315a23SMark Brown 3340d5315a23SMark Brown /* 3341d5315a23SMark Brown * R2588 (0xA1C) - DSP1 Control 24 3342d5315a23SMark Brown */ 3343d5315a23SMark Brown #define WM2200_DSP1_ZM_SIZE_MASK 0xFFFF /* DSP1_ZM_SIZE - [15:0] */ 3344d5315a23SMark Brown #define WM2200_DSP1_ZM_SIZE_SHIFT 0 /* DSP1_ZM_SIZE - [15:0] */ 3345d5315a23SMark Brown #define WM2200_DSP1_ZM_SIZE_WIDTH 16 /* DSP1_ZM_SIZE - [15:0] */ 3346d5315a23SMark Brown 3347d5315a23SMark Brown /* 3348d5315a23SMark Brown * R2590 (0xA1E) - DSP1 Control 25 3349d5315a23SMark Brown */ 3350d5315a23SMark Brown #define WM2200_DSP1_PING_FULL 0x8000 /* DSP1_PING_FULL */ 3351d5315a23SMark Brown #define WM2200_DSP1_PING_FULL_MASK 0x8000 /* DSP1_PING_FULL */ 3352d5315a23SMark Brown #define WM2200_DSP1_PING_FULL_SHIFT 15 /* DSP1_PING_FULL */ 3353d5315a23SMark Brown #define WM2200_DSP1_PING_FULL_WIDTH 1 /* DSP1_PING_FULL */ 3354d5315a23SMark Brown #define WM2200_DSP1_PONG_FULL 0x4000 /* DSP1_PONG_FULL */ 3355d5315a23SMark Brown #define WM2200_DSP1_PONG_FULL_MASK 0x4000 /* DSP1_PONG_FULL */ 3356d5315a23SMark Brown #define WM2200_DSP1_PONG_FULL_SHIFT 14 /* DSP1_PONG_FULL */ 3357d5315a23SMark Brown #define WM2200_DSP1_PONG_FULL_WIDTH 1 /* DSP1_PONG_FULL */ 3358d5315a23SMark Brown #define WM2200_DSP1_WDMA_ACTIVE_CHANNELS_MASK 0x00FF /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */ 3359d5315a23SMark Brown #define WM2200_DSP1_WDMA_ACTIVE_CHANNELS_SHIFT 0 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */ 3360d5315a23SMark Brown #define WM2200_DSP1_WDMA_ACTIVE_CHANNELS_WIDTH 8 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */ 3361d5315a23SMark Brown 3362d5315a23SMark Brown /* 3363d5315a23SMark Brown * R2592 (0xA20) - DSP1 Control 26 3364d5315a23SMark Brown */ 3365d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_0_MASK 0xFFFF /* DSP1_SCRATCH_0 - [15:0] */ 3366d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_0_SHIFT 0 /* DSP1_SCRATCH_0 - [15:0] */ 3367d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_0_WIDTH 16 /* DSP1_SCRATCH_0 - [15:0] */ 3368d5315a23SMark Brown 3369d5315a23SMark Brown /* 3370d5315a23SMark Brown * R2593 (0xA21) - DSP1 Control 27 3371d5315a23SMark Brown */ 3372d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_1_MASK 0xFFFF /* DSP1_SCRATCH_1 - [15:0] */ 3373d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_1_SHIFT 0 /* DSP1_SCRATCH_1 - [15:0] */ 3374d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_1_WIDTH 16 /* DSP1_SCRATCH_1 - [15:0] */ 3375d5315a23SMark Brown 3376d5315a23SMark Brown /* 3377d5315a23SMark Brown * R2594 (0xA22) - DSP1 Control 28 3378d5315a23SMark Brown */ 3379d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_2_MASK 0xFFFF /* DSP1_SCRATCH_2 - [15:0] */ 3380d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_2_SHIFT 0 /* DSP1_SCRATCH_2 - [15:0] */ 3381d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_2_WIDTH 16 /* DSP1_SCRATCH_2 - [15:0] */ 3382d5315a23SMark Brown 3383d5315a23SMark Brown /* 3384d5315a23SMark Brown * R2595 (0xA23) - DSP1 Control 29 3385d5315a23SMark Brown */ 3386d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_3_MASK 0xFFFF /* DSP1_SCRATCH_3 - [15:0] */ 3387d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_3_SHIFT 0 /* DSP1_SCRATCH_3 - [15:0] */ 3388d5315a23SMark Brown #define WM2200_DSP1_SCRATCH_3_WIDTH 16 /* DSP1_SCRATCH_3 - [15:0] */ 3389d5315a23SMark Brown 3390d5315a23SMark Brown /* 3391d5315a23SMark Brown * R2596 (0xA24) - DSP1 Control 30 3392d5315a23SMark Brown */ 3393d5315a23SMark Brown #define WM2200_DSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */ 3394d5315a23SMark Brown #define WM2200_DSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */ 3395d5315a23SMark Brown #define WM2200_DSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */ 3396d5315a23SMark Brown #define WM2200_DSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */ 3397d5315a23SMark Brown #define WM2200_DSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ 3398d5315a23SMark Brown #define WM2200_DSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ 3399d5315a23SMark Brown #define WM2200_DSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ 3400d5315a23SMark Brown #define WM2200_DSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ 3401d5315a23SMark Brown #define WM2200_DSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ 3402d5315a23SMark Brown #define WM2200_DSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ 3403d5315a23SMark Brown #define WM2200_DSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ 3404d5315a23SMark Brown #define WM2200_DSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ 3405d5315a23SMark Brown #define WM2200_DSP1_START 0x0001 /* DSP1_START */ 3406d5315a23SMark Brown #define WM2200_DSP1_START_MASK 0x0001 /* DSP1_START */ 3407d5315a23SMark Brown #define WM2200_DSP1_START_SHIFT 0 /* DSP1_START */ 3408d5315a23SMark Brown #define WM2200_DSP1_START_WIDTH 1 /* DSP1_START */ 3409d5315a23SMark Brown 3410d5315a23SMark Brown /* 3411d5315a23SMark Brown * R2598 (0xA26) - DSP1 Control 31 3412d5315a23SMark Brown */ 3413d5315a23SMark Brown #define WM2200_DSP1_CLK_RATE_MASK 0x0018 /* DSP1_CLK_RATE - [4:3] */ 3414d5315a23SMark Brown #define WM2200_DSP1_CLK_RATE_SHIFT 3 /* DSP1_CLK_RATE - [4:3] */ 3415d5315a23SMark Brown #define WM2200_DSP1_CLK_RATE_WIDTH 2 /* DSP1_CLK_RATE - [4:3] */ 3416d5315a23SMark Brown #define WM2200_DSP1_CLK_AVAIL 0x0004 /* DSP1_CLK_AVAIL */ 3417d5315a23SMark Brown #define WM2200_DSP1_CLK_AVAIL_MASK 0x0004 /* DSP1_CLK_AVAIL */ 3418d5315a23SMark Brown #define WM2200_DSP1_CLK_AVAIL_SHIFT 2 /* DSP1_CLK_AVAIL */ 3419d5315a23SMark Brown #define WM2200_DSP1_CLK_AVAIL_WIDTH 1 /* DSP1_CLK_AVAIL */ 3420d5315a23SMark Brown #define WM2200_DSP1_CLK_REQ_MASK 0x0003 /* DSP1_CLK_REQ - [1:0] */ 3421d5315a23SMark Brown #define WM2200_DSP1_CLK_REQ_SHIFT 0 /* DSP1_CLK_REQ - [1:0] */ 3422d5315a23SMark Brown #define WM2200_DSP1_CLK_REQ_WIDTH 2 /* DSP1_CLK_REQ - [1:0] */ 3423d5315a23SMark Brown 3424d5315a23SMark Brown /* 3425d5315a23SMark Brown * R2816 (0xB00) - DSP2 Control 1 3426d5315a23SMark Brown */ 3427d5315a23SMark Brown #define WM2200_DSP2_RW_SEQUENCE_ENA 0x0001 /* DSP2_RW_SEQUENCE_ENA */ 3428d5315a23SMark Brown #define WM2200_DSP2_RW_SEQUENCE_ENA_MASK 0x0001 /* DSP2_RW_SEQUENCE_ENA */ 3429d5315a23SMark Brown #define WM2200_DSP2_RW_SEQUENCE_ENA_SHIFT 0 /* DSP2_RW_SEQUENCE_ENA */ 3430d5315a23SMark Brown #define WM2200_DSP2_RW_SEQUENCE_ENA_WIDTH 1 /* DSP2_RW_SEQUENCE_ENA */ 3431d5315a23SMark Brown 3432d5315a23SMark Brown /* 3433d5315a23SMark Brown * R2818 (0xB02) - DSP2 Control 2 3434d5315a23SMark Brown */ 3435d5315a23SMark Brown #define WM2200_DSP2_PAGE_BASE_PM_0_MASK 0xFF00 /* DSP2_PAGE_BASE_PM - [15:8] */ 3436d5315a23SMark Brown #define WM2200_DSP2_PAGE_BASE_PM_0_SHIFT 8 /* DSP2_PAGE_BASE_PM - [15:8] */ 3437d5315a23SMark Brown #define WM2200_DSP2_PAGE_BASE_PM_0_WIDTH 8 /* DSP2_PAGE_BASE_PM - [15:8] */ 3438d5315a23SMark Brown 3439d5315a23SMark Brown /* 3440d5315a23SMark Brown * R2819 (0xB03) - DSP2 Control 3 3441d5315a23SMark Brown */ 3442d5315a23SMark Brown #define WM2200_DSP2_PAGE_BASE_DM_0_MASK 0xFF00 /* DSP2_PAGE_BASE_DM - [15:8] */ 3443d5315a23SMark Brown #define WM2200_DSP2_PAGE_BASE_DM_0_SHIFT 8 /* DSP2_PAGE_BASE_DM - [15:8] */ 3444d5315a23SMark Brown #define WM2200_DSP2_PAGE_BASE_DM_0_WIDTH 8 /* DSP2_PAGE_BASE_DM - [15:8] */ 3445d5315a23SMark Brown 3446d5315a23SMark Brown /* 3447d5315a23SMark Brown * R2820 (0xB04) - DSP2 Control 4 3448d5315a23SMark Brown */ 3449d5315a23SMark Brown #define WM2200_DSP2_PAGE_BASE_ZM_0_MASK 0xFF00 /* DSP2_PAGE_BASE_ZM - [15:8] */ 3450d5315a23SMark Brown #define WM2200_DSP2_PAGE_BASE_ZM_0_SHIFT 8 /* DSP2_PAGE_BASE_ZM - [15:8] */ 3451d5315a23SMark Brown #define WM2200_DSP2_PAGE_BASE_ZM_0_WIDTH 8 /* DSP2_PAGE_BASE_ZM - [15:8] */ 3452d5315a23SMark Brown 3453d5315a23SMark Brown /* 3454d5315a23SMark Brown * R2822 (0xB06) - DSP2 Control 5 3455d5315a23SMark Brown */ 3456d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_0_MASK 0x3FFF /* DSP2_START_ADDRESS_WDMA_BUFFER_0 - [13:0] */ 3457d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_0_SHIFT 0 /* DSP2_START_ADDRESS_WDMA_BUFFER_0 - [13:0] */ 3458d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_0_WIDTH 14 /* DSP2_START_ADDRESS_WDMA_BUFFER_0 - [13:0] */ 3459d5315a23SMark Brown 3460d5315a23SMark Brown /* 3461d5315a23SMark Brown * R2823 (0xB07) - DSP2 Control 6 3462d5315a23SMark Brown */ 3463d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_1_MASK 0x3FFF /* DSP2_START_ADDRESS_WDMA_BUFFER_1 - [13:0] */ 3464d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_1_SHIFT 0 /* DSP2_START_ADDRESS_WDMA_BUFFER_1 - [13:0] */ 3465d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_1_WIDTH 14 /* DSP2_START_ADDRESS_WDMA_BUFFER_1 - [13:0] */ 3466d5315a23SMark Brown 3467d5315a23SMark Brown /* 3468d5315a23SMark Brown * R2824 (0xB08) - DSP2 Control 7 3469d5315a23SMark Brown */ 3470d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_2_MASK 0x3FFF /* DSP2_START_ADDRESS_WDMA_BUFFER_2 - [13:0] */ 3471d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_2_SHIFT 0 /* DSP2_START_ADDRESS_WDMA_BUFFER_2 - [13:0] */ 3472d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_2_WIDTH 14 /* DSP2_START_ADDRESS_WDMA_BUFFER_2 - [13:0] */ 3473d5315a23SMark Brown 3474d5315a23SMark Brown /* 3475d5315a23SMark Brown * R2825 (0xB09) - DSP2 Control 8 3476d5315a23SMark Brown */ 3477d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_3_MASK 0x3FFF /* DSP2_START_ADDRESS_WDMA_BUFFER_3 - [13:0] */ 3478d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_3_SHIFT 0 /* DSP2_START_ADDRESS_WDMA_BUFFER_3 - [13:0] */ 3479d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_3_WIDTH 14 /* DSP2_START_ADDRESS_WDMA_BUFFER_3 - [13:0] */ 3480d5315a23SMark Brown 3481d5315a23SMark Brown /* 3482d5315a23SMark Brown * R2826 (0xB0A) - DSP2 Control 9 3483d5315a23SMark Brown */ 3484d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_4_MASK 0x3FFF /* DSP2_START_ADDRESS_WDMA_BUFFER_4 - [13:0] */ 3485d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_4_SHIFT 0 /* DSP2_START_ADDRESS_WDMA_BUFFER_4 - [13:0] */ 3486d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_4_WIDTH 14 /* DSP2_START_ADDRESS_WDMA_BUFFER_4 - [13:0] */ 3487d5315a23SMark Brown 3488d5315a23SMark Brown /* 3489d5315a23SMark Brown * R2827 (0xB0B) - DSP2 Control 10 3490d5315a23SMark Brown */ 3491d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_5_MASK 0x3FFF /* DSP2_START_ADDRESS_WDMA_BUFFER_5 - [13:0] */ 3492d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_5_SHIFT 0 /* DSP2_START_ADDRESS_WDMA_BUFFER_5 - [13:0] */ 3493d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_5_WIDTH 14 /* DSP2_START_ADDRESS_WDMA_BUFFER_5 - [13:0] */ 3494d5315a23SMark Brown 3495d5315a23SMark Brown /* 3496d5315a23SMark Brown * R2828 (0xB0C) - DSP2 Control 11 3497d5315a23SMark Brown */ 3498d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_6_MASK 0x3FFF /* DSP2_START_ADDRESS_WDMA_BUFFER_6 - [13:0] */ 3499d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_6_SHIFT 0 /* DSP2_START_ADDRESS_WDMA_BUFFER_6 - [13:0] */ 3500d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_6_WIDTH 14 /* DSP2_START_ADDRESS_WDMA_BUFFER_6 - [13:0] */ 3501d5315a23SMark Brown 3502d5315a23SMark Brown /* 3503d5315a23SMark Brown * R2829 (0xB0D) - DSP2 Control 12 3504d5315a23SMark Brown */ 3505d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_7_MASK 0x3FFF /* DSP2_START_ADDRESS_WDMA_BUFFER_7 - [13:0] */ 3506d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_7_SHIFT 0 /* DSP2_START_ADDRESS_WDMA_BUFFER_7 - [13:0] */ 3507d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_WDMA_BUFFER_7_WIDTH 14 /* DSP2_START_ADDRESS_WDMA_BUFFER_7 - [13:0] */ 3508d5315a23SMark Brown 3509d5315a23SMark Brown /* 3510d5315a23SMark Brown * R2831 (0xB0F) - DSP2 Control 13 3511d5315a23SMark Brown */ 3512d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_0_MASK 0x3FFF /* DSP2_START_ADDRESS_RDMA_BUFFER_0 - [13:0] */ 3513d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_0_SHIFT 0 /* DSP2_START_ADDRESS_RDMA_BUFFER_0 - [13:0] */ 3514d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_0_WIDTH 14 /* DSP2_START_ADDRESS_RDMA_BUFFER_0 - [13:0] */ 3515d5315a23SMark Brown 3516d5315a23SMark Brown /* 3517d5315a23SMark Brown * R2832 (0xB10) - DSP2 Control 14 3518d5315a23SMark Brown */ 3519d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_1_MASK 0x3FFF /* DSP2_START_ADDRESS_RDMA_BUFFER_1 - [13:0] */ 3520d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_1_SHIFT 0 /* DSP2_START_ADDRESS_RDMA_BUFFER_1 - [13:0] */ 3521d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_1_WIDTH 14 /* DSP2_START_ADDRESS_RDMA_BUFFER_1 - [13:0] */ 3522d5315a23SMark Brown 3523d5315a23SMark Brown /* 3524d5315a23SMark Brown * R2833 (0xB11) - DSP2 Control 15 3525d5315a23SMark Brown */ 3526d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_2_MASK 0x3FFF /* DSP2_START_ADDRESS_RDMA_BUFFER_2 - [13:0] */ 3527d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_2_SHIFT 0 /* DSP2_START_ADDRESS_RDMA_BUFFER_2 - [13:0] */ 3528d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_2_WIDTH 14 /* DSP2_START_ADDRESS_RDMA_BUFFER_2 - [13:0] */ 3529d5315a23SMark Brown 3530d5315a23SMark Brown /* 3531d5315a23SMark Brown * R2834 (0xB12) - DSP2 Control 16 3532d5315a23SMark Brown */ 3533d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_3_MASK 0x3FFF /* DSP2_START_ADDRESS_RDMA_BUFFER_3 - [13:0] */ 3534d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_3_SHIFT 0 /* DSP2_START_ADDRESS_RDMA_BUFFER_3 - [13:0] */ 3535d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_3_WIDTH 14 /* DSP2_START_ADDRESS_RDMA_BUFFER_3 - [13:0] */ 3536d5315a23SMark Brown 3537d5315a23SMark Brown /* 3538d5315a23SMark Brown * R2835 (0xB13) - DSP2 Control 17 3539d5315a23SMark Brown */ 3540d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_4_MASK 0x3FFF /* DSP2_START_ADDRESS_RDMA_BUFFER_4 - [13:0] */ 3541d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_4_SHIFT 0 /* DSP2_START_ADDRESS_RDMA_BUFFER_4 - [13:0] */ 3542d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_4_WIDTH 14 /* DSP2_START_ADDRESS_RDMA_BUFFER_4 - [13:0] */ 3543d5315a23SMark Brown 3544d5315a23SMark Brown /* 3545d5315a23SMark Brown * R2836 (0xB14) - DSP2 Control 18 3546d5315a23SMark Brown */ 3547d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_5_MASK 0x3FFF /* DSP2_START_ADDRESS_RDMA_BUFFER_5 - [13:0] */ 3548d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_5_SHIFT 0 /* DSP2_START_ADDRESS_RDMA_BUFFER_5 - [13:0] */ 3549d5315a23SMark Brown #define WM2200_DSP2_START_ADDRESS_RDMA_BUFFER_5_WIDTH 14 /* DSP2_START_ADDRESS_RDMA_BUFFER_5 - [13:0] */ 3550d5315a23SMark Brown 3551d5315a23SMark Brown /* 3552d5315a23SMark Brown * R2838 (0xB16) - DSP2 Control 19 3553d5315a23SMark Brown */ 3554d5315a23SMark Brown #define WM2200_DSP2_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP2_WDMA_BUFFER_LENGTH - [7:0] */ 3555d5315a23SMark Brown #define WM2200_DSP2_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP2_WDMA_BUFFER_LENGTH - [7:0] */ 3556d5315a23SMark Brown #define WM2200_DSP2_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP2_WDMA_BUFFER_LENGTH - [7:0] */ 3557d5315a23SMark Brown 3558d5315a23SMark Brown /* 3559d5315a23SMark Brown * R2839 (0xB17) - DSP2 Control 20 3560d5315a23SMark Brown */ 3561d5315a23SMark Brown #define WM2200_DSP2_WDMA_CHANNEL_ENABLE_MASK 0x00FF /* DSP2_WDMA_CHANNEL_ENABLE - [7:0] */ 3562d5315a23SMark Brown #define WM2200_DSP2_WDMA_CHANNEL_ENABLE_SHIFT 0 /* DSP2_WDMA_CHANNEL_ENABLE - [7:0] */ 3563d5315a23SMark Brown #define WM2200_DSP2_WDMA_CHANNEL_ENABLE_WIDTH 8 /* DSP2_WDMA_CHANNEL_ENABLE - [7:0] */ 3564d5315a23SMark Brown 3565d5315a23SMark Brown /* 3566d5315a23SMark Brown * R2840 (0xB18) - DSP2 Control 21 3567d5315a23SMark Brown */ 3568d5315a23SMark Brown #define WM2200_DSP2_RDMA_CHANNEL_ENABLE_MASK 0x003F /* DSP2_RDMA_CHANNEL_ENABLE - [5:0] */ 3569d5315a23SMark Brown #define WM2200_DSP2_RDMA_CHANNEL_ENABLE_SHIFT 0 /* DSP2_RDMA_CHANNEL_ENABLE - [5:0] */ 3570d5315a23SMark Brown #define WM2200_DSP2_RDMA_CHANNEL_ENABLE_WIDTH 6 /* DSP2_RDMA_CHANNEL_ENABLE - [5:0] */ 3571d5315a23SMark Brown 3572d5315a23SMark Brown /* 3573d5315a23SMark Brown * R2842 (0xB1A) - DSP2 Control 22 3574d5315a23SMark Brown */ 3575d5315a23SMark Brown #define WM2200_DSP2_DM_SIZE_MASK 0xFFFF /* DSP2_DM_SIZE - [15:0] */ 3576d5315a23SMark Brown #define WM2200_DSP2_DM_SIZE_SHIFT 0 /* DSP2_DM_SIZE - [15:0] */ 3577d5315a23SMark Brown #define WM2200_DSP2_DM_SIZE_WIDTH 16 /* DSP2_DM_SIZE - [15:0] */ 3578d5315a23SMark Brown 3579d5315a23SMark Brown /* 3580d5315a23SMark Brown * R2843 (0xB1B) - DSP2 Control 23 3581d5315a23SMark Brown */ 3582d5315a23SMark Brown #define WM2200_DSP2_PM_SIZE_MASK 0xFFFF /* DSP2_PM_SIZE - [15:0] */ 3583d5315a23SMark Brown #define WM2200_DSP2_PM_SIZE_SHIFT 0 /* DSP2_PM_SIZE - [15:0] */ 3584d5315a23SMark Brown #define WM2200_DSP2_PM_SIZE_WIDTH 16 /* DSP2_PM_SIZE - [15:0] */ 3585d5315a23SMark Brown 3586d5315a23SMark Brown /* 3587d5315a23SMark Brown * R2844 (0xB1C) - DSP2 Control 24 3588d5315a23SMark Brown */ 3589d5315a23SMark Brown #define WM2200_DSP2_ZM_SIZE_MASK 0xFFFF /* DSP2_ZM_SIZE - [15:0] */ 3590d5315a23SMark Brown #define WM2200_DSP2_ZM_SIZE_SHIFT 0 /* DSP2_ZM_SIZE - [15:0] */ 3591d5315a23SMark Brown #define WM2200_DSP2_ZM_SIZE_WIDTH 16 /* DSP2_ZM_SIZE - [15:0] */ 3592d5315a23SMark Brown 3593d5315a23SMark Brown /* 3594d5315a23SMark Brown * R2846 (0xB1E) - DSP2 Control 25 3595d5315a23SMark Brown */ 3596d5315a23SMark Brown #define WM2200_DSP2_PING_FULL 0x8000 /* DSP2_PING_FULL */ 3597d5315a23SMark Brown #define WM2200_DSP2_PING_FULL_MASK 0x8000 /* DSP2_PING_FULL */ 3598d5315a23SMark Brown #define WM2200_DSP2_PING_FULL_SHIFT 15 /* DSP2_PING_FULL */ 3599d5315a23SMark Brown #define WM2200_DSP2_PING_FULL_WIDTH 1 /* DSP2_PING_FULL */ 3600d5315a23SMark Brown #define WM2200_DSP2_PONG_FULL 0x4000 /* DSP2_PONG_FULL */ 3601d5315a23SMark Brown #define WM2200_DSP2_PONG_FULL_MASK 0x4000 /* DSP2_PONG_FULL */ 3602d5315a23SMark Brown #define WM2200_DSP2_PONG_FULL_SHIFT 14 /* DSP2_PONG_FULL */ 3603d5315a23SMark Brown #define WM2200_DSP2_PONG_FULL_WIDTH 1 /* DSP2_PONG_FULL */ 3604d5315a23SMark Brown #define WM2200_DSP2_WDMA_ACTIVE_CHANNELS_MASK 0x00FF /* DSP2_WDMA_ACTIVE_CHANNELS - [7:0] */ 3605d5315a23SMark Brown #define WM2200_DSP2_WDMA_ACTIVE_CHANNELS_SHIFT 0 /* DSP2_WDMA_ACTIVE_CHANNELS - [7:0] */ 3606d5315a23SMark Brown #define WM2200_DSP2_WDMA_ACTIVE_CHANNELS_WIDTH 8 /* DSP2_WDMA_ACTIVE_CHANNELS - [7:0] */ 3607d5315a23SMark Brown 3608d5315a23SMark Brown /* 3609d5315a23SMark Brown * R2848 (0xB20) - DSP2 Control 26 3610d5315a23SMark Brown */ 3611d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_0_MASK 0xFFFF /* DSP2_SCRATCH_0 - [15:0] */ 3612d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_0_SHIFT 0 /* DSP2_SCRATCH_0 - [15:0] */ 3613d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_0_WIDTH 16 /* DSP2_SCRATCH_0 - [15:0] */ 3614d5315a23SMark Brown 3615d5315a23SMark Brown /* 3616d5315a23SMark Brown * R2849 (0xB21) - DSP2 Control 27 3617d5315a23SMark Brown */ 3618d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_1_MASK 0xFFFF /* DSP2_SCRATCH_1 - [15:0] */ 3619d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_1_SHIFT 0 /* DSP2_SCRATCH_1 - [15:0] */ 3620d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_1_WIDTH 16 /* DSP2_SCRATCH_1 - [15:0] */ 3621d5315a23SMark Brown 3622d5315a23SMark Brown /* 3623d5315a23SMark Brown * R2850 (0xB22) - DSP2 Control 28 3624d5315a23SMark Brown */ 3625d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_2_MASK 0xFFFF /* DSP2_SCRATCH_2 - [15:0] */ 3626d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_2_SHIFT 0 /* DSP2_SCRATCH_2 - [15:0] */ 3627d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_2_WIDTH 16 /* DSP2_SCRATCH_2 - [15:0] */ 3628d5315a23SMark Brown 3629d5315a23SMark Brown /* 3630d5315a23SMark Brown * R2851 (0xB23) - DSP2 Control 29 3631d5315a23SMark Brown */ 3632d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_3_MASK 0xFFFF /* DSP2_SCRATCH_3 - [15:0] */ 3633d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_3_SHIFT 0 /* DSP2_SCRATCH_3 - [15:0] */ 3634d5315a23SMark Brown #define WM2200_DSP2_SCRATCH_3_WIDTH 16 /* DSP2_SCRATCH_3 - [15:0] */ 3635d5315a23SMark Brown 3636d5315a23SMark Brown /* 3637d5315a23SMark Brown * R2852 (0xB24) - DSP2 Control 30 3638d5315a23SMark Brown */ 3639d5315a23SMark Brown #define WM2200_DSP2_DBG_CLK_ENA 0x0008 /* DSP2_DBG_CLK_ENA */ 3640d5315a23SMark Brown #define WM2200_DSP2_DBG_CLK_ENA_MASK 0x0008 /* DSP2_DBG_CLK_ENA */ 3641d5315a23SMark Brown #define WM2200_DSP2_DBG_CLK_ENA_SHIFT 3 /* DSP2_DBG_CLK_ENA */ 3642d5315a23SMark Brown #define WM2200_DSP2_DBG_CLK_ENA_WIDTH 1 /* DSP2_DBG_CLK_ENA */ 3643d5315a23SMark Brown #define WM2200_DSP2_SYS_ENA 0x0004 /* DSP2_SYS_ENA */ 3644d5315a23SMark Brown #define WM2200_DSP2_SYS_ENA_MASK 0x0004 /* DSP2_SYS_ENA */ 3645d5315a23SMark Brown #define WM2200_DSP2_SYS_ENA_SHIFT 2 /* DSP2_SYS_ENA */ 3646d5315a23SMark Brown #define WM2200_DSP2_SYS_ENA_WIDTH 1 /* DSP2_SYS_ENA */ 3647d5315a23SMark Brown #define WM2200_DSP2_CORE_ENA 0x0002 /* DSP2_CORE_ENA */ 3648d5315a23SMark Brown #define WM2200_DSP2_CORE_ENA_MASK 0x0002 /* DSP2_CORE_ENA */ 3649d5315a23SMark Brown #define WM2200_DSP2_CORE_ENA_SHIFT 1 /* DSP2_CORE_ENA */ 3650d5315a23SMark Brown #define WM2200_DSP2_CORE_ENA_WIDTH 1 /* DSP2_CORE_ENA */ 3651d5315a23SMark Brown #define WM2200_DSP2_START 0x0001 /* DSP2_START */ 3652d5315a23SMark Brown #define WM2200_DSP2_START_MASK 0x0001 /* DSP2_START */ 3653d5315a23SMark Brown #define WM2200_DSP2_START_SHIFT 0 /* DSP2_START */ 3654d5315a23SMark Brown #define WM2200_DSP2_START_WIDTH 1 /* DSP2_START */ 3655d5315a23SMark Brown 3656d5315a23SMark Brown /* 3657d5315a23SMark Brown * R2854 (0xB26) - DSP2 Control 31 3658d5315a23SMark Brown */ 3659d5315a23SMark Brown #define WM2200_DSP2_CLK_RATE_MASK 0x0018 /* DSP2_CLK_RATE - [4:3] */ 3660d5315a23SMark Brown #define WM2200_DSP2_CLK_RATE_SHIFT 3 /* DSP2_CLK_RATE - [4:3] */ 3661d5315a23SMark Brown #define WM2200_DSP2_CLK_RATE_WIDTH 2 /* DSP2_CLK_RATE - [4:3] */ 3662d5315a23SMark Brown #define WM2200_DSP2_CLK_AVAIL 0x0004 /* DSP2_CLK_AVAIL */ 3663d5315a23SMark Brown #define WM2200_DSP2_CLK_AVAIL_MASK 0x0004 /* DSP2_CLK_AVAIL */ 3664d5315a23SMark Brown #define WM2200_DSP2_CLK_AVAIL_SHIFT 2 /* DSP2_CLK_AVAIL */ 3665d5315a23SMark Brown #define WM2200_DSP2_CLK_AVAIL_WIDTH 1 /* DSP2_CLK_AVAIL */ 3666d5315a23SMark Brown #define WM2200_DSP2_CLK_REQ_MASK 0x0003 /* DSP2_CLK_REQ - [1:0] */ 3667d5315a23SMark Brown #define WM2200_DSP2_CLK_REQ_SHIFT 0 /* DSP2_CLK_REQ - [1:0] */ 3668d5315a23SMark Brown #define WM2200_DSP2_CLK_REQ_WIDTH 2 /* DSP2_CLK_REQ - [1:0] */ 3669d5315a23SMark Brown 3670d5315a23SMark Brown #endif 3671