103f6fc6dSOder Chiou // SPDX-License-Identifier: GPL-2.0-only 203f6fc6dSOder Chiou // 303f6fc6dSOder Chiou // rt5682-sdw.c -- RT5682 ALSA SoC audio component driver 403f6fc6dSOder Chiou // 503f6fc6dSOder Chiou // Copyright 2019 Realtek Semiconductor Corp. 603f6fc6dSOder Chiou // Author: Oder Chiou <oder_chiou@realtek.com> 703f6fc6dSOder Chiou // 803f6fc6dSOder Chiou 903f6fc6dSOder Chiou #include <linux/module.h> 1003f6fc6dSOder Chiou #include <linux/moduleparam.h> 1103f6fc6dSOder Chiou #include <linux/init.h> 1203f6fc6dSOder Chiou #include <linux/delay.h> 1303f6fc6dSOder Chiou #include <linux/pm.h> 1403f6fc6dSOder Chiou #include <linux/acpi.h> 15a50067d4SArnd Bergmann #include <linux/pm_runtime.h> 1603f6fc6dSOder Chiou #include <linux/regulator/consumer.h> 1703f6fc6dSOder Chiou #include <linux/mutex.h> 1803f6fc6dSOder Chiou #include <linux/soundwire/sdw.h> 1903f6fc6dSOder Chiou #include <linux/soundwire/sdw_type.h> 202acd30b9SPierre-Louis Bossart #include <linux/soundwire/sdw_registers.h> 2103f6fc6dSOder Chiou #include <sound/core.h> 2203f6fc6dSOder Chiou #include <sound/pcm.h> 2303f6fc6dSOder Chiou #include <sound/pcm_params.h> 2403f6fc6dSOder Chiou #include <sound/jack.h> 255b75bc7fSCharles Keepax #include <sound/sdw.h> 2603f6fc6dSOder Chiou #include <sound/soc.h> 2703f6fc6dSOder Chiou #include <sound/soc-dapm.h> 2803f6fc6dSOder Chiou #include <sound/initval.h> 2903f6fc6dSOder Chiou #include <sound/tlv.h> 3003f6fc6dSOder Chiou 3103f6fc6dSOder Chiou #include "rt5682.h" 32a50067d4SArnd Bergmann 33a50067d4SArnd Bergmann #define RT5682_SDW_ADDR_L 0x3000 34a50067d4SArnd Bergmann #define RT5682_SDW_ADDR_H 0x3001 35a50067d4SArnd Bergmann #define RT5682_SDW_DATA_L 0x3004 36a50067d4SArnd Bergmann #define RT5682_SDW_DATA_H 0x3005 37a50067d4SArnd Bergmann #define RT5682_SDW_CMD 0x3008 38a50067d4SArnd Bergmann 39a50067d4SArnd Bergmann static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val) 40a50067d4SArnd Bergmann { 41a50067d4SArnd Bergmann struct device *dev = context; 42a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 43a50067d4SArnd Bergmann unsigned int data_l, data_h; 44a50067d4SArnd Bergmann 45a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0); 46a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 47a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 48a50067d4SArnd Bergmann regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h); 49a50067d4SArnd Bergmann regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l); 50a50067d4SArnd Bergmann 51a50067d4SArnd Bergmann *val = (data_h << 8) | data_l; 52a50067d4SArnd Bergmann 53a50067d4SArnd Bergmann dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val); 54a50067d4SArnd Bergmann 55a50067d4SArnd Bergmann return 0; 56a50067d4SArnd Bergmann } 57a50067d4SArnd Bergmann 58a50067d4SArnd Bergmann static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val) 59a50067d4SArnd Bergmann { 60a50067d4SArnd Bergmann struct device *dev = context; 61a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 62a50067d4SArnd Bergmann 63a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1); 64a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 65a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 66a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff); 67a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff)); 68a50067d4SArnd Bergmann 69a50067d4SArnd Bergmann dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); 70a50067d4SArnd Bergmann 71a50067d4SArnd Bergmann return 0; 72a50067d4SArnd Bergmann } 73a50067d4SArnd Bergmann 74a50067d4SArnd Bergmann static const struct regmap_config rt5682_sdw_indirect_regmap = { 75a50067d4SArnd Bergmann .reg_bits = 16, 76a50067d4SArnd Bergmann .val_bits = 16, 77a50067d4SArnd Bergmann .max_register = RT5682_I2C_MODE, 78a50067d4SArnd Bergmann .volatile_reg = rt5682_volatile_register, 79a50067d4SArnd Bergmann .readable_reg = rt5682_readable_register, 80582ed316SMark Brown .cache_type = REGCACHE_MAPLE, 81a50067d4SArnd Bergmann .reg_defaults = rt5682_reg, 82a50067d4SArnd Bergmann .num_reg_defaults = RT5682_REG_NUM, 83a50067d4SArnd Bergmann .use_single_read = true, 84a50067d4SArnd Bergmann .use_single_write = true, 85a50067d4SArnd Bergmann .reg_read = rt5682_sdw_read, 86a50067d4SArnd Bergmann .reg_write = rt5682_sdw_write, 87a50067d4SArnd Bergmann }; 88a50067d4SArnd Bergmann 89a50067d4SArnd Bergmann static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 90a50067d4SArnd Bergmann int direction) 91a50067d4SArnd Bergmann { 92b3a2e00eSPierre-Louis Bossart snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 93a50067d4SArnd Bergmann 94a50067d4SArnd Bergmann return 0; 95a50067d4SArnd Bergmann } 96a50067d4SArnd Bergmann 97a50067d4SArnd Bergmann static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream, 98a50067d4SArnd Bergmann struct snd_soc_dai *dai) 99a50067d4SArnd Bergmann { 100a50067d4SArnd Bergmann snd_soc_dai_set_dma_data(dai, substream, NULL); 101a50067d4SArnd Bergmann } 102a50067d4SArnd Bergmann 103a50067d4SArnd Bergmann static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream, 104a50067d4SArnd Bergmann struct snd_pcm_hw_params *params, 105a50067d4SArnd Bergmann struct snd_soc_dai *dai) 106a50067d4SArnd Bergmann { 107a50067d4SArnd Bergmann struct snd_soc_component *component = dai->component; 108a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 1095b75bc7fSCharles Keepax struct sdw_stream_config stream_config = {0}; 1105b75bc7fSCharles Keepax struct sdw_port_config port_config = {0}; 111b3a2e00eSPierre-Louis Bossart struct sdw_stream_runtime *sdw_stream; 1125b75bc7fSCharles Keepax int retval; 113a50067d4SArnd Bergmann unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0; 114a50067d4SArnd Bergmann 115a50067d4SArnd Bergmann dev_dbg(dai->dev, "%s %s", __func__, dai->name); 116a50067d4SArnd Bergmann 117b3a2e00eSPierre-Louis Bossart sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 118b3a2e00eSPierre-Louis Bossart if (!sdw_stream) 119a50067d4SArnd Bergmann return -ENOMEM; 120a50067d4SArnd Bergmann 121a50067d4SArnd Bergmann if (!rt5682->slave) 122a50067d4SArnd Bergmann return -EINVAL; 123a50067d4SArnd Bergmann 124a50067d4SArnd Bergmann /* SoundWire specific configuration */ 1255b75bc7fSCharles Keepax snd_sdw_params_to_config(substream, params, &stream_config, &port_config); 126a50067d4SArnd Bergmann 1275b75bc7fSCharles Keepax if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 1285b75bc7fSCharles Keepax port_config.num = 1; 1295b75bc7fSCharles Keepax else 1305b75bc7fSCharles Keepax port_config.num = 2; 131a50067d4SArnd Bergmann 132a50067d4SArnd Bergmann retval = sdw_stream_add_slave(rt5682->slave, &stream_config, 133b3a2e00eSPierre-Louis Bossart &port_config, 1, sdw_stream); 134a50067d4SArnd Bergmann if (retval) { 135a50067d4SArnd Bergmann dev_err(dai->dev, "Unable to configure port\n"); 136a50067d4SArnd Bergmann return retval; 137a50067d4SArnd Bergmann } 138a50067d4SArnd Bergmann 139a50067d4SArnd Bergmann switch (params_rate(params)) { 140a50067d4SArnd Bergmann case 48000: 141a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_48K; 142a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_48K; 143a50067d4SArnd Bergmann break; 144a50067d4SArnd Bergmann case 96000: 145a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_96K; 146a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_96K; 147a50067d4SArnd Bergmann break; 148a50067d4SArnd Bergmann case 192000: 149a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_192K; 150a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_192K; 151a50067d4SArnd Bergmann break; 152a50067d4SArnd Bergmann case 32000: 153a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_32K; 154a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_32K; 155a50067d4SArnd Bergmann break; 156a50067d4SArnd Bergmann case 24000: 157a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_24K; 158a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_24K; 159a50067d4SArnd Bergmann break; 160a50067d4SArnd Bergmann case 16000: 161a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_16K; 162a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_16K; 163a50067d4SArnd Bergmann break; 164a50067d4SArnd Bergmann case 12000: 165a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_12K; 166a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_12K; 167a50067d4SArnd Bergmann break; 168a50067d4SArnd Bergmann case 8000: 169a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_8K; 170a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_8K; 171a50067d4SArnd Bergmann break; 172a50067d4SArnd Bergmann case 44100: 173a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_44K; 174a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_44K; 175a50067d4SArnd Bergmann break; 176a50067d4SArnd Bergmann case 88200: 177a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_88K; 178a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_88K; 179a50067d4SArnd Bergmann break; 180a50067d4SArnd Bergmann case 176400: 181a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_176K; 182a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_176K; 183a50067d4SArnd Bergmann break; 184a50067d4SArnd Bergmann case 22050: 185a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_22K; 186a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_22K; 187a50067d4SArnd Bergmann break; 188a50067d4SArnd Bergmann case 11025: 189a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_11K; 190a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_11K; 191a50067d4SArnd Bergmann break; 192a50067d4SArnd Bergmann default: 193a50067d4SArnd Bergmann return -EINVAL; 194a50067d4SArnd Bergmann } 195a50067d4SArnd Bergmann 196a50067d4SArnd Bergmann if (params_rate(params) <= 48000) { 197a50067d4SArnd Bergmann osr_p = RT5682_DAC_OSR_D_8; 198a50067d4SArnd Bergmann osr_c = RT5682_ADC_OSR_D_8; 199a50067d4SArnd Bergmann } else if (params_rate(params) <= 96000) { 200a50067d4SArnd Bergmann osr_p = RT5682_DAC_OSR_D_4; 201a50067d4SArnd Bergmann osr_c = RT5682_ADC_OSR_D_4; 202a50067d4SArnd Bergmann } else { 203a50067d4SArnd Bergmann osr_p = RT5682_DAC_OSR_D_2; 204a50067d4SArnd Bergmann osr_c = RT5682_ADC_OSR_D_2; 205a50067d4SArnd Bergmann } 206a50067d4SArnd Bergmann 207a50067d4SArnd Bergmann if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 208a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 209a50067d4SArnd Bergmann RT5682_SDW_REF_1_MASK, val_p); 210a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 211a50067d4SArnd Bergmann RT5682_DAC_OSR_MASK, osr_p); 212a50067d4SArnd Bergmann } else { 213a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 214a50067d4SArnd Bergmann RT5682_SDW_REF_2_MASK, val_c); 215a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 216a50067d4SArnd Bergmann RT5682_ADC_OSR_MASK, osr_c); 217a50067d4SArnd Bergmann } 218a50067d4SArnd Bergmann 219a50067d4SArnd Bergmann return retval; 220a50067d4SArnd Bergmann } 221a50067d4SArnd Bergmann 222a50067d4SArnd Bergmann static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream, 223a50067d4SArnd Bergmann struct snd_soc_dai *dai) 224a50067d4SArnd Bergmann { 225a50067d4SArnd Bergmann struct snd_soc_component *component = dai->component; 226a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 227b3a2e00eSPierre-Louis Bossart struct sdw_stream_runtime *sdw_stream = 228a50067d4SArnd Bergmann snd_soc_dai_get_dma_data(dai, substream); 229a50067d4SArnd Bergmann 230a50067d4SArnd Bergmann if (!rt5682->slave) 231a50067d4SArnd Bergmann return -EINVAL; 232a50067d4SArnd Bergmann 233b3a2e00eSPierre-Louis Bossart sdw_stream_remove_slave(rt5682->slave, sdw_stream); 234a50067d4SArnd Bergmann return 0; 235a50067d4SArnd Bergmann } 236a50067d4SArnd Bergmann 237f9e56a34SRikard Falkeborn static const struct snd_soc_dai_ops rt5682_sdw_ops = { 238a50067d4SArnd Bergmann .hw_params = rt5682_sdw_hw_params, 239a50067d4SArnd Bergmann .hw_free = rt5682_sdw_hw_free, 240e8444560SPierre-Louis Bossart .set_stream = rt5682_set_sdw_stream, 241a50067d4SArnd Bergmann .shutdown = rt5682_sdw_shutdown, 242a50067d4SArnd Bergmann }; 243a50067d4SArnd Bergmann 244a50067d4SArnd Bergmann static struct snd_soc_dai_driver rt5682_dai[] = { 245a50067d4SArnd Bergmann { 246a50067d4SArnd Bergmann .name = "rt5682-aif1", 247a50067d4SArnd Bergmann .id = RT5682_AIF1, 248a50067d4SArnd Bergmann .playback = { 249a50067d4SArnd Bergmann .stream_name = "AIF1 Playback", 250a50067d4SArnd Bergmann .channels_min = 1, 251a50067d4SArnd Bergmann .channels_max = 2, 252a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 253a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 254a50067d4SArnd Bergmann }, 255a50067d4SArnd Bergmann .capture = { 256a50067d4SArnd Bergmann .stream_name = "AIF1 Capture", 257a50067d4SArnd Bergmann .channels_min = 1, 258a50067d4SArnd Bergmann .channels_max = 2, 259a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 260a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 261a50067d4SArnd Bergmann }, 262a50067d4SArnd Bergmann .ops = &rt5682_aif1_dai_ops, 263a50067d4SArnd Bergmann }, 264a50067d4SArnd Bergmann { 265a50067d4SArnd Bergmann .name = "rt5682-aif2", 266a50067d4SArnd Bergmann .id = RT5682_AIF2, 267a50067d4SArnd Bergmann .capture = { 268a50067d4SArnd Bergmann .stream_name = "AIF2 Capture", 269a50067d4SArnd Bergmann .channels_min = 1, 270a50067d4SArnd Bergmann .channels_max = 2, 271a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 272a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 273a50067d4SArnd Bergmann }, 274a50067d4SArnd Bergmann .ops = &rt5682_aif2_dai_ops, 275a50067d4SArnd Bergmann }, 276a50067d4SArnd Bergmann { 277a50067d4SArnd Bergmann .name = "rt5682-sdw", 278a50067d4SArnd Bergmann .id = RT5682_SDW, 279a50067d4SArnd Bergmann .playback = { 280a50067d4SArnd Bergmann .stream_name = "SDW Playback", 281a50067d4SArnd Bergmann .channels_min = 1, 282a50067d4SArnd Bergmann .channels_max = 2, 283a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 284a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 285a50067d4SArnd Bergmann }, 286a50067d4SArnd Bergmann .capture = { 287a50067d4SArnd Bergmann .stream_name = "SDW Capture", 288a50067d4SArnd Bergmann .channels_min = 1, 289a50067d4SArnd Bergmann .channels_max = 2, 290a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 291a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 292a50067d4SArnd Bergmann }, 293a50067d4SArnd Bergmann .ops = &rt5682_sdw_ops, 294a50067d4SArnd Bergmann }, 295a50067d4SArnd Bergmann }; 296a50067d4SArnd Bergmann 297a50067d4SArnd Bergmann static int rt5682_sdw_init(struct device *dev, struct regmap *regmap, 298a50067d4SArnd Bergmann struct sdw_slave *slave) 299a50067d4SArnd Bergmann { 300a50067d4SArnd Bergmann struct rt5682_priv *rt5682; 301a50067d4SArnd Bergmann int ret; 302a50067d4SArnd Bergmann 303a50067d4SArnd Bergmann rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL); 304a50067d4SArnd Bergmann if (!rt5682) 305a50067d4SArnd Bergmann return -ENOMEM; 306a50067d4SArnd Bergmann 307a50067d4SArnd Bergmann dev_set_drvdata(dev, rt5682); 308a50067d4SArnd Bergmann rt5682->slave = slave; 309a50067d4SArnd Bergmann rt5682->sdw_regmap = regmap; 310a50067d4SArnd Bergmann rt5682->is_sdw = true; 311a50067d4SArnd Bergmann 31214f4946dSPierre-Louis Bossart mutex_init(&rt5682->disable_irq_lock); 31314f4946dSPierre-Louis Bossart 314a50067d4SArnd Bergmann rt5682->regmap = devm_regmap_init(dev, NULL, dev, 315a50067d4SArnd Bergmann &rt5682_sdw_indirect_regmap); 316a50067d4SArnd Bergmann if (IS_ERR(rt5682->regmap)) { 317a50067d4SArnd Bergmann ret = PTR_ERR(rt5682->regmap); 318a50067d4SArnd Bergmann dev_err(dev, "Failed to allocate register map: %d\n", 319a50067d4SArnd Bergmann ret); 320a50067d4SArnd Bergmann return ret; 321a50067d4SArnd Bergmann } 322a50067d4SArnd Bergmann 323*ed117017SLinus Walleij 324*ed117017SLinus Walleij ret = rt5682_get_ldo1(rt5682, dev); 325*ed117017SLinus Walleij if (ret) 326*ed117017SLinus Walleij return ret; 327*ed117017SLinus Walleij 3286ab18105SPierre-Louis Bossart regcache_cache_only(rt5682->sdw_regmap, true); 3296ab18105SPierre-Louis Bossart regcache_cache_only(rt5682->regmap, true); 3306ab18105SPierre-Louis Bossart 331a50067d4SArnd Bergmann /* 332a50067d4SArnd Bergmann * Mark hw_init to false 333a50067d4SArnd Bergmann * HW init will be performed when device reports present 334a50067d4SArnd Bergmann */ 335a50067d4SArnd Bergmann rt5682->hw_init = false; 336a50067d4SArnd Bergmann rt5682->first_hw_init = false; 337a50067d4SArnd Bergmann 338a50067d4SArnd Bergmann mutex_init(&rt5682->calibrate_mutex); 339a50067d4SArnd Bergmann INIT_DELAYED_WORK(&rt5682->jack_detect_work, 340a50067d4SArnd Bergmann rt5682_jack_detect_handler); 341a50067d4SArnd Bergmann 342a50067d4SArnd Bergmann ret = devm_snd_soc_register_component(dev, 343a50067d4SArnd Bergmann &rt5682_soc_component_dev, 344a50067d4SArnd Bergmann rt5682_dai, ARRAY_SIZE(rt5682_dai)); 3454af11e11SPierre-Louis Bossart if (ret < 0) 3464af11e11SPierre-Louis Bossart return ret; 3474af11e11SPierre-Louis Bossart 3484af11e11SPierre-Louis Bossart /* set autosuspend parameters */ 3494af11e11SPierre-Louis Bossart pm_runtime_set_autosuspend_delay(dev, 3000); 3504af11e11SPierre-Louis Bossart pm_runtime_use_autosuspend(dev); 3514af11e11SPierre-Louis Bossart 3524af11e11SPierre-Louis Bossart /* make sure the device does not suspend immediately */ 3534af11e11SPierre-Louis Bossart pm_runtime_mark_last_busy(dev); 3544af11e11SPierre-Louis Bossart 3554af11e11SPierre-Louis Bossart pm_runtime_enable(dev); 3564af11e11SPierre-Louis Bossart 3574af11e11SPierre-Louis Bossart /* important note: the device is NOT tagged as 'active' and will remain 3584af11e11SPierre-Louis Bossart * 'suspended' until the hardware is enumerated/initialized. This is required 3594af11e11SPierre-Louis Bossart * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently 3604af11e11SPierre-Louis Bossart * fail with -EACCESS because of race conditions between card creation and enumeration 3614af11e11SPierre-Louis Bossart */ 3624af11e11SPierre-Louis Bossart 3634af11e11SPierre-Louis Bossart dev_dbg(dev, "%s\n", __func__); 364a50067d4SArnd Bergmann 365a50067d4SArnd Bergmann return ret; 366a50067d4SArnd Bergmann } 367a50067d4SArnd Bergmann 368a50067d4SArnd Bergmann static int rt5682_io_init(struct device *dev, struct sdw_slave *slave) 369a50067d4SArnd Bergmann { 370a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 371867f8d18SShuming Fan int ret = 0, loop = 10; 372a50067d4SArnd Bergmann unsigned int val; 373a50067d4SArnd Bergmann 37414f4946dSPierre-Louis Bossart rt5682->disable_irq = false; 37514f4946dSPierre-Louis Bossart 376a50067d4SArnd Bergmann if (rt5682->hw_init) 377a50067d4SArnd Bergmann return 0; 378a50067d4SArnd Bergmann 3796ab18105SPierre-Louis Bossart regcache_cache_only(rt5682->sdw_regmap, false); 3806ab18105SPierre-Louis Bossart regcache_cache_only(rt5682->regmap, false); 3816ab18105SPierre-Louis Bossart if (rt5682->first_hw_init) 3826ab18105SPierre-Louis Bossart regcache_cache_bypass(rt5682->regmap, true); 3836ab18105SPierre-Louis Bossart 384a50067d4SArnd Bergmann /* 3854af11e11SPierre-Louis Bossart * PM runtime status is marked as 'active' only when a Slave reports as Attached 386a50067d4SArnd Bergmann */ 3874af11e11SPierre-Louis Bossart if (!rt5682->first_hw_init) 388a50067d4SArnd Bergmann /* update count of parent 'active' children */ 389a50067d4SArnd Bergmann pm_runtime_set_active(&slave->dev); 390a50067d4SArnd Bergmann 391a50067d4SArnd Bergmann pm_runtime_get_noresume(&slave->dev); 392a50067d4SArnd Bergmann 393867f8d18SShuming Fan while (loop > 0) { 394867f8d18SShuming Fan regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); 395867f8d18SShuming Fan if (val == DEVICE_ID) 396867f8d18SShuming Fan break; 397867f8d18SShuming Fan dev_warn(dev, "Device with ID register %x is not rt5682\n", val); 398867f8d18SShuming Fan usleep_range(30000, 30005); 399867f8d18SShuming Fan loop--; 400867f8d18SShuming Fan } 4019266d954SOder Chiou 402867f8d18SShuming Fan if (val != DEVICE_ID) { 403867f8d18SShuming Fan dev_err(dev, "Device with ID register %x is not rt5682\n", val); 4049266d954SOder Chiou ret = -ENODEV; 4059266d954SOder Chiou goto err_nodev; 406867f8d18SShuming Fan } 407867f8d18SShuming Fan 408a50067d4SArnd Bergmann rt5682_calibrate(rt5682); 409a50067d4SArnd Bergmann 410a50067d4SArnd Bergmann if (rt5682->first_hw_init) { 411a50067d4SArnd Bergmann regcache_cache_bypass(rt5682->regmap, false); 412a50067d4SArnd Bergmann regcache_mark_dirty(rt5682->regmap); 413a50067d4SArnd Bergmann regcache_sync(rt5682->regmap); 414a50067d4SArnd Bergmann 415a50067d4SArnd Bergmann /* volatile registers */ 416a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 417a50067d4SArnd Bergmann RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 418a50067d4SArnd Bergmann 419a50067d4SArnd Bergmann goto reinit; 420a50067d4SArnd Bergmann } 421a50067d4SArnd Bergmann 422a50067d4SArnd Bergmann rt5682_apply_patch_list(rt5682, dev); 423a50067d4SArnd Bergmann 424a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); 425a50067d4SArnd Bergmann 426a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, 427a50067d4SArnd Bergmann RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, 428a50067d4SArnd Bergmann RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); 4296301adf9SShuming Fan regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080); 430a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); 431a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, 432a50067d4SArnd Bergmann RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); 433a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, 434a50067d4SArnd Bergmann RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); 435a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, 436a50067d4SArnd Bergmann RT5682_PM_HP_MASK, RT5682_PM_HP_HV); 437a50067d4SArnd Bergmann 438a50067d4SArnd Bergmann /* Soundwire */ 439a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266); 440a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700); 441a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006); 442a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600); 443a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f); 444a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000); 445a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000); 446a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK, 447a50067d4SArnd Bergmann RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK, 448a50067d4SArnd Bergmann RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW); 449a50067d4SArnd Bergmann 450a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 451a50067d4SArnd Bergmann RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 45249783c6fSOder Chiou regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142); 45349783c6fSOder Chiou regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600); 454a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3, 455a50067d4SArnd Bergmann RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN); 456a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1, 457a50067d4SArnd Bergmann RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN); 458a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, 459a50067d4SArnd Bergmann RT5682_POW_IRQ | RT5682_POW_JDH | 460a50067d4SArnd Bergmann RT5682_POW_ANA, RT5682_POW_IRQ | 461a50067d4SArnd Bergmann RT5682_POW_JDH | RT5682_POW_ANA); 462a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, 463a50067d4SArnd Bergmann RT5682_PWR_JDH, RT5682_PWR_JDH); 464a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, 465a50067d4SArnd Bergmann RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK, 466a50067d4SArnd Bergmann RT5682_JD1_EN | RT5682_JD1_IRQ_PUL); 467a50067d4SArnd Bergmann 468a50067d4SArnd Bergmann reinit: 469a50067d4SArnd Bergmann mod_delayed_work(system_power_efficient_wq, 470a50067d4SArnd Bergmann &rt5682->jack_detect_work, msecs_to_jiffies(250)); 471a50067d4SArnd Bergmann 472a50067d4SArnd Bergmann /* Mark Slave initialization complete */ 473a50067d4SArnd Bergmann rt5682->hw_init = true; 474a50067d4SArnd Bergmann rt5682->first_hw_init = true; 475a50067d4SArnd Bergmann 4769266d954SOder Chiou err_nodev: 477a50067d4SArnd Bergmann pm_runtime_mark_last_busy(&slave->dev); 478a50067d4SArnd Bergmann pm_runtime_put_autosuspend(&slave->dev); 479a50067d4SArnd Bergmann 4809266d954SOder Chiou dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret); 481a50067d4SArnd Bergmann 482a50067d4SArnd Bergmann return ret; 483a50067d4SArnd Bergmann } 48403f6fc6dSOder Chiou 48503f6fc6dSOder Chiou static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg) 48603f6fc6dSOder Chiou { 48703f6fc6dSOder Chiou switch (reg) { 48803f6fc6dSOder Chiou case 0x00e0: 48903f6fc6dSOder Chiou case 0x00f0: 49003f6fc6dSOder Chiou case 0x3000: 49103f6fc6dSOder Chiou case 0x3001: 49203f6fc6dSOder Chiou case 0x3004: 49303f6fc6dSOder Chiou case 0x3005: 49403f6fc6dSOder Chiou case 0x3008: 49503f6fc6dSOder Chiou return true; 49603f6fc6dSOder Chiou default: 49703f6fc6dSOder Chiou return false; 49803f6fc6dSOder Chiou } 49903f6fc6dSOder Chiou } 50003f6fc6dSOder Chiou 501a50067d4SArnd Bergmann static const struct regmap_config rt5682_sdw_regmap = { 50203f6fc6dSOder Chiou .name = "sdw", 50303f6fc6dSOder Chiou .reg_bits = 32, 50403f6fc6dSOder Chiou .val_bits = 8, 50503f6fc6dSOder Chiou .max_register = RT5682_I2C_MODE, 50603f6fc6dSOder Chiou .readable_reg = rt5682_sdw_readable_register, 50703f6fc6dSOder Chiou .cache_type = REGCACHE_NONE, 50803f6fc6dSOder Chiou .use_single_read = true, 50903f6fc6dSOder Chiou .use_single_write = true, 51003f6fc6dSOder Chiou }; 51103f6fc6dSOder Chiou 51203f6fc6dSOder Chiou static int rt5682_update_status(struct sdw_slave *slave, 51303f6fc6dSOder Chiou enum sdw_slave_status status) 51403f6fc6dSOder Chiou { 51503f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 51603f6fc6dSOder Chiou 51703f6fc6dSOder Chiou if (status == SDW_SLAVE_UNATTACHED) 51803f6fc6dSOder Chiou rt5682->hw_init = false; 51903f6fc6dSOder Chiou 52003f6fc6dSOder Chiou /* 52103f6fc6dSOder Chiou * Perform initialization only if slave status is present and 52203f6fc6dSOder Chiou * hw_init flag is false 52303f6fc6dSOder Chiou */ 524758665b1SKrzysztof Kozlowski if (rt5682->hw_init || status != SDW_SLAVE_ATTACHED) 52503f6fc6dSOder Chiou return 0; 52603f6fc6dSOder Chiou 52703f6fc6dSOder Chiou /* perform I/O transfers required for Slave initialization */ 52803f6fc6dSOder Chiou return rt5682_io_init(&slave->dev, slave); 52903f6fc6dSOder Chiou } 53003f6fc6dSOder Chiou 53103f6fc6dSOder Chiou static int rt5682_read_prop(struct sdw_slave *slave) 53203f6fc6dSOder Chiou { 53303f6fc6dSOder Chiou struct sdw_slave_prop *prop = &slave->prop; 534d0bbcb4eSPierre-Louis Bossart int nval, i; 53503f6fc6dSOder Chiou u32 bit; 53603f6fc6dSOder Chiou unsigned long addr; 53703f6fc6dSOder Chiou struct sdw_dpn_prop *dpn; 53803f6fc6dSOder Chiou 5392acd30b9SPierre-Louis Bossart prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | 5402acd30b9SPierre-Louis Bossart SDW_SCP_INT1_PARITY; 54138edbfaeSPierre-Louis Bossart prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 5422acd30b9SPierre-Louis Bossart 54303f6fc6dSOder Chiou prop->paging_support = false; 54403f6fc6dSOder Chiou 54503f6fc6dSOder Chiou /* first we need to allocate memory for set bits in port lists */ 54603f6fc6dSOder Chiou prop->source_ports = 0x4; /* BITMAP: 00000100 */ 54703f6fc6dSOder Chiou prop->sink_ports = 0x2; /* BITMAP: 00000010 */ 54803f6fc6dSOder Chiou 54903f6fc6dSOder Chiou nval = hweight32(prop->source_ports); 55003f6fc6dSOder Chiou prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 55103f6fc6dSOder Chiou sizeof(*prop->src_dpn_prop), 55203f6fc6dSOder Chiou GFP_KERNEL); 55303f6fc6dSOder Chiou if (!prop->src_dpn_prop) 55403f6fc6dSOder Chiou return -ENOMEM; 55503f6fc6dSOder Chiou 55603f6fc6dSOder Chiou i = 0; 55703f6fc6dSOder Chiou dpn = prop->src_dpn_prop; 55803f6fc6dSOder Chiou addr = prop->source_ports; 55903f6fc6dSOder Chiou for_each_set_bit(bit, &addr, 32) { 56003f6fc6dSOder Chiou dpn[i].num = bit; 56103f6fc6dSOder Chiou dpn[i].type = SDW_DPN_FULL; 56203f6fc6dSOder Chiou dpn[i].simple_ch_prep_sm = true; 56303f6fc6dSOder Chiou dpn[i].ch_prep_timeout = 10; 56403f6fc6dSOder Chiou i++; 56503f6fc6dSOder Chiou } 56603f6fc6dSOder Chiou 56703f6fc6dSOder Chiou /* do this again for sink now */ 56803f6fc6dSOder Chiou nval = hweight32(prop->sink_ports); 56903f6fc6dSOder Chiou prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 57003f6fc6dSOder Chiou sizeof(*prop->sink_dpn_prop), 57103f6fc6dSOder Chiou GFP_KERNEL); 57203f6fc6dSOder Chiou if (!prop->sink_dpn_prop) 57303f6fc6dSOder Chiou return -ENOMEM; 57403f6fc6dSOder Chiou 57503f6fc6dSOder Chiou i = 0; 57603f6fc6dSOder Chiou dpn = prop->sink_dpn_prop; 57703f6fc6dSOder Chiou addr = prop->sink_ports; 57803f6fc6dSOder Chiou for_each_set_bit(bit, &addr, 32) { 57903f6fc6dSOder Chiou dpn[i].num = bit; 58003f6fc6dSOder Chiou dpn[i].type = SDW_DPN_FULL; 58103f6fc6dSOder Chiou dpn[i].simple_ch_prep_sm = true; 58203f6fc6dSOder Chiou dpn[i].ch_prep_timeout = 10; 58303f6fc6dSOder Chiou i++; 58403f6fc6dSOder Chiou } 58503f6fc6dSOder Chiou 58603f6fc6dSOder Chiou /* set the timeout values */ 58703f6fc6dSOder Chiou prop->clk_stop_timeout = 20; 58803f6fc6dSOder Chiou 58903f6fc6dSOder Chiou /* wake-up event */ 59003f6fc6dSOder Chiou prop->wake_capable = 1; 59103f6fc6dSOder Chiou 59203f6fc6dSOder Chiou return 0; 59303f6fc6dSOder Chiou } 59403f6fc6dSOder Chiou 59503f6fc6dSOder Chiou /* Bus clock frequency */ 59603f6fc6dSOder Chiou #define RT5682_CLK_FREQ_9600000HZ 9600000 59703f6fc6dSOder Chiou #define RT5682_CLK_FREQ_12000000HZ 12000000 59803f6fc6dSOder Chiou #define RT5682_CLK_FREQ_6000000HZ 6000000 59903f6fc6dSOder Chiou #define RT5682_CLK_FREQ_4800000HZ 4800000 60003f6fc6dSOder Chiou #define RT5682_CLK_FREQ_2400000HZ 2400000 60103f6fc6dSOder Chiou #define RT5682_CLK_FREQ_12288000HZ 12288000 60203f6fc6dSOder Chiou 603a3c2e894SYueHaibing static int rt5682_clock_config(struct device *dev) 60403f6fc6dSOder Chiou { 60503f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 60603f6fc6dSOder Chiou unsigned int clk_freq, value; 60703f6fc6dSOder Chiou 60803f6fc6dSOder Chiou clk_freq = (rt5682->params.curr_dr_freq >> 1); 60903f6fc6dSOder Chiou 61003f6fc6dSOder Chiou switch (clk_freq) { 61103f6fc6dSOder Chiou case RT5682_CLK_FREQ_12000000HZ: 61203f6fc6dSOder Chiou value = 0x0; 61303f6fc6dSOder Chiou break; 61403f6fc6dSOder Chiou case RT5682_CLK_FREQ_6000000HZ: 61503f6fc6dSOder Chiou value = 0x1; 61603f6fc6dSOder Chiou break; 61703f6fc6dSOder Chiou case RT5682_CLK_FREQ_9600000HZ: 61803f6fc6dSOder Chiou value = 0x2; 61903f6fc6dSOder Chiou break; 62003f6fc6dSOder Chiou case RT5682_CLK_FREQ_4800000HZ: 62103f6fc6dSOder Chiou value = 0x3; 62203f6fc6dSOder Chiou break; 62303f6fc6dSOder Chiou case RT5682_CLK_FREQ_2400000HZ: 62403f6fc6dSOder Chiou value = 0x4; 62503f6fc6dSOder Chiou break; 62603f6fc6dSOder Chiou case RT5682_CLK_FREQ_12288000HZ: 62703f6fc6dSOder Chiou value = 0x5; 62803f6fc6dSOder Chiou break; 62903f6fc6dSOder Chiou default: 63003f6fc6dSOder Chiou return -EINVAL; 63103f6fc6dSOder Chiou } 63203f6fc6dSOder Chiou 63303f6fc6dSOder Chiou regmap_write(rt5682->sdw_regmap, 0xe0, value); 63403f6fc6dSOder Chiou regmap_write(rt5682->sdw_regmap, 0xf0, value); 63503f6fc6dSOder Chiou 63603f6fc6dSOder Chiou dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq); 63703f6fc6dSOder Chiou 63803f6fc6dSOder Chiou return 0; 63903f6fc6dSOder Chiou } 64003f6fc6dSOder Chiou 64103f6fc6dSOder Chiou static int rt5682_bus_config(struct sdw_slave *slave, 64203f6fc6dSOder Chiou struct sdw_bus_params *params) 64303f6fc6dSOder Chiou { 64403f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 64503f6fc6dSOder Chiou int ret; 64603f6fc6dSOder Chiou 64703f6fc6dSOder Chiou memcpy(&rt5682->params, params, sizeof(*params)); 64803f6fc6dSOder Chiou 64903f6fc6dSOder Chiou ret = rt5682_clock_config(&slave->dev); 65003f6fc6dSOder Chiou if (ret < 0) 65103f6fc6dSOder Chiou dev_err(&slave->dev, "Invalid clk config"); 65203f6fc6dSOder Chiou 65303f6fc6dSOder Chiou return ret; 65403f6fc6dSOder Chiou } 65503f6fc6dSOder Chiou 65603f6fc6dSOder Chiou static int rt5682_interrupt_callback(struct sdw_slave *slave, 65703f6fc6dSOder Chiou struct sdw_slave_intr_status *status) 65803f6fc6dSOder Chiou { 65903f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 66003f6fc6dSOder Chiou 66103f6fc6dSOder Chiou dev_dbg(&slave->dev, 66203f6fc6dSOder Chiou "%s control_port_stat=%x", __func__, status->control_port); 66303f6fc6dSOder Chiou 66414f4946dSPierre-Louis Bossart mutex_lock(&rt5682->disable_irq_lock); 66514f4946dSPierre-Louis Bossart if (status->control_port & 0x4 && !rt5682->disable_irq) { 66603f6fc6dSOder Chiou mod_delayed_work(system_power_efficient_wq, 66754271282SShuming Fan &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time)); 66803f6fc6dSOder Chiou } 66914f4946dSPierre-Louis Bossart mutex_unlock(&rt5682->disable_irq_lock); 67003f6fc6dSOder Chiou 67103f6fc6dSOder Chiou return 0; 67203f6fc6dSOder Chiou } 67303f6fc6dSOder Chiou 674628fc9d9SRikard Falkeborn static const struct sdw_slave_ops rt5682_slave_ops = { 67503f6fc6dSOder Chiou .read_prop = rt5682_read_prop, 67603f6fc6dSOder Chiou .interrupt_callback = rt5682_interrupt_callback, 67703f6fc6dSOder Chiou .update_status = rt5682_update_status, 67803f6fc6dSOder Chiou .bus_config = rt5682_bus_config, 67903f6fc6dSOder Chiou }; 68003f6fc6dSOder Chiou 68103f6fc6dSOder Chiou static int rt5682_sdw_probe(struct sdw_slave *slave, 68203f6fc6dSOder Chiou const struct sdw_device_id *id) 68303f6fc6dSOder Chiou { 68403f6fc6dSOder Chiou struct regmap *regmap; 68503f6fc6dSOder Chiou 68603f6fc6dSOder Chiou /* Regmap Initialization */ 68703f6fc6dSOder Chiou regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap); 68803f6fc6dSOder Chiou if (IS_ERR(regmap)) 68903f6fc6dSOder Chiou return -EINVAL; 69003f6fc6dSOder Chiou 6913f3d66baSPierre-Louis Bossart return rt5682_sdw_init(&slave->dev, regmap, slave); 69203f6fc6dSOder Chiou } 69303f6fc6dSOder Chiou 69403f6fc6dSOder Chiou static int rt5682_sdw_remove(struct sdw_slave *slave) 69503f6fc6dSOder Chiou { 69603f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 69703f6fc6dSOder Chiou 698ac63716dSPierre-Louis Bossart if (rt5682->hw_init) 699c792c369SPierre-Louis Bossart cancel_delayed_work_sync(&rt5682->jack_detect_work); 70003f6fc6dSOder Chiou 701ac63716dSPierre-Louis Bossart pm_runtime_disable(&slave->dev); 702ac63716dSPierre-Louis Bossart 70303f6fc6dSOder Chiou return 0; 70403f6fc6dSOder Chiou } 70503f6fc6dSOder Chiou 70603f6fc6dSOder Chiou static const struct sdw_device_id rt5682_id[] = { 7079e473058SPierre-Louis Bossart SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0), 70803f6fc6dSOder Chiou {}, 70903f6fc6dSOder Chiou }; 71003f6fc6dSOder Chiou MODULE_DEVICE_TABLE(sdw, rt5682_id); 71103f6fc6dSOder Chiou 712724cc62fSPierre-Louis Bossart static int __maybe_unused rt5682_dev_suspend(struct device *dev) 71303f6fc6dSOder Chiou { 71403f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 71503f6fc6dSOder Chiou 71603f6fc6dSOder Chiou if (!rt5682->hw_init) 71703f6fc6dSOder Chiou return 0; 71803f6fc6dSOder Chiou 719c792c369SPierre-Louis Bossart cancel_delayed_work_sync(&rt5682->jack_detect_work); 720c792c369SPierre-Louis Bossart 7216ab18105SPierre-Louis Bossart regcache_cache_only(rt5682->sdw_regmap, true); 72203f6fc6dSOder Chiou regcache_cache_only(rt5682->regmap, true); 72303f6fc6dSOder Chiou regcache_mark_dirty(rt5682->regmap); 72403f6fc6dSOder Chiou 72503f6fc6dSOder Chiou return 0; 72603f6fc6dSOder Chiou } 72703f6fc6dSOder Chiou 72814f4946dSPierre-Louis Bossart static int __maybe_unused rt5682_dev_system_suspend(struct device *dev) 72914f4946dSPierre-Louis Bossart { 73014f4946dSPierre-Louis Bossart struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 73114f4946dSPierre-Louis Bossart struct sdw_slave *slave = dev_to_sdw_dev(dev); 73214f4946dSPierre-Louis Bossart int ret; 73314f4946dSPierre-Louis Bossart 73414f4946dSPierre-Louis Bossart if (!rt5682->hw_init) 73514f4946dSPierre-Louis Bossart return 0; 73614f4946dSPierre-Louis Bossart 73714f4946dSPierre-Louis Bossart /* 73814f4946dSPierre-Louis Bossart * prevent new interrupts from being handled after the 73914f4946dSPierre-Louis Bossart * deferred work completes and before the parent disables 74014f4946dSPierre-Louis Bossart * interrupts on the link 74114f4946dSPierre-Louis Bossart */ 74214f4946dSPierre-Louis Bossart mutex_lock(&rt5682->disable_irq_lock); 74314f4946dSPierre-Louis Bossart rt5682->disable_irq = true; 74414f4946dSPierre-Louis Bossart ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, 74514f4946dSPierre-Louis Bossart SDW_SCP_INT1_IMPL_DEF, 0); 74614f4946dSPierre-Louis Bossart mutex_unlock(&rt5682->disable_irq_lock); 74714f4946dSPierre-Louis Bossart 74814f4946dSPierre-Louis Bossart if (ret < 0) { 74914f4946dSPierre-Louis Bossart /* log but don't prevent suspend from happening */ 75014f4946dSPierre-Louis Bossart dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__); 75114f4946dSPierre-Louis Bossart } 75214f4946dSPierre-Louis Bossart 75314f4946dSPierre-Louis Bossart return rt5682_dev_suspend(dev); 75414f4946dSPierre-Louis Bossart } 75514f4946dSPierre-Louis Bossart 756724cc62fSPierre-Louis Bossart static int __maybe_unused rt5682_dev_resume(struct device *dev) 75703f6fc6dSOder Chiou { 75803f6fc6dSOder Chiou struct sdw_slave *slave = dev_to_sdw_dev(dev); 75903f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 76003f6fc6dSOder Chiou unsigned long time; 76103f6fc6dSOder Chiou 7625361a421SPierre-Louis Bossart if (!rt5682->first_hw_init) 76303f6fc6dSOder Chiou return 0; 76403f6fc6dSOder Chiou 76502fb23d7SShuming Fan if (!slave->unattach_request) { 76602fb23d7SShuming Fan if (rt5682->disable_irq == true) { 76702fb23d7SShuming Fan mutex_lock(&rt5682->disable_irq_lock); 76802fb23d7SShuming Fan sdw_write_no_pm(slave, SDW_SCP_INTMASK1, SDW_SCP_INT1_IMPL_DEF); 76902fb23d7SShuming Fan rt5682->disable_irq = false; 77002fb23d7SShuming Fan mutex_unlock(&rt5682->disable_irq_lock); 77102fb23d7SShuming Fan } 77203f6fc6dSOder Chiou goto regmap_sync; 77302fb23d7SShuming Fan } 77403f6fc6dSOder Chiou 77503f6fc6dSOder Chiou time = wait_for_completion_timeout(&slave->initialization_complete, 77603f6fc6dSOder Chiou msecs_to_jiffies(RT5682_PROBE_TIMEOUT)); 77703f6fc6dSOder Chiou if (!time) { 77803f6fc6dSOder Chiou dev_err(&slave->dev, "Initialization not complete, timed out\n"); 779917df025SPierre-Louis Bossart sdw_show_ping_status(slave->bus, true); 780917df025SPierre-Louis Bossart 78103f6fc6dSOder Chiou return -ETIMEDOUT; 78203f6fc6dSOder Chiou } 78303f6fc6dSOder Chiou 78403f6fc6dSOder Chiou regmap_sync: 78503f6fc6dSOder Chiou slave->unattach_request = 0; 7866ab18105SPierre-Louis Bossart regcache_cache_only(rt5682->sdw_regmap, false); 78703f6fc6dSOder Chiou regcache_cache_only(rt5682->regmap, false); 78803f6fc6dSOder Chiou regcache_sync(rt5682->regmap); 78903f6fc6dSOder Chiou 79003f6fc6dSOder Chiou return 0; 79103f6fc6dSOder Chiou } 79203f6fc6dSOder Chiou 79303f6fc6dSOder Chiou static const struct dev_pm_ops rt5682_pm = { 79414f4946dSPierre-Louis Bossart SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume) 79503f6fc6dSOder Chiou SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL) 79603f6fc6dSOder Chiou }; 79703f6fc6dSOder Chiou 79803f6fc6dSOder Chiou static struct sdw_driver rt5682_sdw_driver = { 79903f6fc6dSOder Chiou .driver = { 80003f6fc6dSOder Chiou .name = "rt5682", 80103f6fc6dSOder Chiou .owner = THIS_MODULE, 80203f6fc6dSOder Chiou .pm = &rt5682_pm, 80303f6fc6dSOder Chiou }, 80403f6fc6dSOder Chiou .probe = rt5682_sdw_probe, 80503f6fc6dSOder Chiou .remove = rt5682_sdw_remove, 80603f6fc6dSOder Chiou .ops = &rt5682_slave_ops, 80703f6fc6dSOder Chiou .id_table = rt5682_id, 80803f6fc6dSOder Chiou }; 80903f6fc6dSOder Chiou module_sdw_driver(rt5682_sdw_driver); 81003f6fc6dSOder Chiou 81103f6fc6dSOder Chiou MODULE_DESCRIPTION("ASoC RT5682 driver SDW"); 81203f6fc6dSOder Chiou MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); 81303f6fc6dSOder Chiou MODULE_LICENSE("GPL v2"); 814