103f6fc6dSOder Chiou // SPDX-License-Identifier: GPL-2.0-only 203f6fc6dSOder Chiou // 303f6fc6dSOder Chiou // rt5682-sdw.c -- RT5682 ALSA SoC audio component driver 403f6fc6dSOder Chiou // 503f6fc6dSOder Chiou // Copyright 2019 Realtek Semiconductor Corp. 603f6fc6dSOder Chiou // Author: Oder Chiou <oder_chiou@realtek.com> 703f6fc6dSOder Chiou // 803f6fc6dSOder Chiou 903f6fc6dSOder Chiou #include <linux/module.h> 1003f6fc6dSOder Chiou #include <linux/moduleparam.h> 1103f6fc6dSOder Chiou #include <linux/init.h> 1203f6fc6dSOder Chiou #include <linux/delay.h> 1303f6fc6dSOder Chiou #include <linux/pm.h> 1403f6fc6dSOder Chiou #include <linux/acpi.h> 1503f6fc6dSOder Chiou #include <linux/gpio.h> 1603f6fc6dSOder Chiou #include <linux/of_gpio.h> 17a50067d4SArnd Bergmann #include <linux/pm_runtime.h> 1803f6fc6dSOder Chiou #include <linux/regulator/consumer.h> 1903f6fc6dSOder Chiou #include <linux/mutex.h> 2003f6fc6dSOder Chiou #include <linux/soundwire/sdw.h> 2103f6fc6dSOder Chiou #include <linux/soundwire/sdw_type.h> 222acd30b9SPierre-Louis Bossart #include <linux/soundwire/sdw_registers.h> 2303f6fc6dSOder Chiou #include <sound/core.h> 2403f6fc6dSOder Chiou #include <sound/pcm.h> 2503f6fc6dSOder Chiou #include <sound/pcm_params.h> 2603f6fc6dSOder Chiou #include <sound/jack.h> 2703f6fc6dSOder Chiou #include <sound/soc.h> 2803f6fc6dSOder Chiou #include <sound/soc-dapm.h> 2903f6fc6dSOder Chiou #include <sound/initval.h> 3003f6fc6dSOder Chiou #include <sound/tlv.h> 3103f6fc6dSOder Chiou 3203f6fc6dSOder Chiou #include "rt5682.h" 33a50067d4SArnd Bergmann 34a50067d4SArnd Bergmann #define RT5682_SDW_ADDR_L 0x3000 35a50067d4SArnd Bergmann #define RT5682_SDW_ADDR_H 0x3001 36a50067d4SArnd Bergmann #define RT5682_SDW_DATA_L 0x3004 37a50067d4SArnd Bergmann #define RT5682_SDW_DATA_H 0x3005 38a50067d4SArnd Bergmann #define RT5682_SDW_CMD 0x3008 39a50067d4SArnd Bergmann 40a50067d4SArnd Bergmann static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val) 41a50067d4SArnd Bergmann { 42a50067d4SArnd Bergmann struct device *dev = context; 43a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 44a50067d4SArnd Bergmann unsigned int data_l, data_h; 45a50067d4SArnd Bergmann 46a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0); 47a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 48a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 49a50067d4SArnd Bergmann regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h); 50a50067d4SArnd Bergmann regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l); 51a50067d4SArnd Bergmann 52a50067d4SArnd Bergmann *val = (data_h << 8) | data_l; 53a50067d4SArnd Bergmann 54a50067d4SArnd Bergmann dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val); 55a50067d4SArnd Bergmann 56a50067d4SArnd Bergmann return 0; 57a50067d4SArnd Bergmann } 58a50067d4SArnd Bergmann 59a50067d4SArnd Bergmann static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val) 60a50067d4SArnd Bergmann { 61a50067d4SArnd Bergmann struct device *dev = context; 62a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 63a50067d4SArnd Bergmann 64a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1); 65a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 66a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 67a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff); 68a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff)); 69a50067d4SArnd Bergmann 70a50067d4SArnd Bergmann dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); 71a50067d4SArnd Bergmann 72a50067d4SArnd Bergmann return 0; 73a50067d4SArnd Bergmann } 74a50067d4SArnd Bergmann 75a50067d4SArnd Bergmann static const struct regmap_config rt5682_sdw_indirect_regmap = { 76a50067d4SArnd Bergmann .reg_bits = 16, 77a50067d4SArnd Bergmann .val_bits = 16, 78a50067d4SArnd Bergmann .max_register = RT5682_I2C_MODE, 79a50067d4SArnd Bergmann .volatile_reg = rt5682_volatile_register, 80a50067d4SArnd Bergmann .readable_reg = rt5682_readable_register, 81a50067d4SArnd Bergmann .cache_type = REGCACHE_RBTREE, 82a50067d4SArnd Bergmann .reg_defaults = rt5682_reg, 83a50067d4SArnd Bergmann .num_reg_defaults = RT5682_REG_NUM, 84a50067d4SArnd Bergmann .use_single_read = true, 85a50067d4SArnd Bergmann .use_single_write = true, 86a50067d4SArnd Bergmann .reg_read = rt5682_sdw_read, 87a50067d4SArnd Bergmann .reg_write = rt5682_sdw_write, 88a50067d4SArnd Bergmann }; 89a50067d4SArnd Bergmann 90a50067d4SArnd Bergmann struct sdw_stream_data { 91a50067d4SArnd Bergmann struct sdw_stream_runtime *sdw_stream; 92a50067d4SArnd Bergmann }; 93a50067d4SArnd Bergmann 94a50067d4SArnd Bergmann static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 95a50067d4SArnd Bergmann int direction) 96a50067d4SArnd Bergmann { 97a50067d4SArnd Bergmann struct sdw_stream_data *stream; 98a50067d4SArnd Bergmann 99a50067d4SArnd Bergmann if (!sdw_stream) 100a50067d4SArnd Bergmann return 0; 101a50067d4SArnd Bergmann 102a50067d4SArnd Bergmann stream = kzalloc(sizeof(*stream), GFP_KERNEL); 103a50067d4SArnd Bergmann if (!stream) 104a50067d4SArnd Bergmann return -ENOMEM; 105a50067d4SArnd Bergmann 1064a550007SPierre-Louis Bossart stream->sdw_stream = sdw_stream; 107a50067d4SArnd Bergmann 108a50067d4SArnd Bergmann /* Use tx_mask or rx_mask to configure stream tag and set dma_data */ 109a50067d4SArnd Bergmann if (direction == SNDRV_PCM_STREAM_PLAYBACK) 110a50067d4SArnd Bergmann dai->playback_dma_data = stream; 111a50067d4SArnd Bergmann else 112a50067d4SArnd Bergmann dai->capture_dma_data = stream; 113a50067d4SArnd Bergmann 114a50067d4SArnd Bergmann return 0; 115a50067d4SArnd Bergmann } 116a50067d4SArnd Bergmann 117a50067d4SArnd Bergmann static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream, 118a50067d4SArnd Bergmann struct snd_soc_dai *dai) 119a50067d4SArnd Bergmann { 120a50067d4SArnd Bergmann struct sdw_stream_data *stream; 121a50067d4SArnd Bergmann 122a50067d4SArnd Bergmann stream = snd_soc_dai_get_dma_data(dai, substream); 123a50067d4SArnd Bergmann snd_soc_dai_set_dma_data(dai, substream, NULL); 124a50067d4SArnd Bergmann kfree(stream); 125a50067d4SArnd Bergmann } 126a50067d4SArnd Bergmann 127a50067d4SArnd Bergmann static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream, 128a50067d4SArnd Bergmann struct snd_pcm_hw_params *params, 129a50067d4SArnd Bergmann struct snd_soc_dai *dai) 130a50067d4SArnd Bergmann { 131a50067d4SArnd Bergmann struct snd_soc_component *component = dai->component; 132a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 133a50067d4SArnd Bergmann struct sdw_stream_config stream_config; 134a50067d4SArnd Bergmann struct sdw_port_config port_config; 135a50067d4SArnd Bergmann enum sdw_data_direction direction; 136a50067d4SArnd Bergmann struct sdw_stream_data *stream; 137a50067d4SArnd Bergmann int retval, port, num_channels; 138a50067d4SArnd Bergmann unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0; 139a50067d4SArnd Bergmann 140a50067d4SArnd Bergmann dev_dbg(dai->dev, "%s %s", __func__, dai->name); 141a50067d4SArnd Bergmann 142a50067d4SArnd Bergmann stream = snd_soc_dai_get_dma_data(dai, substream); 143a50067d4SArnd Bergmann if (!stream) 144a50067d4SArnd Bergmann return -ENOMEM; 145a50067d4SArnd Bergmann 146a50067d4SArnd Bergmann if (!rt5682->slave) 147a50067d4SArnd Bergmann return -EINVAL; 148a50067d4SArnd Bergmann 149a50067d4SArnd Bergmann /* SoundWire specific configuration */ 150a50067d4SArnd Bergmann if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 151a50067d4SArnd Bergmann direction = SDW_DATA_DIR_RX; 152a50067d4SArnd Bergmann port = 1; 153a50067d4SArnd Bergmann } else { 154a50067d4SArnd Bergmann direction = SDW_DATA_DIR_TX; 155a50067d4SArnd Bergmann port = 2; 156a50067d4SArnd Bergmann } 157a50067d4SArnd Bergmann 158a50067d4SArnd Bergmann stream_config.frame_rate = params_rate(params); 159a50067d4SArnd Bergmann stream_config.ch_count = params_channels(params); 160a50067d4SArnd Bergmann stream_config.bps = snd_pcm_format_width(params_format(params)); 161a50067d4SArnd Bergmann stream_config.direction = direction; 162a50067d4SArnd Bergmann 163a50067d4SArnd Bergmann num_channels = params_channels(params); 164a50067d4SArnd Bergmann port_config.ch_mask = (1 << (num_channels)) - 1; 165a50067d4SArnd Bergmann port_config.num = port; 166a50067d4SArnd Bergmann 167a50067d4SArnd Bergmann retval = sdw_stream_add_slave(rt5682->slave, &stream_config, 168a50067d4SArnd Bergmann &port_config, 1, stream->sdw_stream); 169a50067d4SArnd Bergmann if (retval) { 170a50067d4SArnd Bergmann dev_err(dai->dev, "Unable to configure port\n"); 171a50067d4SArnd Bergmann return retval; 172a50067d4SArnd Bergmann } 173a50067d4SArnd Bergmann 174a50067d4SArnd Bergmann switch (params_rate(params)) { 175a50067d4SArnd Bergmann case 48000: 176a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_48K; 177a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_48K; 178a50067d4SArnd Bergmann break; 179a50067d4SArnd Bergmann case 96000: 180a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_96K; 181a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_96K; 182a50067d4SArnd Bergmann break; 183a50067d4SArnd Bergmann case 192000: 184a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_192K; 185a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_192K; 186a50067d4SArnd Bergmann break; 187a50067d4SArnd Bergmann case 32000: 188a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_32K; 189a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_32K; 190a50067d4SArnd Bergmann break; 191a50067d4SArnd Bergmann case 24000: 192a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_24K; 193a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_24K; 194a50067d4SArnd Bergmann break; 195a50067d4SArnd Bergmann case 16000: 196a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_16K; 197a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_16K; 198a50067d4SArnd Bergmann break; 199a50067d4SArnd Bergmann case 12000: 200a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_12K; 201a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_12K; 202a50067d4SArnd Bergmann break; 203a50067d4SArnd Bergmann case 8000: 204a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_8K; 205a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_8K; 206a50067d4SArnd Bergmann break; 207a50067d4SArnd Bergmann case 44100: 208a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_44K; 209a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_44K; 210a50067d4SArnd Bergmann break; 211a50067d4SArnd Bergmann case 88200: 212a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_88K; 213a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_88K; 214a50067d4SArnd Bergmann break; 215a50067d4SArnd Bergmann case 176400: 216a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_176K; 217a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_176K; 218a50067d4SArnd Bergmann break; 219a50067d4SArnd Bergmann case 22050: 220a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_22K; 221a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_22K; 222a50067d4SArnd Bergmann break; 223a50067d4SArnd Bergmann case 11025: 224a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_11K; 225a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_11K; 226a50067d4SArnd Bergmann break; 227a50067d4SArnd Bergmann default: 228a50067d4SArnd Bergmann return -EINVAL; 229a50067d4SArnd Bergmann } 230a50067d4SArnd Bergmann 231a50067d4SArnd Bergmann if (params_rate(params) <= 48000) { 232a50067d4SArnd Bergmann osr_p = RT5682_DAC_OSR_D_8; 233a50067d4SArnd Bergmann osr_c = RT5682_ADC_OSR_D_8; 234a50067d4SArnd Bergmann } else if (params_rate(params) <= 96000) { 235a50067d4SArnd Bergmann osr_p = RT5682_DAC_OSR_D_4; 236a50067d4SArnd Bergmann osr_c = RT5682_ADC_OSR_D_4; 237a50067d4SArnd Bergmann } else { 238a50067d4SArnd Bergmann osr_p = RT5682_DAC_OSR_D_2; 239a50067d4SArnd Bergmann osr_c = RT5682_ADC_OSR_D_2; 240a50067d4SArnd Bergmann } 241a50067d4SArnd Bergmann 242a50067d4SArnd Bergmann if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 243a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 244a50067d4SArnd Bergmann RT5682_SDW_REF_1_MASK, val_p); 245a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 246a50067d4SArnd Bergmann RT5682_DAC_OSR_MASK, osr_p); 247a50067d4SArnd Bergmann } else { 248a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 249a50067d4SArnd Bergmann RT5682_SDW_REF_2_MASK, val_c); 250a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 251a50067d4SArnd Bergmann RT5682_ADC_OSR_MASK, osr_c); 252a50067d4SArnd Bergmann } 253a50067d4SArnd Bergmann 254a50067d4SArnd Bergmann return retval; 255a50067d4SArnd Bergmann } 256a50067d4SArnd Bergmann 257a50067d4SArnd Bergmann static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream, 258a50067d4SArnd Bergmann struct snd_soc_dai *dai) 259a50067d4SArnd Bergmann { 260a50067d4SArnd Bergmann struct snd_soc_component *component = dai->component; 261a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 262a50067d4SArnd Bergmann struct sdw_stream_data *stream = 263a50067d4SArnd Bergmann snd_soc_dai_get_dma_data(dai, substream); 264a50067d4SArnd Bergmann 265a50067d4SArnd Bergmann if (!rt5682->slave) 266a50067d4SArnd Bergmann return -EINVAL; 267a50067d4SArnd Bergmann 268a50067d4SArnd Bergmann sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream); 269a50067d4SArnd Bergmann return 0; 270a50067d4SArnd Bergmann } 271a50067d4SArnd Bergmann 272f9e56a34SRikard Falkeborn static const struct snd_soc_dai_ops rt5682_sdw_ops = { 273a50067d4SArnd Bergmann .hw_params = rt5682_sdw_hw_params, 274a50067d4SArnd Bergmann .hw_free = rt5682_sdw_hw_free, 275e8444560SPierre-Louis Bossart .set_stream = rt5682_set_sdw_stream, 276a50067d4SArnd Bergmann .shutdown = rt5682_sdw_shutdown, 277a50067d4SArnd Bergmann }; 278a50067d4SArnd Bergmann 279a50067d4SArnd Bergmann static struct snd_soc_dai_driver rt5682_dai[] = { 280a50067d4SArnd Bergmann { 281a50067d4SArnd Bergmann .name = "rt5682-aif1", 282a50067d4SArnd Bergmann .id = RT5682_AIF1, 283a50067d4SArnd Bergmann .playback = { 284a50067d4SArnd Bergmann .stream_name = "AIF1 Playback", 285a50067d4SArnd Bergmann .channels_min = 1, 286a50067d4SArnd Bergmann .channels_max = 2, 287a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 288a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 289a50067d4SArnd Bergmann }, 290a50067d4SArnd Bergmann .capture = { 291a50067d4SArnd Bergmann .stream_name = "AIF1 Capture", 292a50067d4SArnd Bergmann .channels_min = 1, 293a50067d4SArnd Bergmann .channels_max = 2, 294a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 295a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 296a50067d4SArnd Bergmann }, 297a50067d4SArnd Bergmann .ops = &rt5682_aif1_dai_ops, 298a50067d4SArnd Bergmann }, 299a50067d4SArnd Bergmann { 300a50067d4SArnd Bergmann .name = "rt5682-aif2", 301a50067d4SArnd Bergmann .id = RT5682_AIF2, 302a50067d4SArnd Bergmann .capture = { 303a50067d4SArnd Bergmann .stream_name = "AIF2 Capture", 304a50067d4SArnd Bergmann .channels_min = 1, 305a50067d4SArnd Bergmann .channels_max = 2, 306a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 307a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 308a50067d4SArnd Bergmann }, 309a50067d4SArnd Bergmann .ops = &rt5682_aif2_dai_ops, 310a50067d4SArnd Bergmann }, 311a50067d4SArnd Bergmann { 312a50067d4SArnd Bergmann .name = "rt5682-sdw", 313a50067d4SArnd Bergmann .id = RT5682_SDW, 314a50067d4SArnd Bergmann .playback = { 315a50067d4SArnd Bergmann .stream_name = "SDW Playback", 316a50067d4SArnd Bergmann .channels_min = 1, 317a50067d4SArnd Bergmann .channels_max = 2, 318a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 319a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 320a50067d4SArnd Bergmann }, 321a50067d4SArnd Bergmann .capture = { 322a50067d4SArnd Bergmann .stream_name = "SDW Capture", 323a50067d4SArnd Bergmann .channels_min = 1, 324a50067d4SArnd Bergmann .channels_max = 2, 325a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 326a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 327a50067d4SArnd Bergmann }, 328a50067d4SArnd Bergmann .ops = &rt5682_sdw_ops, 329a50067d4SArnd Bergmann }, 330a50067d4SArnd Bergmann }; 331a50067d4SArnd Bergmann 332a50067d4SArnd Bergmann static int rt5682_sdw_init(struct device *dev, struct regmap *regmap, 333a50067d4SArnd Bergmann struct sdw_slave *slave) 334a50067d4SArnd Bergmann { 335a50067d4SArnd Bergmann struct rt5682_priv *rt5682; 336a50067d4SArnd Bergmann int ret; 337a50067d4SArnd Bergmann 338a50067d4SArnd Bergmann rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL); 339a50067d4SArnd Bergmann if (!rt5682) 340a50067d4SArnd Bergmann return -ENOMEM; 341a50067d4SArnd Bergmann 342a50067d4SArnd Bergmann dev_set_drvdata(dev, rt5682); 343a50067d4SArnd Bergmann rt5682->slave = slave; 344a50067d4SArnd Bergmann rt5682->sdw_regmap = regmap; 345a50067d4SArnd Bergmann rt5682->is_sdw = true; 346a50067d4SArnd Bergmann 34714f4946dSPierre-Louis Bossart mutex_init(&rt5682->disable_irq_lock); 34814f4946dSPierre-Louis Bossart 349a50067d4SArnd Bergmann rt5682->regmap = devm_regmap_init(dev, NULL, dev, 350a50067d4SArnd Bergmann &rt5682_sdw_indirect_regmap); 351a50067d4SArnd Bergmann if (IS_ERR(rt5682->regmap)) { 352a50067d4SArnd Bergmann ret = PTR_ERR(rt5682->regmap); 353a50067d4SArnd Bergmann dev_err(dev, "Failed to allocate register map: %d\n", 354a50067d4SArnd Bergmann ret); 355a50067d4SArnd Bergmann return ret; 356a50067d4SArnd Bergmann } 357a50067d4SArnd Bergmann 358a50067d4SArnd Bergmann /* 359a50067d4SArnd Bergmann * Mark hw_init to false 360a50067d4SArnd Bergmann * HW init will be performed when device reports present 361a50067d4SArnd Bergmann */ 362a50067d4SArnd Bergmann rt5682->hw_init = false; 363a50067d4SArnd Bergmann rt5682->first_hw_init = false; 364a50067d4SArnd Bergmann 365a50067d4SArnd Bergmann mutex_init(&rt5682->calibrate_mutex); 366a50067d4SArnd Bergmann INIT_DELAYED_WORK(&rt5682->jack_detect_work, 367a50067d4SArnd Bergmann rt5682_jack_detect_handler); 368a50067d4SArnd Bergmann 369a50067d4SArnd Bergmann ret = devm_snd_soc_register_component(dev, 370a50067d4SArnd Bergmann &rt5682_soc_component_dev, 371a50067d4SArnd Bergmann rt5682_dai, ARRAY_SIZE(rt5682_dai)); 372a50067d4SArnd Bergmann dev_dbg(&slave->dev, "%s\n", __func__); 373a50067d4SArnd Bergmann 374a50067d4SArnd Bergmann return ret; 375a50067d4SArnd Bergmann } 376a50067d4SArnd Bergmann 377a50067d4SArnd Bergmann static int rt5682_io_init(struct device *dev, struct sdw_slave *slave) 378a50067d4SArnd Bergmann { 379a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 380867f8d18SShuming Fan int ret = 0, loop = 10; 381a50067d4SArnd Bergmann unsigned int val; 382a50067d4SArnd Bergmann 38314f4946dSPierre-Louis Bossart rt5682->disable_irq = false; 38414f4946dSPierre-Louis Bossart 385a50067d4SArnd Bergmann if (rt5682->hw_init) 386a50067d4SArnd Bergmann return 0; 387a50067d4SArnd Bergmann 388a50067d4SArnd Bergmann /* 389a50067d4SArnd Bergmann * PM runtime is only enabled when a Slave reports as Attached 390a50067d4SArnd Bergmann */ 391a50067d4SArnd Bergmann if (!rt5682->first_hw_init) { 392a50067d4SArnd Bergmann /* set autosuspend parameters */ 393a50067d4SArnd Bergmann pm_runtime_set_autosuspend_delay(&slave->dev, 3000); 394a50067d4SArnd Bergmann pm_runtime_use_autosuspend(&slave->dev); 395a50067d4SArnd Bergmann 396a50067d4SArnd Bergmann /* update count of parent 'active' children */ 397a50067d4SArnd Bergmann pm_runtime_set_active(&slave->dev); 398a50067d4SArnd Bergmann 399a50067d4SArnd Bergmann /* make sure the device does not suspend immediately */ 400a50067d4SArnd Bergmann pm_runtime_mark_last_busy(&slave->dev); 401a50067d4SArnd Bergmann 402a50067d4SArnd Bergmann pm_runtime_enable(&slave->dev); 403a50067d4SArnd Bergmann } 404a50067d4SArnd Bergmann 405a50067d4SArnd Bergmann pm_runtime_get_noresume(&slave->dev); 406a50067d4SArnd Bergmann 407c0372bc8SBard Liao if (rt5682->first_hw_init) { 408c0372bc8SBard Liao regcache_cache_only(rt5682->regmap, false); 409c0372bc8SBard Liao regcache_cache_bypass(rt5682->regmap, true); 410c0372bc8SBard Liao } 411c0372bc8SBard Liao 412867f8d18SShuming Fan while (loop > 0) { 413867f8d18SShuming Fan regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); 414867f8d18SShuming Fan if (val == DEVICE_ID) 415867f8d18SShuming Fan break; 416867f8d18SShuming Fan dev_warn(dev, "Device with ID register %x is not rt5682\n", val); 417867f8d18SShuming Fan usleep_range(30000, 30005); 418867f8d18SShuming Fan loop--; 419867f8d18SShuming Fan } 4209266d954SOder Chiou 421867f8d18SShuming Fan if (val != DEVICE_ID) { 422867f8d18SShuming Fan dev_err(dev, "Device with ID register %x is not rt5682\n", val); 4239266d954SOder Chiou ret = -ENODEV; 4249266d954SOder Chiou goto err_nodev; 425867f8d18SShuming Fan } 426867f8d18SShuming Fan 427a50067d4SArnd Bergmann rt5682_calibrate(rt5682); 428a50067d4SArnd Bergmann 429a50067d4SArnd Bergmann if (rt5682->first_hw_init) { 430a50067d4SArnd Bergmann regcache_cache_bypass(rt5682->regmap, false); 431a50067d4SArnd Bergmann regcache_mark_dirty(rt5682->regmap); 432a50067d4SArnd Bergmann regcache_sync(rt5682->regmap); 433a50067d4SArnd Bergmann 434a50067d4SArnd Bergmann /* volatile registers */ 435a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 436a50067d4SArnd Bergmann RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 437a50067d4SArnd Bergmann 438a50067d4SArnd Bergmann goto reinit; 439a50067d4SArnd Bergmann } 440a50067d4SArnd Bergmann 441a50067d4SArnd Bergmann rt5682_apply_patch_list(rt5682, dev); 442a50067d4SArnd Bergmann 443a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); 444a50067d4SArnd Bergmann 445a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, 446a50067d4SArnd Bergmann RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, 447a50067d4SArnd Bergmann RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); 4486301adf9SShuming Fan regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080); 449a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); 450a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, 451a50067d4SArnd Bergmann RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); 452a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, 453a50067d4SArnd Bergmann RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); 454a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, 455a50067d4SArnd Bergmann RT5682_PM_HP_MASK, RT5682_PM_HP_HV); 456a50067d4SArnd Bergmann 457a50067d4SArnd Bergmann /* Soundwire */ 458a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266); 459a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700); 460a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006); 461a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600); 462a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f); 463a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000); 464a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000); 465a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK, 466a50067d4SArnd Bergmann RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK, 467a50067d4SArnd Bergmann RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW); 468a50067d4SArnd Bergmann 469a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 470a50067d4SArnd Bergmann RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 47149783c6fSOder Chiou regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142); 47249783c6fSOder Chiou regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600); 473a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3, 474a50067d4SArnd Bergmann RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN); 475a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1, 476a50067d4SArnd Bergmann RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN); 477a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, 478a50067d4SArnd Bergmann RT5682_POW_IRQ | RT5682_POW_JDH | 479a50067d4SArnd Bergmann RT5682_POW_ANA, RT5682_POW_IRQ | 480a50067d4SArnd Bergmann RT5682_POW_JDH | RT5682_POW_ANA); 481a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, 482a50067d4SArnd Bergmann RT5682_PWR_JDH, RT5682_PWR_JDH); 483a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, 484a50067d4SArnd Bergmann RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK, 485a50067d4SArnd Bergmann RT5682_JD1_EN | RT5682_JD1_IRQ_PUL); 486a50067d4SArnd Bergmann 487a50067d4SArnd Bergmann reinit: 488a50067d4SArnd Bergmann mod_delayed_work(system_power_efficient_wq, 489a50067d4SArnd Bergmann &rt5682->jack_detect_work, msecs_to_jiffies(250)); 490a50067d4SArnd Bergmann 491a50067d4SArnd Bergmann /* Mark Slave initialization complete */ 492a50067d4SArnd Bergmann rt5682->hw_init = true; 493a50067d4SArnd Bergmann rt5682->first_hw_init = true; 494a50067d4SArnd Bergmann 4959266d954SOder Chiou err_nodev: 496a50067d4SArnd Bergmann pm_runtime_mark_last_busy(&slave->dev); 497a50067d4SArnd Bergmann pm_runtime_put_autosuspend(&slave->dev); 498a50067d4SArnd Bergmann 4999266d954SOder Chiou dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret); 500a50067d4SArnd Bergmann 501a50067d4SArnd Bergmann return ret; 502a50067d4SArnd Bergmann } 50303f6fc6dSOder Chiou 50403f6fc6dSOder Chiou static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg) 50503f6fc6dSOder Chiou { 50603f6fc6dSOder Chiou switch (reg) { 50703f6fc6dSOder Chiou case 0x00e0: 50803f6fc6dSOder Chiou case 0x00f0: 50903f6fc6dSOder Chiou case 0x3000: 51003f6fc6dSOder Chiou case 0x3001: 51103f6fc6dSOder Chiou case 0x3004: 51203f6fc6dSOder Chiou case 0x3005: 51303f6fc6dSOder Chiou case 0x3008: 51403f6fc6dSOder Chiou return true; 51503f6fc6dSOder Chiou default: 51603f6fc6dSOder Chiou return false; 51703f6fc6dSOder Chiou } 51803f6fc6dSOder Chiou } 51903f6fc6dSOder Chiou 520a50067d4SArnd Bergmann static const struct regmap_config rt5682_sdw_regmap = { 52103f6fc6dSOder Chiou .name = "sdw", 52203f6fc6dSOder Chiou .reg_bits = 32, 52303f6fc6dSOder Chiou .val_bits = 8, 52403f6fc6dSOder Chiou .max_register = RT5682_I2C_MODE, 52503f6fc6dSOder Chiou .readable_reg = rt5682_sdw_readable_register, 52603f6fc6dSOder Chiou .cache_type = REGCACHE_NONE, 52703f6fc6dSOder Chiou .use_single_read = true, 52803f6fc6dSOder Chiou .use_single_write = true, 52903f6fc6dSOder Chiou }; 53003f6fc6dSOder Chiou 53103f6fc6dSOder Chiou static int rt5682_update_status(struct sdw_slave *slave, 53203f6fc6dSOder Chiou enum sdw_slave_status status) 53303f6fc6dSOder Chiou { 53403f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 53503f6fc6dSOder Chiou 53603f6fc6dSOder Chiou /* Update the status */ 53703f6fc6dSOder Chiou rt5682->status = status; 53803f6fc6dSOder Chiou 53903f6fc6dSOder Chiou if (status == SDW_SLAVE_UNATTACHED) 54003f6fc6dSOder Chiou rt5682->hw_init = false; 54103f6fc6dSOder Chiou 54203f6fc6dSOder Chiou /* 54303f6fc6dSOder Chiou * Perform initialization only if slave status is present and 54403f6fc6dSOder Chiou * hw_init flag is false 54503f6fc6dSOder Chiou */ 54603f6fc6dSOder Chiou if (rt5682->hw_init || rt5682->status != SDW_SLAVE_ATTACHED) 54703f6fc6dSOder Chiou return 0; 54803f6fc6dSOder Chiou 54903f6fc6dSOder Chiou /* perform I/O transfers required for Slave initialization */ 55003f6fc6dSOder Chiou return rt5682_io_init(&slave->dev, slave); 55103f6fc6dSOder Chiou } 55203f6fc6dSOder Chiou 55303f6fc6dSOder Chiou static int rt5682_read_prop(struct sdw_slave *slave) 55403f6fc6dSOder Chiou { 55503f6fc6dSOder Chiou struct sdw_slave_prop *prop = &slave->prop; 556d0bbcb4eSPierre-Louis Bossart int nval, i; 55703f6fc6dSOder Chiou u32 bit; 55803f6fc6dSOder Chiou unsigned long addr; 55903f6fc6dSOder Chiou struct sdw_dpn_prop *dpn; 56003f6fc6dSOder Chiou 5612acd30b9SPierre-Louis Bossart prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | 5622acd30b9SPierre-Louis Bossart SDW_SCP_INT1_PARITY; 56338edbfaeSPierre-Louis Bossart prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 5642acd30b9SPierre-Louis Bossart 56503f6fc6dSOder Chiou prop->paging_support = false; 56603f6fc6dSOder Chiou 56703f6fc6dSOder Chiou /* first we need to allocate memory for set bits in port lists */ 56803f6fc6dSOder Chiou prop->source_ports = 0x4; /* BITMAP: 00000100 */ 56903f6fc6dSOder Chiou prop->sink_ports = 0x2; /* BITMAP: 00000010 */ 57003f6fc6dSOder Chiou 57103f6fc6dSOder Chiou nval = hweight32(prop->source_ports); 57203f6fc6dSOder Chiou prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 57303f6fc6dSOder Chiou sizeof(*prop->src_dpn_prop), 57403f6fc6dSOder Chiou GFP_KERNEL); 57503f6fc6dSOder Chiou if (!prop->src_dpn_prop) 57603f6fc6dSOder Chiou return -ENOMEM; 57703f6fc6dSOder Chiou 57803f6fc6dSOder Chiou i = 0; 57903f6fc6dSOder Chiou dpn = prop->src_dpn_prop; 58003f6fc6dSOder Chiou addr = prop->source_ports; 58103f6fc6dSOder Chiou for_each_set_bit(bit, &addr, 32) { 58203f6fc6dSOder Chiou dpn[i].num = bit; 58303f6fc6dSOder Chiou dpn[i].type = SDW_DPN_FULL; 58403f6fc6dSOder Chiou dpn[i].simple_ch_prep_sm = true; 58503f6fc6dSOder Chiou dpn[i].ch_prep_timeout = 10; 58603f6fc6dSOder Chiou i++; 58703f6fc6dSOder Chiou } 58803f6fc6dSOder Chiou 58903f6fc6dSOder Chiou /* do this again for sink now */ 59003f6fc6dSOder Chiou nval = hweight32(prop->sink_ports); 59103f6fc6dSOder Chiou prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 59203f6fc6dSOder Chiou sizeof(*prop->sink_dpn_prop), 59303f6fc6dSOder Chiou GFP_KERNEL); 59403f6fc6dSOder Chiou if (!prop->sink_dpn_prop) 59503f6fc6dSOder Chiou return -ENOMEM; 59603f6fc6dSOder Chiou 59703f6fc6dSOder Chiou i = 0; 59803f6fc6dSOder Chiou dpn = prop->sink_dpn_prop; 59903f6fc6dSOder Chiou addr = prop->sink_ports; 60003f6fc6dSOder Chiou for_each_set_bit(bit, &addr, 32) { 60103f6fc6dSOder Chiou dpn[i].num = bit; 60203f6fc6dSOder Chiou dpn[i].type = SDW_DPN_FULL; 60303f6fc6dSOder Chiou dpn[i].simple_ch_prep_sm = true; 60403f6fc6dSOder Chiou dpn[i].ch_prep_timeout = 10; 60503f6fc6dSOder Chiou i++; 60603f6fc6dSOder Chiou } 60703f6fc6dSOder Chiou 60803f6fc6dSOder Chiou /* set the timeout values */ 60903f6fc6dSOder Chiou prop->clk_stop_timeout = 20; 61003f6fc6dSOder Chiou 61103f6fc6dSOder Chiou /* wake-up event */ 61203f6fc6dSOder Chiou prop->wake_capable = 1; 61303f6fc6dSOder Chiou 61403f6fc6dSOder Chiou return 0; 61503f6fc6dSOder Chiou } 61603f6fc6dSOder Chiou 61703f6fc6dSOder Chiou /* Bus clock frequency */ 61803f6fc6dSOder Chiou #define RT5682_CLK_FREQ_9600000HZ 9600000 61903f6fc6dSOder Chiou #define RT5682_CLK_FREQ_12000000HZ 12000000 62003f6fc6dSOder Chiou #define RT5682_CLK_FREQ_6000000HZ 6000000 62103f6fc6dSOder Chiou #define RT5682_CLK_FREQ_4800000HZ 4800000 62203f6fc6dSOder Chiou #define RT5682_CLK_FREQ_2400000HZ 2400000 62303f6fc6dSOder Chiou #define RT5682_CLK_FREQ_12288000HZ 12288000 62403f6fc6dSOder Chiou 625a3c2e894SYueHaibing static int rt5682_clock_config(struct device *dev) 62603f6fc6dSOder Chiou { 62703f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 62803f6fc6dSOder Chiou unsigned int clk_freq, value; 62903f6fc6dSOder Chiou 63003f6fc6dSOder Chiou clk_freq = (rt5682->params.curr_dr_freq >> 1); 63103f6fc6dSOder Chiou 63203f6fc6dSOder Chiou switch (clk_freq) { 63303f6fc6dSOder Chiou case RT5682_CLK_FREQ_12000000HZ: 63403f6fc6dSOder Chiou value = 0x0; 63503f6fc6dSOder Chiou break; 63603f6fc6dSOder Chiou case RT5682_CLK_FREQ_6000000HZ: 63703f6fc6dSOder Chiou value = 0x1; 63803f6fc6dSOder Chiou break; 63903f6fc6dSOder Chiou case RT5682_CLK_FREQ_9600000HZ: 64003f6fc6dSOder Chiou value = 0x2; 64103f6fc6dSOder Chiou break; 64203f6fc6dSOder Chiou case RT5682_CLK_FREQ_4800000HZ: 64303f6fc6dSOder Chiou value = 0x3; 64403f6fc6dSOder Chiou break; 64503f6fc6dSOder Chiou case RT5682_CLK_FREQ_2400000HZ: 64603f6fc6dSOder Chiou value = 0x4; 64703f6fc6dSOder Chiou break; 64803f6fc6dSOder Chiou case RT5682_CLK_FREQ_12288000HZ: 64903f6fc6dSOder Chiou value = 0x5; 65003f6fc6dSOder Chiou break; 65103f6fc6dSOder Chiou default: 65203f6fc6dSOder Chiou return -EINVAL; 65303f6fc6dSOder Chiou } 65403f6fc6dSOder Chiou 65503f6fc6dSOder Chiou regmap_write(rt5682->sdw_regmap, 0xe0, value); 65603f6fc6dSOder Chiou regmap_write(rt5682->sdw_regmap, 0xf0, value); 65703f6fc6dSOder Chiou 65803f6fc6dSOder Chiou dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq); 65903f6fc6dSOder Chiou 66003f6fc6dSOder Chiou return 0; 66103f6fc6dSOder Chiou } 66203f6fc6dSOder Chiou 66303f6fc6dSOder Chiou static int rt5682_bus_config(struct sdw_slave *slave, 66403f6fc6dSOder Chiou struct sdw_bus_params *params) 66503f6fc6dSOder Chiou { 66603f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 66703f6fc6dSOder Chiou int ret; 66803f6fc6dSOder Chiou 66903f6fc6dSOder Chiou memcpy(&rt5682->params, params, sizeof(*params)); 67003f6fc6dSOder Chiou 67103f6fc6dSOder Chiou ret = rt5682_clock_config(&slave->dev); 67203f6fc6dSOder Chiou if (ret < 0) 67303f6fc6dSOder Chiou dev_err(&slave->dev, "Invalid clk config"); 67403f6fc6dSOder Chiou 67503f6fc6dSOder Chiou return ret; 67603f6fc6dSOder Chiou } 67703f6fc6dSOder Chiou 67803f6fc6dSOder Chiou static int rt5682_interrupt_callback(struct sdw_slave *slave, 67903f6fc6dSOder Chiou struct sdw_slave_intr_status *status) 68003f6fc6dSOder Chiou { 68103f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 68203f6fc6dSOder Chiou 68303f6fc6dSOder Chiou dev_dbg(&slave->dev, 68403f6fc6dSOder Chiou "%s control_port_stat=%x", __func__, status->control_port); 68503f6fc6dSOder Chiou 68614f4946dSPierre-Louis Bossart mutex_lock(&rt5682->disable_irq_lock); 68714f4946dSPierre-Louis Bossart if (status->control_port & 0x4 && !rt5682->disable_irq) { 68803f6fc6dSOder Chiou mod_delayed_work(system_power_efficient_wq, 68954271282SShuming Fan &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time)); 69003f6fc6dSOder Chiou } 69114f4946dSPierre-Louis Bossart mutex_unlock(&rt5682->disable_irq_lock); 69203f6fc6dSOder Chiou 69303f6fc6dSOder Chiou return 0; 69403f6fc6dSOder Chiou } 69503f6fc6dSOder Chiou 696628fc9d9SRikard Falkeborn static const struct sdw_slave_ops rt5682_slave_ops = { 69703f6fc6dSOder Chiou .read_prop = rt5682_read_prop, 69803f6fc6dSOder Chiou .interrupt_callback = rt5682_interrupt_callback, 69903f6fc6dSOder Chiou .update_status = rt5682_update_status, 70003f6fc6dSOder Chiou .bus_config = rt5682_bus_config, 70103f6fc6dSOder Chiou }; 70203f6fc6dSOder Chiou 70303f6fc6dSOder Chiou static int rt5682_sdw_probe(struct sdw_slave *slave, 70403f6fc6dSOder Chiou const struct sdw_device_id *id) 70503f6fc6dSOder Chiou { 70603f6fc6dSOder Chiou struct regmap *regmap; 70703f6fc6dSOder Chiou 70803f6fc6dSOder Chiou /* Regmap Initialization */ 70903f6fc6dSOder Chiou regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap); 71003f6fc6dSOder Chiou if (IS_ERR(regmap)) 71103f6fc6dSOder Chiou return -EINVAL; 71203f6fc6dSOder Chiou 71303f6fc6dSOder Chiou rt5682_sdw_init(&slave->dev, regmap, slave); 71403f6fc6dSOder Chiou 71503f6fc6dSOder Chiou return 0; 71603f6fc6dSOder Chiou } 71703f6fc6dSOder Chiou 71803f6fc6dSOder Chiou static int rt5682_sdw_remove(struct sdw_slave *slave) 71903f6fc6dSOder Chiou { 72003f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 72103f6fc6dSOder Chiou 722*ac63716dSPierre-Louis Bossart if (rt5682->hw_init) 723c792c369SPierre-Louis Bossart cancel_delayed_work_sync(&rt5682->jack_detect_work); 72403f6fc6dSOder Chiou 725*ac63716dSPierre-Louis Bossart if (rt5682->first_hw_init) 726*ac63716dSPierre-Louis Bossart pm_runtime_disable(&slave->dev); 727*ac63716dSPierre-Louis Bossart 72803f6fc6dSOder Chiou return 0; 72903f6fc6dSOder Chiou } 73003f6fc6dSOder Chiou 73103f6fc6dSOder Chiou static const struct sdw_device_id rt5682_id[] = { 7329e473058SPierre-Louis Bossart SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0), 73303f6fc6dSOder Chiou {}, 73403f6fc6dSOder Chiou }; 73503f6fc6dSOder Chiou MODULE_DEVICE_TABLE(sdw, rt5682_id); 73603f6fc6dSOder Chiou 737724cc62fSPierre-Louis Bossart static int __maybe_unused rt5682_dev_suspend(struct device *dev) 73803f6fc6dSOder Chiou { 73903f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 74003f6fc6dSOder Chiou 74103f6fc6dSOder Chiou if (!rt5682->hw_init) 74203f6fc6dSOder Chiou return 0; 74303f6fc6dSOder Chiou 744c792c369SPierre-Louis Bossart cancel_delayed_work_sync(&rt5682->jack_detect_work); 745c792c369SPierre-Louis Bossart 74603f6fc6dSOder Chiou regcache_cache_only(rt5682->regmap, true); 74703f6fc6dSOder Chiou regcache_mark_dirty(rt5682->regmap); 74803f6fc6dSOder Chiou 74903f6fc6dSOder Chiou return 0; 75003f6fc6dSOder Chiou } 75103f6fc6dSOder Chiou 75214f4946dSPierre-Louis Bossart static int __maybe_unused rt5682_dev_system_suspend(struct device *dev) 75314f4946dSPierre-Louis Bossart { 75414f4946dSPierre-Louis Bossart struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 75514f4946dSPierre-Louis Bossart struct sdw_slave *slave = dev_to_sdw_dev(dev); 75614f4946dSPierre-Louis Bossart int ret; 75714f4946dSPierre-Louis Bossart 75814f4946dSPierre-Louis Bossart if (!rt5682->hw_init) 75914f4946dSPierre-Louis Bossart return 0; 76014f4946dSPierre-Louis Bossart 76114f4946dSPierre-Louis Bossart /* 76214f4946dSPierre-Louis Bossart * prevent new interrupts from being handled after the 76314f4946dSPierre-Louis Bossart * deferred work completes and before the parent disables 76414f4946dSPierre-Louis Bossart * interrupts on the link 76514f4946dSPierre-Louis Bossart */ 76614f4946dSPierre-Louis Bossart mutex_lock(&rt5682->disable_irq_lock); 76714f4946dSPierre-Louis Bossart rt5682->disable_irq = true; 76814f4946dSPierre-Louis Bossart ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, 76914f4946dSPierre-Louis Bossart SDW_SCP_INT1_IMPL_DEF, 0); 77014f4946dSPierre-Louis Bossart mutex_unlock(&rt5682->disable_irq_lock); 77114f4946dSPierre-Louis Bossart 77214f4946dSPierre-Louis Bossart if (ret < 0) { 77314f4946dSPierre-Louis Bossart /* log but don't prevent suspend from happening */ 77414f4946dSPierre-Louis Bossart dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__); 77514f4946dSPierre-Louis Bossart } 77614f4946dSPierre-Louis Bossart 77714f4946dSPierre-Louis Bossart return rt5682_dev_suspend(dev); 77814f4946dSPierre-Louis Bossart } 77914f4946dSPierre-Louis Bossart 780724cc62fSPierre-Louis Bossart static int __maybe_unused rt5682_dev_resume(struct device *dev) 78103f6fc6dSOder Chiou { 78203f6fc6dSOder Chiou struct sdw_slave *slave = dev_to_sdw_dev(dev); 78303f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 78403f6fc6dSOder Chiou unsigned long time; 78503f6fc6dSOder Chiou 7865361a421SPierre-Louis Bossart if (!rt5682->first_hw_init) 78703f6fc6dSOder Chiou return 0; 78803f6fc6dSOder Chiou 78903f6fc6dSOder Chiou if (!slave->unattach_request) 79003f6fc6dSOder Chiou goto regmap_sync; 79103f6fc6dSOder Chiou 79203f6fc6dSOder Chiou time = wait_for_completion_timeout(&slave->initialization_complete, 79303f6fc6dSOder Chiou msecs_to_jiffies(RT5682_PROBE_TIMEOUT)); 79403f6fc6dSOder Chiou if (!time) { 79503f6fc6dSOder Chiou dev_err(&slave->dev, "Initialization not complete, timed out\n"); 79603f6fc6dSOder Chiou return -ETIMEDOUT; 79703f6fc6dSOder Chiou } 79803f6fc6dSOder Chiou 79903f6fc6dSOder Chiou regmap_sync: 80003f6fc6dSOder Chiou slave->unattach_request = 0; 80103f6fc6dSOder Chiou regcache_cache_only(rt5682->regmap, false); 80203f6fc6dSOder Chiou regcache_sync(rt5682->regmap); 80303f6fc6dSOder Chiou 80403f6fc6dSOder Chiou return 0; 80503f6fc6dSOder Chiou } 80603f6fc6dSOder Chiou 80703f6fc6dSOder Chiou static const struct dev_pm_ops rt5682_pm = { 80814f4946dSPierre-Louis Bossart SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume) 80903f6fc6dSOder Chiou SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL) 81003f6fc6dSOder Chiou }; 81103f6fc6dSOder Chiou 81203f6fc6dSOder Chiou static struct sdw_driver rt5682_sdw_driver = { 81303f6fc6dSOder Chiou .driver = { 81403f6fc6dSOder Chiou .name = "rt5682", 81503f6fc6dSOder Chiou .owner = THIS_MODULE, 81603f6fc6dSOder Chiou .pm = &rt5682_pm, 81703f6fc6dSOder Chiou }, 81803f6fc6dSOder Chiou .probe = rt5682_sdw_probe, 81903f6fc6dSOder Chiou .remove = rt5682_sdw_remove, 82003f6fc6dSOder Chiou .ops = &rt5682_slave_ops, 82103f6fc6dSOder Chiou .id_table = rt5682_id, 82203f6fc6dSOder Chiou }; 82303f6fc6dSOder Chiou module_sdw_driver(rt5682_sdw_driver); 82403f6fc6dSOder Chiou 82503f6fc6dSOder Chiou MODULE_DESCRIPTION("ASoC RT5682 driver SDW"); 82603f6fc6dSOder Chiou MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); 82703f6fc6dSOder Chiou MODULE_LICENSE("GPL v2"); 828