103f6fc6dSOder Chiou // SPDX-License-Identifier: GPL-2.0-only 203f6fc6dSOder Chiou // 303f6fc6dSOder Chiou // rt5682-sdw.c -- RT5682 ALSA SoC audio component driver 403f6fc6dSOder Chiou // 503f6fc6dSOder Chiou // Copyright 2019 Realtek Semiconductor Corp. 603f6fc6dSOder Chiou // Author: Oder Chiou <oder_chiou@realtek.com> 703f6fc6dSOder Chiou // 803f6fc6dSOder Chiou 903f6fc6dSOder Chiou #include <linux/module.h> 1003f6fc6dSOder Chiou #include <linux/moduleparam.h> 1103f6fc6dSOder Chiou #include <linux/init.h> 1203f6fc6dSOder Chiou #include <linux/delay.h> 1303f6fc6dSOder Chiou #include <linux/pm.h> 1403f6fc6dSOder Chiou #include <linux/acpi.h> 1503f6fc6dSOder Chiou #include <linux/gpio.h> 1603f6fc6dSOder Chiou #include <linux/of_gpio.h> 17a50067d4SArnd Bergmann #include <linux/pm_runtime.h> 1803f6fc6dSOder Chiou #include <linux/regulator/consumer.h> 1903f6fc6dSOder Chiou #include <linux/mutex.h> 2003f6fc6dSOder Chiou #include <linux/soundwire/sdw.h> 2103f6fc6dSOder Chiou #include <linux/soundwire/sdw_type.h> 222acd30b9SPierre-Louis Bossart #include <linux/soundwire/sdw_registers.h> 2303f6fc6dSOder Chiou #include <sound/core.h> 2403f6fc6dSOder Chiou #include <sound/pcm.h> 2503f6fc6dSOder Chiou #include <sound/pcm_params.h> 2603f6fc6dSOder Chiou #include <sound/jack.h> 27*5b75bc7fSCharles Keepax #include <sound/sdw.h> 2803f6fc6dSOder Chiou #include <sound/soc.h> 2903f6fc6dSOder Chiou #include <sound/soc-dapm.h> 3003f6fc6dSOder Chiou #include <sound/initval.h> 3103f6fc6dSOder Chiou #include <sound/tlv.h> 3203f6fc6dSOder Chiou 3303f6fc6dSOder Chiou #include "rt5682.h" 34a50067d4SArnd Bergmann 35a50067d4SArnd Bergmann #define RT5682_SDW_ADDR_L 0x3000 36a50067d4SArnd Bergmann #define RT5682_SDW_ADDR_H 0x3001 37a50067d4SArnd Bergmann #define RT5682_SDW_DATA_L 0x3004 38a50067d4SArnd Bergmann #define RT5682_SDW_DATA_H 0x3005 39a50067d4SArnd Bergmann #define RT5682_SDW_CMD 0x3008 40a50067d4SArnd Bergmann 41a50067d4SArnd Bergmann static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val) 42a50067d4SArnd Bergmann { 43a50067d4SArnd Bergmann struct device *dev = context; 44a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 45a50067d4SArnd Bergmann unsigned int data_l, data_h; 46a50067d4SArnd Bergmann 47a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0); 48a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 49a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 50a50067d4SArnd Bergmann regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h); 51a50067d4SArnd Bergmann regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l); 52a50067d4SArnd Bergmann 53a50067d4SArnd Bergmann *val = (data_h << 8) | data_l; 54a50067d4SArnd Bergmann 55a50067d4SArnd Bergmann dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val); 56a50067d4SArnd Bergmann 57a50067d4SArnd Bergmann return 0; 58a50067d4SArnd Bergmann } 59a50067d4SArnd Bergmann 60a50067d4SArnd Bergmann static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val) 61a50067d4SArnd Bergmann { 62a50067d4SArnd Bergmann struct device *dev = context; 63a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 64a50067d4SArnd Bergmann 65a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1); 66a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 67a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 68a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff); 69a50067d4SArnd Bergmann regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff)); 70a50067d4SArnd Bergmann 71a50067d4SArnd Bergmann dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); 72a50067d4SArnd Bergmann 73a50067d4SArnd Bergmann return 0; 74a50067d4SArnd Bergmann } 75a50067d4SArnd Bergmann 76a50067d4SArnd Bergmann static const struct regmap_config rt5682_sdw_indirect_regmap = { 77a50067d4SArnd Bergmann .reg_bits = 16, 78a50067d4SArnd Bergmann .val_bits = 16, 79a50067d4SArnd Bergmann .max_register = RT5682_I2C_MODE, 80a50067d4SArnd Bergmann .volatile_reg = rt5682_volatile_register, 81a50067d4SArnd Bergmann .readable_reg = rt5682_readable_register, 82a50067d4SArnd Bergmann .cache_type = REGCACHE_RBTREE, 83a50067d4SArnd Bergmann .reg_defaults = rt5682_reg, 84a50067d4SArnd Bergmann .num_reg_defaults = RT5682_REG_NUM, 85a50067d4SArnd Bergmann .use_single_read = true, 86a50067d4SArnd Bergmann .use_single_write = true, 87a50067d4SArnd Bergmann .reg_read = rt5682_sdw_read, 88a50067d4SArnd Bergmann .reg_write = rt5682_sdw_write, 89a50067d4SArnd Bergmann }; 90a50067d4SArnd Bergmann 91a50067d4SArnd Bergmann struct sdw_stream_data { 92a50067d4SArnd Bergmann struct sdw_stream_runtime *sdw_stream; 93a50067d4SArnd Bergmann }; 94a50067d4SArnd Bergmann 95a50067d4SArnd Bergmann static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 96a50067d4SArnd Bergmann int direction) 97a50067d4SArnd Bergmann { 98a50067d4SArnd Bergmann struct sdw_stream_data *stream; 99a50067d4SArnd Bergmann 100a50067d4SArnd Bergmann if (!sdw_stream) 101a50067d4SArnd Bergmann return 0; 102a50067d4SArnd Bergmann 103a50067d4SArnd Bergmann stream = kzalloc(sizeof(*stream), GFP_KERNEL); 104a50067d4SArnd Bergmann if (!stream) 105a50067d4SArnd Bergmann return -ENOMEM; 106a50067d4SArnd Bergmann 1074a550007SPierre-Louis Bossart stream->sdw_stream = sdw_stream; 108a50067d4SArnd Bergmann 109a50067d4SArnd Bergmann /* Use tx_mask or rx_mask to configure stream tag and set dma_data */ 110a50067d4SArnd Bergmann if (direction == SNDRV_PCM_STREAM_PLAYBACK) 111a50067d4SArnd Bergmann dai->playback_dma_data = stream; 112a50067d4SArnd Bergmann else 113a50067d4SArnd Bergmann dai->capture_dma_data = stream; 114a50067d4SArnd Bergmann 115a50067d4SArnd Bergmann return 0; 116a50067d4SArnd Bergmann } 117a50067d4SArnd Bergmann 118a50067d4SArnd Bergmann static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream, 119a50067d4SArnd Bergmann struct snd_soc_dai *dai) 120a50067d4SArnd Bergmann { 121a50067d4SArnd Bergmann struct sdw_stream_data *stream; 122a50067d4SArnd Bergmann 123a50067d4SArnd Bergmann stream = snd_soc_dai_get_dma_data(dai, substream); 124a50067d4SArnd Bergmann snd_soc_dai_set_dma_data(dai, substream, NULL); 125a50067d4SArnd Bergmann kfree(stream); 126a50067d4SArnd Bergmann } 127a50067d4SArnd Bergmann 128a50067d4SArnd Bergmann static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream, 129a50067d4SArnd Bergmann struct snd_pcm_hw_params *params, 130a50067d4SArnd Bergmann struct snd_soc_dai *dai) 131a50067d4SArnd Bergmann { 132a50067d4SArnd Bergmann struct snd_soc_component *component = dai->component; 133a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 134*5b75bc7fSCharles Keepax struct sdw_stream_config stream_config = {0}; 135*5b75bc7fSCharles Keepax struct sdw_port_config port_config = {0}; 136a50067d4SArnd Bergmann struct sdw_stream_data *stream; 137*5b75bc7fSCharles Keepax int retval; 138a50067d4SArnd Bergmann unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0; 139a50067d4SArnd Bergmann 140a50067d4SArnd Bergmann dev_dbg(dai->dev, "%s %s", __func__, dai->name); 141a50067d4SArnd Bergmann 142a50067d4SArnd Bergmann stream = snd_soc_dai_get_dma_data(dai, substream); 143a50067d4SArnd Bergmann if (!stream) 144a50067d4SArnd Bergmann return -ENOMEM; 145a50067d4SArnd Bergmann 146a50067d4SArnd Bergmann if (!rt5682->slave) 147a50067d4SArnd Bergmann return -EINVAL; 148a50067d4SArnd Bergmann 149a50067d4SArnd Bergmann /* SoundWire specific configuration */ 150*5b75bc7fSCharles Keepax snd_sdw_params_to_config(substream, params, &stream_config, &port_config); 151a50067d4SArnd Bergmann 152*5b75bc7fSCharles Keepax if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 153*5b75bc7fSCharles Keepax port_config.num = 1; 154*5b75bc7fSCharles Keepax else 155*5b75bc7fSCharles Keepax port_config.num = 2; 156a50067d4SArnd Bergmann 157a50067d4SArnd Bergmann retval = sdw_stream_add_slave(rt5682->slave, &stream_config, 158a50067d4SArnd Bergmann &port_config, 1, stream->sdw_stream); 159a50067d4SArnd Bergmann if (retval) { 160a50067d4SArnd Bergmann dev_err(dai->dev, "Unable to configure port\n"); 161a50067d4SArnd Bergmann return retval; 162a50067d4SArnd Bergmann } 163a50067d4SArnd Bergmann 164a50067d4SArnd Bergmann switch (params_rate(params)) { 165a50067d4SArnd Bergmann case 48000: 166a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_48K; 167a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_48K; 168a50067d4SArnd Bergmann break; 169a50067d4SArnd Bergmann case 96000: 170a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_96K; 171a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_96K; 172a50067d4SArnd Bergmann break; 173a50067d4SArnd Bergmann case 192000: 174a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_192K; 175a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_192K; 176a50067d4SArnd Bergmann break; 177a50067d4SArnd Bergmann case 32000: 178a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_32K; 179a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_32K; 180a50067d4SArnd Bergmann break; 181a50067d4SArnd Bergmann case 24000: 182a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_24K; 183a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_24K; 184a50067d4SArnd Bergmann break; 185a50067d4SArnd Bergmann case 16000: 186a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_16K; 187a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_16K; 188a50067d4SArnd Bergmann break; 189a50067d4SArnd Bergmann case 12000: 190a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_12K; 191a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_12K; 192a50067d4SArnd Bergmann break; 193a50067d4SArnd Bergmann case 8000: 194a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_8K; 195a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_8K; 196a50067d4SArnd Bergmann break; 197a50067d4SArnd Bergmann case 44100: 198a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_44K; 199a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_44K; 200a50067d4SArnd Bergmann break; 201a50067d4SArnd Bergmann case 88200: 202a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_88K; 203a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_88K; 204a50067d4SArnd Bergmann break; 205a50067d4SArnd Bergmann case 176400: 206a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_176K; 207a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_176K; 208a50067d4SArnd Bergmann break; 209a50067d4SArnd Bergmann case 22050: 210a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_22K; 211a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_22K; 212a50067d4SArnd Bergmann break; 213a50067d4SArnd Bergmann case 11025: 214a50067d4SArnd Bergmann val_p = RT5682_SDW_REF_1_11K; 215a50067d4SArnd Bergmann val_c = RT5682_SDW_REF_2_11K; 216a50067d4SArnd Bergmann break; 217a50067d4SArnd Bergmann default: 218a50067d4SArnd Bergmann return -EINVAL; 219a50067d4SArnd Bergmann } 220a50067d4SArnd Bergmann 221a50067d4SArnd Bergmann if (params_rate(params) <= 48000) { 222a50067d4SArnd Bergmann osr_p = RT5682_DAC_OSR_D_8; 223a50067d4SArnd Bergmann osr_c = RT5682_ADC_OSR_D_8; 224a50067d4SArnd Bergmann } else if (params_rate(params) <= 96000) { 225a50067d4SArnd Bergmann osr_p = RT5682_DAC_OSR_D_4; 226a50067d4SArnd Bergmann osr_c = RT5682_ADC_OSR_D_4; 227a50067d4SArnd Bergmann } else { 228a50067d4SArnd Bergmann osr_p = RT5682_DAC_OSR_D_2; 229a50067d4SArnd Bergmann osr_c = RT5682_ADC_OSR_D_2; 230a50067d4SArnd Bergmann } 231a50067d4SArnd Bergmann 232a50067d4SArnd Bergmann if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 233a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 234a50067d4SArnd Bergmann RT5682_SDW_REF_1_MASK, val_p); 235a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 236a50067d4SArnd Bergmann RT5682_DAC_OSR_MASK, osr_p); 237a50067d4SArnd Bergmann } else { 238a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 239a50067d4SArnd Bergmann RT5682_SDW_REF_2_MASK, val_c); 240a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 241a50067d4SArnd Bergmann RT5682_ADC_OSR_MASK, osr_c); 242a50067d4SArnd Bergmann } 243a50067d4SArnd Bergmann 244a50067d4SArnd Bergmann return retval; 245a50067d4SArnd Bergmann } 246a50067d4SArnd Bergmann 247a50067d4SArnd Bergmann static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream, 248a50067d4SArnd Bergmann struct snd_soc_dai *dai) 249a50067d4SArnd Bergmann { 250a50067d4SArnd Bergmann struct snd_soc_component *component = dai->component; 251a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 252a50067d4SArnd Bergmann struct sdw_stream_data *stream = 253a50067d4SArnd Bergmann snd_soc_dai_get_dma_data(dai, substream); 254a50067d4SArnd Bergmann 255a50067d4SArnd Bergmann if (!rt5682->slave) 256a50067d4SArnd Bergmann return -EINVAL; 257a50067d4SArnd Bergmann 258a50067d4SArnd Bergmann sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream); 259a50067d4SArnd Bergmann return 0; 260a50067d4SArnd Bergmann } 261a50067d4SArnd Bergmann 262f9e56a34SRikard Falkeborn static const struct snd_soc_dai_ops rt5682_sdw_ops = { 263a50067d4SArnd Bergmann .hw_params = rt5682_sdw_hw_params, 264a50067d4SArnd Bergmann .hw_free = rt5682_sdw_hw_free, 265e8444560SPierre-Louis Bossart .set_stream = rt5682_set_sdw_stream, 266a50067d4SArnd Bergmann .shutdown = rt5682_sdw_shutdown, 267a50067d4SArnd Bergmann }; 268a50067d4SArnd Bergmann 269a50067d4SArnd Bergmann static struct snd_soc_dai_driver rt5682_dai[] = { 270a50067d4SArnd Bergmann { 271a50067d4SArnd Bergmann .name = "rt5682-aif1", 272a50067d4SArnd Bergmann .id = RT5682_AIF1, 273a50067d4SArnd Bergmann .playback = { 274a50067d4SArnd Bergmann .stream_name = "AIF1 Playback", 275a50067d4SArnd Bergmann .channels_min = 1, 276a50067d4SArnd Bergmann .channels_max = 2, 277a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 278a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 279a50067d4SArnd Bergmann }, 280a50067d4SArnd Bergmann .capture = { 281a50067d4SArnd Bergmann .stream_name = "AIF1 Capture", 282a50067d4SArnd Bergmann .channels_min = 1, 283a50067d4SArnd Bergmann .channels_max = 2, 284a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 285a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 286a50067d4SArnd Bergmann }, 287a50067d4SArnd Bergmann .ops = &rt5682_aif1_dai_ops, 288a50067d4SArnd Bergmann }, 289a50067d4SArnd Bergmann { 290a50067d4SArnd Bergmann .name = "rt5682-aif2", 291a50067d4SArnd Bergmann .id = RT5682_AIF2, 292a50067d4SArnd Bergmann .capture = { 293a50067d4SArnd Bergmann .stream_name = "AIF2 Capture", 294a50067d4SArnd Bergmann .channels_min = 1, 295a50067d4SArnd Bergmann .channels_max = 2, 296a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 297a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 298a50067d4SArnd Bergmann }, 299a50067d4SArnd Bergmann .ops = &rt5682_aif2_dai_ops, 300a50067d4SArnd Bergmann }, 301a50067d4SArnd Bergmann { 302a50067d4SArnd Bergmann .name = "rt5682-sdw", 303a50067d4SArnd Bergmann .id = RT5682_SDW, 304a50067d4SArnd Bergmann .playback = { 305a50067d4SArnd Bergmann .stream_name = "SDW Playback", 306a50067d4SArnd Bergmann .channels_min = 1, 307a50067d4SArnd Bergmann .channels_max = 2, 308a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 309a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 310a50067d4SArnd Bergmann }, 311a50067d4SArnd Bergmann .capture = { 312a50067d4SArnd Bergmann .stream_name = "SDW Capture", 313a50067d4SArnd Bergmann .channels_min = 1, 314a50067d4SArnd Bergmann .channels_max = 2, 315a50067d4SArnd Bergmann .rates = RT5682_STEREO_RATES, 316a50067d4SArnd Bergmann .formats = RT5682_FORMATS, 317a50067d4SArnd Bergmann }, 318a50067d4SArnd Bergmann .ops = &rt5682_sdw_ops, 319a50067d4SArnd Bergmann }, 320a50067d4SArnd Bergmann }; 321a50067d4SArnd Bergmann 322a50067d4SArnd Bergmann static int rt5682_sdw_init(struct device *dev, struct regmap *regmap, 323a50067d4SArnd Bergmann struct sdw_slave *slave) 324a50067d4SArnd Bergmann { 325a50067d4SArnd Bergmann struct rt5682_priv *rt5682; 326a50067d4SArnd Bergmann int ret; 327a50067d4SArnd Bergmann 328a50067d4SArnd Bergmann rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL); 329a50067d4SArnd Bergmann if (!rt5682) 330a50067d4SArnd Bergmann return -ENOMEM; 331a50067d4SArnd Bergmann 332a50067d4SArnd Bergmann dev_set_drvdata(dev, rt5682); 333a50067d4SArnd Bergmann rt5682->slave = slave; 334a50067d4SArnd Bergmann rt5682->sdw_regmap = regmap; 335a50067d4SArnd Bergmann rt5682->is_sdw = true; 336a50067d4SArnd Bergmann 33714f4946dSPierre-Louis Bossart mutex_init(&rt5682->disable_irq_lock); 33814f4946dSPierre-Louis Bossart 339a50067d4SArnd Bergmann rt5682->regmap = devm_regmap_init(dev, NULL, dev, 340a50067d4SArnd Bergmann &rt5682_sdw_indirect_regmap); 341a50067d4SArnd Bergmann if (IS_ERR(rt5682->regmap)) { 342a50067d4SArnd Bergmann ret = PTR_ERR(rt5682->regmap); 343a50067d4SArnd Bergmann dev_err(dev, "Failed to allocate register map: %d\n", 344a50067d4SArnd Bergmann ret); 345a50067d4SArnd Bergmann return ret; 346a50067d4SArnd Bergmann } 347a50067d4SArnd Bergmann 348a50067d4SArnd Bergmann /* 349a50067d4SArnd Bergmann * Mark hw_init to false 350a50067d4SArnd Bergmann * HW init will be performed when device reports present 351a50067d4SArnd Bergmann */ 352a50067d4SArnd Bergmann rt5682->hw_init = false; 353a50067d4SArnd Bergmann rt5682->first_hw_init = false; 354a50067d4SArnd Bergmann 355a50067d4SArnd Bergmann mutex_init(&rt5682->calibrate_mutex); 356a50067d4SArnd Bergmann INIT_DELAYED_WORK(&rt5682->jack_detect_work, 357a50067d4SArnd Bergmann rt5682_jack_detect_handler); 358a50067d4SArnd Bergmann 359a50067d4SArnd Bergmann ret = devm_snd_soc_register_component(dev, 360a50067d4SArnd Bergmann &rt5682_soc_component_dev, 361a50067d4SArnd Bergmann rt5682_dai, ARRAY_SIZE(rt5682_dai)); 362a50067d4SArnd Bergmann dev_dbg(&slave->dev, "%s\n", __func__); 363a50067d4SArnd Bergmann 364a50067d4SArnd Bergmann return ret; 365a50067d4SArnd Bergmann } 366a50067d4SArnd Bergmann 367a50067d4SArnd Bergmann static int rt5682_io_init(struct device *dev, struct sdw_slave *slave) 368a50067d4SArnd Bergmann { 369a50067d4SArnd Bergmann struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 370867f8d18SShuming Fan int ret = 0, loop = 10; 371a50067d4SArnd Bergmann unsigned int val; 372a50067d4SArnd Bergmann 37314f4946dSPierre-Louis Bossart rt5682->disable_irq = false; 37414f4946dSPierre-Louis Bossart 375a50067d4SArnd Bergmann if (rt5682->hw_init) 376a50067d4SArnd Bergmann return 0; 377a50067d4SArnd Bergmann 378a50067d4SArnd Bergmann /* 379a50067d4SArnd Bergmann * PM runtime is only enabled when a Slave reports as Attached 380a50067d4SArnd Bergmann */ 381a50067d4SArnd Bergmann if (!rt5682->first_hw_init) { 382a50067d4SArnd Bergmann /* set autosuspend parameters */ 383a50067d4SArnd Bergmann pm_runtime_set_autosuspend_delay(&slave->dev, 3000); 384a50067d4SArnd Bergmann pm_runtime_use_autosuspend(&slave->dev); 385a50067d4SArnd Bergmann 386a50067d4SArnd Bergmann /* update count of parent 'active' children */ 387a50067d4SArnd Bergmann pm_runtime_set_active(&slave->dev); 388a50067d4SArnd Bergmann 389a50067d4SArnd Bergmann /* make sure the device does not suspend immediately */ 390a50067d4SArnd Bergmann pm_runtime_mark_last_busy(&slave->dev); 391a50067d4SArnd Bergmann 392a50067d4SArnd Bergmann pm_runtime_enable(&slave->dev); 393a50067d4SArnd Bergmann } 394a50067d4SArnd Bergmann 395a50067d4SArnd Bergmann pm_runtime_get_noresume(&slave->dev); 396a50067d4SArnd Bergmann 397c0372bc8SBard Liao if (rt5682->first_hw_init) { 398c0372bc8SBard Liao regcache_cache_only(rt5682->regmap, false); 399c0372bc8SBard Liao regcache_cache_bypass(rt5682->regmap, true); 400c0372bc8SBard Liao } 401c0372bc8SBard Liao 402867f8d18SShuming Fan while (loop > 0) { 403867f8d18SShuming Fan regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); 404867f8d18SShuming Fan if (val == DEVICE_ID) 405867f8d18SShuming Fan break; 406867f8d18SShuming Fan dev_warn(dev, "Device with ID register %x is not rt5682\n", val); 407867f8d18SShuming Fan usleep_range(30000, 30005); 408867f8d18SShuming Fan loop--; 409867f8d18SShuming Fan } 4109266d954SOder Chiou 411867f8d18SShuming Fan if (val != DEVICE_ID) { 412867f8d18SShuming Fan dev_err(dev, "Device with ID register %x is not rt5682\n", val); 4139266d954SOder Chiou ret = -ENODEV; 4149266d954SOder Chiou goto err_nodev; 415867f8d18SShuming Fan } 416867f8d18SShuming Fan 417a50067d4SArnd Bergmann rt5682_calibrate(rt5682); 418a50067d4SArnd Bergmann 419a50067d4SArnd Bergmann if (rt5682->first_hw_init) { 420a50067d4SArnd Bergmann regcache_cache_bypass(rt5682->regmap, false); 421a50067d4SArnd Bergmann regcache_mark_dirty(rt5682->regmap); 422a50067d4SArnd Bergmann regcache_sync(rt5682->regmap); 423a50067d4SArnd Bergmann 424a50067d4SArnd Bergmann /* volatile registers */ 425a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 426a50067d4SArnd Bergmann RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 427a50067d4SArnd Bergmann 428a50067d4SArnd Bergmann goto reinit; 429a50067d4SArnd Bergmann } 430a50067d4SArnd Bergmann 431a50067d4SArnd Bergmann rt5682_apply_patch_list(rt5682, dev); 432a50067d4SArnd Bergmann 433a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); 434a50067d4SArnd Bergmann 435a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, 436a50067d4SArnd Bergmann RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, 437a50067d4SArnd Bergmann RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); 4386301adf9SShuming Fan regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080); 439a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); 440a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, 441a50067d4SArnd Bergmann RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); 442a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, 443a50067d4SArnd Bergmann RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); 444a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, 445a50067d4SArnd Bergmann RT5682_PM_HP_MASK, RT5682_PM_HP_HV); 446a50067d4SArnd Bergmann 447a50067d4SArnd Bergmann /* Soundwire */ 448a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266); 449a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700); 450a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006); 451a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600); 452a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f); 453a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000); 454a50067d4SArnd Bergmann regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000); 455a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK, 456a50067d4SArnd Bergmann RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK, 457a50067d4SArnd Bergmann RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW); 458a50067d4SArnd Bergmann 459a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 460a50067d4SArnd Bergmann RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 46149783c6fSOder Chiou regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142); 46249783c6fSOder Chiou regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600); 463a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3, 464a50067d4SArnd Bergmann RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN); 465a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1, 466a50067d4SArnd Bergmann RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN); 467a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, 468a50067d4SArnd Bergmann RT5682_POW_IRQ | RT5682_POW_JDH | 469a50067d4SArnd Bergmann RT5682_POW_ANA, RT5682_POW_IRQ | 470a50067d4SArnd Bergmann RT5682_POW_JDH | RT5682_POW_ANA); 471a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, 472a50067d4SArnd Bergmann RT5682_PWR_JDH, RT5682_PWR_JDH); 473a50067d4SArnd Bergmann regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, 474a50067d4SArnd Bergmann RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK, 475a50067d4SArnd Bergmann RT5682_JD1_EN | RT5682_JD1_IRQ_PUL); 476a50067d4SArnd Bergmann 477a50067d4SArnd Bergmann reinit: 478a50067d4SArnd Bergmann mod_delayed_work(system_power_efficient_wq, 479a50067d4SArnd Bergmann &rt5682->jack_detect_work, msecs_to_jiffies(250)); 480a50067d4SArnd Bergmann 481a50067d4SArnd Bergmann /* Mark Slave initialization complete */ 482a50067d4SArnd Bergmann rt5682->hw_init = true; 483a50067d4SArnd Bergmann rt5682->first_hw_init = true; 484a50067d4SArnd Bergmann 4859266d954SOder Chiou err_nodev: 486a50067d4SArnd Bergmann pm_runtime_mark_last_busy(&slave->dev); 487a50067d4SArnd Bergmann pm_runtime_put_autosuspend(&slave->dev); 488a50067d4SArnd Bergmann 4899266d954SOder Chiou dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret); 490a50067d4SArnd Bergmann 491a50067d4SArnd Bergmann return ret; 492a50067d4SArnd Bergmann } 49303f6fc6dSOder Chiou 49403f6fc6dSOder Chiou static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg) 49503f6fc6dSOder Chiou { 49603f6fc6dSOder Chiou switch (reg) { 49703f6fc6dSOder Chiou case 0x00e0: 49803f6fc6dSOder Chiou case 0x00f0: 49903f6fc6dSOder Chiou case 0x3000: 50003f6fc6dSOder Chiou case 0x3001: 50103f6fc6dSOder Chiou case 0x3004: 50203f6fc6dSOder Chiou case 0x3005: 50303f6fc6dSOder Chiou case 0x3008: 50403f6fc6dSOder Chiou return true; 50503f6fc6dSOder Chiou default: 50603f6fc6dSOder Chiou return false; 50703f6fc6dSOder Chiou } 50803f6fc6dSOder Chiou } 50903f6fc6dSOder Chiou 510a50067d4SArnd Bergmann static const struct regmap_config rt5682_sdw_regmap = { 51103f6fc6dSOder Chiou .name = "sdw", 51203f6fc6dSOder Chiou .reg_bits = 32, 51303f6fc6dSOder Chiou .val_bits = 8, 51403f6fc6dSOder Chiou .max_register = RT5682_I2C_MODE, 51503f6fc6dSOder Chiou .readable_reg = rt5682_sdw_readable_register, 51603f6fc6dSOder Chiou .cache_type = REGCACHE_NONE, 51703f6fc6dSOder Chiou .use_single_read = true, 51803f6fc6dSOder Chiou .use_single_write = true, 51903f6fc6dSOder Chiou }; 52003f6fc6dSOder Chiou 52103f6fc6dSOder Chiou static int rt5682_update_status(struct sdw_slave *slave, 52203f6fc6dSOder Chiou enum sdw_slave_status status) 52303f6fc6dSOder Chiou { 52403f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 52503f6fc6dSOder Chiou 52603f6fc6dSOder Chiou /* Update the status */ 52703f6fc6dSOder Chiou rt5682->status = status; 52803f6fc6dSOder Chiou 52903f6fc6dSOder Chiou if (status == SDW_SLAVE_UNATTACHED) 53003f6fc6dSOder Chiou rt5682->hw_init = false; 53103f6fc6dSOder Chiou 53203f6fc6dSOder Chiou /* 53303f6fc6dSOder Chiou * Perform initialization only if slave status is present and 53403f6fc6dSOder Chiou * hw_init flag is false 53503f6fc6dSOder Chiou */ 53603f6fc6dSOder Chiou if (rt5682->hw_init || rt5682->status != SDW_SLAVE_ATTACHED) 53703f6fc6dSOder Chiou return 0; 53803f6fc6dSOder Chiou 53903f6fc6dSOder Chiou /* perform I/O transfers required for Slave initialization */ 54003f6fc6dSOder Chiou return rt5682_io_init(&slave->dev, slave); 54103f6fc6dSOder Chiou } 54203f6fc6dSOder Chiou 54303f6fc6dSOder Chiou static int rt5682_read_prop(struct sdw_slave *slave) 54403f6fc6dSOder Chiou { 54503f6fc6dSOder Chiou struct sdw_slave_prop *prop = &slave->prop; 546d0bbcb4eSPierre-Louis Bossart int nval, i; 54703f6fc6dSOder Chiou u32 bit; 54803f6fc6dSOder Chiou unsigned long addr; 54903f6fc6dSOder Chiou struct sdw_dpn_prop *dpn; 55003f6fc6dSOder Chiou 5512acd30b9SPierre-Louis Bossart prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | 5522acd30b9SPierre-Louis Bossart SDW_SCP_INT1_PARITY; 55338edbfaeSPierre-Louis Bossart prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 5542acd30b9SPierre-Louis Bossart 55503f6fc6dSOder Chiou prop->paging_support = false; 55603f6fc6dSOder Chiou 55703f6fc6dSOder Chiou /* first we need to allocate memory for set bits in port lists */ 55803f6fc6dSOder Chiou prop->source_ports = 0x4; /* BITMAP: 00000100 */ 55903f6fc6dSOder Chiou prop->sink_ports = 0x2; /* BITMAP: 00000010 */ 56003f6fc6dSOder Chiou 56103f6fc6dSOder Chiou nval = hweight32(prop->source_ports); 56203f6fc6dSOder Chiou prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 56303f6fc6dSOder Chiou sizeof(*prop->src_dpn_prop), 56403f6fc6dSOder Chiou GFP_KERNEL); 56503f6fc6dSOder Chiou if (!prop->src_dpn_prop) 56603f6fc6dSOder Chiou return -ENOMEM; 56703f6fc6dSOder Chiou 56803f6fc6dSOder Chiou i = 0; 56903f6fc6dSOder Chiou dpn = prop->src_dpn_prop; 57003f6fc6dSOder Chiou addr = prop->source_ports; 57103f6fc6dSOder Chiou for_each_set_bit(bit, &addr, 32) { 57203f6fc6dSOder Chiou dpn[i].num = bit; 57303f6fc6dSOder Chiou dpn[i].type = SDW_DPN_FULL; 57403f6fc6dSOder Chiou dpn[i].simple_ch_prep_sm = true; 57503f6fc6dSOder Chiou dpn[i].ch_prep_timeout = 10; 57603f6fc6dSOder Chiou i++; 57703f6fc6dSOder Chiou } 57803f6fc6dSOder Chiou 57903f6fc6dSOder Chiou /* do this again for sink now */ 58003f6fc6dSOder Chiou nval = hweight32(prop->sink_ports); 58103f6fc6dSOder Chiou prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 58203f6fc6dSOder Chiou sizeof(*prop->sink_dpn_prop), 58303f6fc6dSOder Chiou GFP_KERNEL); 58403f6fc6dSOder Chiou if (!prop->sink_dpn_prop) 58503f6fc6dSOder Chiou return -ENOMEM; 58603f6fc6dSOder Chiou 58703f6fc6dSOder Chiou i = 0; 58803f6fc6dSOder Chiou dpn = prop->sink_dpn_prop; 58903f6fc6dSOder Chiou addr = prop->sink_ports; 59003f6fc6dSOder Chiou for_each_set_bit(bit, &addr, 32) { 59103f6fc6dSOder Chiou dpn[i].num = bit; 59203f6fc6dSOder Chiou dpn[i].type = SDW_DPN_FULL; 59303f6fc6dSOder Chiou dpn[i].simple_ch_prep_sm = true; 59403f6fc6dSOder Chiou dpn[i].ch_prep_timeout = 10; 59503f6fc6dSOder Chiou i++; 59603f6fc6dSOder Chiou } 59703f6fc6dSOder Chiou 59803f6fc6dSOder Chiou /* set the timeout values */ 59903f6fc6dSOder Chiou prop->clk_stop_timeout = 20; 60003f6fc6dSOder Chiou 60103f6fc6dSOder Chiou /* wake-up event */ 60203f6fc6dSOder Chiou prop->wake_capable = 1; 60303f6fc6dSOder Chiou 60403f6fc6dSOder Chiou return 0; 60503f6fc6dSOder Chiou } 60603f6fc6dSOder Chiou 60703f6fc6dSOder Chiou /* Bus clock frequency */ 60803f6fc6dSOder Chiou #define RT5682_CLK_FREQ_9600000HZ 9600000 60903f6fc6dSOder Chiou #define RT5682_CLK_FREQ_12000000HZ 12000000 61003f6fc6dSOder Chiou #define RT5682_CLK_FREQ_6000000HZ 6000000 61103f6fc6dSOder Chiou #define RT5682_CLK_FREQ_4800000HZ 4800000 61203f6fc6dSOder Chiou #define RT5682_CLK_FREQ_2400000HZ 2400000 61303f6fc6dSOder Chiou #define RT5682_CLK_FREQ_12288000HZ 12288000 61403f6fc6dSOder Chiou 615a3c2e894SYueHaibing static int rt5682_clock_config(struct device *dev) 61603f6fc6dSOder Chiou { 61703f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 61803f6fc6dSOder Chiou unsigned int clk_freq, value; 61903f6fc6dSOder Chiou 62003f6fc6dSOder Chiou clk_freq = (rt5682->params.curr_dr_freq >> 1); 62103f6fc6dSOder Chiou 62203f6fc6dSOder Chiou switch (clk_freq) { 62303f6fc6dSOder Chiou case RT5682_CLK_FREQ_12000000HZ: 62403f6fc6dSOder Chiou value = 0x0; 62503f6fc6dSOder Chiou break; 62603f6fc6dSOder Chiou case RT5682_CLK_FREQ_6000000HZ: 62703f6fc6dSOder Chiou value = 0x1; 62803f6fc6dSOder Chiou break; 62903f6fc6dSOder Chiou case RT5682_CLK_FREQ_9600000HZ: 63003f6fc6dSOder Chiou value = 0x2; 63103f6fc6dSOder Chiou break; 63203f6fc6dSOder Chiou case RT5682_CLK_FREQ_4800000HZ: 63303f6fc6dSOder Chiou value = 0x3; 63403f6fc6dSOder Chiou break; 63503f6fc6dSOder Chiou case RT5682_CLK_FREQ_2400000HZ: 63603f6fc6dSOder Chiou value = 0x4; 63703f6fc6dSOder Chiou break; 63803f6fc6dSOder Chiou case RT5682_CLK_FREQ_12288000HZ: 63903f6fc6dSOder Chiou value = 0x5; 64003f6fc6dSOder Chiou break; 64103f6fc6dSOder Chiou default: 64203f6fc6dSOder Chiou return -EINVAL; 64303f6fc6dSOder Chiou } 64403f6fc6dSOder Chiou 64503f6fc6dSOder Chiou regmap_write(rt5682->sdw_regmap, 0xe0, value); 64603f6fc6dSOder Chiou regmap_write(rt5682->sdw_regmap, 0xf0, value); 64703f6fc6dSOder Chiou 64803f6fc6dSOder Chiou dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq); 64903f6fc6dSOder Chiou 65003f6fc6dSOder Chiou return 0; 65103f6fc6dSOder Chiou } 65203f6fc6dSOder Chiou 65303f6fc6dSOder Chiou static int rt5682_bus_config(struct sdw_slave *slave, 65403f6fc6dSOder Chiou struct sdw_bus_params *params) 65503f6fc6dSOder Chiou { 65603f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 65703f6fc6dSOder Chiou int ret; 65803f6fc6dSOder Chiou 65903f6fc6dSOder Chiou memcpy(&rt5682->params, params, sizeof(*params)); 66003f6fc6dSOder Chiou 66103f6fc6dSOder Chiou ret = rt5682_clock_config(&slave->dev); 66203f6fc6dSOder Chiou if (ret < 0) 66303f6fc6dSOder Chiou dev_err(&slave->dev, "Invalid clk config"); 66403f6fc6dSOder Chiou 66503f6fc6dSOder Chiou return ret; 66603f6fc6dSOder Chiou } 66703f6fc6dSOder Chiou 66803f6fc6dSOder Chiou static int rt5682_interrupt_callback(struct sdw_slave *slave, 66903f6fc6dSOder Chiou struct sdw_slave_intr_status *status) 67003f6fc6dSOder Chiou { 67103f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 67203f6fc6dSOder Chiou 67303f6fc6dSOder Chiou dev_dbg(&slave->dev, 67403f6fc6dSOder Chiou "%s control_port_stat=%x", __func__, status->control_port); 67503f6fc6dSOder Chiou 67614f4946dSPierre-Louis Bossart mutex_lock(&rt5682->disable_irq_lock); 67714f4946dSPierre-Louis Bossart if (status->control_port & 0x4 && !rt5682->disable_irq) { 67803f6fc6dSOder Chiou mod_delayed_work(system_power_efficient_wq, 67954271282SShuming Fan &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time)); 68003f6fc6dSOder Chiou } 68114f4946dSPierre-Louis Bossart mutex_unlock(&rt5682->disable_irq_lock); 68203f6fc6dSOder Chiou 68303f6fc6dSOder Chiou return 0; 68403f6fc6dSOder Chiou } 68503f6fc6dSOder Chiou 686628fc9d9SRikard Falkeborn static const struct sdw_slave_ops rt5682_slave_ops = { 68703f6fc6dSOder Chiou .read_prop = rt5682_read_prop, 68803f6fc6dSOder Chiou .interrupt_callback = rt5682_interrupt_callback, 68903f6fc6dSOder Chiou .update_status = rt5682_update_status, 69003f6fc6dSOder Chiou .bus_config = rt5682_bus_config, 69103f6fc6dSOder Chiou }; 69203f6fc6dSOder Chiou 69303f6fc6dSOder Chiou static int rt5682_sdw_probe(struct sdw_slave *slave, 69403f6fc6dSOder Chiou const struct sdw_device_id *id) 69503f6fc6dSOder Chiou { 69603f6fc6dSOder Chiou struct regmap *regmap; 69703f6fc6dSOder Chiou 69803f6fc6dSOder Chiou /* Regmap Initialization */ 69903f6fc6dSOder Chiou regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap); 70003f6fc6dSOder Chiou if (IS_ERR(regmap)) 70103f6fc6dSOder Chiou return -EINVAL; 70203f6fc6dSOder Chiou 70303f6fc6dSOder Chiou rt5682_sdw_init(&slave->dev, regmap, slave); 70403f6fc6dSOder Chiou 70503f6fc6dSOder Chiou return 0; 70603f6fc6dSOder Chiou } 70703f6fc6dSOder Chiou 70803f6fc6dSOder Chiou static int rt5682_sdw_remove(struct sdw_slave *slave) 70903f6fc6dSOder Chiou { 71003f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 71103f6fc6dSOder Chiou 712ac63716dSPierre-Louis Bossart if (rt5682->hw_init) 713c792c369SPierre-Louis Bossart cancel_delayed_work_sync(&rt5682->jack_detect_work); 71403f6fc6dSOder Chiou 715ac63716dSPierre-Louis Bossart if (rt5682->first_hw_init) 716ac63716dSPierre-Louis Bossart pm_runtime_disable(&slave->dev); 717ac63716dSPierre-Louis Bossart 71803f6fc6dSOder Chiou return 0; 71903f6fc6dSOder Chiou } 72003f6fc6dSOder Chiou 72103f6fc6dSOder Chiou static const struct sdw_device_id rt5682_id[] = { 7229e473058SPierre-Louis Bossart SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0), 72303f6fc6dSOder Chiou {}, 72403f6fc6dSOder Chiou }; 72503f6fc6dSOder Chiou MODULE_DEVICE_TABLE(sdw, rt5682_id); 72603f6fc6dSOder Chiou 727724cc62fSPierre-Louis Bossart static int __maybe_unused rt5682_dev_suspend(struct device *dev) 72803f6fc6dSOder Chiou { 72903f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 73003f6fc6dSOder Chiou 73103f6fc6dSOder Chiou if (!rt5682->hw_init) 73203f6fc6dSOder Chiou return 0; 73303f6fc6dSOder Chiou 734c792c369SPierre-Louis Bossart cancel_delayed_work_sync(&rt5682->jack_detect_work); 735c792c369SPierre-Louis Bossart 73603f6fc6dSOder Chiou regcache_cache_only(rt5682->regmap, true); 73703f6fc6dSOder Chiou regcache_mark_dirty(rt5682->regmap); 73803f6fc6dSOder Chiou 73903f6fc6dSOder Chiou return 0; 74003f6fc6dSOder Chiou } 74103f6fc6dSOder Chiou 74214f4946dSPierre-Louis Bossart static int __maybe_unused rt5682_dev_system_suspend(struct device *dev) 74314f4946dSPierre-Louis Bossart { 74414f4946dSPierre-Louis Bossart struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 74514f4946dSPierre-Louis Bossart struct sdw_slave *slave = dev_to_sdw_dev(dev); 74614f4946dSPierre-Louis Bossart int ret; 74714f4946dSPierre-Louis Bossart 74814f4946dSPierre-Louis Bossart if (!rt5682->hw_init) 74914f4946dSPierre-Louis Bossart return 0; 75014f4946dSPierre-Louis Bossart 75114f4946dSPierre-Louis Bossart /* 75214f4946dSPierre-Louis Bossart * prevent new interrupts from being handled after the 75314f4946dSPierre-Louis Bossart * deferred work completes and before the parent disables 75414f4946dSPierre-Louis Bossart * interrupts on the link 75514f4946dSPierre-Louis Bossart */ 75614f4946dSPierre-Louis Bossart mutex_lock(&rt5682->disable_irq_lock); 75714f4946dSPierre-Louis Bossart rt5682->disable_irq = true; 75814f4946dSPierre-Louis Bossart ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, 75914f4946dSPierre-Louis Bossart SDW_SCP_INT1_IMPL_DEF, 0); 76014f4946dSPierre-Louis Bossart mutex_unlock(&rt5682->disable_irq_lock); 76114f4946dSPierre-Louis Bossart 76214f4946dSPierre-Louis Bossart if (ret < 0) { 76314f4946dSPierre-Louis Bossart /* log but don't prevent suspend from happening */ 76414f4946dSPierre-Louis Bossart dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__); 76514f4946dSPierre-Louis Bossart } 76614f4946dSPierre-Louis Bossart 76714f4946dSPierre-Louis Bossart return rt5682_dev_suspend(dev); 76814f4946dSPierre-Louis Bossart } 76914f4946dSPierre-Louis Bossart 770724cc62fSPierre-Louis Bossart static int __maybe_unused rt5682_dev_resume(struct device *dev) 77103f6fc6dSOder Chiou { 77203f6fc6dSOder Chiou struct sdw_slave *slave = dev_to_sdw_dev(dev); 77303f6fc6dSOder Chiou struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 77403f6fc6dSOder Chiou unsigned long time; 77503f6fc6dSOder Chiou 7765361a421SPierre-Louis Bossart if (!rt5682->first_hw_init) 77703f6fc6dSOder Chiou return 0; 77803f6fc6dSOder Chiou 77903f6fc6dSOder Chiou if (!slave->unattach_request) 78003f6fc6dSOder Chiou goto regmap_sync; 78103f6fc6dSOder Chiou 78203f6fc6dSOder Chiou time = wait_for_completion_timeout(&slave->initialization_complete, 78303f6fc6dSOder Chiou msecs_to_jiffies(RT5682_PROBE_TIMEOUT)); 78403f6fc6dSOder Chiou if (!time) { 78503f6fc6dSOder Chiou dev_err(&slave->dev, "Initialization not complete, timed out\n"); 786917df025SPierre-Louis Bossart sdw_show_ping_status(slave->bus, true); 787917df025SPierre-Louis Bossart 78803f6fc6dSOder Chiou return -ETIMEDOUT; 78903f6fc6dSOder Chiou } 79003f6fc6dSOder Chiou 79103f6fc6dSOder Chiou regmap_sync: 79203f6fc6dSOder Chiou slave->unattach_request = 0; 79303f6fc6dSOder Chiou regcache_cache_only(rt5682->regmap, false); 79403f6fc6dSOder Chiou regcache_sync(rt5682->regmap); 79503f6fc6dSOder Chiou 79603f6fc6dSOder Chiou return 0; 79703f6fc6dSOder Chiou } 79803f6fc6dSOder Chiou 79903f6fc6dSOder Chiou static const struct dev_pm_ops rt5682_pm = { 80014f4946dSPierre-Louis Bossart SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume) 80103f6fc6dSOder Chiou SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL) 80203f6fc6dSOder Chiou }; 80303f6fc6dSOder Chiou 80403f6fc6dSOder Chiou static struct sdw_driver rt5682_sdw_driver = { 80503f6fc6dSOder Chiou .driver = { 80603f6fc6dSOder Chiou .name = "rt5682", 80703f6fc6dSOder Chiou .owner = THIS_MODULE, 80803f6fc6dSOder Chiou .pm = &rt5682_pm, 80903f6fc6dSOder Chiou }, 81003f6fc6dSOder Chiou .probe = rt5682_sdw_probe, 81103f6fc6dSOder Chiou .remove = rt5682_sdw_remove, 81203f6fc6dSOder Chiou .ops = &rt5682_slave_ops, 81303f6fc6dSOder Chiou .id_table = rt5682_id, 81403f6fc6dSOder Chiou }; 81503f6fc6dSOder Chiou module_sdw_driver(rt5682_sdw_driver); 81603f6fc6dSOder Chiou 81703f6fc6dSOder Chiou MODULE_DESCRIPTION("ASoC RT5682 driver SDW"); 81803f6fc6dSOder Chiou MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); 81903f6fc6dSOder Chiou MODULE_LICENSE("GPL v2"); 820