xref: /openbmc/linux/sound/soc/codecs/rt5682-sdw.c (revision 38edbfae6c7f4ad402dd0464c1887eaf068468b8)
103f6fc6dSOder Chiou // SPDX-License-Identifier: GPL-2.0-only
203f6fc6dSOder Chiou //
303f6fc6dSOder Chiou // rt5682-sdw.c  --  RT5682 ALSA SoC audio component driver
403f6fc6dSOder Chiou //
503f6fc6dSOder Chiou // Copyright 2019 Realtek Semiconductor Corp.
603f6fc6dSOder Chiou // Author: Oder Chiou <oder_chiou@realtek.com>
703f6fc6dSOder Chiou //
803f6fc6dSOder Chiou 
903f6fc6dSOder Chiou #include <linux/module.h>
1003f6fc6dSOder Chiou #include <linux/moduleparam.h>
1103f6fc6dSOder Chiou #include <linux/init.h>
1203f6fc6dSOder Chiou #include <linux/delay.h>
1303f6fc6dSOder Chiou #include <linux/pm.h>
1403f6fc6dSOder Chiou #include <linux/acpi.h>
1503f6fc6dSOder Chiou #include <linux/gpio.h>
1603f6fc6dSOder Chiou #include <linux/of_gpio.h>
17a50067d4SArnd Bergmann #include <linux/pm_runtime.h>
1803f6fc6dSOder Chiou #include <linux/regulator/consumer.h>
1903f6fc6dSOder Chiou #include <linux/mutex.h>
2003f6fc6dSOder Chiou #include <linux/soundwire/sdw.h>
2103f6fc6dSOder Chiou #include <linux/soundwire/sdw_type.h>
222acd30b9SPierre-Louis Bossart #include <linux/soundwire/sdw_registers.h>
2303f6fc6dSOder Chiou #include <sound/core.h>
2403f6fc6dSOder Chiou #include <sound/pcm.h>
2503f6fc6dSOder Chiou #include <sound/pcm_params.h>
2603f6fc6dSOder Chiou #include <sound/jack.h>
2703f6fc6dSOder Chiou #include <sound/soc.h>
2803f6fc6dSOder Chiou #include <sound/soc-dapm.h>
2903f6fc6dSOder Chiou #include <sound/initval.h>
3003f6fc6dSOder Chiou #include <sound/tlv.h>
3103f6fc6dSOder Chiou 
3203f6fc6dSOder Chiou #include "rt5682.h"
33a50067d4SArnd Bergmann 
34a50067d4SArnd Bergmann #define RT5682_SDW_ADDR_L			0x3000
35a50067d4SArnd Bergmann #define RT5682_SDW_ADDR_H			0x3001
36a50067d4SArnd Bergmann #define RT5682_SDW_DATA_L			0x3004
37a50067d4SArnd Bergmann #define RT5682_SDW_DATA_H			0x3005
38a50067d4SArnd Bergmann #define RT5682_SDW_CMD				0x3008
39a50067d4SArnd Bergmann 
40a50067d4SArnd Bergmann static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val)
41a50067d4SArnd Bergmann {
42a50067d4SArnd Bergmann 	struct device *dev = context;
43a50067d4SArnd Bergmann 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
44a50067d4SArnd Bergmann 	unsigned int data_l, data_h;
45a50067d4SArnd Bergmann 
46a50067d4SArnd Bergmann 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0);
47a50067d4SArnd Bergmann 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
48a50067d4SArnd Bergmann 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
49a50067d4SArnd Bergmann 	regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h);
50a50067d4SArnd Bergmann 	regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l);
51a50067d4SArnd Bergmann 
52a50067d4SArnd Bergmann 	*val = (data_h << 8) | data_l;
53a50067d4SArnd Bergmann 
54a50067d4SArnd Bergmann 	dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val);
55a50067d4SArnd Bergmann 
56a50067d4SArnd Bergmann 	return 0;
57a50067d4SArnd Bergmann }
58a50067d4SArnd Bergmann 
59a50067d4SArnd Bergmann static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val)
60a50067d4SArnd Bergmann {
61a50067d4SArnd Bergmann 	struct device *dev = context;
62a50067d4SArnd Bergmann 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
63a50067d4SArnd Bergmann 
64a50067d4SArnd Bergmann 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1);
65a50067d4SArnd Bergmann 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
66a50067d4SArnd Bergmann 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
67a50067d4SArnd Bergmann 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff);
68a50067d4SArnd Bergmann 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff));
69a50067d4SArnd Bergmann 
70a50067d4SArnd Bergmann 	dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
71a50067d4SArnd Bergmann 
72a50067d4SArnd Bergmann 	return 0;
73a50067d4SArnd Bergmann }
74a50067d4SArnd Bergmann 
75a50067d4SArnd Bergmann static const struct regmap_config rt5682_sdw_indirect_regmap = {
76a50067d4SArnd Bergmann 	.reg_bits = 16,
77a50067d4SArnd Bergmann 	.val_bits = 16,
78a50067d4SArnd Bergmann 	.max_register = RT5682_I2C_MODE,
79a50067d4SArnd Bergmann 	.volatile_reg = rt5682_volatile_register,
80a50067d4SArnd Bergmann 	.readable_reg = rt5682_readable_register,
81a50067d4SArnd Bergmann 	.cache_type = REGCACHE_RBTREE,
82a50067d4SArnd Bergmann 	.reg_defaults = rt5682_reg,
83a50067d4SArnd Bergmann 	.num_reg_defaults = RT5682_REG_NUM,
84a50067d4SArnd Bergmann 	.use_single_read = true,
85a50067d4SArnd Bergmann 	.use_single_write = true,
86a50067d4SArnd Bergmann 	.reg_read = rt5682_sdw_read,
87a50067d4SArnd Bergmann 	.reg_write = rt5682_sdw_write,
88a50067d4SArnd Bergmann };
89a50067d4SArnd Bergmann 
90a50067d4SArnd Bergmann struct sdw_stream_data {
91a50067d4SArnd Bergmann 	struct sdw_stream_runtime *sdw_stream;
92a50067d4SArnd Bergmann };
93a50067d4SArnd Bergmann 
94a50067d4SArnd Bergmann static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
95a50067d4SArnd Bergmann 				 int direction)
96a50067d4SArnd Bergmann {
97a50067d4SArnd Bergmann 	struct sdw_stream_data *stream;
98a50067d4SArnd Bergmann 
99a50067d4SArnd Bergmann 	if (!sdw_stream)
100a50067d4SArnd Bergmann 		return 0;
101a50067d4SArnd Bergmann 
102a50067d4SArnd Bergmann 	stream = kzalloc(sizeof(*stream), GFP_KERNEL);
103a50067d4SArnd Bergmann 	if (!stream)
104a50067d4SArnd Bergmann 		return -ENOMEM;
105a50067d4SArnd Bergmann 
106a50067d4SArnd Bergmann 	stream->sdw_stream = (struct sdw_stream_runtime *)sdw_stream;
107a50067d4SArnd Bergmann 
108a50067d4SArnd Bergmann 	/* Use tx_mask or rx_mask to configure stream tag and set dma_data */
109a50067d4SArnd Bergmann 	if (direction == SNDRV_PCM_STREAM_PLAYBACK)
110a50067d4SArnd Bergmann 		dai->playback_dma_data = stream;
111a50067d4SArnd Bergmann 	else
112a50067d4SArnd Bergmann 		dai->capture_dma_data = stream;
113a50067d4SArnd Bergmann 
114a50067d4SArnd Bergmann 	return 0;
115a50067d4SArnd Bergmann }
116a50067d4SArnd Bergmann 
117a50067d4SArnd Bergmann static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream,
118a50067d4SArnd Bergmann 				struct snd_soc_dai *dai)
119a50067d4SArnd Bergmann {
120a50067d4SArnd Bergmann 	struct sdw_stream_data *stream;
121a50067d4SArnd Bergmann 
122a50067d4SArnd Bergmann 	stream = snd_soc_dai_get_dma_data(dai, substream);
123a50067d4SArnd Bergmann 	snd_soc_dai_set_dma_data(dai, substream, NULL);
124a50067d4SArnd Bergmann 	kfree(stream);
125a50067d4SArnd Bergmann }
126a50067d4SArnd Bergmann 
127a50067d4SArnd Bergmann static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream,
128a50067d4SArnd Bergmann 				struct snd_pcm_hw_params *params,
129a50067d4SArnd Bergmann 				struct snd_soc_dai *dai)
130a50067d4SArnd Bergmann {
131a50067d4SArnd Bergmann 	struct snd_soc_component *component = dai->component;
132a50067d4SArnd Bergmann 	struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
133a50067d4SArnd Bergmann 	struct sdw_stream_config stream_config;
134a50067d4SArnd Bergmann 	struct sdw_port_config port_config;
135a50067d4SArnd Bergmann 	enum sdw_data_direction direction;
136a50067d4SArnd Bergmann 	struct sdw_stream_data *stream;
137a50067d4SArnd Bergmann 	int retval, port, num_channels;
138a50067d4SArnd Bergmann 	unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0;
139a50067d4SArnd Bergmann 
140a50067d4SArnd Bergmann 	dev_dbg(dai->dev, "%s %s", __func__, dai->name);
141a50067d4SArnd Bergmann 
142a50067d4SArnd Bergmann 	stream = snd_soc_dai_get_dma_data(dai, substream);
143a50067d4SArnd Bergmann 	if (!stream)
144a50067d4SArnd Bergmann 		return -ENOMEM;
145a50067d4SArnd Bergmann 
146a50067d4SArnd Bergmann 	if (!rt5682->slave)
147a50067d4SArnd Bergmann 		return -EINVAL;
148a50067d4SArnd Bergmann 
149a50067d4SArnd Bergmann 	/* SoundWire specific configuration */
150a50067d4SArnd Bergmann 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
151a50067d4SArnd Bergmann 		direction = SDW_DATA_DIR_RX;
152a50067d4SArnd Bergmann 		port = 1;
153a50067d4SArnd Bergmann 	} else {
154a50067d4SArnd Bergmann 		direction = SDW_DATA_DIR_TX;
155a50067d4SArnd Bergmann 		port = 2;
156a50067d4SArnd Bergmann 	}
157a50067d4SArnd Bergmann 
158a50067d4SArnd Bergmann 	stream_config.frame_rate = params_rate(params);
159a50067d4SArnd Bergmann 	stream_config.ch_count = params_channels(params);
160a50067d4SArnd Bergmann 	stream_config.bps = snd_pcm_format_width(params_format(params));
161a50067d4SArnd Bergmann 	stream_config.direction = direction;
162a50067d4SArnd Bergmann 
163a50067d4SArnd Bergmann 	num_channels = params_channels(params);
164a50067d4SArnd Bergmann 	port_config.ch_mask = (1 << (num_channels)) - 1;
165a50067d4SArnd Bergmann 	port_config.num = port;
166a50067d4SArnd Bergmann 
167a50067d4SArnd Bergmann 	retval = sdw_stream_add_slave(rt5682->slave, &stream_config,
168a50067d4SArnd Bergmann 				      &port_config, 1, stream->sdw_stream);
169a50067d4SArnd Bergmann 	if (retval) {
170a50067d4SArnd Bergmann 		dev_err(dai->dev, "Unable to configure port\n");
171a50067d4SArnd Bergmann 		return retval;
172a50067d4SArnd Bergmann 	}
173a50067d4SArnd Bergmann 
174a50067d4SArnd Bergmann 	switch (params_rate(params)) {
175a50067d4SArnd Bergmann 	case 48000:
176a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_48K;
177a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_48K;
178a50067d4SArnd Bergmann 		break;
179a50067d4SArnd Bergmann 	case 96000:
180a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_96K;
181a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_96K;
182a50067d4SArnd Bergmann 		break;
183a50067d4SArnd Bergmann 	case 192000:
184a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_192K;
185a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_192K;
186a50067d4SArnd Bergmann 		break;
187a50067d4SArnd Bergmann 	case 32000:
188a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_32K;
189a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_32K;
190a50067d4SArnd Bergmann 		break;
191a50067d4SArnd Bergmann 	case 24000:
192a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_24K;
193a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_24K;
194a50067d4SArnd Bergmann 		break;
195a50067d4SArnd Bergmann 	case 16000:
196a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_16K;
197a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_16K;
198a50067d4SArnd Bergmann 		break;
199a50067d4SArnd Bergmann 	case 12000:
200a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_12K;
201a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_12K;
202a50067d4SArnd Bergmann 		break;
203a50067d4SArnd Bergmann 	case 8000:
204a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_8K;
205a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_8K;
206a50067d4SArnd Bergmann 		break;
207a50067d4SArnd Bergmann 	case 44100:
208a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_44K;
209a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_44K;
210a50067d4SArnd Bergmann 		break;
211a50067d4SArnd Bergmann 	case 88200:
212a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_88K;
213a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_88K;
214a50067d4SArnd Bergmann 		break;
215a50067d4SArnd Bergmann 	case 176400:
216a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_176K;
217a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_176K;
218a50067d4SArnd Bergmann 		break;
219a50067d4SArnd Bergmann 	case 22050:
220a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_22K;
221a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_22K;
222a50067d4SArnd Bergmann 		break;
223a50067d4SArnd Bergmann 	case 11025:
224a50067d4SArnd Bergmann 		val_p = RT5682_SDW_REF_1_11K;
225a50067d4SArnd Bergmann 		val_c = RT5682_SDW_REF_2_11K;
226a50067d4SArnd Bergmann 		break;
227a50067d4SArnd Bergmann 	default:
228a50067d4SArnd Bergmann 		return -EINVAL;
229a50067d4SArnd Bergmann 	}
230a50067d4SArnd Bergmann 
231a50067d4SArnd Bergmann 	if (params_rate(params) <= 48000) {
232a50067d4SArnd Bergmann 		osr_p = RT5682_DAC_OSR_D_8;
233a50067d4SArnd Bergmann 		osr_c = RT5682_ADC_OSR_D_8;
234a50067d4SArnd Bergmann 	} else if (params_rate(params) <= 96000) {
235a50067d4SArnd Bergmann 		osr_p = RT5682_DAC_OSR_D_4;
236a50067d4SArnd Bergmann 		osr_c = RT5682_ADC_OSR_D_4;
237a50067d4SArnd Bergmann 	} else {
238a50067d4SArnd Bergmann 		osr_p = RT5682_DAC_OSR_D_2;
239a50067d4SArnd Bergmann 		osr_c = RT5682_ADC_OSR_D_2;
240a50067d4SArnd Bergmann 	}
241a50067d4SArnd Bergmann 
242a50067d4SArnd Bergmann 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
243a50067d4SArnd Bergmann 		regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
244a50067d4SArnd Bergmann 			RT5682_SDW_REF_1_MASK, val_p);
245a50067d4SArnd Bergmann 		regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
246a50067d4SArnd Bergmann 			RT5682_DAC_OSR_MASK, osr_p);
247a50067d4SArnd Bergmann 	} else {
248a50067d4SArnd Bergmann 		regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
249a50067d4SArnd Bergmann 			RT5682_SDW_REF_2_MASK, val_c);
250a50067d4SArnd Bergmann 		regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
251a50067d4SArnd Bergmann 			RT5682_ADC_OSR_MASK, osr_c);
252a50067d4SArnd Bergmann 	}
253a50067d4SArnd Bergmann 
254a50067d4SArnd Bergmann 	return retval;
255a50067d4SArnd Bergmann }
256a50067d4SArnd Bergmann 
257a50067d4SArnd Bergmann static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream,
258a50067d4SArnd Bergmann 			      struct snd_soc_dai *dai)
259a50067d4SArnd Bergmann {
260a50067d4SArnd Bergmann 	struct snd_soc_component *component = dai->component;
261a50067d4SArnd Bergmann 	struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
262a50067d4SArnd Bergmann 	struct sdw_stream_data *stream =
263a50067d4SArnd Bergmann 		snd_soc_dai_get_dma_data(dai, substream);
264a50067d4SArnd Bergmann 
265a50067d4SArnd Bergmann 	if (!rt5682->slave)
266a50067d4SArnd Bergmann 		return -EINVAL;
267a50067d4SArnd Bergmann 
268a50067d4SArnd Bergmann 	sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream);
269a50067d4SArnd Bergmann 	return 0;
270a50067d4SArnd Bergmann }
271a50067d4SArnd Bergmann 
272a50067d4SArnd Bergmann static struct snd_soc_dai_ops rt5682_sdw_ops = {
273a50067d4SArnd Bergmann 	.hw_params	= rt5682_sdw_hw_params,
274a50067d4SArnd Bergmann 	.hw_free	= rt5682_sdw_hw_free,
275a50067d4SArnd Bergmann 	.set_sdw_stream	= rt5682_set_sdw_stream,
276a50067d4SArnd Bergmann 	.shutdown	= rt5682_sdw_shutdown,
277a50067d4SArnd Bergmann };
278a50067d4SArnd Bergmann 
279a50067d4SArnd Bergmann static struct snd_soc_dai_driver rt5682_dai[] = {
280a50067d4SArnd Bergmann 	{
281a50067d4SArnd Bergmann 		.name = "rt5682-aif1",
282a50067d4SArnd Bergmann 		.id = RT5682_AIF1,
283a50067d4SArnd Bergmann 		.playback = {
284a50067d4SArnd Bergmann 			.stream_name = "AIF1 Playback",
285a50067d4SArnd Bergmann 			.channels_min = 1,
286a50067d4SArnd Bergmann 			.channels_max = 2,
287a50067d4SArnd Bergmann 			.rates = RT5682_STEREO_RATES,
288a50067d4SArnd Bergmann 			.formats = RT5682_FORMATS,
289a50067d4SArnd Bergmann 		},
290a50067d4SArnd Bergmann 		.capture = {
291a50067d4SArnd Bergmann 			.stream_name = "AIF1 Capture",
292a50067d4SArnd Bergmann 			.channels_min = 1,
293a50067d4SArnd Bergmann 			.channels_max = 2,
294a50067d4SArnd Bergmann 			.rates = RT5682_STEREO_RATES,
295a50067d4SArnd Bergmann 			.formats = RT5682_FORMATS,
296a50067d4SArnd Bergmann 		},
297a50067d4SArnd Bergmann 		.ops = &rt5682_aif1_dai_ops,
298a50067d4SArnd Bergmann 	},
299a50067d4SArnd Bergmann 	{
300a50067d4SArnd Bergmann 		.name = "rt5682-aif2",
301a50067d4SArnd Bergmann 		.id = RT5682_AIF2,
302a50067d4SArnd Bergmann 		.capture = {
303a50067d4SArnd Bergmann 			.stream_name = "AIF2 Capture",
304a50067d4SArnd Bergmann 			.channels_min = 1,
305a50067d4SArnd Bergmann 			.channels_max = 2,
306a50067d4SArnd Bergmann 			.rates = RT5682_STEREO_RATES,
307a50067d4SArnd Bergmann 			.formats = RT5682_FORMATS,
308a50067d4SArnd Bergmann 		},
309a50067d4SArnd Bergmann 		.ops = &rt5682_aif2_dai_ops,
310a50067d4SArnd Bergmann 	},
311a50067d4SArnd Bergmann 	{
312a50067d4SArnd Bergmann 		.name = "rt5682-sdw",
313a50067d4SArnd Bergmann 		.id = RT5682_SDW,
314a50067d4SArnd Bergmann 		.playback = {
315a50067d4SArnd Bergmann 			.stream_name = "SDW Playback",
316a50067d4SArnd Bergmann 			.channels_min = 1,
317a50067d4SArnd Bergmann 			.channels_max = 2,
318a50067d4SArnd Bergmann 			.rates = RT5682_STEREO_RATES,
319a50067d4SArnd Bergmann 			.formats = RT5682_FORMATS,
320a50067d4SArnd Bergmann 		},
321a50067d4SArnd Bergmann 		.capture = {
322a50067d4SArnd Bergmann 			.stream_name = "SDW Capture",
323a50067d4SArnd Bergmann 			.channels_min = 1,
324a50067d4SArnd Bergmann 			.channels_max = 2,
325a50067d4SArnd Bergmann 			.rates = RT5682_STEREO_RATES,
326a50067d4SArnd Bergmann 			.formats = RT5682_FORMATS,
327a50067d4SArnd Bergmann 		},
328a50067d4SArnd Bergmann 		.ops = &rt5682_sdw_ops,
329a50067d4SArnd Bergmann 	},
330a50067d4SArnd Bergmann };
331a50067d4SArnd Bergmann 
332a50067d4SArnd Bergmann static int rt5682_sdw_init(struct device *dev, struct regmap *regmap,
333a50067d4SArnd Bergmann 			   struct sdw_slave *slave)
334a50067d4SArnd Bergmann {
335a50067d4SArnd Bergmann 	struct rt5682_priv *rt5682;
336a50067d4SArnd Bergmann 	int ret;
337a50067d4SArnd Bergmann 
338a50067d4SArnd Bergmann 	rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL);
339a50067d4SArnd Bergmann 	if (!rt5682)
340a50067d4SArnd Bergmann 		return -ENOMEM;
341a50067d4SArnd Bergmann 
342a50067d4SArnd Bergmann 	dev_set_drvdata(dev, rt5682);
343a50067d4SArnd Bergmann 	rt5682->slave = slave;
344a50067d4SArnd Bergmann 	rt5682->sdw_regmap = regmap;
345a50067d4SArnd Bergmann 	rt5682->is_sdw = true;
346a50067d4SArnd Bergmann 
347a50067d4SArnd Bergmann 	rt5682->regmap = devm_regmap_init(dev, NULL, dev,
348a50067d4SArnd Bergmann 					  &rt5682_sdw_indirect_regmap);
349a50067d4SArnd Bergmann 	if (IS_ERR(rt5682->regmap)) {
350a50067d4SArnd Bergmann 		ret = PTR_ERR(rt5682->regmap);
351a50067d4SArnd Bergmann 		dev_err(dev, "Failed to allocate register map: %d\n",
352a50067d4SArnd Bergmann 			ret);
353a50067d4SArnd Bergmann 		return ret;
354a50067d4SArnd Bergmann 	}
355a50067d4SArnd Bergmann 
356a50067d4SArnd Bergmann 	/*
357a50067d4SArnd Bergmann 	 * Mark hw_init to false
358a50067d4SArnd Bergmann 	 * HW init will be performed when device reports present
359a50067d4SArnd Bergmann 	 */
360a50067d4SArnd Bergmann 	rt5682->hw_init = false;
361a50067d4SArnd Bergmann 	rt5682->first_hw_init = false;
362a50067d4SArnd Bergmann 
363a50067d4SArnd Bergmann 	mutex_init(&rt5682->calibrate_mutex);
364a50067d4SArnd Bergmann 	INIT_DELAYED_WORK(&rt5682->jack_detect_work,
365a50067d4SArnd Bergmann 		rt5682_jack_detect_handler);
366a50067d4SArnd Bergmann 
367a50067d4SArnd Bergmann 	ret = devm_snd_soc_register_component(dev,
368a50067d4SArnd Bergmann 					      &rt5682_soc_component_dev,
369a50067d4SArnd Bergmann 					      rt5682_dai, ARRAY_SIZE(rt5682_dai));
370a50067d4SArnd Bergmann 	dev_dbg(&slave->dev, "%s\n", __func__);
371a50067d4SArnd Bergmann 
372a50067d4SArnd Bergmann 	return ret;
373a50067d4SArnd Bergmann }
374a50067d4SArnd Bergmann 
375a50067d4SArnd Bergmann static int rt5682_io_init(struct device *dev, struct sdw_slave *slave)
376a50067d4SArnd Bergmann {
377a50067d4SArnd Bergmann 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
378a50067d4SArnd Bergmann 	int ret = 0;
379a50067d4SArnd Bergmann 	unsigned int val;
380a50067d4SArnd Bergmann 
381a50067d4SArnd Bergmann 	if (rt5682->hw_init)
382a50067d4SArnd Bergmann 		return 0;
383a50067d4SArnd Bergmann 
384a50067d4SArnd Bergmann 	regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val);
385a50067d4SArnd Bergmann 	if (val != DEVICE_ID) {
386a50067d4SArnd Bergmann 		dev_err(dev, "Device with ID register %x is not rt5682\n", val);
387a50067d4SArnd Bergmann 		return -ENODEV;
388a50067d4SArnd Bergmann 	}
389a50067d4SArnd Bergmann 
390a50067d4SArnd Bergmann 	/*
391a50067d4SArnd Bergmann 	 * PM runtime is only enabled when a Slave reports as Attached
392a50067d4SArnd Bergmann 	 */
393a50067d4SArnd Bergmann 	if (!rt5682->first_hw_init) {
394a50067d4SArnd Bergmann 		/* set autosuspend parameters */
395a50067d4SArnd Bergmann 		pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
396a50067d4SArnd Bergmann 		pm_runtime_use_autosuspend(&slave->dev);
397a50067d4SArnd Bergmann 
398a50067d4SArnd Bergmann 		/* update count of parent 'active' children */
399a50067d4SArnd Bergmann 		pm_runtime_set_active(&slave->dev);
400a50067d4SArnd Bergmann 
401a50067d4SArnd Bergmann 		/* make sure the device does not suspend immediately */
402a50067d4SArnd Bergmann 		pm_runtime_mark_last_busy(&slave->dev);
403a50067d4SArnd Bergmann 
404a50067d4SArnd Bergmann 		pm_runtime_enable(&slave->dev);
405a50067d4SArnd Bergmann 	}
406a50067d4SArnd Bergmann 
407a50067d4SArnd Bergmann 	pm_runtime_get_noresume(&slave->dev);
408a50067d4SArnd Bergmann 
409a50067d4SArnd Bergmann 	if (rt5682->first_hw_init) {
410a50067d4SArnd Bergmann 		regcache_cache_only(rt5682->regmap, false);
411a50067d4SArnd Bergmann 		regcache_cache_bypass(rt5682->regmap, true);
412a50067d4SArnd Bergmann 	}
413a50067d4SArnd Bergmann 
414a50067d4SArnd Bergmann 	rt5682_calibrate(rt5682);
415a50067d4SArnd Bergmann 
416a50067d4SArnd Bergmann 	if (rt5682->first_hw_init) {
417a50067d4SArnd Bergmann 		regcache_cache_bypass(rt5682->regmap, false);
418a50067d4SArnd Bergmann 		regcache_mark_dirty(rt5682->regmap);
419a50067d4SArnd Bergmann 		regcache_sync(rt5682->regmap);
420a50067d4SArnd Bergmann 
421a50067d4SArnd Bergmann 		/* volatile registers */
422a50067d4SArnd Bergmann 		regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
423a50067d4SArnd Bergmann 			RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
424a50067d4SArnd Bergmann 
425a50067d4SArnd Bergmann 		goto reinit;
426a50067d4SArnd Bergmann 	}
427a50067d4SArnd Bergmann 
428a50067d4SArnd Bergmann 	rt5682_apply_patch_list(rt5682, dev);
429a50067d4SArnd Bergmann 
430a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000);
431a50067d4SArnd Bergmann 
432a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
433a50067d4SArnd Bergmann 		RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
434a50067d4SArnd Bergmann 		RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
4356301adf9SShuming Fan 	regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
436a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
437a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
438a50067d4SArnd Bergmann 		RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);
439a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1,
440a50067d4SArnd Bergmann 		RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
441a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
442a50067d4SArnd Bergmann 		RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
443a50067d4SArnd Bergmann 
444a50067d4SArnd Bergmann 	/* Soundwire */
445a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266);
446a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700);
447a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006);
448a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600);
449a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f);
450a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000);
451a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000);
452a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK,
453a50067d4SArnd Bergmann 		RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK,
454a50067d4SArnd Bergmann 		RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW);
455a50067d4SArnd Bergmann 
456a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
457a50067d4SArnd Bergmann 		RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
458a50067d4SArnd Bergmann 	regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd042);
459a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3,
460a50067d4SArnd Bergmann 		RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN);
461a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1,
462a50067d4SArnd Bergmann 		RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN);
463a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
464a50067d4SArnd Bergmann 		RT5682_POW_IRQ | RT5682_POW_JDH |
465a50067d4SArnd Bergmann 		RT5682_POW_ANA, RT5682_POW_IRQ |
466a50067d4SArnd Bergmann 		RT5682_POW_JDH | RT5682_POW_ANA);
467a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
468a50067d4SArnd Bergmann 		RT5682_PWR_JDH, RT5682_PWR_JDH);
469a50067d4SArnd Bergmann 	regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
470a50067d4SArnd Bergmann 		RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK,
471a50067d4SArnd Bergmann 		RT5682_JD1_EN | RT5682_JD1_IRQ_PUL);
472a50067d4SArnd Bergmann 
473a50067d4SArnd Bergmann reinit:
474a50067d4SArnd Bergmann 	mod_delayed_work(system_power_efficient_wq,
475a50067d4SArnd Bergmann 		&rt5682->jack_detect_work, msecs_to_jiffies(250));
476a50067d4SArnd Bergmann 
477a50067d4SArnd Bergmann 	/* Mark Slave initialization complete */
478a50067d4SArnd Bergmann 	rt5682->hw_init = true;
479a50067d4SArnd Bergmann 	rt5682->first_hw_init = true;
480a50067d4SArnd Bergmann 
481a50067d4SArnd Bergmann 	pm_runtime_mark_last_busy(&slave->dev);
482a50067d4SArnd Bergmann 	pm_runtime_put_autosuspend(&slave->dev);
483a50067d4SArnd Bergmann 
484a50067d4SArnd Bergmann 	dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
485a50067d4SArnd Bergmann 
486a50067d4SArnd Bergmann 	return ret;
487a50067d4SArnd Bergmann }
48803f6fc6dSOder Chiou 
48903f6fc6dSOder Chiou static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg)
49003f6fc6dSOder Chiou {
49103f6fc6dSOder Chiou 	switch (reg) {
49203f6fc6dSOder Chiou 	case 0x00e0:
49303f6fc6dSOder Chiou 	case 0x00f0:
49403f6fc6dSOder Chiou 	case 0x3000:
49503f6fc6dSOder Chiou 	case 0x3001:
49603f6fc6dSOder Chiou 	case 0x3004:
49703f6fc6dSOder Chiou 	case 0x3005:
49803f6fc6dSOder Chiou 	case 0x3008:
49903f6fc6dSOder Chiou 		return true;
50003f6fc6dSOder Chiou 	default:
50103f6fc6dSOder Chiou 		return false;
50203f6fc6dSOder Chiou 	}
50303f6fc6dSOder Chiou }
50403f6fc6dSOder Chiou 
505a50067d4SArnd Bergmann static const struct regmap_config rt5682_sdw_regmap = {
50603f6fc6dSOder Chiou 	.name = "sdw",
50703f6fc6dSOder Chiou 	.reg_bits = 32,
50803f6fc6dSOder Chiou 	.val_bits = 8,
50903f6fc6dSOder Chiou 	.max_register = RT5682_I2C_MODE,
51003f6fc6dSOder Chiou 	.readable_reg = rt5682_sdw_readable_register,
51103f6fc6dSOder Chiou 	.cache_type = REGCACHE_NONE,
51203f6fc6dSOder Chiou 	.use_single_read = true,
51303f6fc6dSOder Chiou 	.use_single_write = true,
51403f6fc6dSOder Chiou };
51503f6fc6dSOder Chiou 
51603f6fc6dSOder Chiou static int rt5682_update_status(struct sdw_slave *slave,
51703f6fc6dSOder Chiou 					enum sdw_slave_status status)
51803f6fc6dSOder Chiou {
51903f6fc6dSOder Chiou 	struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
52003f6fc6dSOder Chiou 
52103f6fc6dSOder Chiou 	/* Update the status */
52203f6fc6dSOder Chiou 	rt5682->status = status;
52303f6fc6dSOder Chiou 
52403f6fc6dSOder Chiou 	if (status == SDW_SLAVE_UNATTACHED)
52503f6fc6dSOder Chiou 		rt5682->hw_init = false;
52603f6fc6dSOder Chiou 
52703f6fc6dSOder Chiou 	/*
52803f6fc6dSOder Chiou 	 * Perform initialization only if slave status is present and
52903f6fc6dSOder Chiou 	 * hw_init flag is false
53003f6fc6dSOder Chiou 	 */
53103f6fc6dSOder Chiou 	if (rt5682->hw_init || rt5682->status != SDW_SLAVE_ATTACHED)
53203f6fc6dSOder Chiou 		return 0;
53303f6fc6dSOder Chiou 
53403f6fc6dSOder Chiou 	/* perform I/O transfers required for Slave initialization */
53503f6fc6dSOder Chiou 	return rt5682_io_init(&slave->dev, slave);
53603f6fc6dSOder Chiou }
53703f6fc6dSOder Chiou 
53803f6fc6dSOder Chiou static int rt5682_read_prop(struct sdw_slave *slave)
53903f6fc6dSOder Chiou {
54003f6fc6dSOder Chiou 	struct sdw_slave_prop *prop = &slave->prop;
541d0bbcb4eSPierre-Louis Bossart 	int nval, i;
54203f6fc6dSOder Chiou 	u32 bit;
54303f6fc6dSOder Chiou 	unsigned long addr;
54403f6fc6dSOder Chiou 	struct sdw_dpn_prop *dpn;
54503f6fc6dSOder Chiou 
5462acd30b9SPierre-Louis Bossart 	prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
5472acd30b9SPierre-Louis Bossart 		SDW_SCP_INT1_PARITY;
548*38edbfaeSPierre-Louis Bossart 	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
5492acd30b9SPierre-Louis Bossart 
55003f6fc6dSOder Chiou 	prop->paging_support = false;
55103f6fc6dSOder Chiou 
55203f6fc6dSOder Chiou 	/* first we need to allocate memory for set bits in port lists */
55303f6fc6dSOder Chiou 	prop->source_ports = 0x4;	/* BITMAP: 00000100 */
55403f6fc6dSOder Chiou 	prop->sink_ports = 0x2;		/* BITMAP: 00000010 */
55503f6fc6dSOder Chiou 
55603f6fc6dSOder Chiou 	nval = hweight32(prop->source_ports);
55703f6fc6dSOder Chiou 	prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
55803f6fc6dSOder Chiou 					  sizeof(*prop->src_dpn_prop),
55903f6fc6dSOder Chiou 					  GFP_KERNEL);
56003f6fc6dSOder Chiou 	if (!prop->src_dpn_prop)
56103f6fc6dSOder Chiou 		return -ENOMEM;
56203f6fc6dSOder Chiou 
56303f6fc6dSOder Chiou 	i = 0;
56403f6fc6dSOder Chiou 	dpn = prop->src_dpn_prop;
56503f6fc6dSOder Chiou 	addr = prop->source_ports;
56603f6fc6dSOder Chiou 	for_each_set_bit(bit, &addr, 32) {
56703f6fc6dSOder Chiou 		dpn[i].num = bit;
56803f6fc6dSOder Chiou 		dpn[i].type = SDW_DPN_FULL;
56903f6fc6dSOder Chiou 		dpn[i].simple_ch_prep_sm = true;
57003f6fc6dSOder Chiou 		dpn[i].ch_prep_timeout = 10;
57103f6fc6dSOder Chiou 		i++;
57203f6fc6dSOder Chiou 	}
57303f6fc6dSOder Chiou 
57403f6fc6dSOder Chiou 	/* do this again for sink now */
57503f6fc6dSOder Chiou 	nval = hweight32(prop->sink_ports);
57603f6fc6dSOder Chiou 	prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
57703f6fc6dSOder Chiou 					   sizeof(*prop->sink_dpn_prop),
57803f6fc6dSOder Chiou 					   GFP_KERNEL);
57903f6fc6dSOder Chiou 	if (!prop->sink_dpn_prop)
58003f6fc6dSOder Chiou 		return -ENOMEM;
58103f6fc6dSOder Chiou 
58203f6fc6dSOder Chiou 	i = 0;
58303f6fc6dSOder Chiou 	dpn = prop->sink_dpn_prop;
58403f6fc6dSOder Chiou 	addr = prop->sink_ports;
58503f6fc6dSOder Chiou 	for_each_set_bit(bit, &addr, 32) {
58603f6fc6dSOder Chiou 		dpn[i].num = bit;
58703f6fc6dSOder Chiou 		dpn[i].type = SDW_DPN_FULL;
58803f6fc6dSOder Chiou 		dpn[i].simple_ch_prep_sm = true;
58903f6fc6dSOder Chiou 		dpn[i].ch_prep_timeout = 10;
59003f6fc6dSOder Chiou 		i++;
59103f6fc6dSOder Chiou 	}
59203f6fc6dSOder Chiou 
59303f6fc6dSOder Chiou 	/* set the timeout values */
59403f6fc6dSOder Chiou 	prop->clk_stop_timeout = 20;
59503f6fc6dSOder Chiou 
59603f6fc6dSOder Chiou 	/* wake-up event */
59703f6fc6dSOder Chiou 	prop->wake_capable = 1;
59803f6fc6dSOder Chiou 
59903f6fc6dSOder Chiou 	return 0;
60003f6fc6dSOder Chiou }
60103f6fc6dSOder Chiou 
60203f6fc6dSOder Chiou /* Bus clock frequency */
60303f6fc6dSOder Chiou #define RT5682_CLK_FREQ_9600000HZ 9600000
60403f6fc6dSOder Chiou #define RT5682_CLK_FREQ_12000000HZ 12000000
60503f6fc6dSOder Chiou #define RT5682_CLK_FREQ_6000000HZ 6000000
60603f6fc6dSOder Chiou #define RT5682_CLK_FREQ_4800000HZ 4800000
60703f6fc6dSOder Chiou #define RT5682_CLK_FREQ_2400000HZ 2400000
60803f6fc6dSOder Chiou #define RT5682_CLK_FREQ_12288000HZ 12288000
60903f6fc6dSOder Chiou 
610a3c2e894SYueHaibing static int rt5682_clock_config(struct device *dev)
61103f6fc6dSOder Chiou {
61203f6fc6dSOder Chiou 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
61303f6fc6dSOder Chiou 	unsigned int clk_freq, value;
61403f6fc6dSOder Chiou 
61503f6fc6dSOder Chiou 	clk_freq = (rt5682->params.curr_dr_freq >> 1);
61603f6fc6dSOder Chiou 
61703f6fc6dSOder Chiou 	switch (clk_freq) {
61803f6fc6dSOder Chiou 	case RT5682_CLK_FREQ_12000000HZ:
61903f6fc6dSOder Chiou 		value = 0x0;
62003f6fc6dSOder Chiou 		break;
62103f6fc6dSOder Chiou 	case RT5682_CLK_FREQ_6000000HZ:
62203f6fc6dSOder Chiou 		value = 0x1;
62303f6fc6dSOder Chiou 		break;
62403f6fc6dSOder Chiou 	case RT5682_CLK_FREQ_9600000HZ:
62503f6fc6dSOder Chiou 		value = 0x2;
62603f6fc6dSOder Chiou 		break;
62703f6fc6dSOder Chiou 	case RT5682_CLK_FREQ_4800000HZ:
62803f6fc6dSOder Chiou 		value = 0x3;
62903f6fc6dSOder Chiou 		break;
63003f6fc6dSOder Chiou 	case RT5682_CLK_FREQ_2400000HZ:
63103f6fc6dSOder Chiou 		value = 0x4;
63203f6fc6dSOder Chiou 		break;
63303f6fc6dSOder Chiou 	case RT5682_CLK_FREQ_12288000HZ:
63403f6fc6dSOder Chiou 		value = 0x5;
63503f6fc6dSOder Chiou 		break;
63603f6fc6dSOder Chiou 	default:
63703f6fc6dSOder Chiou 		return -EINVAL;
63803f6fc6dSOder Chiou 	}
63903f6fc6dSOder Chiou 
64003f6fc6dSOder Chiou 	regmap_write(rt5682->sdw_regmap, 0xe0, value);
64103f6fc6dSOder Chiou 	regmap_write(rt5682->sdw_regmap, 0xf0, value);
64203f6fc6dSOder Chiou 
64303f6fc6dSOder Chiou 	dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq);
64403f6fc6dSOder Chiou 
64503f6fc6dSOder Chiou 	return 0;
64603f6fc6dSOder Chiou }
64703f6fc6dSOder Chiou 
64803f6fc6dSOder Chiou static int rt5682_bus_config(struct sdw_slave *slave,
64903f6fc6dSOder Chiou 					struct sdw_bus_params *params)
65003f6fc6dSOder Chiou {
65103f6fc6dSOder Chiou 	struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
65203f6fc6dSOder Chiou 	int ret;
65303f6fc6dSOder Chiou 
65403f6fc6dSOder Chiou 	memcpy(&rt5682->params, params, sizeof(*params));
65503f6fc6dSOder Chiou 
65603f6fc6dSOder Chiou 	ret = rt5682_clock_config(&slave->dev);
65703f6fc6dSOder Chiou 	if (ret < 0)
65803f6fc6dSOder Chiou 		dev_err(&slave->dev, "Invalid clk config");
65903f6fc6dSOder Chiou 
66003f6fc6dSOder Chiou 	return ret;
66103f6fc6dSOder Chiou }
66203f6fc6dSOder Chiou 
66303f6fc6dSOder Chiou static int rt5682_interrupt_callback(struct sdw_slave *slave,
66403f6fc6dSOder Chiou 					struct sdw_slave_intr_status *status)
66503f6fc6dSOder Chiou {
66603f6fc6dSOder Chiou 	struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
66703f6fc6dSOder Chiou 
66803f6fc6dSOder Chiou 	dev_dbg(&slave->dev,
66903f6fc6dSOder Chiou 		"%s control_port_stat=%x", __func__, status->control_port);
67003f6fc6dSOder Chiou 
67103f6fc6dSOder Chiou 	if (status->control_port & 0x4) {
67203f6fc6dSOder Chiou 		mod_delayed_work(system_power_efficient_wq,
67303f6fc6dSOder Chiou 			&rt5682->jack_detect_work, msecs_to_jiffies(250));
67403f6fc6dSOder Chiou 	}
67503f6fc6dSOder Chiou 
67603f6fc6dSOder Chiou 	return 0;
67703f6fc6dSOder Chiou }
67803f6fc6dSOder Chiou 
67903f6fc6dSOder Chiou static struct sdw_slave_ops rt5682_slave_ops = {
68003f6fc6dSOder Chiou 	.read_prop = rt5682_read_prop,
68103f6fc6dSOder Chiou 	.interrupt_callback = rt5682_interrupt_callback,
68203f6fc6dSOder Chiou 	.update_status = rt5682_update_status,
68303f6fc6dSOder Chiou 	.bus_config = rt5682_bus_config,
68403f6fc6dSOder Chiou };
68503f6fc6dSOder Chiou 
68603f6fc6dSOder Chiou static int rt5682_sdw_probe(struct sdw_slave *slave,
68703f6fc6dSOder Chiou 			   const struct sdw_device_id *id)
68803f6fc6dSOder Chiou {
68903f6fc6dSOder Chiou 	struct regmap *regmap;
69003f6fc6dSOder Chiou 
69103f6fc6dSOder Chiou 	/* Regmap Initialization */
69203f6fc6dSOder Chiou 	regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap);
69303f6fc6dSOder Chiou 	if (IS_ERR(regmap))
69403f6fc6dSOder Chiou 		return -EINVAL;
69503f6fc6dSOder Chiou 
69603f6fc6dSOder Chiou 	rt5682_sdw_init(&slave->dev, regmap, slave);
69703f6fc6dSOder Chiou 
69803f6fc6dSOder Chiou 	return 0;
69903f6fc6dSOder Chiou }
70003f6fc6dSOder Chiou 
70103f6fc6dSOder Chiou static int rt5682_sdw_remove(struct sdw_slave *slave)
70203f6fc6dSOder Chiou {
70303f6fc6dSOder Chiou 	struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
70403f6fc6dSOder Chiou 
70503f6fc6dSOder Chiou 	if (rt5682 && rt5682->hw_init)
70603f6fc6dSOder Chiou 		cancel_delayed_work(&rt5682->jack_detect_work);
70703f6fc6dSOder Chiou 
70803f6fc6dSOder Chiou 	return 0;
70903f6fc6dSOder Chiou }
71003f6fc6dSOder Chiou 
71103f6fc6dSOder Chiou static const struct sdw_device_id rt5682_id[] = {
71203f6fc6dSOder Chiou 	SDW_SLAVE_ENTRY(0x025d, 0x5682, 0),
71303f6fc6dSOder Chiou 	{},
71403f6fc6dSOder Chiou };
71503f6fc6dSOder Chiou MODULE_DEVICE_TABLE(sdw, rt5682_id);
71603f6fc6dSOder Chiou 
717724cc62fSPierre-Louis Bossart static int __maybe_unused rt5682_dev_suspend(struct device *dev)
71803f6fc6dSOder Chiou {
71903f6fc6dSOder Chiou 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
72003f6fc6dSOder Chiou 
72103f6fc6dSOder Chiou 	if (!rt5682->hw_init)
72203f6fc6dSOder Chiou 		return 0;
72303f6fc6dSOder Chiou 
72403f6fc6dSOder Chiou 	regcache_cache_only(rt5682->regmap, true);
72503f6fc6dSOder Chiou 	regcache_mark_dirty(rt5682->regmap);
72603f6fc6dSOder Chiou 
72703f6fc6dSOder Chiou 	return 0;
72803f6fc6dSOder Chiou }
72903f6fc6dSOder Chiou 
730724cc62fSPierre-Louis Bossart static int __maybe_unused rt5682_dev_resume(struct device *dev)
73103f6fc6dSOder Chiou {
73203f6fc6dSOder Chiou 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
73303f6fc6dSOder Chiou 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
73403f6fc6dSOder Chiou 	unsigned long time;
73503f6fc6dSOder Chiou 
73603f6fc6dSOder Chiou 	if (!rt5682->hw_init)
73703f6fc6dSOder Chiou 		return 0;
73803f6fc6dSOder Chiou 
73903f6fc6dSOder Chiou 	if (!slave->unattach_request)
74003f6fc6dSOder Chiou 		goto regmap_sync;
74103f6fc6dSOder Chiou 
74203f6fc6dSOder Chiou 	time = wait_for_completion_timeout(&slave->initialization_complete,
74303f6fc6dSOder Chiou 				msecs_to_jiffies(RT5682_PROBE_TIMEOUT));
74403f6fc6dSOder Chiou 	if (!time) {
74503f6fc6dSOder Chiou 		dev_err(&slave->dev, "Initialization not complete, timed out\n");
74603f6fc6dSOder Chiou 		return -ETIMEDOUT;
74703f6fc6dSOder Chiou 	}
74803f6fc6dSOder Chiou 
74903f6fc6dSOder Chiou regmap_sync:
75003f6fc6dSOder Chiou 	slave->unattach_request = 0;
75103f6fc6dSOder Chiou 	regcache_cache_only(rt5682->regmap, false);
75203f6fc6dSOder Chiou 	regcache_sync(rt5682->regmap);
75303f6fc6dSOder Chiou 
75403f6fc6dSOder Chiou 	return 0;
75503f6fc6dSOder Chiou }
75603f6fc6dSOder Chiou 
75703f6fc6dSOder Chiou static const struct dev_pm_ops rt5682_pm = {
75803f6fc6dSOder Chiou 	SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume)
75903f6fc6dSOder Chiou 	SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL)
76003f6fc6dSOder Chiou };
76103f6fc6dSOder Chiou 
76203f6fc6dSOder Chiou static struct sdw_driver rt5682_sdw_driver = {
76303f6fc6dSOder Chiou 	.driver = {
76403f6fc6dSOder Chiou 		.name = "rt5682",
76503f6fc6dSOder Chiou 		.owner = THIS_MODULE,
76603f6fc6dSOder Chiou 		.pm = &rt5682_pm,
76703f6fc6dSOder Chiou 	},
76803f6fc6dSOder Chiou 	.probe = rt5682_sdw_probe,
76903f6fc6dSOder Chiou 	.remove = rt5682_sdw_remove,
77003f6fc6dSOder Chiou 	.ops = &rt5682_slave_ops,
77103f6fc6dSOder Chiou 	.id_table = rt5682_id,
77203f6fc6dSOder Chiou };
77303f6fc6dSOder Chiou module_sdw_driver(rt5682_sdw_driver);
77403f6fc6dSOder Chiou 
77503f6fc6dSOder Chiou MODULE_DESCRIPTION("ASoC RT5682 driver SDW");
77603f6fc6dSOder Chiou MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
77703f6fc6dSOder Chiou MODULE_LICENSE("GPL v2");
778