1e028937cSKuninori Morimoto // SPDX-License-Identifier: GPL-2.0
2e028937cSKuninori Morimoto //
3e028937cSKuninori Morimoto // ak4613.c -- Asahi Kasei ALSA Soc Audio driver
4e028937cSKuninori Morimoto //
5e028937cSKuninori Morimoto // Copyright (C) 2015 Renesas Electronics Corporation
6e028937cSKuninori Morimoto // Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
7e028937cSKuninori Morimoto //
8e028937cSKuninori Morimoto // Based on ak4642.c by Kuninori Morimoto
9e028937cSKuninori Morimoto // Based on wm8731.c by Richard Purdie
10e028937cSKuninori Morimoto // Based on ak4535.c by Richard Purdie
11e028937cSKuninori Morimoto // Based on wm8753.c by Liam Girdwood
12b0757062SKuninori Morimoto
13f28dbaa9SKuninori Morimoto /*
14f28dbaa9SKuninori Morimoto * +-------+
15f28dbaa9SKuninori Morimoto * |AK4613 |
16f28dbaa9SKuninori Morimoto * SDTO1 <-| |
17f28dbaa9SKuninori Morimoto * | |
18f28dbaa9SKuninori Morimoto * SDTI1 ->| |
19f28dbaa9SKuninori Morimoto * SDTI2 ->| |
20f28dbaa9SKuninori Morimoto * SDTI3 ->| |
21f28dbaa9SKuninori Morimoto * +-------+
22f28dbaa9SKuninori Morimoto *
23f28dbaa9SKuninori Morimoto * +---+
24f28dbaa9SKuninori Morimoto * clk | |___________________________________________...
25f28dbaa9SKuninori Morimoto *
26f28dbaa9SKuninori Morimoto * [TDM512]
27f28dbaa9SKuninori Morimoto * SDTO1 [L1][R1][L2][R2]
28f28dbaa9SKuninori Morimoto * SDTI1 [L1][R1][L2][R2][L3][R3][L4][R4][L5][R5][L6][R6]
29f28dbaa9SKuninori Morimoto *
30f28dbaa9SKuninori Morimoto * [TDM256]
31f28dbaa9SKuninori Morimoto * SDTO1 [L1][R1][L2][R2]
32f28dbaa9SKuninori Morimoto * SDTI1 [L1][R1][L2][R2][L3][R3][L4][R4]
33f28dbaa9SKuninori Morimoto * SDTI2 [L5][R5][L6][R6]
34f28dbaa9SKuninori Morimoto *
35f28dbaa9SKuninori Morimoto * [TDM128]
36f28dbaa9SKuninori Morimoto * SDTO1 [L1][R1][L2][R2]
37f28dbaa9SKuninori Morimoto * SDTI1 [L1][R1][L2][R2]
38f28dbaa9SKuninori Morimoto * SDTI2 [L3][R3][L4][R4]
39f28dbaa9SKuninori Morimoto * SDTI3 [L5][R5][L6][R6]
40f28dbaa9SKuninori Morimoto *
41f28dbaa9SKuninori Morimoto * [STEREO]
42f28dbaa9SKuninori Morimoto * Playback 2ch : SDTI1
43f28dbaa9SKuninori Morimoto * Capture 2ch : SDTO1
44f28dbaa9SKuninori Morimoto *
45f28dbaa9SKuninori Morimoto * [TDM512]
46f28dbaa9SKuninori Morimoto * Playback 12ch : SDTI1
47f28dbaa9SKuninori Morimoto * Capture 4ch : SDTO1
48f28dbaa9SKuninori Morimoto *
49f28dbaa9SKuninori Morimoto * [TDM256]
50f28dbaa9SKuninori Morimoto * Playback 12ch : SDTI1 + SDTI2
51f28dbaa9SKuninori Morimoto * Playback 8ch : SDTI1
52f28dbaa9SKuninori Morimoto * Capture 4ch : SDTO1
53f28dbaa9SKuninori Morimoto *
54f28dbaa9SKuninori Morimoto * [TDM128]
55f28dbaa9SKuninori Morimoto * Playback 12ch : SDTI1 + SDTI2 + SDTI3
56f28dbaa9SKuninori Morimoto * Playback 8ch : SDTI1 + SDTI2
57f28dbaa9SKuninori Morimoto * Playback 4ch : SDTI1
58f28dbaa9SKuninori Morimoto * Capture 4ch : SDTO1
59f28dbaa9SKuninori Morimoto *
60f28dbaa9SKuninori Morimoto *
61f28dbaa9SKuninori Morimoto * !!! NOTE !!!
62f28dbaa9SKuninori Morimoto *
63f28dbaa9SKuninori Morimoto * Renesas is the only user of ak4613 on upstream so far,
64f28dbaa9SKuninori Morimoto * but the chip connection is like below.
65f28dbaa9SKuninori Morimoto * Thus, Renesas can't test all connection case.
66f28dbaa9SKuninori Morimoto * Tested TDM is very limited.
67f28dbaa9SKuninori Morimoto *
68f28dbaa9SKuninori Morimoto * +-----+ +-----------+
69f28dbaa9SKuninori Morimoto * | SoC | | AK4613 |
70f28dbaa9SKuninori Morimoto * | |<-----|SDTO1 IN1|<-- Mic
71f28dbaa9SKuninori Morimoto * | | | IN2|
72f28dbaa9SKuninori Morimoto * | | | |
73f28dbaa9SKuninori Morimoto * | |----->|SDTI1 OUT1|--> Headphone
74f28dbaa9SKuninori Morimoto * +-----+ |SDTI2 OUT2|
75f28dbaa9SKuninori Morimoto * |SDTI3 OUT3|
76f28dbaa9SKuninori Morimoto * | OUT4|
77f28dbaa9SKuninori Morimoto * | OUT5|
78f28dbaa9SKuninori Morimoto * | OUT6|
79f28dbaa9SKuninori Morimoto * +-----------+
80f28dbaa9SKuninori Morimoto *
81f28dbaa9SKuninori Morimoto * Renesas SoC can handle [2, 6,8] channels.
82f28dbaa9SKuninori Morimoto * Ak4613 can handle [2,4, 8,12] channels.
83f28dbaa9SKuninori Morimoto *
84f28dbaa9SKuninori Morimoto * Because of above HW connection and available channels number,
85f28dbaa9SKuninori Morimoto * Renesas could test are ...
86f28dbaa9SKuninori Morimoto *
87f28dbaa9SKuninori Morimoto * [STEREO] Playback 2ch : SDTI1
88f28dbaa9SKuninori Morimoto * Capture 2ch : SDTO1
89f28dbaa9SKuninori Morimoto * [TDM256] Playback 8ch : SDTI1 (*)
90f28dbaa9SKuninori Morimoto *
91f28dbaa9SKuninori Morimoto * (*) it used 8ch data between SoC <-> AK4613 on TDM256 mode,
92f28dbaa9SKuninori Morimoto * but could confirm is only first 2ch because only 1
93f28dbaa9SKuninori Morimoto * Headphone is connected.
94f28dbaa9SKuninori Morimoto *
95f28dbaa9SKuninori Morimoto * see
96f28dbaa9SKuninori Morimoto * AK4613_ENABLE_TDM_TEST
97f28dbaa9SKuninori Morimoto */
98b0757062SKuninori Morimoto #include <linux/clk.h>
9903bbf9f5SKuninori Morimoto #include <linux/delay.h>
100b0757062SKuninori Morimoto #include <linux/i2c.h>
101b0757062SKuninori Morimoto #include <linux/slab.h>
102b0757062SKuninori Morimoto #include <linux/of_device.h>
103f28dbaa9SKuninori Morimoto #include <linux/of_graph.h>
104b0757062SKuninori Morimoto #include <linux/module.h>
105b0757062SKuninori Morimoto #include <linux/regmap.h>
106b0757062SKuninori Morimoto #include <sound/soc.h>
107b0757062SKuninori Morimoto #include <sound/pcm_params.h>
108e3a4d958SKuninori Morimoto #include <sound/tlv.h>
109b0757062SKuninori Morimoto
110b0757062SKuninori Morimoto #define PW_MGMT1 0x00 /* Power Management 1 */
111b0757062SKuninori Morimoto #define PW_MGMT2 0x01 /* Power Management 2 */
112b0757062SKuninori Morimoto #define PW_MGMT3 0x02 /* Power Management 3 */
113b0757062SKuninori Morimoto #define CTRL1 0x03 /* Control 1 */
114b0757062SKuninori Morimoto #define CTRL2 0x04 /* Control 2 */
115b0757062SKuninori Morimoto #define DEMP1 0x05 /* De-emphasis1 */
116b0757062SKuninori Morimoto #define DEMP2 0x06 /* De-emphasis2 */
117b0757062SKuninori Morimoto #define OFD 0x07 /* Overflow Detect */
118b0757062SKuninori Morimoto #define ZRD 0x08 /* Zero Detect */
119b0757062SKuninori Morimoto #define ICTRL 0x09 /* Input Control */
120b0757062SKuninori Morimoto #define OCTRL 0x0a /* Output Control */
121b0757062SKuninori Morimoto #define LOUT1 0x0b /* LOUT1 Volume Control */
122b0757062SKuninori Morimoto #define ROUT1 0x0c /* ROUT1 Volume Control */
123b0757062SKuninori Morimoto #define LOUT2 0x0d /* LOUT2 Volume Control */
124b0757062SKuninori Morimoto #define ROUT2 0x0e /* ROUT2 Volume Control */
125b0757062SKuninori Morimoto #define LOUT3 0x0f /* LOUT3 Volume Control */
126b0757062SKuninori Morimoto #define ROUT3 0x10 /* ROUT3 Volume Control */
127b0757062SKuninori Morimoto #define LOUT4 0x11 /* LOUT4 Volume Control */
128b0757062SKuninori Morimoto #define ROUT4 0x12 /* ROUT4 Volume Control */
129b0757062SKuninori Morimoto #define LOUT5 0x13 /* LOUT5 Volume Control */
130b0757062SKuninori Morimoto #define ROUT5 0x14 /* ROUT5 Volume Control */
131b0757062SKuninori Morimoto #define LOUT6 0x15 /* LOUT6 Volume Control */
132b0757062SKuninori Morimoto #define ROUT6 0x16 /* ROUT6 Volume Control */
133b0757062SKuninori Morimoto
134b0757062SKuninori Morimoto /* PW_MGMT1 */
135b0757062SKuninori Morimoto #define RSTN BIT(0)
136b0757062SKuninori Morimoto #define PMDAC BIT(1)
137b0757062SKuninori Morimoto #define PMADC BIT(2)
138b0757062SKuninori Morimoto #define PMVR BIT(3)
139b0757062SKuninori Morimoto
140b0757062SKuninori Morimoto /* PW_MGMT2 */
141b0757062SKuninori Morimoto #define PMAD_ALL 0x7
142b0757062SKuninori Morimoto
143b0757062SKuninori Morimoto /* PW_MGMT3 */
144b0757062SKuninori Morimoto #define PMDA_ALL 0x3f
145b0757062SKuninori Morimoto
146b0757062SKuninori Morimoto /* CTRL1 */
147b0757062SKuninori Morimoto #define DIF0 BIT(3)
148b0757062SKuninori Morimoto #define DIF1 BIT(4)
149b0757062SKuninori Morimoto #define DIF2 BIT(5)
150b0757062SKuninori Morimoto #define TDM0 BIT(6)
151b0757062SKuninori Morimoto #define TDM1 BIT(7)
152b0757062SKuninori Morimoto #define NO_FMT (0xff)
153b0757062SKuninori Morimoto #define FMT_MASK (0xf8)
154b0757062SKuninori Morimoto
155b0757062SKuninori Morimoto /* CTRL2 */
156b323dd30SKuninori Morimoto #define DFS_MASK (3 << 2)
157b0757062SKuninori Morimoto #define DFS_NORMAL_SPEED (0 << 2)
158b0757062SKuninori Morimoto #define DFS_DOUBLE_SPEED (1 << 2)
159b0757062SKuninori Morimoto #define DFS_QUAD_SPEED (2 << 2)
160b0757062SKuninori Morimoto
1614898b61eSKuninori Morimoto /* ICTRL */
1624898b61eSKuninori Morimoto #define ICTRL_MASK (0x3)
1634898b61eSKuninori Morimoto
1644898b61eSKuninori Morimoto /* OCTRL */
1654898b61eSKuninori Morimoto #define OCTRL_MASK (0x3F)
1664898b61eSKuninori Morimoto
167f28dbaa9SKuninori Morimoto /*
168f28dbaa9SKuninori Morimoto * configs
169f28dbaa9SKuninori Morimoto *
170f28dbaa9SKuninori Morimoto * 0x000000BA
171f28dbaa9SKuninori Morimoto *
172f28dbaa9SKuninori Morimoto * B : AK4613_CONFIG_SDTI_x
173f28dbaa9SKuninori Morimoto * A : AK4613_CONFIG_MODE_x
174f28dbaa9SKuninori Morimoto */
175f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_SET(priv, x) priv->configs |= AK4613_CONFIG_##x
176f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_GET(priv, x) (priv->configs & AK4613_CONFIG_##x##_MASK)
177f28dbaa9SKuninori Morimoto
178f28dbaa9SKuninori Morimoto /*
179f28dbaa9SKuninori Morimoto * AK4613_CONFIG_SDTI_x
180f28dbaa9SKuninori Morimoto *
181f28dbaa9SKuninori Morimoto * It indicates how many SDTIx is connected.
182f28dbaa9SKuninori Morimoto */
183f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_SDTI_MASK (0xF << 4)
184f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_SDTI(x) (((x) & 0xF) << 4)
185f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_SDTI_set(priv, x) AK4613_CONFIG_SET(priv, SDTI(x))
186f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_SDTI_get(priv) ((AK4613_CONFIG_GET(priv, SDTI) >> 4) & 0xF)
187f28dbaa9SKuninori Morimoto
188f28dbaa9SKuninori Morimoto /*
189f28dbaa9SKuninori Morimoto * AK4613_CONFIG_MODE_x
190f28dbaa9SKuninori Morimoto *
191f28dbaa9SKuninori Morimoto * Same as Ctrl1 :: TDM1/TDM0
192f28dbaa9SKuninori Morimoto * No shift is requested
193f28dbaa9SKuninori Morimoto * see
194f28dbaa9SKuninori Morimoto * AK4613_CTRL1_TO_MODE()
195f28dbaa9SKuninori Morimoto * Table 11/12/13/14
196f28dbaa9SKuninori Morimoto */
197f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_MODE_MASK (0xF)
198f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_MODE_STEREO (0x0)
199f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_MODE_TDM512 (0x1)
200f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_MODE_TDM256 (0x2)
201f28dbaa9SKuninori Morimoto #define AK4613_CONFIG_MODE_TDM128 (0x3)
202f28dbaa9SKuninori Morimoto
203f28dbaa9SKuninori Morimoto /*
204f28dbaa9SKuninori Morimoto * !!!! FIXME !!!!
205f28dbaa9SKuninori Morimoto *
206f28dbaa9SKuninori Morimoto * Because of testable HW limitation, TDM256 8ch TDM was only tested.
207f28dbaa9SKuninori Morimoto * This driver uses AK4613_ENABLE_TDM_TEST instead of new DT property so far.
208f28dbaa9SKuninori Morimoto * Don't hesitate to update driver, you don't need to care compatible
209f28dbaa9SKuninori Morimoto * with Renesas.
210f28dbaa9SKuninori Morimoto *
211f28dbaa9SKuninori Morimoto * #define AK4613_ENABLE_TDM_TEST
212f28dbaa9SKuninori Morimoto */
213f28dbaa9SKuninori Morimoto
214f7c0e14fSKuninori Morimoto struct ak4613_interface {
215b0757062SKuninori Morimoto unsigned int width;
216b0757062SKuninori Morimoto unsigned int fmt;
217f7c0e14fSKuninori Morimoto u8 dif;
218b0757062SKuninori Morimoto };
219b0757062SKuninori Morimoto
22035299f17SKuninori Morimoto struct ak4613_priv {
22135299f17SKuninori Morimoto struct mutex lock;
2227bbb049cSKuninori Morimoto struct snd_pcm_hw_constraint_list constraint_rates;
223f28dbaa9SKuninori Morimoto struct snd_pcm_hw_constraint_list constraint_channels;
22403bbf9f5SKuninori Morimoto struct work_struct dummy_write_work;
22503bbf9f5SKuninori Morimoto struct snd_soc_component *component;
22603bbf9f5SKuninori Morimoto unsigned int rate;
227907cd880SKuninori Morimoto unsigned int sysclk;
22835299f17SKuninori Morimoto
22935299f17SKuninori Morimoto unsigned int fmt;
230f28dbaa9SKuninori Morimoto unsigned int configs;
231e67d19a4SKuninori Morimoto int cnt;
232e67d19a4SKuninori Morimoto u8 ctrl1;
23335299f17SKuninori Morimoto u8 oc;
23435299f17SKuninori Morimoto u8 ic;
23535299f17SKuninori Morimoto };
23635299f17SKuninori Morimoto
237e3a4d958SKuninori Morimoto /*
238e3a4d958SKuninori Morimoto * Playback Volume
239e3a4d958SKuninori Morimoto *
240e3a4d958SKuninori Morimoto * max : 0x00 : 0 dB
241e3a4d958SKuninori Morimoto * ( 0.5 dB step )
242e3a4d958SKuninori Morimoto * min : 0xFE : -127.0 dB
243e3a4d958SKuninori Morimoto * mute: 0xFF
244e3a4d958SKuninori Morimoto */
245e3a4d958SKuninori Morimoto static const DECLARE_TLV_DB_SCALE(out_tlv, -12750, 50, 1);
246e3a4d958SKuninori Morimoto
247e3a4d958SKuninori Morimoto static const struct snd_kcontrol_new ak4613_snd_controls[] = {
248e3a4d958SKuninori Morimoto SOC_DOUBLE_R_TLV("Digital Playback Volume1", LOUT1, ROUT1,
249e3a4d958SKuninori Morimoto 0, 0xFF, 1, out_tlv),
250e3a4d958SKuninori Morimoto SOC_DOUBLE_R_TLV("Digital Playback Volume2", LOUT2, ROUT2,
251e3a4d958SKuninori Morimoto 0, 0xFF, 1, out_tlv),
252e3a4d958SKuninori Morimoto SOC_DOUBLE_R_TLV("Digital Playback Volume3", LOUT3, ROUT3,
253e3a4d958SKuninori Morimoto 0, 0xFF, 1, out_tlv),
254e3a4d958SKuninori Morimoto SOC_DOUBLE_R_TLV("Digital Playback Volume4", LOUT4, ROUT4,
255e3a4d958SKuninori Morimoto 0, 0xFF, 1, out_tlv),
256e3a4d958SKuninori Morimoto SOC_DOUBLE_R_TLV("Digital Playback Volume5", LOUT5, ROUT5,
257e3a4d958SKuninori Morimoto 0, 0xFF, 1, out_tlv),
258e3a4d958SKuninori Morimoto SOC_DOUBLE_R_TLV("Digital Playback Volume6", LOUT6, ROUT6,
259e3a4d958SKuninori Morimoto 0, 0xFF, 1, out_tlv),
260e3a4d958SKuninori Morimoto };
261e3a4d958SKuninori Morimoto
262b0757062SKuninori Morimoto static const struct reg_default ak4613_reg[] = {
263b0757062SKuninori Morimoto { 0x0, 0x0f }, { 0x1, 0x07 }, { 0x2, 0x3f }, { 0x3, 0x20 },
264b0757062SKuninori Morimoto { 0x4, 0x20 }, { 0x5, 0x55 }, { 0x6, 0x05 }, { 0x7, 0x07 },
265b0757062SKuninori Morimoto { 0x8, 0x0f }, { 0x9, 0x07 }, { 0xa, 0x3f }, { 0xb, 0x00 },
266b0757062SKuninori Morimoto { 0xc, 0x00 }, { 0xd, 0x00 }, { 0xe, 0x00 }, { 0xf, 0x00 },
267b0757062SKuninori Morimoto { 0x10, 0x00 }, { 0x11, 0x00 }, { 0x12, 0x00 }, { 0x13, 0x00 },
268b0757062SKuninori Morimoto { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0x00 },
269b0757062SKuninori Morimoto };
270b0757062SKuninori Morimoto
271f7c0e14fSKuninori Morimoto /*
272f7c0e14fSKuninori Morimoto * CTRL1 register
273f7c0e14fSKuninori Morimoto * see
274f7c0e14fSKuninori Morimoto * Table 11/12/13/14
275f7c0e14fSKuninori Morimoto */
276e67d19a4SKuninori Morimoto #define AUDIO_IFACE(_dif, _width, _fmt) \
277f7c0e14fSKuninori Morimoto { \
278e67d19a4SKuninori Morimoto .dif = _dif, \
279f7c0e14fSKuninori Morimoto .width = _width, \
280f7c0e14fSKuninori Morimoto .fmt = SND_SOC_DAIFMT_##_fmt,\
281f7c0e14fSKuninori Morimoto }
282b0757062SKuninori Morimoto static const struct ak4613_interface ak4613_iface[] = {
283f7c0e14fSKuninori Morimoto /* It doesn't support asymmetric format */
284f7c0e14fSKuninori Morimoto
285f7c0e14fSKuninori Morimoto AUDIO_IFACE(0x03, 24, LEFT_J),
286f7c0e14fSKuninori Morimoto AUDIO_IFACE(0x04, 24, I2S),
287b0757062SKuninori Morimoto };
288f28dbaa9SKuninori Morimoto #define AK4613_CTRL1_TO_MODE(priv) ((priv)->ctrl1 >> 6) /* AK4613_CONFIG_MODE_x */
289b0757062SKuninori Morimoto
290b0757062SKuninori Morimoto static const struct regmap_config ak4613_regmap_cfg = {
291b0757062SKuninori Morimoto .reg_bits = 8,
292b0757062SKuninori Morimoto .val_bits = 8,
293b0757062SKuninori Morimoto .max_register = 0x16,
294b0757062SKuninori Morimoto .reg_defaults = ak4613_reg,
295b0757062SKuninori Morimoto .num_reg_defaults = ARRAY_SIZE(ak4613_reg),
296dcd2d1f7SGeert Uytterhoeven .cache_type = REGCACHE_RBTREE,
297b0757062SKuninori Morimoto };
298b0757062SKuninori Morimoto
299b0757062SKuninori Morimoto static const struct of_device_id ak4613_of_match[] = {
300b0757062SKuninori Morimoto { .compatible = "asahi-kasei,ak4613", .data = &ak4613_regmap_cfg },
301b0757062SKuninori Morimoto {},
302b0757062SKuninori Morimoto };
303b0757062SKuninori Morimoto MODULE_DEVICE_TABLE(of, ak4613_of_match);
304b0757062SKuninori Morimoto
305b0757062SKuninori Morimoto static const struct i2c_device_id ak4613_i2c_id[] = {
306b0757062SKuninori Morimoto { "ak4613", (kernel_ulong_t)&ak4613_regmap_cfg },
307b0757062SKuninori Morimoto { }
308b0757062SKuninori Morimoto };
309b0757062SKuninori Morimoto MODULE_DEVICE_TABLE(i2c, ak4613_i2c_id);
310b0757062SKuninori Morimoto
311b0757062SKuninori Morimoto static const struct snd_soc_dapm_widget ak4613_dapm_widgets[] = {
312b0757062SKuninori Morimoto
313b0757062SKuninori Morimoto /* Outputs */
314b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("LOUT1"),
315b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("LOUT2"),
316b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("LOUT3"),
317b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("LOUT4"),
318b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("LOUT5"),
319b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("LOUT6"),
320b0757062SKuninori Morimoto
321b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("ROUT1"),
322b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("ROUT2"),
323b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("ROUT3"),
324b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("ROUT4"),
325b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("ROUT5"),
326b0757062SKuninori Morimoto SND_SOC_DAPM_OUTPUT("ROUT6"),
327b0757062SKuninori Morimoto
328b0757062SKuninori Morimoto /* Inputs */
329b0757062SKuninori Morimoto SND_SOC_DAPM_INPUT("LIN1"),
330b0757062SKuninori Morimoto SND_SOC_DAPM_INPUT("LIN2"),
331b0757062SKuninori Morimoto
332b0757062SKuninori Morimoto SND_SOC_DAPM_INPUT("RIN1"),
333b0757062SKuninori Morimoto SND_SOC_DAPM_INPUT("RIN2"),
334b0757062SKuninori Morimoto
335b0757062SKuninori Morimoto /* DAC */
336b0757062SKuninori Morimoto SND_SOC_DAPM_DAC("DAC1", NULL, PW_MGMT3, 0, 0),
337b0757062SKuninori Morimoto SND_SOC_DAPM_DAC("DAC2", NULL, PW_MGMT3, 1, 0),
338b0757062SKuninori Morimoto SND_SOC_DAPM_DAC("DAC3", NULL, PW_MGMT3, 2, 0),
339b0757062SKuninori Morimoto SND_SOC_DAPM_DAC("DAC4", NULL, PW_MGMT3, 3, 0),
340b0757062SKuninori Morimoto SND_SOC_DAPM_DAC("DAC5", NULL, PW_MGMT3, 4, 0),
341b0757062SKuninori Morimoto SND_SOC_DAPM_DAC("DAC6", NULL, PW_MGMT3, 5, 0),
342b0757062SKuninori Morimoto
343b0757062SKuninori Morimoto /* ADC */
344b0757062SKuninori Morimoto SND_SOC_DAPM_ADC("ADC1", NULL, PW_MGMT2, 0, 0),
345b0757062SKuninori Morimoto SND_SOC_DAPM_ADC("ADC2", NULL, PW_MGMT2, 1, 0),
346b0757062SKuninori Morimoto };
347b0757062SKuninori Morimoto
348b0757062SKuninori Morimoto static const struct snd_soc_dapm_route ak4613_intercon[] = {
349b0757062SKuninori Morimoto {"LOUT1", NULL, "DAC1"},
350b0757062SKuninori Morimoto {"LOUT2", NULL, "DAC2"},
351b0757062SKuninori Morimoto {"LOUT3", NULL, "DAC3"},
352b0757062SKuninori Morimoto {"LOUT4", NULL, "DAC4"},
353b0757062SKuninori Morimoto {"LOUT5", NULL, "DAC5"},
354b0757062SKuninori Morimoto {"LOUT6", NULL, "DAC6"},
355b0757062SKuninori Morimoto
356b0757062SKuninori Morimoto {"ROUT1", NULL, "DAC1"},
357b0757062SKuninori Morimoto {"ROUT2", NULL, "DAC2"},
358b0757062SKuninori Morimoto {"ROUT3", NULL, "DAC3"},
359b0757062SKuninori Morimoto {"ROUT4", NULL, "DAC4"},
360b0757062SKuninori Morimoto {"ROUT5", NULL, "DAC5"},
361b0757062SKuninori Morimoto {"ROUT6", NULL, "DAC6"},
362b0757062SKuninori Morimoto
363b0757062SKuninori Morimoto {"DAC1", NULL, "Playback"},
364b0757062SKuninori Morimoto {"DAC2", NULL, "Playback"},
365b0757062SKuninori Morimoto {"DAC3", NULL, "Playback"},
366b0757062SKuninori Morimoto {"DAC4", NULL, "Playback"},
367b0757062SKuninori Morimoto {"DAC5", NULL, "Playback"},
368b0757062SKuninori Morimoto {"DAC6", NULL, "Playback"},
369b0757062SKuninori Morimoto
370b0757062SKuninori Morimoto {"Capture", NULL, "ADC1"},
371b0757062SKuninori Morimoto {"Capture", NULL, "ADC2"},
372b0757062SKuninori Morimoto
373b0757062SKuninori Morimoto {"ADC1", NULL, "LIN1"},
374b0757062SKuninori Morimoto {"ADC2", NULL, "LIN2"},
375b0757062SKuninori Morimoto
376b0757062SKuninori Morimoto {"ADC1", NULL, "RIN1"},
377b0757062SKuninori Morimoto {"ADC2", NULL, "RIN2"},
378b0757062SKuninori Morimoto };
379b0757062SKuninori Morimoto
ak4613_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)380b0757062SKuninori Morimoto static void ak4613_dai_shutdown(struct snd_pcm_substream *substream,
381b0757062SKuninori Morimoto struct snd_soc_dai *dai)
382b0757062SKuninori Morimoto {
3839123ea9fSKuninori Morimoto struct snd_soc_component *component = dai->component;
3849123ea9fSKuninori Morimoto struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
3859123ea9fSKuninori Morimoto struct device *dev = component->dev;
386b0757062SKuninori Morimoto
387b0757062SKuninori Morimoto mutex_lock(&priv->lock);
388b0757062SKuninori Morimoto priv->cnt--;
389b0757062SKuninori Morimoto if (priv->cnt < 0) {
390b0757062SKuninori Morimoto dev_err(dev, "unexpected counter error\n");
391b0757062SKuninori Morimoto priv->cnt = 0;
392b0757062SKuninori Morimoto }
393b0757062SKuninori Morimoto if (!priv->cnt)
394e67d19a4SKuninori Morimoto priv->ctrl1 = 0;
395b0757062SKuninori Morimoto mutex_unlock(&priv->lock);
396b0757062SKuninori Morimoto }
397b0757062SKuninori Morimoto
ak4613_hw_constraints(struct ak4613_priv * priv,struct snd_pcm_substream * substream)398907cd880SKuninori Morimoto static void ak4613_hw_constraints(struct ak4613_priv *priv,
399f28dbaa9SKuninori Morimoto struct snd_pcm_substream *substream)
400907cd880SKuninori Morimoto {
401f28dbaa9SKuninori Morimoto struct snd_pcm_runtime *runtime = substream->runtime;
402907cd880SKuninori Morimoto static const unsigned int ak4613_rates[] = {
403907cd880SKuninori Morimoto 32000,
404907cd880SKuninori Morimoto 44100,
405907cd880SKuninori Morimoto 48000,
406907cd880SKuninori Morimoto 64000,
407907cd880SKuninori Morimoto 88200,
408907cd880SKuninori Morimoto 96000,
409907cd880SKuninori Morimoto 176400,
410907cd880SKuninori Morimoto 192000,
411907cd880SKuninori Morimoto };
412f28dbaa9SKuninori Morimoto #define AK4613_CHANNEL_2 0
413f28dbaa9SKuninori Morimoto #define AK4613_CHANNEL_4 1
414f28dbaa9SKuninori Morimoto #define AK4613_CHANNEL_8 2
415f28dbaa9SKuninori Morimoto #define AK4613_CHANNEL_12 3
416f28dbaa9SKuninori Morimoto #define AK4613_CHANNEL_NONE -1
417f28dbaa9SKuninori Morimoto static const unsigned int ak4613_channels[] = {
418f28dbaa9SKuninori Morimoto [AK4613_CHANNEL_2] = 2,
419f28dbaa9SKuninori Morimoto [AK4613_CHANNEL_4] = 4,
420f28dbaa9SKuninori Morimoto [AK4613_CHANNEL_8] = 8,
421f28dbaa9SKuninori Morimoto [AK4613_CHANNEL_12] = 12,
422f28dbaa9SKuninori Morimoto };
423f28dbaa9SKuninori Morimoto #define MODE_MAX 4
424f28dbaa9SKuninori Morimoto #define SDTx_MAX 4
425f28dbaa9SKuninori Morimoto #define MASK(x) (1 << AK4613_CHANNEL_##x)
426f28dbaa9SKuninori Morimoto static const int mask_list[MODE_MAX][SDTx_MAX] = {
427f28dbaa9SKuninori Morimoto /* SDTO SDTIx1 SDTIx2 SDTIx3 */
428f28dbaa9SKuninori Morimoto [AK4613_CONFIG_MODE_STEREO] = { MASK(2), MASK(2), MASK(2), MASK(2)},
429f28dbaa9SKuninori Morimoto [AK4613_CONFIG_MODE_TDM512] = { MASK(4), MASK(12), MASK(12), MASK(12)},
430f28dbaa9SKuninori Morimoto [AK4613_CONFIG_MODE_TDM256] = { MASK(4), MASK(8), MASK(8)|MASK(12), MASK(8)|MASK(12)},
431f28dbaa9SKuninori Morimoto [AK4613_CONFIG_MODE_TDM128] = { MASK(4), MASK(4), MASK(4)|MASK(8), MASK(4)|MASK(8)|MASK(12)},
432f28dbaa9SKuninori Morimoto };
4337bbb049cSKuninori Morimoto struct snd_pcm_hw_constraint_list *constraint;
434f28dbaa9SKuninori Morimoto unsigned int mask;
435f28dbaa9SKuninori Morimoto unsigned int mode;
436907cd880SKuninori Morimoto unsigned int fs;
437f28dbaa9SKuninori Morimoto int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
438f28dbaa9SKuninori Morimoto int sdti_num;
439907cd880SKuninori Morimoto int i;
440907cd880SKuninori Morimoto
4417bbb049cSKuninori Morimoto constraint = &priv->constraint_rates;
442907cd880SKuninori Morimoto constraint->list = ak4613_rates;
443907cd880SKuninori Morimoto constraint->mask = 0;
444907cd880SKuninori Morimoto constraint->count = 0;
445907cd880SKuninori Morimoto
446907cd880SKuninori Morimoto /*
447907cd880SKuninori Morimoto * Slave Mode
448907cd880SKuninori Morimoto * Normal: [32kHz, 48kHz] : 256fs,384fs or 512fs
449907cd880SKuninori Morimoto * Double: [64kHz, 96kHz] : 256fs
450907cd880SKuninori Morimoto * Quad : [128kHz,192kHz]: 128fs
451907cd880SKuninori Morimoto *
452907cd880SKuninori Morimoto * Master mode
453907cd880SKuninori Morimoto * Normal: [32kHz, 48kHz] : 256fs or 512fs
454907cd880SKuninori Morimoto * Double: [64kHz, 96kHz] : 256fs
455907cd880SKuninori Morimoto * Quad : [128kHz,192kHz]: 128fs
456907cd880SKuninori Morimoto */
457907cd880SKuninori Morimoto for (i = 0; i < ARRAY_SIZE(ak4613_rates); i++) {
458907cd880SKuninori Morimoto /* minimum fs on each range */
459907cd880SKuninori Morimoto fs = (ak4613_rates[i] <= 96000) ? 256 : 128;
460907cd880SKuninori Morimoto
461907cd880SKuninori Morimoto if (priv->sysclk >= ak4613_rates[i] * fs)
462907cd880SKuninori Morimoto constraint->count = i + 1;
463907cd880SKuninori Morimoto }
464907cd880SKuninori Morimoto
465907cd880SKuninori Morimoto snd_pcm_hw_constraint_list(runtime, 0,
466907cd880SKuninori Morimoto SNDRV_PCM_HW_PARAM_RATE, constraint);
467f28dbaa9SKuninori Morimoto
468f28dbaa9SKuninori Morimoto
469f28dbaa9SKuninori Morimoto sdti_num = AK4613_CONFIG_SDTI_get(priv);
470f28dbaa9SKuninori Morimoto if (WARN_ON(sdti_num >= SDTx_MAX))
471f28dbaa9SKuninori Morimoto return;
472f28dbaa9SKuninori Morimoto
473f28dbaa9SKuninori Morimoto if (priv->cnt) {
474f28dbaa9SKuninori Morimoto /*
475f28dbaa9SKuninori Morimoto * If it was already working,
476f28dbaa9SKuninori Morimoto * the constraint is same as working mode.
477f28dbaa9SKuninori Morimoto */
478f28dbaa9SKuninori Morimoto mode = AK4613_CTRL1_TO_MODE(priv);
479f28dbaa9SKuninori Morimoto mask = 0; /* no default */
480f28dbaa9SKuninori Morimoto } else {
481f28dbaa9SKuninori Morimoto /*
482f28dbaa9SKuninori Morimoto * It is not yet working,
483f28dbaa9SKuninori Morimoto * the constraint is based on board configs.
484f28dbaa9SKuninori Morimoto * STEREO mask is default
485f28dbaa9SKuninori Morimoto */
486f28dbaa9SKuninori Morimoto mode = AK4613_CONFIG_GET(priv, MODE);
487f28dbaa9SKuninori Morimoto mask = mask_list[AK4613_CONFIG_MODE_STEREO][is_play * sdti_num];
488f28dbaa9SKuninori Morimoto }
489f28dbaa9SKuninori Morimoto
490f28dbaa9SKuninori Morimoto if (WARN_ON(mode >= MODE_MAX))
491f28dbaa9SKuninori Morimoto return;
492f28dbaa9SKuninori Morimoto
493f28dbaa9SKuninori Morimoto /* add each mode mask */
494f28dbaa9SKuninori Morimoto mask |= mask_list[mode][is_play * sdti_num];
495f28dbaa9SKuninori Morimoto
496f28dbaa9SKuninori Morimoto constraint = &priv->constraint_channels;
497f28dbaa9SKuninori Morimoto constraint->list = ak4613_channels;
498f28dbaa9SKuninori Morimoto constraint->mask = mask;
499f28dbaa9SKuninori Morimoto constraint->count = sizeof(ak4613_channels);
500f28dbaa9SKuninori Morimoto snd_pcm_hw_constraint_list(runtime, 0,
501f28dbaa9SKuninori Morimoto SNDRV_PCM_HW_PARAM_CHANNELS, constraint);
502907cd880SKuninori Morimoto }
503907cd880SKuninori Morimoto
ak4613_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)50441165298SRyo Kodama static int ak4613_dai_startup(struct snd_pcm_substream *substream,
50541165298SRyo Kodama struct snd_soc_dai *dai)
50641165298SRyo Kodama {
5079123ea9fSKuninori Morimoto struct snd_soc_component *component = dai->component;
5089123ea9fSKuninori Morimoto struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
50941165298SRyo Kodama
5103407e36dSKuninori Morimoto mutex_lock(&priv->lock);
511f28dbaa9SKuninori Morimoto ak4613_hw_constraints(priv, substream);
51241165298SRyo Kodama priv->cnt++;
5133407e36dSKuninori Morimoto mutex_unlock(&priv->lock);
51441165298SRyo Kodama
515907cd880SKuninori Morimoto return 0;
516907cd880SKuninori Morimoto }
517907cd880SKuninori Morimoto
ak4613_dai_set_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)518907cd880SKuninori Morimoto static int ak4613_dai_set_sysclk(struct snd_soc_dai *codec_dai,
519907cd880SKuninori Morimoto int clk_id, unsigned int freq, int dir)
520907cd880SKuninori Morimoto {
5219123ea9fSKuninori Morimoto struct snd_soc_component *component = codec_dai->component;
5229123ea9fSKuninori Morimoto struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
523907cd880SKuninori Morimoto
524907cd880SKuninori Morimoto priv->sysclk = freq;
525907cd880SKuninori Morimoto
52641165298SRyo Kodama return 0;
52741165298SRyo Kodama }
52841165298SRyo Kodama
ak4613_dai_set_fmt(struct snd_soc_dai * dai,unsigned int format)529c08673edSKuninori Morimoto static int ak4613_dai_set_fmt(struct snd_soc_dai *dai, unsigned int format)
530b0757062SKuninori Morimoto {
5319123ea9fSKuninori Morimoto struct snd_soc_component *component = dai->component;
5329123ea9fSKuninori Morimoto struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
533c08673edSKuninori Morimoto unsigned int fmt;
534b0757062SKuninori Morimoto
535c08673edSKuninori Morimoto fmt = format & SND_SOC_DAIFMT_FORMAT_MASK;
536b0757062SKuninori Morimoto switch (fmt) {
537b0757062SKuninori Morimoto case SND_SOC_DAIFMT_LEFT_J:
538b0757062SKuninori Morimoto case SND_SOC_DAIFMT_I2S:
539b0757062SKuninori Morimoto priv->fmt = fmt;
540b0757062SKuninori Morimoto break;
541b0757062SKuninori Morimoto default:
542b0757062SKuninori Morimoto return -EINVAL;
543b0757062SKuninori Morimoto }
544b0757062SKuninori Morimoto
545c08673edSKuninori Morimoto fmt = format & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK;
546c08673edSKuninori Morimoto switch (fmt) {
547c08673edSKuninori Morimoto case SND_SOC_DAIFMT_CBC_CFC:
548c08673edSKuninori Morimoto break;
549c08673edSKuninori Morimoto default:
550c08673edSKuninori Morimoto /*
551c08673edSKuninori Morimoto * SUPPORTME
552c08673edSKuninori Morimoto *
553c08673edSKuninori Morimoto * "clock provider" is not yet supperted
554c08673edSKuninori Morimoto */
555c08673edSKuninori Morimoto return -EINVAL;
556c08673edSKuninori Morimoto }
557c08673edSKuninori Morimoto
558b0757062SKuninori Morimoto return 0;
559b0757062SKuninori Morimoto }
560b0757062SKuninori Morimoto
ak4613_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)561b0757062SKuninori Morimoto static int ak4613_dai_hw_params(struct snd_pcm_substream *substream,
562b0757062SKuninori Morimoto struct snd_pcm_hw_params *params,
563b0757062SKuninori Morimoto struct snd_soc_dai *dai)
564b0757062SKuninori Morimoto {
5659123ea9fSKuninori Morimoto struct snd_soc_component *component = dai->component;
5669123ea9fSKuninori Morimoto struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
5679123ea9fSKuninori Morimoto struct device *dev = component->dev;
568b0757062SKuninori Morimoto unsigned int width = params_width(params);
569b0757062SKuninori Morimoto unsigned int fmt = priv->fmt;
570b0757062SKuninori Morimoto unsigned int rate;
571b0757062SKuninori Morimoto int i, ret;
572f7c0e14fSKuninori Morimoto u8 ctrl2;
573b0757062SKuninori Morimoto
574b0757062SKuninori Morimoto rate = params_rate(params);
575b0757062SKuninori Morimoto switch (rate) {
576b0757062SKuninori Morimoto case 32000:
577b0757062SKuninori Morimoto case 44100:
578b0757062SKuninori Morimoto case 48000:
579b0757062SKuninori Morimoto ctrl2 = DFS_NORMAL_SPEED;
580b0757062SKuninori Morimoto break;
581a83ac486SKuninori Morimoto case 64000:
582b0757062SKuninori Morimoto case 88200:
583b0757062SKuninori Morimoto case 96000:
584b0757062SKuninori Morimoto ctrl2 = DFS_DOUBLE_SPEED;
585b0757062SKuninori Morimoto break;
586b0757062SKuninori Morimoto case 176400:
587b0757062SKuninori Morimoto case 192000:
588b0757062SKuninori Morimoto ctrl2 = DFS_QUAD_SPEED;
589b0757062SKuninori Morimoto break;
590b0757062SKuninori Morimoto default:
591b0757062SKuninori Morimoto return -EINVAL;
592b0757062SKuninori Morimoto }
59303bbf9f5SKuninori Morimoto priv->rate = rate;
594b0757062SKuninori Morimoto
595b0757062SKuninori Morimoto /*
596b0757062SKuninori Morimoto * FIXME
597b0757062SKuninori Morimoto *
598f28dbaa9SKuninori Morimoto * It doesn't have full TDM suppert yet
599b0757062SKuninori Morimoto */
600b0757062SKuninori Morimoto ret = -EINVAL;
601b0757062SKuninori Morimoto
602b0757062SKuninori Morimoto mutex_lock(&priv->lock);
603e67d19a4SKuninori Morimoto if (priv->cnt > 1) {
604e67d19a4SKuninori Morimoto /*
605e67d19a4SKuninori Morimoto * If it was already working, use current priv->ctrl1
606e67d19a4SKuninori Morimoto */
607e67d19a4SKuninori Morimoto ret = 0;
60835299f17SKuninori Morimoto } else {
609e67d19a4SKuninori Morimoto /*
610e67d19a4SKuninori Morimoto * It is not yet working,
611e67d19a4SKuninori Morimoto */
612f28dbaa9SKuninori Morimoto unsigned int channel = params_channels(params);
613f28dbaa9SKuninori Morimoto u8 tdm;
614f28dbaa9SKuninori Morimoto
615f28dbaa9SKuninori Morimoto /* STEREO or TDM */
616f28dbaa9SKuninori Morimoto if (channel == 2)
617f28dbaa9SKuninori Morimoto tdm = AK4613_CONFIG_MODE_STEREO;
618f28dbaa9SKuninori Morimoto else
619f28dbaa9SKuninori Morimoto tdm = AK4613_CONFIG_GET(priv, MODE);
620f28dbaa9SKuninori Morimoto
621b5f2a487SAxel Lin for (i = ARRAY_SIZE(ak4613_iface) - 1; i >= 0; i--) {
622e67d19a4SKuninori Morimoto const struct ak4613_interface *iface = ak4613_iface + i;
623e67d19a4SKuninori Morimoto
624e67d19a4SKuninori Morimoto if ((iface->fmt == fmt) && (iface->width == width)) {
625e67d19a4SKuninori Morimoto /*
626e67d19a4SKuninori Morimoto * Ctrl1
627e67d19a4SKuninori Morimoto * | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
628e67d19a4SKuninori Morimoto * |TDM1|TDM0|DIF2|DIF1|DIF0|ATS1|ATS0|SMUTE|
629f28dbaa9SKuninori Morimoto * < tdm > < iface->dif >
630e67d19a4SKuninori Morimoto */
631f28dbaa9SKuninori Morimoto priv->ctrl1 = (tdm << 6) | (iface->dif << 3);
632e67d19a4SKuninori Morimoto ret = 0;
63335299f17SKuninori Morimoto break;
63435299f17SKuninori Morimoto }
63535299f17SKuninori Morimoto }
636b0757062SKuninori Morimoto }
637b0757062SKuninori Morimoto mutex_unlock(&priv->lock);
638b0757062SKuninori Morimoto
639b0757062SKuninori Morimoto if (ret < 0)
640b0757062SKuninori Morimoto goto hw_params_end;
641b0757062SKuninori Morimoto
642e67d19a4SKuninori Morimoto snd_soc_component_update_bits(component, CTRL1, FMT_MASK, priv->ctrl1);
6439123ea9fSKuninori Morimoto snd_soc_component_update_bits(component, CTRL2, DFS_MASK, ctrl2);
644b0757062SKuninori Morimoto
6459123ea9fSKuninori Morimoto snd_soc_component_update_bits(component, ICTRL, ICTRL_MASK, priv->ic);
6469123ea9fSKuninori Morimoto snd_soc_component_update_bits(component, OCTRL, OCTRL_MASK, priv->oc);
647a3af0c65SKuninori Morimoto
648b0757062SKuninori Morimoto hw_params_end:
649b0757062SKuninori Morimoto if (ret < 0)
650b0757062SKuninori Morimoto dev_warn(dev, "unsupported data width/format combination\n");
651b0757062SKuninori Morimoto
652b0757062SKuninori Morimoto return ret;
653b0757062SKuninori Morimoto }
654b0757062SKuninori Morimoto
ak4613_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)6559123ea9fSKuninori Morimoto static int ak4613_set_bias_level(struct snd_soc_component *component,
656b0757062SKuninori Morimoto enum snd_soc_bias_level level)
657b0757062SKuninori Morimoto {
658b0757062SKuninori Morimoto u8 mgmt1 = 0;
659b0757062SKuninori Morimoto
660b0757062SKuninori Morimoto switch (level) {
661b0757062SKuninori Morimoto case SND_SOC_BIAS_ON:
662b0757062SKuninori Morimoto mgmt1 |= RSTN;
6633e146b55SGustavo A. R. Silva fallthrough;
664b0757062SKuninori Morimoto case SND_SOC_BIAS_PREPARE:
665b0757062SKuninori Morimoto mgmt1 |= PMADC | PMDAC;
6663e146b55SGustavo A. R. Silva fallthrough;
667b0757062SKuninori Morimoto case SND_SOC_BIAS_STANDBY:
668b0757062SKuninori Morimoto mgmt1 |= PMVR;
6693e146b55SGustavo A. R. Silva fallthrough;
670b0757062SKuninori Morimoto case SND_SOC_BIAS_OFF:
671b0757062SKuninori Morimoto default:
672b0757062SKuninori Morimoto break;
673b0757062SKuninori Morimoto }
674b0757062SKuninori Morimoto
6759123ea9fSKuninori Morimoto snd_soc_component_write(component, PW_MGMT1, mgmt1);
676b0757062SKuninori Morimoto
677b0757062SKuninori Morimoto return 0;
678b0757062SKuninori Morimoto }
679b0757062SKuninori Morimoto
ak4613_dummy_write(struct work_struct * work)68003bbf9f5SKuninori Morimoto static void ak4613_dummy_write(struct work_struct *work)
68103bbf9f5SKuninori Morimoto {
68203bbf9f5SKuninori Morimoto struct ak4613_priv *priv = container_of(work,
68303bbf9f5SKuninori Morimoto struct ak4613_priv,
68403bbf9f5SKuninori Morimoto dummy_write_work);
68503bbf9f5SKuninori Morimoto struct snd_soc_component *component = priv->component;
68603bbf9f5SKuninori Morimoto unsigned int mgmt1;
68703bbf9f5SKuninori Morimoto unsigned int mgmt3;
68803bbf9f5SKuninori Morimoto
68903bbf9f5SKuninori Morimoto /*
69003bbf9f5SKuninori Morimoto * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
69103bbf9f5SKuninori Morimoto *
69203bbf9f5SKuninori Morimoto * Note
69303bbf9f5SKuninori Morimoto *
69403bbf9f5SKuninori Morimoto * To avoid extra delay, we want to avoid preemption here,
69503bbf9f5SKuninori Morimoto * but we can't. Because it uses I2C access which is using IRQ
69603bbf9f5SKuninori Morimoto * and sleep. Thus, delay might be more than 5 LR clocks
69703bbf9f5SKuninori Morimoto * see also
69803bbf9f5SKuninori Morimoto * ak4613_dai_trigger()
69903bbf9f5SKuninori Morimoto */
70003bbf9f5SKuninori Morimoto udelay(5000000 / priv->rate);
70103bbf9f5SKuninori Morimoto
702cf6e26c7SKuninori Morimoto mgmt1 = snd_soc_component_read(component, PW_MGMT1);
703cf6e26c7SKuninori Morimoto mgmt3 = snd_soc_component_read(component, PW_MGMT3);
70403bbf9f5SKuninori Morimoto
70503bbf9f5SKuninori Morimoto snd_soc_component_write(component, PW_MGMT1, mgmt1);
70603bbf9f5SKuninori Morimoto snd_soc_component_write(component, PW_MGMT3, mgmt3);
70703bbf9f5SKuninori Morimoto }
70803bbf9f5SKuninori Morimoto
ak4613_dai_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)70903bbf9f5SKuninori Morimoto static int ak4613_dai_trigger(struct snd_pcm_substream *substream, int cmd,
71003bbf9f5SKuninori Morimoto struct snd_soc_dai *dai)
71103bbf9f5SKuninori Morimoto {
7129123ea9fSKuninori Morimoto struct snd_soc_component *component = dai->component;
7139123ea9fSKuninori Morimoto struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
71403bbf9f5SKuninori Morimoto
71503bbf9f5SKuninori Morimoto /*
71603bbf9f5SKuninori Morimoto * FIXME
71703bbf9f5SKuninori Morimoto *
71803bbf9f5SKuninori Morimoto * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
71903bbf9f5SKuninori Morimoto * from Power Down Release. Otherwise, Playback volume will be 0dB.
72003bbf9f5SKuninori Morimoto * To avoid complex multiple delay/dummy_write method from
72103bbf9f5SKuninori Morimoto * ak4613_set_bias_level() / SND_SOC_DAPM_DAC_E("DACx", ...),
72203bbf9f5SKuninori Morimoto * call it once here.
72303bbf9f5SKuninori Morimoto *
72403bbf9f5SKuninori Morimoto * But, unfortunately, we can't "write" here because here is atomic
72503bbf9f5SKuninori Morimoto * context (It uses I2C access for writing).
72603bbf9f5SKuninori Morimoto * Thus, use schedule_work() to switching to normal context
72703bbf9f5SKuninori Morimoto * immediately.
72803bbf9f5SKuninori Morimoto *
72903bbf9f5SKuninori Morimoto * Note
73003bbf9f5SKuninori Morimoto *
73103bbf9f5SKuninori Morimoto * Calling ak4613_dummy_write() function might be delayed.
73203bbf9f5SKuninori Morimoto * In such case, ak4613 volume might be temporarily 0dB when
73303bbf9f5SKuninori Morimoto * beggining of playback.
73403bbf9f5SKuninori Morimoto * see also
73503bbf9f5SKuninori Morimoto * ak4613_dummy_write()
73603bbf9f5SKuninori Morimoto */
73703bbf9f5SKuninori Morimoto
73803bbf9f5SKuninori Morimoto if ((cmd != SNDRV_PCM_TRIGGER_START) &&
73903bbf9f5SKuninori Morimoto (cmd != SNDRV_PCM_TRIGGER_RESUME))
74003bbf9f5SKuninori Morimoto return 0;
74103bbf9f5SKuninori Morimoto
74203bbf9f5SKuninori Morimoto if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
74303bbf9f5SKuninori Morimoto return 0;
74403bbf9f5SKuninori Morimoto
7459123ea9fSKuninori Morimoto priv->component = component;
74603bbf9f5SKuninori Morimoto schedule_work(&priv->dummy_write_work);
74703bbf9f5SKuninori Morimoto
74803bbf9f5SKuninori Morimoto return 0;
74903bbf9f5SKuninori Morimoto }
75003bbf9f5SKuninori Morimoto
751c50f381aSKuninori Morimoto /*
752c50f381aSKuninori Morimoto * Select below from Sound Card, not Auto
753c50f381aSKuninori Morimoto * SND_SOC_DAIFMT_CBC_CFC
754c50f381aSKuninori Morimoto * SND_SOC_DAIFMT_CBP_CFP
755c50f381aSKuninori Morimoto */
756c50f381aSKuninori Morimoto static u64 ak4613_dai_formats =
757c50f381aSKuninori Morimoto SND_SOC_POSSIBLE_DAIFMT_I2S |
758c50f381aSKuninori Morimoto SND_SOC_POSSIBLE_DAIFMT_LEFT_J;
759c50f381aSKuninori Morimoto
760b0757062SKuninori Morimoto static const struct snd_soc_dai_ops ak4613_dai_ops = {
76141165298SRyo Kodama .startup = ak4613_dai_startup,
762b0757062SKuninori Morimoto .shutdown = ak4613_dai_shutdown,
763907cd880SKuninori Morimoto .set_sysclk = ak4613_dai_set_sysclk,
764b0757062SKuninori Morimoto .set_fmt = ak4613_dai_set_fmt,
76503bbf9f5SKuninori Morimoto .trigger = ak4613_dai_trigger,
766b0757062SKuninori Morimoto .hw_params = ak4613_dai_hw_params,
767c50f381aSKuninori Morimoto .auto_selectable_formats = &ak4613_dai_formats,
768c50f381aSKuninori Morimoto .num_auto_selectable_formats = 1,
769b0757062SKuninori Morimoto };
770b0757062SKuninori Morimoto
771b0757062SKuninori Morimoto #define AK4613_PCM_RATE (SNDRV_PCM_RATE_32000 |\
772b0757062SKuninori Morimoto SNDRV_PCM_RATE_44100 |\
773b0757062SKuninori Morimoto SNDRV_PCM_RATE_48000 |\
774b0757062SKuninori Morimoto SNDRV_PCM_RATE_64000 |\
775b0757062SKuninori Morimoto SNDRV_PCM_RATE_88200 |\
776b0757062SKuninori Morimoto SNDRV_PCM_RATE_96000 |\
777b0757062SKuninori Morimoto SNDRV_PCM_RATE_176400 |\
778b0757062SKuninori Morimoto SNDRV_PCM_RATE_192000)
779ec185f95SKuninori Morimoto #define AK4613_PCM_FMTBIT (SNDRV_PCM_FMTBIT_S24_LE)
780b0757062SKuninori Morimoto
781b0757062SKuninori Morimoto static struct snd_soc_dai_driver ak4613_dai = {
782b0757062SKuninori Morimoto .name = "ak4613-hifi",
783b0757062SKuninori Morimoto .playback = {
784b0757062SKuninori Morimoto .stream_name = "Playback",
785b0757062SKuninori Morimoto .channels_min = 2,
786f28dbaa9SKuninori Morimoto .channels_max = 12,
787b0757062SKuninori Morimoto .rates = AK4613_PCM_RATE,
788b0757062SKuninori Morimoto .formats = AK4613_PCM_FMTBIT,
789b0757062SKuninori Morimoto },
790b0757062SKuninori Morimoto .capture = {
791b0757062SKuninori Morimoto .stream_name = "Capture",
792b0757062SKuninori Morimoto .channels_min = 2,
793f28dbaa9SKuninori Morimoto .channels_max = 4,
794b0757062SKuninori Morimoto .rates = AK4613_PCM_RATE,
795b0757062SKuninori Morimoto .formats = AK4613_PCM_FMTBIT,
796b0757062SKuninori Morimoto },
797b0757062SKuninori Morimoto .ops = &ak4613_dai_ops,
798870b76eaSKuninori Morimoto .symmetric_rate = 1,
799b0757062SKuninori Morimoto };
800b0757062SKuninori Morimoto
ak4613_suspend(struct snd_soc_component * component)8019123ea9fSKuninori Morimoto static int ak4613_suspend(struct snd_soc_component *component)
802f9ae17baSGeert Uytterhoeven {
8039123ea9fSKuninori Morimoto struct regmap *regmap = dev_get_regmap(component->dev, NULL);
804f9ae17baSGeert Uytterhoeven
805f9ae17baSGeert Uytterhoeven regcache_cache_only(regmap, true);
806f9ae17baSGeert Uytterhoeven regcache_mark_dirty(regmap);
807f9ae17baSGeert Uytterhoeven return 0;
808f9ae17baSGeert Uytterhoeven }
809f9ae17baSGeert Uytterhoeven
ak4613_resume(struct snd_soc_component * component)8109123ea9fSKuninori Morimoto static int ak4613_resume(struct snd_soc_component *component)
811b0757062SKuninori Morimoto {
8129123ea9fSKuninori Morimoto struct regmap *regmap = dev_get_regmap(component->dev, NULL);
813b0757062SKuninori Morimoto
814f9ae17baSGeert Uytterhoeven regcache_cache_only(regmap, false);
815b0757062SKuninori Morimoto return regcache_sync(regmap);
816b0757062SKuninori Morimoto }
817b0757062SKuninori Morimoto
8189123ea9fSKuninori Morimoto static const struct snd_soc_component_driver soc_component_dev_ak4613 = {
819f9ae17baSGeert Uytterhoeven .suspend = ak4613_suspend,
820b0757062SKuninori Morimoto .resume = ak4613_resume,
821b0757062SKuninori Morimoto .set_bias_level = ak4613_set_bias_level,
822e3a4d958SKuninori Morimoto .controls = ak4613_snd_controls,
823e3a4d958SKuninori Morimoto .num_controls = ARRAY_SIZE(ak4613_snd_controls),
824b0757062SKuninori Morimoto .dapm_widgets = ak4613_dapm_widgets,
825b0757062SKuninori Morimoto .num_dapm_widgets = ARRAY_SIZE(ak4613_dapm_widgets),
826b0757062SKuninori Morimoto .dapm_routes = ak4613_intercon,
827b0757062SKuninori Morimoto .num_dapm_routes = ARRAY_SIZE(ak4613_intercon),
8289123ea9fSKuninori Morimoto .idle_bias_on = 1,
8299123ea9fSKuninori Morimoto .endianness = 1,
830b0757062SKuninori Morimoto };
831b0757062SKuninori Morimoto
ak4613_parse_of(struct ak4613_priv * priv,struct device * dev)832a3af0c65SKuninori Morimoto static void ak4613_parse_of(struct ak4613_priv *priv,
833a3af0c65SKuninori Morimoto struct device *dev)
834a3af0c65SKuninori Morimoto {
835a3af0c65SKuninori Morimoto struct device_node *np = dev->of_node;
836a3af0c65SKuninori Morimoto char prop[32];
837f28dbaa9SKuninori Morimoto int sdti_num;
838a3af0c65SKuninori Morimoto int i;
839a3af0c65SKuninori Morimoto
840a3af0c65SKuninori Morimoto /* Input 1 - 2 */
841a3af0c65SKuninori Morimoto for (i = 0; i < 2; i++) {
8425547ba61SKuninori Morimoto snprintf(prop, sizeof(prop), "asahi-kasei,in%d-single-end", i + 1);
843a3af0c65SKuninori Morimoto if (!of_get_property(np, prop, NULL))
844a3af0c65SKuninori Morimoto priv->ic |= 1 << i;
845a3af0c65SKuninori Morimoto }
846a3af0c65SKuninori Morimoto
847a3af0c65SKuninori Morimoto /* Output 1 - 6 */
848a3af0c65SKuninori Morimoto for (i = 0; i < 6; i++) {
8495547ba61SKuninori Morimoto snprintf(prop, sizeof(prop), "asahi-kasei,out%d-single-end", i + 1);
850a3af0c65SKuninori Morimoto if (!of_get_property(np, prop, NULL))
851a3af0c65SKuninori Morimoto priv->oc |= 1 << i;
852a3af0c65SKuninori Morimoto }
853f28dbaa9SKuninori Morimoto
854f28dbaa9SKuninori Morimoto /*
855f28dbaa9SKuninori Morimoto * enable TDM256 test
856f28dbaa9SKuninori Morimoto *
857f28dbaa9SKuninori Morimoto * !!! FIXME !!!
858f28dbaa9SKuninori Morimoto *
859f28dbaa9SKuninori Morimoto * It should be configured by DT or other way
860f28dbaa9SKuninori Morimoto * if it was full supported.
861f28dbaa9SKuninori Morimoto * But it is using ifdef style for now for test
862f28dbaa9SKuninori Morimoto * purpose.
863f28dbaa9SKuninori Morimoto */
864f28dbaa9SKuninori Morimoto #if defined(AK4613_ENABLE_TDM_TEST)
865f28dbaa9SKuninori Morimoto AK4613_CONFIG_SET(priv, MODE_TDM256);
866f28dbaa9SKuninori Morimoto #endif
867f28dbaa9SKuninori Morimoto
868f28dbaa9SKuninori Morimoto /*
869f28dbaa9SKuninori Morimoto * connected STDI
870ec3ad554SKuninori Morimoto * TDM support is assuming it is probed via Audio-Graph-Card style here.
871ec3ad554SKuninori Morimoto * Default is SDTIx1 if it was probed via Simple-Audio-Card for now.
872f28dbaa9SKuninori Morimoto */
873f28dbaa9SKuninori Morimoto sdti_num = of_graph_get_endpoint_count(np);
874ec3ad554SKuninori Morimoto if ((sdti_num >= SDTx_MAX) || (sdti_num < 1))
875ec3ad554SKuninori Morimoto sdti_num = 1;
876f28dbaa9SKuninori Morimoto
877f28dbaa9SKuninori Morimoto AK4613_CONFIG_SDTI_set(priv, sdti_num);
878a3af0c65SKuninori Morimoto }
879a3af0c65SKuninori Morimoto
ak4613_i2c_probe(struct i2c_client * i2c)880e654a133SStephen Kitt static int ak4613_i2c_probe(struct i2c_client *i2c)
881b0757062SKuninori Morimoto {
882b0757062SKuninori Morimoto struct device *dev = &i2c->dev;
883b0757062SKuninori Morimoto const struct regmap_config *regmap_cfg;
884b0757062SKuninori Morimoto struct regmap *regmap;
885b0757062SKuninori Morimoto struct ak4613_priv *priv;
886b0757062SKuninori Morimoto
887*b39eee27SBiju Das regmap_cfg = i2c_get_match_data(i2c);
888b0757062SKuninori Morimoto if (!regmap_cfg)
889b0757062SKuninori Morimoto return -EINVAL;
890b0757062SKuninori Morimoto
891b0757062SKuninori Morimoto priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
892b0757062SKuninori Morimoto if (!priv)
893b0757062SKuninori Morimoto return -ENOMEM;
894b0757062SKuninori Morimoto
895a3af0c65SKuninori Morimoto ak4613_parse_of(priv, dev);
896a3af0c65SKuninori Morimoto
897e67d19a4SKuninori Morimoto priv->ctrl1 = 0;
898b0757062SKuninori Morimoto priv->cnt = 0;
899907cd880SKuninori Morimoto priv->sysclk = 0;
90003bbf9f5SKuninori Morimoto INIT_WORK(&priv->dummy_write_work, ak4613_dummy_write);
901b0757062SKuninori Morimoto
902b0757062SKuninori Morimoto mutex_init(&priv->lock);
903b0757062SKuninori Morimoto
904b0757062SKuninori Morimoto i2c_set_clientdata(i2c, priv);
905b0757062SKuninori Morimoto
906b0757062SKuninori Morimoto regmap = devm_regmap_init_i2c(i2c, regmap_cfg);
907b0757062SKuninori Morimoto if (IS_ERR(regmap))
908b0757062SKuninori Morimoto return PTR_ERR(regmap);
909b0757062SKuninori Morimoto
9109123ea9fSKuninori Morimoto return devm_snd_soc_register_component(dev, &soc_component_dev_ak4613,
911b0757062SKuninori Morimoto &ak4613_dai, 1);
912b0757062SKuninori Morimoto }
913b0757062SKuninori Morimoto
914b0757062SKuninori Morimoto static struct i2c_driver ak4613_i2c_driver = {
915b0757062SKuninori Morimoto .driver = {
916b0757062SKuninori Morimoto .name = "ak4613-codec",
917b0757062SKuninori Morimoto .of_match_table = ak4613_of_match,
918b0757062SKuninori Morimoto },
9199abcd240SUwe Kleine-König .probe = ak4613_i2c_probe,
920b0757062SKuninori Morimoto .id_table = ak4613_i2c_id,
921b0757062SKuninori Morimoto };
922b0757062SKuninori Morimoto
923b0757062SKuninori Morimoto module_i2c_driver(ak4613_i2c_driver);
924b0757062SKuninori Morimoto
925b0757062SKuninori Morimoto MODULE_DESCRIPTION("Soc AK4613 driver");
926b0757062SKuninori Morimoto MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
927b0757062SKuninori Morimoto MODULE_LICENSE("GPL v2");
928