xref: /openbmc/linux/sound/soc/bcm/bcm63xx-i2s.h (revision 03ab8e6297acd1bc0eedaa050e2a1635c576fd11)
1*88eb404cSKevin Li // SPDX-License-Identifier: GPL-2.0-or-later
2*88eb404cSKevin Li // linux/sound/soc/bcm/bcm63xx-i2s.h
3*88eb404cSKevin Li // Copyright (c) 2020 Broadcom Corporation
4*88eb404cSKevin Li // Author: Kevin-Ke Li <kevin-ke.li@broadcom.com>
5*88eb404cSKevin Li 
6*88eb404cSKevin Li #ifndef __BCM63XX_I2S_H
7*88eb404cSKevin Li #define __BCM63XX_I2S_H
8*88eb404cSKevin Li 
9*88eb404cSKevin Li #define I2S_DESC_FIFO_DEPTH		8
10*88eb404cSKevin Li #define I2S_MISC_CFG			(0x003C)
11*88eb404cSKevin Li #define I2S_PAD_LVL_LOOP_DIS_MASK	(1 << 2)
12*88eb404cSKevin Li #define I2S_PAD_LVL_LOOP_DIS_ENABLE	I2S_PAD_LVL_LOOP_DIS_MASK
13*88eb404cSKevin Li 
14*88eb404cSKevin Li #define I2S_TX_ENABLE_MASK		(1 << 31)
15*88eb404cSKevin Li #define I2S_TX_ENABLE			I2S_TX_ENABLE_MASK
16*88eb404cSKevin Li #define I2S_TX_OUT_R			(1 << 19)
17*88eb404cSKevin Li #define I2S_TX_DATA_ALIGNMENT		(1 << 2)
18*88eb404cSKevin Li #define I2S_TX_DATA_ENABLE		(1 << 1)
19*88eb404cSKevin Li #define I2S_TX_CLOCK_ENABLE		(1 << 0)
20*88eb404cSKevin Li 
21*88eb404cSKevin Li #define I2S_TX_DESC_OFF_LEVEL_SHIFT	12
22*88eb404cSKevin Li #define I2S_TX_DESC_OFF_LEVEL_MASK	(0x0F << I2S_TX_DESC_OFF_LEVEL_SHIFT)
23*88eb404cSKevin Li #define I2S_TX_DESC_IFF_LEVEL_SHIFT	8
24*88eb404cSKevin Li #define I2S_TX_DESC_IFF_LEVEL_MASK	(0x0F << I2S_TX_DESC_IFF_LEVEL_SHIFT)
25*88eb404cSKevin Li #define I2S_TX_DESC_OFF_INTR_EN_MSK	(1 << 1)
26*88eb404cSKevin Li #define I2S_TX_DESC_OFF_INTR_EN	I2S_TX_DESC_OFF_INTR_EN_MSK
27*88eb404cSKevin Li 
28*88eb404cSKevin Li #define I2S_TX_CFG			(0x0000)
29*88eb404cSKevin Li #define I2S_TX_IRQ_CTL			(0x0004)
30*88eb404cSKevin Li #define I2S_TX_IRQ_EN			(0x0008)
31*88eb404cSKevin Li #define I2S_TX_IRQ_IFF_THLD		(0x000c)
32*88eb404cSKevin Li #define I2S_TX_IRQ_OFF_THLD		(0x0010)
33*88eb404cSKevin Li #define I2S_TX_DESC_IFF_ADDR		(0x0014)
34*88eb404cSKevin Li #define I2S_TX_DESC_IFF_LEN		(0x0018)
35*88eb404cSKevin Li #define I2S_TX_DESC_OFF_ADDR		(0x001C)
36*88eb404cSKevin Li #define I2S_TX_DESC_OFF_LEN		(0x0020)
37*88eb404cSKevin Li #define I2S_TX_CFG_2			(0x0024)
38*88eb404cSKevin Li #define I2S_TX_SLAVE_MODE_SHIFT	13
39*88eb404cSKevin Li #define I2S_TX_SLAVE_MODE_MASK		(1 << I2S_TX_SLAVE_MODE_SHIFT)
40*88eb404cSKevin Li #define I2S_TX_SLAVE_MODE		I2S_TX_SLAVE_MODE_MASK
41*88eb404cSKevin Li #define I2S_TX_MASTER_MODE		0
42*88eb404cSKevin Li #define I2S_TX_INTR_MASK		0x0F
43*88eb404cSKevin Li 
44*88eb404cSKevin Li #define I2S_RX_ENABLE_MASK		(1 << 31)
45*88eb404cSKevin Li #define I2S_RX_ENABLE			I2S_RX_ENABLE_MASK
46*88eb404cSKevin Li #define I2S_RX_IN_R			(1 << 19)
47*88eb404cSKevin Li #define I2S_RX_DATA_ALIGNMENT		(1 << 2)
48*88eb404cSKevin Li #define I2S_RX_CLOCK_ENABLE		(1 << 0)
49*88eb404cSKevin Li 
50*88eb404cSKevin Li #define I2S_RX_DESC_OFF_LEVEL_SHIFT	12
51*88eb404cSKevin Li #define I2S_RX_DESC_OFF_LEVEL_MASK	(0x0F << I2S_RX_DESC_OFF_LEVEL_SHIFT)
52*88eb404cSKevin Li #define I2S_RX_DESC_IFF_LEVEL_SHIFT	8
53*88eb404cSKevin Li #define I2S_RX_DESC_IFF_LEVEL_MASK	(0x0F << I2S_RX_DESC_IFF_LEVEL_SHIFT)
54*88eb404cSKevin Li #define I2S_RX_DESC_OFF_INTR_EN_MSK	(1 << 1)
55*88eb404cSKevin Li #define I2S_RX_DESC_OFF_INTR_EN	I2S_RX_DESC_OFF_INTR_EN_MSK
56*88eb404cSKevin Li 
57*88eb404cSKevin Li #define I2S_RX_CFG			(0x0040) /* 20c0 */
58*88eb404cSKevin Li #define I2S_RX_IRQ_CTL			(0x0044)
59*88eb404cSKevin Li #define I2S_RX_IRQ_EN			(0x0048)
60*88eb404cSKevin Li #define I2S_RX_IRQ_IFF_THLD		(0x004C)
61*88eb404cSKevin Li #define I2S_RX_IRQ_OFF_THLD		(0x0050)
62*88eb404cSKevin Li #define I2S_RX_DESC_IFF_ADDR		(0x0054)
63*88eb404cSKevin Li #define I2S_RX_DESC_IFF_LEN		(0x0058)
64*88eb404cSKevin Li #define I2S_RX_DESC_OFF_ADDR		(0x005C)
65*88eb404cSKevin Li #define I2S_RX_DESC_OFF_LEN		(0x0060)
66*88eb404cSKevin Li #define I2S_RX_CFG_2			(0x0064)
67*88eb404cSKevin Li #define I2S_RX_SLAVE_MODE_SHIFT	13
68*88eb404cSKevin Li #define I2S_RX_SLAVE_MODE_MASK		(1 << I2S_RX_SLAVE_MODE_SHIFT)
69*88eb404cSKevin Li #define I2S_RX_SLAVE_MODE		I2S_RX_SLAVE_MODE_MASK
70*88eb404cSKevin Li #define I2S_RX_MASTER_MODE		0
71*88eb404cSKevin Li #define I2S_RX_INTR_MASK		0x0F
72*88eb404cSKevin Li 
73*88eb404cSKevin Li #define I2S_REG_MAX			0x007C
74*88eb404cSKevin Li 
75*88eb404cSKevin Li struct bcm_i2s_priv {
76*88eb404cSKevin Li 	struct device *dev;
77*88eb404cSKevin Li 	struct regmap *regmap_i2s;
78*88eb404cSKevin Li 	struct clk *i2s_clk;
79*88eb404cSKevin Li 	struct snd_pcm_substream	*play_substream;
80*88eb404cSKevin Li 	struct snd_pcm_substream	*capture_substream;
81*88eb404cSKevin Li 	struct i2s_dma_desc *play_dma_desc;
82*88eb404cSKevin Li 	struct i2s_dma_desc *capture_dma_desc;
83*88eb404cSKevin Li };
84*88eb404cSKevin Li 
85*88eb404cSKevin Li extern int bcm63xx_soc_platform_probe(struct platform_device *pdev,
86*88eb404cSKevin Li 				      struct bcm_i2s_priv *i2s_priv);
87*88eb404cSKevin Li extern int bcm63xx_soc_platform_remove(struct platform_device *pdev);
88*88eb404cSKevin Li 
89*88eb404cSKevin Li #endif
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