1*81fcb170STakashi Iwai #ifndef __SOUND_TRIDENT_H 2*81fcb170STakashi Iwai #define __SOUND_TRIDENT_H 3*81fcb170STakashi Iwai 4*81fcb170STakashi Iwai /* 5*81fcb170STakashi Iwai * audio@tridentmicro.com 6*81fcb170STakashi Iwai * Fri Feb 19 15:55:28 MST 1999 7*81fcb170STakashi Iwai * Definitions for Trident 4DWave DX/NX chips 8*81fcb170STakashi Iwai * 9*81fcb170STakashi Iwai * 10*81fcb170STakashi Iwai * This program is free software; you can redistribute it and/or modify 11*81fcb170STakashi Iwai * it under the terms of the GNU General Public License as published by 12*81fcb170STakashi Iwai * the Free Software Foundation; either version 2 of the License, or 13*81fcb170STakashi Iwai * (at your option) any later version. 14*81fcb170STakashi Iwai * 15*81fcb170STakashi Iwai * This program is distributed in the hope that it will be useful, 16*81fcb170STakashi Iwai * but WITHOUT ANY WARRANTY; without even the implied warranty of 17*81fcb170STakashi Iwai * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18*81fcb170STakashi Iwai * GNU General Public License for more details. 19*81fcb170STakashi Iwai * 20*81fcb170STakashi Iwai * You should have received a copy of the GNU General Public License 21*81fcb170STakashi Iwai * along with this program; if not, write to the Free Software 22*81fcb170STakashi Iwai * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23*81fcb170STakashi Iwai * 24*81fcb170STakashi Iwai */ 25*81fcb170STakashi Iwai 26*81fcb170STakashi Iwai #include <sound/pcm.h> 27*81fcb170STakashi Iwai #include <sound/mpu401.h> 28*81fcb170STakashi Iwai #include <sound/ac97_codec.h> 29*81fcb170STakashi Iwai #include <sound/util_mem.h> 30*81fcb170STakashi Iwai 31*81fcb170STakashi Iwai #define TRIDENT_DEVICE_ID_DX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_DX) 32*81fcb170STakashi Iwai #define TRIDENT_DEVICE_ID_NX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_NX) 33*81fcb170STakashi Iwai #define TRIDENT_DEVICE_ID_SI7018 ((PCI_VENDOR_ID_SI<<16)|PCI_DEVICE_ID_SI_7018) 34*81fcb170STakashi Iwai 35*81fcb170STakashi Iwai #define SNDRV_TRIDENT_VOICE_TYPE_PCM 0 36*81fcb170STakashi Iwai #define SNDRV_TRIDENT_VOICE_TYPE_SYNTH 1 37*81fcb170STakashi Iwai #define SNDRV_TRIDENT_VOICE_TYPE_MIDI 2 38*81fcb170STakashi Iwai 39*81fcb170STakashi Iwai #define SNDRV_TRIDENT_VFLG_RUNNING (1<<0) 40*81fcb170STakashi Iwai 41*81fcb170STakashi Iwai /* TLB code constants */ 42*81fcb170STakashi Iwai #define SNDRV_TRIDENT_PAGE_SIZE 4096 43*81fcb170STakashi Iwai #define SNDRV_TRIDENT_PAGE_SHIFT 12 44*81fcb170STakashi Iwai #define SNDRV_TRIDENT_PAGE_MASK ((1<<SNDRV_TRIDENT_PAGE_SHIFT)-1) 45*81fcb170STakashi Iwai #define SNDRV_TRIDENT_MAX_PAGES 4096 46*81fcb170STakashi Iwai 47*81fcb170STakashi Iwai /* 48*81fcb170STakashi Iwai * Direct registers 49*81fcb170STakashi Iwai */ 50*81fcb170STakashi Iwai 51*81fcb170STakashi Iwai #define TRID_REG(trident, x) ((trident)->port + (x)) 52*81fcb170STakashi Iwai 53*81fcb170STakashi Iwai #define ID_4DWAVE_DX 0x2000 54*81fcb170STakashi Iwai #define ID_4DWAVE_NX 0x2001 55*81fcb170STakashi Iwai 56*81fcb170STakashi Iwai /* Bank definitions */ 57*81fcb170STakashi Iwai 58*81fcb170STakashi Iwai #define T4D_BANK_A 0 59*81fcb170STakashi Iwai #define T4D_BANK_B 1 60*81fcb170STakashi Iwai #define T4D_NUM_BANKS 2 61*81fcb170STakashi Iwai 62*81fcb170STakashi Iwai /* Register definitions */ 63*81fcb170STakashi Iwai 64*81fcb170STakashi Iwai /* Global registers */ 65*81fcb170STakashi Iwai 66*81fcb170STakashi Iwai enum global_control_bits { 67*81fcb170STakashi Iwai CHANNEL_IDX = 0x0000003f, 68*81fcb170STakashi Iwai OVERRUN_IE = 0x00000400, /* interrupt enable: capture overrun */ 69*81fcb170STakashi Iwai UNDERRUN_IE = 0x00000800, /* interrupt enable: playback underrun */ 70*81fcb170STakashi Iwai ENDLP_IE = 0x00001000, /* interrupt enable: end of buffer */ 71*81fcb170STakashi Iwai MIDLP_IE = 0x00002000, /* interrupt enable: middle buffer */ 72*81fcb170STakashi Iwai ETOG_IE = 0x00004000, /* interrupt enable: envelope toggling */ 73*81fcb170STakashi Iwai EDROP_IE = 0x00008000, /* interrupt enable: envelope drop */ 74*81fcb170STakashi Iwai BANK_B_EN = 0x00010000, /* SiS: enable bank B (64 channels) */ 75*81fcb170STakashi Iwai PCMIN_B_MIX = 0x00020000, /* SiS: PCM IN B mixing enable */ 76*81fcb170STakashi Iwai I2S_OUT_ASSIGN = 0x00040000, /* SiS: I2S Out contains surround PCM */ 77*81fcb170STakashi Iwai SPDIF_OUT_ASSIGN= 0x00080000, /* SiS: 0=S/PDIF L/R | 1=PCM Out FIFO */ 78*81fcb170STakashi Iwai MAIN_OUT_ASSIGN = 0x00100000, /* SiS: 0=PCM Out FIFO | 1=MMC Out buffer */ 79*81fcb170STakashi Iwai }; 80*81fcb170STakashi Iwai 81*81fcb170STakashi Iwai enum miscint_bits { 82*81fcb170STakashi Iwai PB_UNDERRUN_IRQ = 0x00000001, REC_OVERRUN_IRQ = 0x00000002, 83*81fcb170STakashi Iwai SB_IRQ = 0x00000004, MPU401_IRQ = 0x00000008, 84*81fcb170STakashi Iwai OPL3_IRQ = 0x00000010, ADDRESS_IRQ = 0x00000020, 85*81fcb170STakashi Iwai ENVELOPE_IRQ = 0x00000040, PB_UNDERRUN = 0x00000100, 86*81fcb170STakashi Iwai REC_OVERRUN = 0x00000200, MIXER_UNDERFLOW = 0x00000400, 87*81fcb170STakashi Iwai MIXER_OVERFLOW = 0x00000800, NX_SB_IRQ_DISABLE = 0x00001000, 88*81fcb170STakashi Iwai ST_TARGET_REACHED = 0x00008000, 89*81fcb170STakashi Iwai PB_24K_MODE = 0x00010000, ST_IRQ_EN = 0x00800000, 90*81fcb170STakashi Iwai ACGPIO_IRQ = 0x01000000 91*81fcb170STakashi Iwai }; 92*81fcb170STakashi Iwai 93*81fcb170STakashi Iwai /* T2 legacy dma control registers. */ 94*81fcb170STakashi Iwai #define LEGACY_DMAR0 0x00 // ADR0 95*81fcb170STakashi Iwai #define LEGACY_DMAR4 0x04 // CNT0 96*81fcb170STakashi Iwai #define LEGACY_DMAR6 0x06 // CNT0 - High bits 97*81fcb170STakashi Iwai #define LEGACY_DMAR11 0x0b // MOD 98*81fcb170STakashi Iwai #define LEGACY_DMAR15 0x0f // MMR 99*81fcb170STakashi Iwai 100*81fcb170STakashi Iwai #define T4D_START_A 0x80 101*81fcb170STakashi Iwai #define T4D_STOP_A 0x84 102*81fcb170STakashi Iwai #define T4D_DLY_A 0x88 103*81fcb170STakashi Iwai #define T4D_SIGN_CSO_A 0x8c 104*81fcb170STakashi Iwai #define T4D_CSPF_A 0x90 105*81fcb170STakashi Iwai #define T4D_CSPF_B 0xbc 106*81fcb170STakashi Iwai #define T4D_CEBC_A 0x94 107*81fcb170STakashi Iwai #define T4D_AINT_A 0x98 108*81fcb170STakashi Iwai #define T4D_AINTEN_A 0x9c 109*81fcb170STakashi Iwai #define T4D_LFO_GC_CIR 0xa0 110*81fcb170STakashi Iwai #define T4D_MUSICVOL_WAVEVOL 0xa8 111*81fcb170STakashi Iwai #define T4D_SBDELTA_DELTA_R 0xac 112*81fcb170STakashi Iwai #define T4D_MISCINT 0xb0 113*81fcb170STakashi Iwai #define T4D_START_B 0xb4 114*81fcb170STakashi Iwai #define T4D_STOP_B 0xb8 115*81fcb170STakashi Iwai #define T4D_SBBL_SBCL 0xc0 116*81fcb170STakashi Iwai #define T4D_SBCTRL_SBE2R_SBDD 0xc4 117*81fcb170STakashi Iwai #define T4D_STIMER 0xc8 118*81fcb170STakashi Iwai #define T4D_AINT_B 0xd8 119*81fcb170STakashi Iwai #define T4D_AINTEN_B 0xdc 120*81fcb170STakashi Iwai #define T4D_RCI 0x70 121*81fcb170STakashi Iwai 122*81fcb170STakashi Iwai /* MPU-401 UART */ 123*81fcb170STakashi Iwai #define T4D_MPU401_BASE 0x20 124*81fcb170STakashi Iwai #define T4D_MPUR0 0x20 125*81fcb170STakashi Iwai #define T4D_MPUR1 0x21 126*81fcb170STakashi Iwai #define T4D_MPUR2 0x22 127*81fcb170STakashi Iwai #define T4D_MPUR3 0x23 128*81fcb170STakashi Iwai 129*81fcb170STakashi Iwai /* S/PDIF Registers */ 130*81fcb170STakashi Iwai #define NX_SPCTRL_SPCSO 0x24 131*81fcb170STakashi Iwai #define NX_SPLBA 0x28 132*81fcb170STakashi Iwai #define NX_SPESO 0x2c 133*81fcb170STakashi Iwai #define NX_SPCSTATUS 0x64 134*81fcb170STakashi Iwai 135*81fcb170STakashi Iwai /* Joystick */ 136*81fcb170STakashi Iwai #define GAMEPORT_GCR 0x30 137*81fcb170STakashi Iwai #define GAMEPORT_MODE_ADC 0x80 138*81fcb170STakashi Iwai #define GAMEPORT_LEGACY 0x31 139*81fcb170STakashi Iwai #define GAMEPORT_AXES 0x34 140*81fcb170STakashi Iwai 141*81fcb170STakashi Iwai /* NX Specific Registers */ 142*81fcb170STakashi Iwai #define NX_TLBC 0x6c 143*81fcb170STakashi Iwai 144*81fcb170STakashi Iwai /* Channel Registers */ 145*81fcb170STakashi Iwai 146*81fcb170STakashi Iwai #define CH_START 0xe0 147*81fcb170STakashi Iwai 148*81fcb170STakashi Iwai #define CH_DX_CSO_ALPHA_FMS 0xe0 149*81fcb170STakashi Iwai #define CH_DX_ESO_DELTA 0xe8 150*81fcb170STakashi Iwai #define CH_DX_FMC_RVOL_CVOL 0xec 151*81fcb170STakashi Iwai 152*81fcb170STakashi Iwai #define CH_NX_DELTA_CSO 0xe0 153*81fcb170STakashi Iwai #define CH_NX_DELTA_ESO 0xe8 154*81fcb170STakashi Iwai #define CH_NX_ALPHA_FMS_FMC_RVOL_CVOL 0xec 155*81fcb170STakashi Iwai 156*81fcb170STakashi Iwai #define CH_LBA 0xe4 157*81fcb170STakashi Iwai #define CH_GVSEL_PAN_VOL_CTRL_EC 0xf0 158*81fcb170STakashi Iwai #define CH_EBUF1 0xf4 159*81fcb170STakashi Iwai #define CH_EBUF2 0xf8 160*81fcb170STakashi Iwai 161*81fcb170STakashi Iwai /* AC-97 Registers */ 162*81fcb170STakashi Iwai 163*81fcb170STakashi Iwai #define DX_ACR0_AC97_W 0x40 164*81fcb170STakashi Iwai #define DX_ACR1_AC97_R 0x44 165*81fcb170STakashi Iwai #define DX_ACR2_AC97_COM_STAT 0x48 166*81fcb170STakashi Iwai 167*81fcb170STakashi Iwai #define NX_ACR0_AC97_COM_STAT 0x40 168*81fcb170STakashi Iwai #define NX_ACR1_AC97_W 0x44 169*81fcb170STakashi Iwai #define NX_ACR2_AC97_R_PRIMARY 0x48 170*81fcb170STakashi Iwai #define NX_ACR3_AC97_R_SECONDARY 0x4c 171*81fcb170STakashi Iwai 172*81fcb170STakashi Iwai #define SI_AC97_WRITE 0x40 173*81fcb170STakashi Iwai #define SI_AC97_READ 0x44 174*81fcb170STakashi Iwai #define SI_SERIAL_INTF_CTRL 0x48 175*81fcb170STakashi Iwai #define SI_AC97_GPIO 0x4c 176*81fcb170STakashi Iwai #define SI_ASR0 0x50 177*81fcb170STakashi Iwai #define SI_SPDIF_CS 0x70 178*81fcb170STakashi Iwai #define SI_GPIO 0x7c 179*81fcb170STakashi Iwai 180*81fcb170STakashi Iwai enum trident_nx_ac97_bits { 181*81fcb170STakashi Iwai /* ACR1-3 */ 182*81fcb170STakashi Iwai NX_AC97_BUSY_WRITE = 0x0800, 183*81fcb170STakashi Iwai NX_AC97_BUSY_READ = 0x0800, 184*81fcb170STakashi Iwai NX_AC97_BUSY_DATA = 0x0400, 185*81fcb170STakashi Iwai NX_AC97_WRITE_SECONDARY = 0x0100, 186*81fcb170STakashi Iwai /* ACR0 */ 187*81fcb170STakashi Iwai NX_AC97_SECONDARY_READY = 0x0040, 188*81fcb170STakashi Iwai NX_AC97_SECONDARY_RECORD = 0x0020, 189*81fcb170STakashi Iwai NX_AC97_SURROUND_OUTPUT = 0x0010, 190*81fcb170STakashi Iwai NX_AC97_PRIMARY_READY = 0x0008, 191*81fcb170STakashi Iwai NX_AC97_PRIMARY_RECORD = 0x0004, 192*81fcb170STakashi Iwai NX_AC97_PCM_OUTPUT = 0x0002, 193*81fcb170STakashi Iwai NX_AC97_WARM_RESET = 0x0001 194*81fcb170STakashi Iwai }; 195*81fcb170STakashi Iwai 196*81fcb170STakashi Iwai enum trident_dx_ac97_bits { 197*81fcb170STakashi Iwai DX_AC97_BUSY_WRITE = 0x8000, 198*81fcb170STakashi Iwai DX_AC97_BUSY_READ = 0x8000, 199*81fcb170STakashi Iwai DX_AC97_READY = 0x0010, 200*81fcb170STakashi Iwai DX_AC97_RECORD = 0x0008, 201*81fcb170STakashi Iwai DX_AC97_PLAYBACK = 0x0002 202*81fcb170STakashi Iwai }; 203*81fcb170STakashi Iwai 204*81fcb170STakashi Iwai enum sis7018_ac97_bits { 205*81fcb170STakashi Iwai SI_AC97_BUSY_WRITE = 0x00008000, 206*81fcb170STakashi Iwai SI_AC97_AUDIO_BUSY = 0x00004000, 207*81fcb170STakashi Iwai SI_AC97_MODEM_BUSY = 0x00002000, 208*81fcb170STakashi Iwai SI_AC97_BUSY_READ = 0x00008000, 209*81fcb170STakashi Iwai SI_AC97_SECONDARY = 0x00000080, 210*81fcb170STakashi Iwai }; 211*81fcb170STakashi Iwai 212*81fcb170STakashi Iwai enum serial_intf_ctrl_bits { 213*81fcb170STakashi Iwai WARM_RESET = 0x00000001, 214*81fcb170STakashi Iwai COLD_RESET = 0x00000002, 215*81fcb170STakashi Iwai I2S_CLOCK = 0x00000004, 216*81fcb170STakashi Iwai PCM_SEC_AC97 = 0x00000008, 217*81fcb170STakashi Iwai AC97_DBL_RATE = 0x00000010, 218*81fcb170STakashi Iwai SPDIF_EN = 0x00000020, 219*81fcb170STakashi Iwai I2S_OUTPUT_EN = 0x00000040, 220*81fcb170STakashi Iwai I2S_INPUT_EN = 0x00000080, 221*81fcb170STakashi Iwai PCMIN = 0x00000100, 222*81fcb170STakashi Iwai LINE1IN = 0x00000200, 223*81fcb170STakashi Iwai MICIN = 0x00000400, 224*81fcb170STakashi Iwai LINE2IN = 0x00000800, 225*81fcb170STakashi Iwai HEAD_SET_IN = 0x00001000, 226*81fcb170STakashi Iwai GPIOIN = 0x00002000, 227*81fcb170STakashi Iwai /* 7018 spec says id = 01 but the demo board routed to 10 228*81fcb170STakashi Iwai SECONDARY_ID= 0x00004000, */ 229*81fcb170STakashi Iwai SECONDARY_ID = 0x00004000, 230*81fcb170STakashi Iwai PCMOUT = 0x00010000, 231*81fcb170STakashi Iwai SURROUT = 0x00020000, 232*81fcb170STakashi Iwai CENTEROUT = 0x00040000, 233*81fcb170STakashi Iwai LFEOUT = 0x00080000, 234*81fcb170STakashi Iwai LINE1OUT = 0x00100000, 235*81fcb170STakashi Iwai LINE2OUT = 0x00200000, 236*81fcb170STakashi Iwai GPIOOUT = 0x00400000, 237*81fcb170STakashi Iwai SI_AC97_PRIMARY_READY = 0x01000000, 238*81fcb170STakashi Iwai SI_AC97_SECONDARY_READY = 0x02000000, 239*81fcb170STakashi Iwai SI_AC97_POWERDOWN = 0x04000000, 240*81fcb170STakashi Iwai }; 241*81fcb170STakashi Iwai 242*81fcb170STakashi Iwai /* PCM defaults */ 243*81fcb170STakashi Iwai 244*81fcb170STakashi Iwai #define T4D_DEFAULT_PCM_VOL 10 /* 0 - 255 */ 245*81fcb170STakashi Iwai #define T4D_DEFAULT_PCM_PAN 0 /* 0 - 127 */ 246*81fcb170STakashi Iwai #define T4D_DEFAULT_PCM_RVOL 127 /* 0 - 127 */ 247*81fcb170STakashi Iwai #define T4D_DEFAULT_PCM_CVOL 127 /* 0 - 127 */ 248*81fcb170STakashi Iwai 249*81fcb170STakashi Iwai struct snd_trident; 250*81fcb170STakashi Iwai struct snd_trident_voice; 251*81fcb170STakashi Iwai struct snd_trident_pcm_mixer; 252*81fcb170STakashi Iwai 253*81fcb170STakashi Iwai struct snd_trident_port { 254*81fcb170STakashi Iwai struct snd_midi_channel_set * chset; 255*81fcb170STakashi Iwai struct snd_trident * trident; 256*81fcb170STakashi Iwai int mode; /* operation mode */ 257*81fcb170STakashi Iwai int client; /* sequencer client number */ 258*81fcb170STakashi Iwai int port; /* sequencer port number */ 259*81fcb170STakashi Iwai unsigned int midi_has_voices: 1; 260*81fcb170STakashi Iwai }; 261*81fcb170STakashi Iwai 262*81fcb170STakashi Iwai struct snd_trident_memblk_arg { 263*81fcb170STakashi Iwai short first_page, last_page; 264*81fcb170STakashi Iwai }; 265*81fcb170STakashi Iwai 266*81fcb170STakashi Iwai struct snd_trident_tlb { 267*81fcb170STakashi Iwai unsigned int * entries; /* 16k-aligned TLB table */ 268*81fcb170STakashi Iwai dma_addr_t entries_dmaaddr; /* 16k-aligned PCI address to TLB table */ 269*81fcb170STakashi Iwai unsigned long * shadow_entries; /* shadow entries with virtual addresses */ 270*81fcb170STakashi Iwai struct snd_dma_buffer buffer; 271*81fcb170STakashi Iwai struct snd_util_memhdr * memhdr; /* page allocation list */ 272*81fcb170STakashi Iwai struct snd_dma_buffer silent_page; 273*81fcb170STakashi Iwai }; 274*81fcb170STakashi Iwai 275*81fcb170STakashi Iwai struct snd_trident_voice { 276*81fcb170STakashi Iwai unsigned int number; 277*81fcb170STakashi Iwai unsigned int use: 1, 278*81fcb170STakashi Iwai pcm: 1, 279*81fcb170STakashi Iwai synth:1, 280*81fcb170STakashi Iwai midi: 1; 281*81fcb170STakashi Iwai unsigned int flags; 282*81fcb170STakashi Iwai unsigned char client; 283*81fcb170STakashi Iwai unsigned char port; 284*81fcb170STakashi Iwai unsigned char index; 285*81fcb170STakashi Iwai 286*81fcb170STakashi Iwai struct snd_trident_sample_ops *sample_ops; 287*81fcb170STakashi Iwai 288*81fcb170STakashi Iwai /* channel parameters */ 289*81fcb170STakashi Iwai unsigned int CSO; /* 24 bits (16 on DX) */ 290*81fcb170STakashi Iwai unsigned int ESO; /* 24 bits (16 on DX) */ 291*81fcb170STakashi Iwai unsigned int LBA; /* 30 bits */ 292*81fcb170STakashi Iwai unsigned short EC; /* 12 bits */ 293*81fcb170STakashi Iwai unsigned short Alpha; /* 12 bits */ 294*81fcb170STakashi Iwai unsigned short Delta; /* 16 bits */ 295*81fcb170STakashi Iwai unsigned short Attribute; /* 16 bits - SiS 7018 */ 296*81fcb170STakashi Iwai unsigned short Vol; /* 12 bits (6.6) */ 297*81fcb170STakashi Iwai unsigned char Pan; /* 7 bits (1.4.2) */ 298*81fcb170STakashi Iwai unsigned char GVSel; /* 1 bit */ 299*81fcb170STakashi Iwai unsigned char RVol; /* 7 bits (5.2) */ 300*81fcb170STakashi Iwai unsigned char CVol; /* 7 bits (5.2) */ 301*81fcb170STakashi Iwai unsigned char FMC; /* 2 bits */ 302*81fcb170STakashi Iwai unsigned char CTRL; /* 4 bits */ 303*81fcb170STakashi Iwai unsigned char FMS; /* 4 bits */ 304*81fcb170STakashi Iwai unsigned char LFO; /* 8 bits */ 305*81fcb170STakashi Iwai 306*81fcb170STakashi Iwai unsigned int negCSO; /* nonzero - use negative CSO */ 307*81fcb170STakashi Iwai 308*81fcb170STakashi Iwai struct snd_util_memblk *memblk; /* memory block if TLB enabled */ 309*81fcb170STakashi Iwai 310*81fcb170STakashi Iwai /* PCM data */ 311*81fcb170STakashi Iwai 312*81fcb170STakashi Iwai struct snd_trident *trident; 313*81fcb170STakashi Iwai struct snd_pcm_substream *substream; 314*81fcb170STakashi Iwai struct snd_trident_voice *extra; /* extra PCM voice (acts as interrupt generator) */ 315*81fcb170STakashi Iwai unsigned int running: 1, 316*81fcb170STakashi Iwai capture: 1, 317*81fcb170STakashi Iwai spdif: 1, 318*81fcb170STakashi Iwai foldback: 1, 319*81fcb170STakashi Iwai isync: 1, 320*81fcb170STakashi Iwai isync2: 1, 321*81fcb170STakashi Iwai isync3: 1; 322*81fcb170STakashi Iwai int foldback_chan; /* foldback subdevice number */ 323*81fcb170STakashi Iwai unsigned int stimer; /* global sample timer (to detect spurious interrupts) */ 324*81fcb170STakashi Iwai unsigned int spurious_threshold; /* spurious threshold */ 325*81fcb170STakashi Iwai unsigned int isync_mark; 326*81fcb170STakashi Iwai unsigned int isync_max; 327*81fcb170STakashi Iwai unsigned int isync_ESO; 328*81fcb170STakashi Iwai 329*81fcb170STakashi Iwai /* --- */ 330*81fcb170STakashi Iwai 331*81fcb170STakashi Iwai void *private_data; 332*81fcb170STakashi Iwai void (*private_free)(struct snd_trident_voice *voice); 333*81fcb170STakashi Iwai }; 334*81fcb170STakashi Iwai 335*81fcb170STakashi Iwai struct snd_4dwave { 336*81fcb170STakashi Iwai int seq_client; 337*81fcb170STakashi Iwai 338*81fcb170STakashi Iwai struct snd_trident_port seq_ports[4]; 339*81fcb170STakashi Iwai struct snd_trident_voice voices[64]; 340*81fcb170STakashi Iwai 341*81fcb170STakashi Iwai int ChanSynthCount; /* number of allocated synth channels */ 342*81fcb170STakashi Iwai int max_size; /* maximum synth memory size in bytes */ 343*81fcb170STakashi Iwai int current_size; /* current allocated synth mem in bytes */ 344*81fcb170STakashi Iwai }; 345*81fcb170STakashi Iwai 346*81fcb170STakashi Iwai struct snd_trident_pcm_mixer { 347*81fcb170STakashi Iwai struct snd_trident_voice *voice; /* active voice */ 348*81fcb170STakashi Iwai unsigned short vol; /* front volume */ 349*81fcb170STakashi Iwai unsigned char pan; /* pan control */ 350*81fcb170STakashi Iwai unsigned char rvol; /* rear volume */ 351*81fcb170STakashi Iwai unsigned char cvol; /* center volume */ 352*81fcb170STakashi Iwai unsigned char pad; 353*81fcb170STakashi Iwai }; 354*81fcb170STakashi Iwai 355*81fcb170STakashi Iwai struct snd_trident { 356*81fcb170STakashi Iwai int irq; 357*81fcb170STakashi Iwai 358*81fcb170STakashi Iwai unsigned int device; /* device ID */ 359*81fcb170STakashi Iwai 360*81fcb170STakashi Iwai unsigned char bDMAStart; 361*81fcb170STakashi Iwai 362*81fcb170STakashi Iwai unsigned long port; 363*81fcb170STakashi Iwai unsigned long midi_port; 364*81fcb170STakashi Iwai 365*81fcb170STakashi Iwai unsigned int spurious_irq_count; 366*81fcb170STakashi Iwai unsigned int spurious_irq_max_delta; 367*81fcb170STakashi Iwai 368*81fcb170STakashi Iwai struct snd_trident_tlb tlb; /* TLB entries for NX cards */ 369*81fcb170STakashi Iwai 370*81fcb170STakashi Iwai unsigned char spdif_ctrl; 371*81fcb170STakashi Iwai unsigned char spdif_pcm_ctrl; 372*81fcb170STakashi Iwai unsigned int spdif_bits; 373*81fcb170STakashi Iwai unsigned int spdif_pcm_bits; 374*81fcb170STakashi Iwai struct snd_kcontrol *spdif_pcm_ctl; /* S/PDIF settings */ 375*81fcb170STakashi Iwai unsigned int ac97_ctrl; 376*81fcb170STakashi Iwai 377*81fcb170STakashi Iwai unsigned int ChanMap[2]; /* allocation map for hardware channels */ 378*81fcb170STakashi Iwai 379*81fcb170STakashi Iwai int ChanPCM; /* max number of PCM channels */ 380*81fcb170STakashi Iwai int ChanPCMcnt; /* actual number of PCM channels */ 381*81fcb170STakashi Iwai 382*81fcb170STakashi Iwai unsigned int ac97_detect: 1; /* 1 = AC97 in detection phase */ 383*81fcb170STakashi Iwai unsigned int in_suspend: 1; /* 1 during suspend/resume */ 384*81fcb170STakashi Iwai 385*81fcb170STakashi Iwai struct snd_4dwave synth; /* synth specific variables */ 386*81fcb170STakashi Iwai 387*81fcb170STakashi Iwai spinlock_t event_lock; 388*81fcb170STakashi Iwai spinlock_t voice_alloc; 389*81fcb170STakashi Iwai 390*81fcb170STakashi Iwai struct snd_dma_device dma_dev; 391*81fcb170STakashi Iwai 392*81fcb170STakashi Iwai struct pci_dev *pci; 393*81fcb170STakashi Iwai struct snd_card *card; 394*81fcb170STakashi Iwai struct snd_pcm *pcm; /* ADC/DAC PCM */ 395*81fcb170STakashi Iwai struct snd_pcm *foldback; /* Foldback PCM */ 396*81fcb170STakashi Iwai struct snd_pcm *spdif; /* SPDIF PCM */ 397*81fcb170STakashi Iwai struct snd_rawmidi *rmidi; 398*81fcb170STakashi Iwai 399*81fcb170STakashi Iwai struct snd_ac97_bus *ac97_bus; 400*81fcb170STakashi Iwai struct snd_ac97 *ac97; 401*81fcb170STakashi Iwai struct snd_ac97 *ac97_sec; 402*81fcb170STakashi Iwai 403*81fcb170STakashi Iwai unsigned int musicvol_wavevol; 404*81fcb170STakashi Iwai struct snd_trident_pcm_mixer pcm_mixer[32]; 405*81fcb170STakashi Iwai struct snd_kcontrol *ctl_vol; /* front volume */ 406*81fcb170STakashi Iwai struct snd_kcontrol *ctl_pan; /* pan */ 407*81fcb170STakashi Iwai struct snd_kcontrol *ctl_rvol; /* rear volume */ 408*81fcb170STakashi Iwai struct snd_kcontrol *ctl_cvol; /* center volume */ 409*81fcb170STakashi Iwai 410*81fcb170STakashi Iwai spinlock_t reg_lock; 411*81fcb170STakashi Iwai 412*81fcb170STakashi Iwai struct gameport *gameport; 413*81fcb170STakashi Iwai }; 414*81fcb170STakashi Iwai 415*81fcb170STakashi Iwai int snd_trident_create(struct snd_card *card, 416*81fcb170STakashi Iwai struct pci_dev *pci, 417*81fcb170STakashi Iwai int pcm_streams, 418*81fcb170STakashi Iwai int pcm_spdif_device, 419*81fcb170STakashi Iwai int max_wavetable_size, 420*81fcb170STakashi Iwai struct snd_trident ** rtrident); 421*81fcb170STakashi Iwai int snd_trident_create_gameport(struct snd_trident *trident); 422*81fcb170STakashi Iwai 423*81fcb170STakashi Iwai int snd_trident_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm); 424*81fcb170STakashi Iwai int snd_trident_foldback_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm); 425*81fcb170STakashi Iwai int snd_trident_spdif_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm); 426*81fcb170STakashi Iwai int snd_trident_attach_synthesizer(struct snd_trident * trident); 427*81fcb170STakashi Iwai struct snd_trident_voice *snd_trident_alloc_voice(struct snd_trident * trident, int type, 428*81fcb170STakashi Iwai int client, int port); 429*81fcb170STakashi Iwai void snd_trident_free_voice(struct snd_trident * trident, struct snd_trident_voice *voice); 430*81fcb170STakashi Iwai void snd_trident_start_voice(struct snd_trident * trident, unsigned int voice); 431*81fcb170STakashi Iwai void snd_trident_stop_voice(struct snd_trident * trident, unsigned int voice); 432*81fcb170STakashi Iwai void snd_trident_write_voice_regs(struct snd_trident * trident, struct snd_trident_voice *voice); 433*81fcb170STakashi Iwai extern const struct dev_pm_ops snd_trident_pm; 434*81fcb170STakashi Iwai 435*81fcb170STakashi Iwai /* TLB memory allocation */ 436*81fcb170STakashi Iwai struct snd_util_memblk *snd_trident_alloc_pages(struct snd_trident *trident, 437*81fcb170STakashi Iwai struct snd_pcm_substream *substream); 438*81fcb170STakashi Iwai int snd_trident_free_pages(struct snd_trident *trident, struct snd_util_memblk *blk); 439*81fcb170STakashi Iwai struct snd_util_memblk *snd_trident_synth_alloc(struct snd_trident *trident, unsigned int size); 440*81fcb170STakashi Iwai int snd_trident_synth_free(struct snd_trident *trident, struct snd_util_memblk *blk); 441*81fcb170STakashi Iwai int snd_trident_synth_copy_from_user(struct snd_trident *trident, struct snd_util_memblk *blk, 442*81fcb170STakashi Iwai int offset, const char __user *data, int size); 443*81fcb170STakashi Iwai 444*81fcb170STakashi Iwai #endif /* __SOUND_TRIDENT_H */ 445