xref: /openbmc/linux/sound/pci/lola/lola.h (revision d43f3010b8fa7530c3780c087fad9b0a8a437ba1)
1*d43f3010STakashi Iwai /*
2*d43f3010STakashi Iwai  *  Support for Digigram Lola PCI-e boards
3*d43f3010STakashi Iwai  *
4*d43f3010STakashi Iwai  *  Copyright (c) 2011 Takashi Iwai <tiwai@suse.de>
5*d43f3010STakashi Iwai  *
6*d43f3010STakashi Iwai  *  This program is free software; you can redistribute it and/or modify it
7*d43f3010STakashi Iwai  *  under the terms of the GNU General Public License as published by the Free
8*d43f3010STakashi Iwai  *  Software Foundation; either version 2 of the License, or (at your option)
9*d43f3010STakashi Iwai  *  any later version.
10*d43f3010STakashi Iwai  *
11*d43f3010STakashi Iwai  *  This program is distributed in the hope that it will be useful, but WITHOUT
12*d43f3010STakashi Iwai  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13*d43f3010STakashi Iwai  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14*d43f3010STakashi Iwai  *  more details.
15*d43f3010STakashi Iwai  *
16*d43f3010STakashi Iwai  *  You should have received a copy of the GNU General Public License along with
17*d43f3010STakashi Iwai  *  this program; if not, write to the Free Software Foundation, Inc., 59
18*d43f3010STakashi Iwai  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
19*d43f3010STakashi Iwai  */
20*d43f3010STakashi Iwai 
21*d43f3010STakashi Iwai #ifndef _LOLA_H
22*d43f3010STakashi Iwai #define _LOLA_H
23*d43f3010STakashi Iwai 
24*d43f3010STakashi Iwai #define DRVNAME	"snd-lola"
25*d43f3010STakashi Iwai #define SFX	DRVNAME ": "
26*d43f3010STakashi Iwai 
27*d43f3010STakashi Iwai /*
28*d43f3010STakashi Iwai  * Lola HD Audio Registers BAR0
29*d43f3010STakashi Iwai  */
30*d43f3010STakashi Iwai #define LOLA_BAR0_GCAP		0x00
31*d43f3010STakashi Iwai #define LOLA_BAR0_VMIN		0x02
32*d43f3010STakashi Iwai #define LOLA_BAR0_VMAJ		0x03
33*d43f3010STakashi Iwai #define LOLA_BAR0_OUTPAY	0x04
34*d43f3010STakashi Iwai #define LOLA_BAR0_INPAY		0x06
35*d43f3010STakashi Iwai #define LOLA_BAR0_GCTL		0x08
36*d43f3010STakashi Iwai #define LOLA_BAR0_WAKEEN	0x0c
37*d43f3010STakashi Iwai #define LOLA_BAR0_STATESTS	0x0e
38*d43f3010STakashi Iwai #define LOLA_BAR0_GSTS		0x10
39*d43f3010STakashi Iwai #define LOLA_BAR0_OUTSTRMPAY	0x18
40*d43f3010STakashi Iwai #define LOLA_BAR0_INSTRMPAY	0x1a
41*d43f3010STakashi Iwai #define LOLA_BAR0_INTCTL	0x20
42*d43f3010STakashi Iwai #define LOLA_BAR0_INTSTS	0x24
43*d43f3010STakashi Iwai #define LOLA_BAR0_WALCLK	0x30
44*d43f3010STakashi Iwai #define LOLA_BAR0_SSYNC		0x38
45*d43f3010STakashi Iwai 
46*d43f3010STakashi Iwai #define LOLA_BAR0_CORBLBASE	0x40
47*d43f3010STakashi Iwai #define LOLA_BAR0_CORBUBASE	0x44
48*d43f3010STakashi Iwai #define LOLA_BAR0_CORBWP	0x48	/* no ULONG access */
49*d43f3010STakashi Iwai #define LOLA_BAR0_CORBRP	0x4a	/* no ULONG access */
50*d43f3010STakashi Iwai #define LOLA_BAR0_CORBCTL	0x4c	/* no ULONG access */
51*d43f3010STakashi Iwai #define LOLA_BAR0_CORBSTS	0x4d	/* UCHAR access only */
52*d43f3010STakashi Iwai #define LOLA_BAR0_CORBSIZE	0x4e	/* no ULONG access */
53*d43f3010STakashi Iwai 
54*d43f3010STakashi Iwai #define LOLA_BAR0_RIRBLBASE	0x50
55*d43f3010STakashi Iwai #define LOLA_BAR0_RIRBUBASE	0x54
56*d43f3010STakashi Iwai #define LOLA_BAR0_RIRBWP	0x58
57*d43f3010STakashi Iwai #define LOLA_BAR0_RINTCNT	0x5a	/* no ULONG access */
58*d43f3010STakashi Iwai #define LOLA_BAR0_RIRBCTL	0x5c
59*d43f3010STakashi Iwai #define LOLA_BAR0_RIRBSTS	0x5d	/* UCHAR access only */
60*d43f3010STakashi Iwai #define LOLA_BAR0_RIRBSIZE	0x5e	/* no ULONG access */
61*d43f3010STakashi Iwai 
62*d43f3010STakashi Iwai #define LOLA_BAR0_ICW		0x60
63*d43f3010STakashi Iwai #define LOLA_BAR0_IRR		0x64
64*d43f3010STakashi Iwai #define LOLA_BAR0_ICS		0x68
65*d43f3010STakashi Iwai #define LOLA_BAR0_DPLBASE	0x70
66*d43f3010STakashi Iwai #define LOLA_BAR0_DPUBASE	0x74
67*d43f3010STakashi Iwai 
68*d43f3010STakashi Iwai /* stream register offsets from stream base 0x80 */
69*d43f3010STakashi Iwai #define LOLA_BAR0_SD0_OFFSET	0x80
70*d43f3010STakashi Iwai #define LOLA_REG0_SD_CTL	0x00
71*d43f3010STakashi Iwai #define LOLA_REG0_SD_STS	0x03
72*d43f3010STakashi Iwai #define LOLA_REG0_SD_LPIB	0x04
73*d43f3010STakashi Iwai #define LOLA_REG0_SD_CBL	0x08
74*d43f3010STakashi Iwai #define LOLA_REG0_SD_LVI	0x0c
75*d43f3010STakashi Iwai #define LOLA_REG0_SD_FIFOW	0x0e
76*d43f3010STakashi Iwai #define LOLA_REG0_SD_FIFOSIZE	0x10
77*d43f3010STakashi Iwai #define LOLA_REG0_SD_FORMAT	0x12
78*d43f3010STakashi Iwai #define LOLA_REG0_SD_BDLPL	0x18
79*d43f3010STakashi Iwai #define LOLA_REG0_SD_BDLPU	0x1c
80*d43f3010STakashi Iwai 
81*d43f3010STakashi Iwai /*
82*d43f3010STakashi Iwai  * Lola Digigram Registers BAR1
83*d43f3010STakashi Iwai  */
84*d43f3010STakashi Iwai #define LOLA_BAR1_FPGAVER	0x00
85*d43f3010STakashi Iwai #define LOLA_BAR1_DEVER		0x04
86*d43f3010STakashi Iwai #define LOLA_BAR1_UCBMV		0x08
87*d43f3010STakashi Iwai #define LOLA_BAR1_JTAG		0x0c
88*d43f3010STakashi Iwai #define LOLA_BAR1_UARTRX	0x10
89*d43f3010STakashi Iwai #define LOLA_BAR1_UARTTX	0x14
90*d43f3010STakashi Iwai #define LOLA_BAR1_UARTCR	0x18
91*d43f3010STakashi Iwai #define LOLA_BAR1_NVRAMVER	0x1c
92*d43f3010STakashi Iwai #define LOLA_BAR1_CTRLSPI	0x20
93*d43f3010STakashi Iwai #define LOLA_BAR1_DSPI		0x24
94*d43f3010STakashi Iwai #define LOLA_BAR1_AISPI		0x28
95*d43f3010STakashi Iwai #define LOLA_BAR1_GRAN		0x2c
96*d43f3010STakashi Iwai 
97*d43f3010STakashi Iwai #define LOLA_BAR1_DINTCTL	0x80
98*d43f3010STakashi Iwai #define LOLA_BAR1_DIINTCTL	0x84
99*d43f3010STakashi Iwai #define LOLA_BAR1_DOINTCTL	0x88
100*d43f3010STakashi Iwai #define LOLA_BAR1_LRC		0x90
101*d43f3010STakashi Iwai #define LOLA_BAR1_DINTSTS	0x94
102*d43f3010STakashi Iwai #define LOLA_BAR1_DIINTSTS	0x98
103*d43f3010STakashi Iwai #define LOLA_BAR1_DOINTSTS	0x9c
104*d43f3010STakashi Iwai 
105*d43f3010STakashi Iwai #define LOLA_BAR1_DSD0_OFFSET	0xa0
106*d43f3010STakashi Iwai #define LOLA_BAR1_DSD_SIZE	0x18
107*d43f3010STakashi Iwai 
108*d43f3010STakashi Iwai #define LOLA_BAR1_DSDnSTS       0x00
109*d43f3010STakashi Iwai #define LOLA_BAR1_DSDnLPIB      0x04
110*d43f3010STakashi Iwai #define LOLA_BAR1_DSDnCTL       0x08
111*d43f3010STakashi Iwai #define LOLA_BAR1_DSDnLVI       0x0c
112*d43f3010STakashi Iwai #define LOLA_BAR1_DSDnBDPL      0x10
113*d43f3010STakashi Iwai #define LOLA_BAR1_DSDnBDPU      0x14
114*d43f3010STakashi Iwai 
115*d43f3010STakashi Iwai #define LOLA_BAR1_SSYNC		0x03e8
116*d43f3010STakashi Iwai 
117*d43f3010STakashi Iwai #define LOLA_BAR1_BOARD_CTRL	0x0f00
118*d43f3010STakashi Iwai #define LOLA_BAR1_BOARD_MODE	0x0f02
119*d43f3010STakashi Iwai 
120*d43f3010STakashi Iwai #define LOLA_BAR1_SOURCE_GAIN_ENABLE		0x1000
121*d43f3010STakashi Iwai #define LOLA_BAR1_DEST00_MIX_GAIN_ENABLE	0x1004
122*d43f3010STakashi Iwai #define LOLA_BAR1_DEST31_MIX_GAIN_ENABLE	0x1080
123*d43f3010STakashi Iwai #define LOLA_BAR1_SOURCE00_01_GAIN		0x1084
124*d43f3010STakashi Iwai #define LOLA_BAR1_SOURCE30_31_GAIN		0x10c0
125*d43f3010STakashi Iwai #define LOLA_BAR1_SOURCE_GAIN(src) \
126*d43f3010STakashi Iwai 	(LOLA_BAR1_SOURCE00_01_GAIN + (src) * 2)
127*d43f3010STakashi Iwai #define LOLA_BAR1_DEST00_MIX00_01_GAIN		0x10c4
128*d43f3010STakashi Iwai #define LOLA_BAR1_DEST00_MIX30_31_GAIN		0x1100
129*d43f3010STakashi Iwai #define LOLA_BAR1_DEST01_MIX00_01_GAIN		0x1104
130*d43f3010STakashi Iwai #define LOLA_BAR1_DEST01_MIX30_31_GAIN		0x1140
131*d43f3010STakashi Iwai #define LOLA_BAR1_DEST31_MIX00_01_GAIN		0x1884
132*d43f3010STakashi Iwai #define LOLA_BAR1_DEST31_MIX30_31_GAIN		0x18c0
133*d43f3010STakashi Iwai #define LOLA_BAR1_MIX_GAIN(dest, mix) \
134*d43f3010STakashi Iwai 	(LOLA_BAR1_DEST00_MIX00_01_GAIN + (dest) * 0x40 + (mix) * 2)
135*d43f3010STakashi Iwai #define LOLA_BAR1_ANALOG_CLIP_IN		0x18c4
136*d43f3010STakashi Iwai #define LOLA_BAR1_PEAKMETERS_SOURCE00_01	0x18c8
137*d43f3010STakashi Iwai #define LOLA_BAR1_PEAKMETERS_SOURCE30_31	0x1904
138*d43f3010STakashi Iwai #define LOLA_BAR1_PEAKMETERS_SOURCE(src) \
139*d43f3010STakashi Iwai 	(LOLA_BAR1_PEAKMETERS_SOURCE00_01 + (src) * 2)
140*d43f3010STakashi Iwai #define LOLA_BAR1_PEAKMETERS_DEST00_01		0x1908
141*d43f3010STakashi Iwai #define LOLA_BAR1_PEAKMETERS_DEST30_31		0x1944
142*d43f3010STakashi Iwai #define LOLA_BAR1_PEAKMETERS_DEST(dest) \
143*d43f3010STakashi Iwai 	(LOLA_BAR1_PEAKMETERS_DEST00_01 + (dest) * 2)
144*d43f3010STakashi Iwai #define LOLA_BAR1_PEAKMETERS_AGC00_01		0x1948
145*d43f3010STakashi Iwai #define LOLA_BAR1_PEAKMETERS_AGC14_15		0x1964
146*d43f3010STakashi Iwai #define LOLA_BAR1_PEAKMETERS_AGC(x) \
147*d43f3010STakashi Iwai 	(LOLA_BAR1_PEAKMETERS_AGC00_01 + (x) * 2)
148*d43f3010STakashi Iwai 
149*d43f3010STakashi Iwai /* GCTL reset bit */
150*d43f3010STakashi Iwai #define LOLA_GCTL_RESET		(1 << 0)
151*d43f3010STakashi Iwai /* GCTL unsolicited response enable bit */
152*d43f3010STakashi Iwai #define LOLA_GCTL_UREN		(1 << 8)
153*d43f3010STakashi Iwai 
154*d43f3010STakashi Iwai /* CORB/RIRB control, read/write pointer */
155*d43f3010STakashi Iwai #define LOLA_RBCTL_DMA_EN	0x02	/* enable DMA */
156*d43f3010STakashi Iwai #define LOLA_RBCTL_IRQ_EN	0x01	/* enable IRQ */
157*d43f3010STakashi Iwai #define LOLA_RBRWP_CLR		0x8000	/* read/write pointer clear */
158*d43f3010STakashi Iwai 
159*d43f3010STakashi Iwai #define LOLA_RIRB_EX_UNSOL_EV	0x40000000
160*d43f3010STakashi Iwai #define LOLA_RIRB_EX_ERROR	0x80000000
161*d43f3010STakashi Iwai 
162*d43f3010STakashi Iwai /* CORB int mask: CMEI[0] */
163*d43f3010STakashi Iwai #define LOLA_CORB_INT_CMEI	0x01
164*d43f3010STakashi Iwai #define LOLA_CORB_INT_MASK	LOLA_CORB_INT_CMEI
165*d43f3010STakashi Iwai 
166*d43f3010STakashi Iwai /* RIRB int mask: overrun[2], response[0] */
167*d43f3010STakashi Iwai #define LOLA_RIRB_INT_RESPONSE	0x01
168*d43f3010STakashi Iwai #define LOLA_RIRB_INT_OVERRUN	0x04
169*d43f3010STakashi Iwai #define LOLA_RIRB_INT_MASK	(LOLA_RIRB_INT_RESPONSE | LOLA_RIRB_INT_OVERRUN)
170*d43f3010STakashi Iwai 
171*d43f3010STakashi Iwai /* DINTCTL and DINTSTS */
172*d43f3010STakashi Iwai #define LOLA_DINT_GLOBAL	0x80000000 /* global interrupt enable bit */
173*d43f3010STakashi Iwai #define LOLA_DINT_CTRL		0x40000000 /* controller interrupt enable bit */
174*d43f3010STakashi Iwai #define LOLA_DINT_FIFOERR	0x20000000 /* global fifo error enable bit */
175*d43f3010STakashi Iwai #define LOLA_DINT_MUERR		0x10000000 /* global microcontroller underrun error */
176*d43f3010STakashi Iwai 
177*d43f3010STakashi Iwai /* DSDnCTL bits */
178*d43f3010STakashi Iwai #define LOLA_DSD_CTL_SRST	0x01	/* stream reset bit */
179*d43f3010STakashi Iwai #define LOLA_DSD_CTL_SRUN	0x02	/* stream DMA start bit */
180*d43f3010STakashi Iwai #define LOLA_DSD_CTL_IOCE	0x04	/* interrupt on completion enable */
181*d43f3010STakashi Iwai #define LOLA_DSD_CTL_DEIE	0x10	/* descriptor error interrupt enable */
182*d43f3010STakashi Iwai #define LOLA_DSD_CTL_VLRCV	0x20	/* valid LRCountValue information in bits 8..31 */
183*d43f3010STakashi Iwai #define LOLA_LRC_MASK		0xffffff00
184*d43f3010STakashi Iwai 
185*d43f3010STakashi Iwai /* DSDnSTS */
186*d43f3010STakashi Iwai #define LOLA_DSD_STS_BCIS	0x04	/* buffer completion interrupt status */
187*d43f3010STakashi Iwai #define LOLA_DSD_STS_DESE	0x10	/* descriptor error interrupt */
188*d43f3010STakashi Iwai #define LOLA_DSD_STS_FIFORDY	0x20	/* fifo ready */
189*d43f3010STakashi Iwai 
190*d43f3010STakashi Iwai #define LOLA_CORB_ENTRIES	256
191*d43f3010STakashi Iwai 
192*d43f3010STakashi Iwai #define MAX_STREAM_IN_COUNT	16
193*d43f3010STakashi Iwai #define MAX_STREAM_OUT_COUNT	16
194*d43f3010STakashi Iwai #define MAX_STREAM_COUNT	16
195*d43f3010STakashi Iwai #define MAX_PINS		MAX_STREAM_COUNT
196*d43f3010STakashi Iwai #define MAX_STREAM_BUFFER_COUNT	16
197*d43f3010STakashi Iwai #define MAX_AUDIO_INOUT_COUNT	16
198*d43f3010STakashi Iwai 
199*d43f3010STakashi Iwai #define LOLA_CLOCK_TYPE_INTERNAL    0
200*d43f3010STakashi Iwai #define LOLA_CLOCK_TYPE_AES         1
201*d43f3010STakashi Iwai #define LOLA_CLOCK_TYPE_AES_SYNC    2
202*d43f3010STakashi Iwai #define LOLA_CLOCK_TYPE_WORDCLOCK   3
203*d43f3010STakashi Iwai #define LOLA_CLOCK_TYPE_ETHERSOUND  4
204*d43f3010STakashi Iwai #define LOLA_CLOCK_TYPE_VIDEO       5
205*d43f3010STakashi Iwai 
206*d43f3010STakashi Iwai #define LOLA_CLOCK_FORMAT_NONE      0
207*d43f3010STakashi Iwai #define LOLA_CLOCK_FORMAT_NTSC      1
208*d43f3010STakashi Iwai #define LOLA_CLOCK_FORMAT_PAL       2
209*d43f3010STakashi Iwai 
210*d43f3010STakashi Iwai #define MAX_SAMPLE_CLOCK_COUNT  48
211*d43f3010STakashi Iwai 
212*d43f3010STakashi Iwai /* parameters used with mixer widget's mixer capabilities */
213*d43f3010STakashi Iwai #define LOLA_PEAK_METER_CAN_AGC_MASK		1
214*d43f3010STakashi Iwai #define LOLA_PEAK_METER_CAN_ANALOG_CLIP_MASK	2
215*d43f3010STakashi Iwai 
216*d43f3010STakashi Iwai struct lola_bar {
217*d43f3010STakashi Iwai 	unsigned long addr;
218*d43f3010STakashi Iwai 	void __iomem *remap_addr;
219*d43f3010STakashi Iwai };
220*d43f3010STakashi Iwai 
221*d43f3010STakashi Iwai /* CORB/RIRB */
222*d43f3010STakashi Iwai struct lola_rb {
223*d43f3010STakashi Iwai 	u32 *buf;		/* CORB/RIRB buffer, 8 byte per each entry */
224*d43f3010STakashi Iwai 	dma_addr_t addr;	/* physical address of CORB/RIRB buffer */
225*d43f3010STakashi Iwai 	unsigned short rp, wp;	/* read/write pointers */
226*d43f3010STakashi Iwai 	int cmds;		/* number of pending requests */
227*d43f3010STakashi Iwai };
228*d43f3010STakashi Iwai 
229*d43f3010STakashi Iwai /* Pin widget setup */
230*d43f3010STakashi Iwai struct lola_pin {
231*d43f3010STakashi Iwai 	unsigned int nid;
232*d43f3010STakashi Iwai 	bool is_analog;
233*d43f3010STakashi Iwai 	unsigned int amp_mute;
234*d43f3010STakashi Iwai 	unsigned int amp_step_size;
235*d43f3010STakashi Iwai 	unsigned int amp_num_steps;
236*d43f3010STakashi Iwai 	unsigned int amp_offset;
237*d43f3010STakashi Iwai 	unsigned int max_level;
238*d43f3010STakashi Iwai 	unsigned int config_default_reg;
239*d43f3010STakashi Iwai 	unsigned int fixed_gain_list_len;
240*d43f3010STakashi Iwai 	unsigned int cur_gain_step;
241*d43f3010STakashi Iwai };
242*d43f3010STakashi Iwai 
243*d43f3010STakashi Iwai struct lola_pin_array {
244*d43f3010STakashi Iwai 	unsigned int num_pins;
245*d43f3010STakashi Iwai 	struct lola_pin pins[MAX_PINS];
246*d43f3010STakashi Iwai };
247*d43f3010STakashi Iwai 
248*d43f3010STakashi Iwai /* Clock widget setup */
249*d43f3010STakashi Iwai struct lola_sample_clock {
250*d43f3010STakashi Iwai 	unsigned int type;
251*d43f3010STakashi Iwai 	unsigned int format;
252*d43f3010STakashi Iwai 	unsigned int freq;
253*d43f3010STakashi Iwai };
254*d43f3010STakashi Iwai 
255*d43f3010STakashi Iwai struct lola_clock_widget {
256*d43f3010STakashi Iwai 	unsigned int nid;
257*d43f3010STakashi Iwai 	unsigned int items;
258*d43f3010STakashi Iwai 	unsigned int cur_index;
259*d43f3010STakashi Iwai 	unsigned int cur_freq;
260*d43f3010STakashi Iwai 	bool cur_valid;
261*d43f3010STakashi Iwai 	struct lola_sample_clock sample_clock[MAX_SAMPLE_CLOCK_COUNT];
262*d43f3010STakashi Iwai 	unsigned int idx_lookup[MAX_SAMPLE_CLOCK_COUNT];
263*d43f3010STakashi Iwai };
264*d43f3010STakashi Iwai 
265*d43f3010STakashi Iwai #define LOLA_MIXER_DIM      32
266*d43f3010STakashi Iwai struct lola_mixer_array {
267*d43f3010STakashi Iwai 	u32 src_gain_enable;
268*d43f3010STakashi Iwai 	u32 dest_mix_gain_enable[LOLA_MIXER_DIM];
269*d43f3010STakashi Iwai 	u16 src_gain[LOLA_MIXER_DIM];
270*d43f3010STakashi Iwai 	u16 dest_mix_gain[LOLA_MIXER_DIM][LOLA_MIXER_DIM];
271*d43f3010STakashi Iwai };
272*d43f3010STakashi Iwai 
273*d43f3010STakashi Iwai /* Mixer widget setup */
274*d43f3010STakashi Iwai struct lola_mixer_widget {
275*d43f3010STakashi Iwai 	unsigned int nid;
276*d43f3010STakashi Iwai 	unsigned int caps;
277*d43f3010STakashi Iwai 	struct lola_mixer_array __user *array;
278*d43f3010STakashi Iwai 	struct lola_mixer_array *array_saved;
279*d43f3010STakashi Iwai 	unsigned int src_stream_outs;
280*d43f3010STakashi Iwai 	unsigned int src_phys_ins;
281*d43f3010STakashi Iwai 	unsigned int dest_stream_ins;
282*d43f3010STakashi Iwai 	unsigned int dest_phys_outs;
283*d43f3010STakashi Iwai 	unsigned int src_stream_out_ofs;
284*d43f3010STakashi Iwai 	unsigned int dest_phys_out_ofs;
285*d43f3010STakashi Iwai 	unsigned int src_mask;
286*d43f3010STakashi Iwai 	unsigned int dest_mask;
287*d43f3010STakashi Iwai };
288*d43f3010STakashi Iwai 
289*d43f3010STakashi Iwai /* Audio stream */
290*d43f3010STakashi Iwai struct lola_stream {
291*d43f3010STakashi Iwai 	unsigned int nid;	/* audio widget NID */
292*d43f3010STakashi Iwai 	unsigned int index;	/* array index */
293*d43f3010STakashi Iwai 	unsigned int dsd;	/* DSD index */
294*d43f3010STakashi Iwai 	bool can_float;
295*d43f3010STakashi Iwai 	struct snd_pcm_substream *substream; /* assigned PCM substream */
296*d43f3010STakashi Iwai 	struct lola_stream *master;	/* master stream (for multi-channel) */
297*d43f3010STakashi Iwai 
298*d43f3010STakashi Iwai 	/* buffer setup */
299*d43f3010STakashi Iwai 	unsigned int bufsize;
300*d43f3010STakashi Iwai 	unsigned int period_bytes;
301*d43f3010STakashi Iwai 	unsigned int frags;
302*d43f3010STakashi Iwai 	struct snd_dma_buffer bdl; /* BDL buffer */
303*d43f3010STakashi Iwai 
304*d43f3010STakashi Iwai 	/* format + channel setup */
305*d43f3010STakashi Iwai 	unsigned int format_verb;
306*d43f3010STakashi Iwai 
307*d43f3010STakashi Iwai 	/* flags */
308*d43f3010STakashi Iwai 	unsigned int opened:1;
309*d43f3010STakashi Iwai 	unsigned int running:1;
310*d43f3010STakashi Iwai };
311*d43f3010STakashi Iwai 
312*d43f3010STakashi Iwai #define PLAY	SNDRV_PCM_STREAM_PLAYBACK
313*d43f3010STakashi Iwai #define CAPT	SNDRV_PCM_STREAM_CAPTURE
314*d43f3010STakashi Iwai 
315*d43f3010STakashi Iwai struct lola_pcm {
316*d43f3010STakashi Iwai 	unsigned int num_streams;
317*d43f3010STakashi Iwai 	struct lola_stream streams[MAX_STREAM_COUNT];
318*d43f3010STakashi Iwai };
319*d43f3010STakashi Iwai 
320*d43f3010STakashi Iwai /* card instance */
321*d43f3010STakashi Iwai struct lola {
322*d43f3010STakashi Iwai 	struct snd_card *card;
323*d43f3010STakashi Iwai 	struct pci_dev *pci;
324*d43f3010STakashi Iwai 
325*d43f3010STakashi Iwai 	/* pci resources */
326*d43f3010STakashi Iwai 	struct lola_bar bar[2];
327*d43f3010STakashi Iwai 	int irq;
328*d43f3010STakashi Iwai 
329*d43f3010STakashi Iwai 	/* locks */
330*d43f3010STakashi Iwai 	spinlock_t reg_lock;
331*d43f3010STakashi Iwai 	struct mutex open_mutex;
332*d43f3010STakashi Iwai 
333*d43f3010STakashi Iwai 	/* CORB/RIRB */
334*d43f3010STakashi Iwai 	struct lola_rb corb;
335*d43f3010STakashi Iwai 	struct lola_rb rirb;
336*d43f3010STakashi Iwai 	unsigned int res, res_ex;	/* last read values */
337*d43f3010STakashi Iwai 	/* last command (for debugging) */
338*d43f3010STakashi Iwai 	unsigned int last_cmd_nid, last_verb, last_data, last_extdata;
339*d43f3010STakashi Iwai 
340*d43f3010STakashi Iwai 	/* CORB/RIRB buffers */
341*d43f3010STakashi Iwai 	struct snd_dma_buffer rb;
342*d43f3010STakashi Iwai 
343*d43f3010STakashi Iwai 	/* unsolicited events */
344*d43f3010STakashi Iwai 	unsigned int last_unsol_res;
345*d43f3010STakashi Iwai 
346*d43f3010STakashi Iwai 	/* streams */
347*d43f3010STakashi Iwai 	struct lola_pcm pcm[2];
348*d43f3010STakashi Iwai 
349*d43f3010STakashi Iwai 	/* input src */
350*d43f3010STakashi Iwai 	unsigned int input_src_caps_mask;
351*d43f3010STakashi Iwai 	unsigned int input_src_mask;
352*d43f3010STakashi Iwai 
353*d43f3010STakashi Iwai 	/* pins */
354*d43f3010STakashi Iwai 	struct lola_pin_array pin[2];
355*d43f3010STakashi Iwai 
356*d43f3010STakashi Iwai 	/* clock */
357*d43f3010STakashi Iwai 	struct lola_clock_widget clock;
358*d43f3010STakashi Iwai 
359*d43f3010STakashi Iwai 	/* mixer */
360*d43f3010STakashi Iwai 	struct lola_mixer_widget mixer;
361*d43f3010STakashi Iwai 
362*d43f3010STakashi Iwai 	/* hw info */
363*d43f3010STakashi Iwai 	unsigned int version;
364*d43f3010STakashi Iwai 	unsigned int lola_caps;
365*d43f3010STakashi Iwai 
366*d43f3010STakashi Iwai 	/* parameters */
367*d43f3010STakashi Iwai 	unsigned int granularity;
368*d43f3010STakashi Iwai 	unsigned int sample_rate_min;
369*d43f3010STakashi Iwai 
370*d43f3010STakashi Iwai 	/* flags */
371*d43f3010STakashi Iwai 	unsigned int running :1;
372*d43f3010STakashi Iwai 	unsigned int initialized :1;
373*d43f3010STakashi Iwai 	unsigned int cold_reset :1;
374*d43f3010STakashi Iwai 
375*d43f3010STakashi Iwai 	/* for debugging */
376*d43f3010STakashi Iwai 	unsigned int debug_res;
377*d43f3010STakashi Iwai 	unsigned int debug_res_ex;
378*d43f3010STakashi Iwai };
379*d43f3010STakashi Iwai 
380*d43f3010STakashi Iwai #define BAR0	0
381*d43f3010STakashi Iwai #define BAR1	1
382*d43f3010STakashi Iwai 
383*d43f3010STakashi Iwai /* Helper macros */
384*d43f3010STakashi Iwai #define lola_readl(chip, idx, name) \
385*d43f3010STakashi Iwai 	readl((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
386*d43f3010STakashi Iwai #define lola_readw(chip, idx, name) \
387*d43f3010STakashi Iwai 	readw((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
388*d43f3010STakashi Iwai #define lola_readb(chip, idx, name) \
389*d43f3010STakashi Iwai 	readb((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
390*d43f3010STakashi Iwai #define lola_writel(chip, idx, name, val) \
391*d43f3010STakashi Iwai 	writel((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
392*d43f3010STakashi Iwai #define lola_writew(chip, idx, name, val) \
393*d43f3010STakashi Iwai 	writew((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
394*d43f3010STakashi Iwai #define lola_writeb(chip, idx, name, val) \
395*d43f3010STakashi Iwai 	writeb((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
396*d43f3010STakashi Iwai 
397*d43f3010STakashi Iwai #define lola_dsd_read(chip, dsd, name) \
398*d43f3010STakashi Iwai 	readl((chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
399*d43f3010STakashi Iwai 	      (LOLA_BAR1_DSD_SIZE * (dsd)) + LOLA_BAR1_DSDn##name)
400*d43f3010STakashi Iwai #define lola_dsd_write(chip, dsd, name, val) \
401*d43f3010STakashi Iwai 	writel((val), (chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
402*d43f3010STakashi Iwai 	       (LOLA_BAR1_DSD_SIZE * (dsd)) + LOLA_BAR1_DSDn##name)
403*d43f3010STakashi Iwai 
404*d43f3010STakashi Iwai /* GET verbs HDAudio */
405*d43f3010STakashi Iwai #define LOLA_VERB_GET_STREAM_FORMAT		0xa00
406*d43f3010STakashi Iwai #define LOLA_VERB_GET_AMP_GAIN_MUTE		0xb00
407*d43f3010STakashi Iwai #define LOLA_VERB_PARAMETERS			0xf00
408*d43f3010STakashi Iwai #define LOLA_VERB_GET_POWER_STATE		0xf05
409*d43f3010STakashi Iwai #define LOLA_VERB_GET_CONV			0xf06
410*d43f3010STakashi Iwai #define LOLA_VERB_GET_UNSOLICITED_RESPONSE	0xf08
411*d43f3010STakashi Iwai #define LOLA_VERB_GET_DIGI_CONVERT_1		0xf0d
412*d43f3010STakashi Iwai #define LOLA_VERB_GET_CONFIG_DEFAULT		0xf1c
413*d43f3010STakashi Iwai #define LOLA_VERB_GET_SUBSYSTEM_ID		0xf20
414*d43f3010STakashi Iwai /* GET verbs Digigram */
415*d43f3010STakashi Iwai #define LOLA_VERB_GET_FIXED_GAIN		0xfc0
416*d43f3010STakashi Iwai #define LOLA_VERB_GET_GAIN_SELECT		0xfc1
417*d43f3010STakashi Iwai #define LOLA_VERB_GET_MAX_LEVEL			0xfc2
418*d43f3010STakashi Iwai #define LOLA_VERB_GET_CLOCK_LIST		0xfc3
419*d43f3010STakashi Iwai #define LOLA_VERB_GET_CLOCK_SELECT		0xfc4
420*d43f3010STakashi Iwai #define LOLA_VERB_GET_CLOCK_STATUS		0xfc5
421*d43f3010STakashi Iwai 
422*d43f3010STakashi Iwai /* SET verbs HDAudio */
423*d43f3010STakashi Iwai #define LOLA_VERB_SET_STREAM_FORMAT		0x200
424*d43f3010STakashi Iwai #define LOLA_VERB_SET_AMP_GAIN_MUTE		0x300
425*d43f3010STakashi Iwai #define LOLA_VERB_SET_POWER_STATE		0x705
426*d43f3010STakashi Iwai #define LOLA_VERB_SET_CHANNEL_STREAMID		0x706
427*d43f3010STakashi Iwai #define LOLA_VERB_SET_UNSOLICITED_ENABLE	0x708
428*d43f3010STakashi Iwai #define LOLA_VERB_SET_DIGI_CONVERT_1		0x70d
429*d43f3010STakashi Iwai /* SET verbs Digigram */
430*d43f3010STakashi Iwai #define LOLA_VERB_SET_GAIN_SELECT		0xf81
431*d43f3010STakashi Iwai #define LOLA_VERB_SET_CLOCK_SELECT		0xf84
432*d43f3010STakashi Iwai #define LOLA_VERB_SET_GRANULARITY_STEPS		0xf86
433*d43f3010STakashi Iwai #define LOLA_VERB_SET_SOURCE_GAIN		0xf87
434*d43f3010STakashi Iwai #define LOLA_VERB_SET_MIX_GAIN			0xf88
435*d43f3010STakashi Iwai #define LOLA_VERB_SET_DESTINATION_GAIN		0xf89
436*d43f3010STakashi Iwai #define LOLA_VERB_SET_SRC			0xf8a
437*d43f3010STakashi Iwai 
438*d43f3010STakashi Iwai /* Parameter IDs used with LOLA_VERB_PARAMETERS */
439*d43f3010STakashi Iwai #define LOLA_PAR_VENDOR_ID			0x00
440*d43f3010STakashi Iwai #define LOLA_PAR_FUNCTION_TYPE			0x05
441*d43f3010STakashi Iwai #define LOLA_PAR_AUDIO_WIDGET_CAP		0x09
442*d43f3010STakashi Iwai #define LOLA_PAR_PCM				0x0a
443*d43f3010STakashi Iwai #define LOLA_PAR_STREAM_FORMATS			0x0b
444*d43f3010STakashi Iwai #define LOLA_PAR_PIN_CAP			0x0c
445*d43f3010STakashi Iwai #define LOLA_PAR_AMP_IN_CAP			0x0d
446*d43f3010STakashi Iwai #define LOLA_PAR_CONNLIST_LEN			0x0e
447*d43f3010STakashi Iwai #define LOLA_PAR_POWER_STATE			0x0f
448*d43f3010STakashi Iwai #define LOLA_PAR_GPIO_CAP			0x11
449*d43f3010STakashi Iwai #define LOLA_PAR_AMP_OUT_CAP			0x12
450*d43f3010STakashi Iwai #define LOLA_PAR_SPECIFIC_CAPS			0x80
451*d43f3010STakashi Iwai #define LOLA_PAR_FIXED_GAIN_LIST		0x81
452*d43f3010STakashi Iwai 
453*d43f3010STakashi Iwai /* extract results of LOLA_PAR_SPECIFIC_CAPS */
454*d43f3010STakashi Iwai #define LOLA_AFG_MIXER_WIDGET_PRESENT(res)	((res & (1 << 21)) != 0)
455*d43f3010STakashi Iwai #define LOLA_AFG_CLOCK_WIDGET_PRESENT(res)	((res & (1 << 20)) != 0)
456*d43f3010STakashi Iwai #define LOLA_AFG_INPUT_PIN_COUNT(res)		((res >> 10) & 0x2ff)
457*d43f3010STakashi Iwai #define LOLA_AFG_OUTPUT_PIN_COUNT(res)		((res) & 0x2ff)
458*d43f3010STakashi Iwai 
459*d43f3010STakashi Iwai /* extract results of LOLA_PAR_AMP_IN_CAP / LOLA_PAR_AMP_OUT_CAP */
460*d43f3010STakashi Iwai #define LOLA_AMP_MUTE_CAPABLE(res)		((res & (1 << 31)) != 0)
461*d43f3010STakashi Iwai #define LOLA_AMP_STEP_SIZE(res)			((res >> 24) & 0x7f)
462*d43f3010STakashi Iwai #define LOLA_AMP_NUM_STEPS(res)			((res >> 12) & 0x3ff)
463*d43f3010STakashi Iwai #define LOLA_AMP_OFFSET(res)			((res) & 0x3ff)
464*d43f3010STakashi Iwai 
465*d43f3010STakashi Iwai #define LOLA_GRANULARITY_MIN		8
466*d43f3010STakashi Iwai #define LOLA_GRANULARITY_MAX		32
467*d43f3010STakashi Iwai #define LOLA_GRANULARITY_STEP		8
468*d43f3010STakashi Iwai 
469*d43f3010STakashi Iwai /* parameters used with unsolicited command/response */
470*d43f3010STakashi Iwai #define LOLA_UNSOLICITED_TAG_MASK	0x3f
471*d43f3010STakashi Iwai #define LOLA_UNSOLICITED_TAG		0x1a
472*d43f3010STakashi Iwai #define LOLA_UNSOLICITED_ENABLE		0x80
473*d43f3010STakashi Iwai #define LOLA_UNSOL_RESP_TAG_OFFSET	26
474*d43f3010STakashi Iwai 
475*d43f3010STakashi Iwai /* count values in the Vendor Specific Mixer Widget's Audio Widget Capabilities */
476*d43f3010STakashi Iwai #define LOLA_MIXER_SRC_INPUT_PLAY_SEPARATION(res)   ((res >> 2) & 0x1f)
477*d43f3010STakashi Iwai #define LOLA_MIXER_DEST_REC_OUTPUT_SEPATATION(res)  ((res >> 7) & 0x1f)
478*d43f3010STakashi Iwai 
479*d43f3010STakashi Iwai int lola_codec_write(struct lola *chip, unsigned int nid, unsigned int verb,
480*d43f3010STakashi Iwai 		     unsigned int data, unsigned int extdata);
481*d43f3010STakashi Iwai int lola_codec_read(struct lola *chip, unsigned int nid, unsigned int verb,
482*d43f3010STakashi Iwai 		    unsigned int data, unsigned int extdata,
483*d43f3010STakashi Iwai 		    unsigned int *val, unsigned int *extval);
484*d43f3010STakashi Iwai int lola_codec_flush(struct lola *chip);
485*d43f3010STakashi Iwai #define lola_read_param(chip, nid, param, val) \
486*d43f3010STakashi Iwai 	lola_codec_read(chip, nid, LOLA_VERB_PARAMETERS, param, 0, val, NULL)
487*d43f3010STakashi Iwai 
488*d43f3010STakashi Iwai /* PCM */
489*d43f3010STakashi Iwai int lola_create_pcm(struct lola *chip);
490*d43f3010STakashi Iwai void lola_free_pcm(struct lola *chip);
491*d43f3010STakashi Iwai int lola_init_pcm(struct lola *chip, int dir, int *nidp);
492*d43f3010STakashi Iwai void lola_pcm_update(struct lola *chip, struct lola_pcm *pcm, unsigned int bits);
493*d43f3010STakashi Iwai 
494*d43f3010STakashi Iwai /* clock */
495*d43f3010STakashi Iwai int lola_init_clock_widget(struct lola *chip, int nid);
496*d43f3010STakashi Iwai int lola_set_granularity(struct lola *chip, unsigned int val, bool force);
497*d43f3010STakashi Iwai int lola_enable_clock_events(struct lola *chip);
498*d43f3010STakashi Iwai int lola_set_clock_index(struct lola *chip, unsigned int idx);
499*d43f3010STakashi Iwai int lola_set_clock(struct lola *chip, int idx);
500*d43f3010STakashi Iwai int lola_set_sample_rate(struct lola *chip, int rate);
501*d43f3010STakashi Iwai bool lola_update_ext_clock_freq(struct lola *chip, unsigned int val);
502*d43f3010STakashi Iwai 
503*d43f3010STakashi Iwai /* mixer */
504*d43f3010STakashi Iwai int lola_init_pins(struct lola *chip, int dir, int *nidp);
505*d43f3010STakashi Iwai int lola_init_mixer_widget(struct lola *chip, int nid);
506*d43f3010STakashi Iwai void lola_free_mixer(struct lola *chip);
507*d43f3010STakashi Iwai int lola_create_mixer(struct lola *chip);
508*d43f3010STakashi Iwai int lola_setup_all_analog_gains(struct lola *chip, int dir, bool mute);
509*d43f3010STakashi Iwai void lola_save_mixer(struct lola *chip);
510*d43f3010STakashi Iwai void lola_restore_mixer(struct lola *chip);
511*d43f3010STakashi Iwai int lola_set_src_config(struct lola *chip, unsigned int src_mask, bool update);
512*d43f3010STakashi Iwai 
513*d43f3010STakashi Iwai /* proc */
514*d43f3010STakashi Iwai #ifdef CONFIG_SND_DEBUG
515*d43f3010STakashi Iwai void lola_proc_debug_new(struct lola *chip);
516*d43f3010STakashi Iwai #else
517*d43f3010STakashi Iwai #define lola_proc_debug_new(chip)
518*d43f3010STakashi Iwai #endif
519*d43f3010STakashi Iwai 
520*d43f3010STakashi Iwai #endif /* _LOLA_H */
521