1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Creative Labs, Inc. 5 * Routines for control of EMU10K1 chips 6 * 7 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 8 * Added support for Audigy 2 Value. 9 * Added EMU 1010 support. 10 * General bug fixes and enhancements. 11 * 12 * BUGS: 13 * -- 14 * 15 * TODO: 16 * -- 17 */ 18 19 #include <linux/sched.h> 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/iommu.h> 25 #include <linux/pci.h> 26 #include <linux/slab.h> 27 #include <linux/vmalloc.h> 28 #include <linux/mutex.h> 29 30 31 #include <sound/core.h> 32 #include <sound/emu10k1.h> 33 #include <linux/firmware.h> 34 #include "p16v.h" 35 #include "tina2.h" 36 #include "p17v.h" 37 38 39 #define HANA_FILENAME "emu/hana.fw" 40 #define DOCK_FILENAME "emu/audio_dock.fw" 41 #define EMU1010B_FILENAME "emu/emu1010b.fw" 42 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 43 #define EMU0404_FILENAME "emu/emu0404.fw" 44 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 45 46 MODULE_FIRMWARE(HANA_FILENAME); 47 MODULE_FIRMWARE(DOCK_FILENAME); 48 MODULE_FIRMWARE(EMU1010B_FILENAME); 49 MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 50 MODULE_FIRMWARE(EMU0404_FILENAME); 51 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 52 53 54 /************************************************************************* 55 * EMU10K1 init / done 56 *************************************************************************/ 57 58 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) 59 { 60 snd_emu10k1_ptr_write_multiple(emu, ch, 61 DCYSUSV, 0, 62 VTFT, VTFT_FILTERTARGET_MASK, 63 CVCF, CVCF_CURRENTFILTER_MASK, 64 PTRX, 0, 65 CPF, 0, 66 CCR, 0, 67 68 PSST, 0, 69 DSL, 0x10, 70 CCCA, 0, 71 Z1, 0, 72 Z2, 0, 73 FXRT, 0x32100000, 74 75 // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero 76 DCYSUSM, 0, 77 ATKHLDV, 0, 78 ATKHLDM, 0, 79 IP, 0, 80 IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK, 81 PEFE, 0, 82 FMMOD, 0, 83 TREMFRQ, 24, /* 1 Hz */ 84 FM2FRQ2, 24, /* 1 Hz */ 85 LFOVAL2, 0, 86 LFOVAL1, 0, 87 ENVVOL, 0, 88 ENVVAL, 0, 89 90 REGLIST_END); 91 92 /* Audigy extra stuffs */ 93 if (emu->audigy) { 94 snd_emu10k1_ptr_write_multiple(emu, ch, 95 A_CSBA, 0, 96 A_CSDC, 0, 97 A_CSFE, 0, 98 A_CSHG, 0, 99 A_FXRT1, 0x03020100, 100 A_FXRT2, 0x07060504, 101 A_SENDAMOUNTS, 0, 102 REGLIST_END); 103 } 104 } 105 106 static const unsigned int spi_dac_init[] = { 107 0x00ff, 108 0x02ff, 109 0x0400, 110 0x0520, 111 0x0600, 112 0x08ff, 113 0x0aff, 114 0x0cff, 115 0x0eff, 116 0x10ff, 117 0x1200, 118 0x1400, 119 0x1480, 120 0x1800, 121 0x1aff, 122 0x1cff, 123 0x1e00, 124 0x0530, 125 0x0602, 126 0x0622, 127 0x1400, 128 }; 129 130 static const unsigned int i2c_adc_init[][2] = { 131 { 0x17, 0x00 }, /* Reset */ 132 { 0x07, 0x00 }, /* Timeout */ 133 { 0x0b, 0x22 }, /* Interface control */ 134 { 0x0c, 0x22 }, /* Master mode control */ 135 { 0x0d, 0x08 }, /* Powerdown control */ 136 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 137 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 138 { 0x10, 0x7b }, /* ALC Control 1 */ 139 { 0x11, 0x00 }, /* ALC Control 2 */ 140 { 0x12, 0x32 }, /* ALC Control 3 */ 141 { 0x13, 0x00 }, /* Noise gate control */ 142 { 0x14, 0xa6 }, /* Limiter control */ 143 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ 144 }; 145 146 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir) 147 { 148 unsigned int silent_page; 149 int ch; 150 u32 tmp; 151 152 /* disable audio and lock cache */ 153 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | 154 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 155 156 outl(0, emu->port + INTE); 157 158 snd_emu10k1_ptr_write_multiple(emu, 0, 159 /* reset recording buffers */ 160 MICBS, ADCBS_BUFSIZE_NONE, 161 MICBA, 0, 162 FXBS, ADCBS_BUFSIZE_NONE, 163 FXBA, 0, 164 ADCBS, ADCBS_BUFSIZE_NONE, 165 ADCBA, 0, 166 167 /* disable channel interrupt */ 168 CLIEL, 0, 169 CLIEH, 0, 170 171 /* disable stop on loop end */ 172 SOLEL, 0, 173 SOLEH, 0, 174 175 REGLIST_END); 176 177 if (emu->audigy) { 178 /* set SPDIF bypass mode */ 179 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 180 /* enable rear left + rear right AC97 slots */ 181 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 182 AC97SLOT_REAR_LEFT); 183 } 184 185 /* init envelope engine */ 186 for (ch = 0; ch < NUM_G; ch++) 187 snd_emu10k1_voice_init(emu, ch); 188 189 snd_emu10k1_ptr_write_multiple(emu, 0, 190 SPCS0, emu->spdif_bits[0], 191 SPCS1, emu->spdif_bits[1], 192 SPCS2, emu->spdif_bits[2], 193 REGLIST_END); 194 195 if (emu->card_capabilities->emu_model) { 196 } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 197 /* Hacks for Alice3 to work independent of haP16V driver */ 198 /* Setup SRCMulti_I2S SamplingRate */ 199 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 200 201 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 202 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 203 /* Setup SRCMulti Input Audio Enable */ 204 /* Use 0xFFFFFFFF to enable P16V sounds. */ 205 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 206 207 /* Enabled Phased (8-channel) P16V playback */ 208 outl(0x0201, emu->port + HCFG2); 209 /* Set playback routing. */ 210 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 211 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 212 /* Hacks for Alice3 to work independent of haP16V driver */ 213 dev_info(emu->card->dev, "Audigy2 value: Special config.\n"); 214 /* Setup SRCMulti_I2S SamplingRate */ 215 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 216 217 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 218 snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14); 219 220 /* Setup SRCMulti Input Audio Enable */ 221 snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000); 222 223 /* Setup SPDIF Out Audio Enable */ 224 /* The Audigy 2 Value has a separate SPDIF out, 225 * so no need for a mixer switch 226 */ 227 snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000); 228 229 tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 230 outw(tmp, emu->port + A_IOCFG); 231 } 232 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 233 int size, n; 234 235 size = ARRAY_SIZE(spi_dac_init); 236 for (n = 0; n < size; n++) 237 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 238 239 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 240 /* Enable GPIOs 241 * GPIO0: Unknown 242 * GPIO1: Speakers-enabled. 243 * GPIO2: Unknown 244 * GPIO3: Unknown 245 * GPIO4: IEC958 Output on. 246 * GPIO5: Unknown 247 * GPIO6: Unknown 248 * GPIO7: Unknown 249 */ 250 outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 251 } 252 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 253 int size, n; 254 255 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 256 tmp = inw(emu->port + A_IOCFG); 257 outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 258 tmp = inw(emu->port + A_IOCFG); 259 size = ARRAY_SIZE(i2c_adc_init); 260 for (n = 0; n < size; n++) 261 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 262 for (n = 0; n < 4; n++) { 263 emu->i2c_capture_volume[n][0] = 0xcf; 264 emu->i2c_capture_volume[n][1] = 0xcf; 265 } 266 } 267 268 269 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 270 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 271 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */ 272 273 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); 274 for (ch = 0; ch < NUM_G; ch++) { 275 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 276 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 277 } 278 279 if (emu->card_capabilities->emu_model) { 280 outl(HCFG_AUTOMUTE_ASYNC | 281 HCFG_EMU32_SLAVE | 282 HCFG_AUDIOENABLE, emu->port + HCFG); 283 /* 284 * Hokay, setup HCFG 285 * Mute Disable Audio = 0 286 * Lock Tank Memory = 1 287 * Lock Sound Memory = 0 288 * Auto Mute = 1 289 */ 290 } else if (emu->audigy) { 291 if (emu->revision == 4) /* audigy2 */ 292 outl(HCFG_AUDIOENABLE | 293 HCFG_AC3ENABLE_CDSPDIF | 294 HCFG_AC3ENABLE_GPSPDIF | 295 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 296 else 297 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 298 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, 299 * e.g. card_capabilities->joystick */ 300 } else if (emu->model == 0x20 || 301 emu->model == 0xc400 || 302 (emu->model == 0x21 && emu->revision < 6)) 303 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 304 else 305 /* With on-chip joystick */ 306 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 307 308 if (enable_ir) { /* enable IR for SB Live */ 309 if (emu->card_capabilities->emu_model) { 310 ; /* Disable all access to A_IOCFG for the emu1010 */ 311 } else if (emu->card_capabilities->i2c_adc) { 312 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 313 } else if (emu->audigy) { 314 u16 reg = inw(emu->port + A_IOCFG); 315 outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 316 udelay(500); 317 outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 318 udelay(100); 319 outw(reg, emu->port + A_IOCFG); 320 } else { 321 unsigned int reg = inl(emu->port + HCFG); 322 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 323 udelay(500); 324 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 325 udelay(100); 326 outl(reg, emu->port + HCFG); 327 } 328 } 329 330 if (emu->card_capabilities->emu_model) { 331 ; /* Disable all access to A_IOCFG for the emu1010 */ 332 } else if (emu->card_capabilities->i2c_adc) { 333 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 334 } else if (emu->audigy) { /* enable analog output */ 335 u16 reg = inw(emu->port + A_IOCFG); 336 outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 337 } 338 339 if (emu->address_mode == 0) { 340 /* use 16M in 4G */ 341 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG); 342 } 343 344 return 0; 345 } 346 347 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 348 { 349 /* 350 * Enable the audio bit 351 */ 352 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 353 354 /* Enable analog/digital outs on audigy */ 355 if (emu->card_capabilities->emu_model) { 356 ; /* Disable all access to A_IOCFG for the emu1010 */ 357 } else if (emu->card_capabilities->i2c_adc) { 358 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 359 } else if (emu->audigy) { 360 outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 361 362 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 363 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 364 * This has to be done after init ALice3 I2SOut beyond 48KHz. 365 * So, sequence is important. */ 366 outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 367 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 368 /* Unmute Analog now. */ 369 outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 370 } else { 371 /* Disable routing from AC97 line out to Front speakers */ 372 outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 373 } 374 } 375 376 #if 0 377 { 378 unsigned int tmp; 379 /* FIXME: the following routine disables LiveDrive-II !! */ 380 /* TOSLink detection */ 381 emu->tos_link = 0; 382 tmp = inl(emu->port + HCFG); 383 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 384 outl(tmp|0x800, emu->port + HCFG); 385 udelay(50); 386 if (tmp != (inl(emu->port + HCFG) & ~0x800)) { 387 emu->tos_link = 1; 388 outl(tmp, emu->port + HCFG); 389 } 390 } 391 } 392 #endif 393 394 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 395 } 396 397 int snd_emu10k1_done(struct snd_emu10k1 *emu) 398 { 399 int ch; 400 401 outl(0, emu->port + INTE); 402 403 /* 404 * Shutdown the voices 405 */ 406 for (ch = 0; ch < NUM_G; ch++) { 407 snd_emu10k1_ptr_write_multiple(emu, ch, 408 DCYSUSV, 0, 409 VTFT, 0, 410 CVCF, 0, 411 PTRX, 0, 412 CPF, 0, 413 REGLIST_END); 414 } 415 416 // stop the DSP 417 if (emu->audigy) 418 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 419 else 420 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 421 422 snd_emu10k1_ptr_write_multiple(emu, 0, 423 /* reset recording buffers */ 424 MICBS, 0, 425 MICBA, 0, 426 FXBS, 0, 427 FXBA, 0, 428 FXWC, 0, 429 ADCBS, ADCBS_BUFSIZE_NONE, 430 ADCBA, 0, 431 TCBS, TCBS_BUFFSIZE_16K, 432 TCB, 0, 433 434 /* disable channel interrupt */ 435 CLIEL, 0, 436 CLIEH, 0, 437 SOLEL, 0, 438 SOLEH, 0, 439 440 PTB, 0, 441 442 REGLIST_END); 443 444 /* disable audio and lock cache */ 445 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 446 447 return 0; 448 } 449 450 /************************************************************************* 451 * ECARD functional implementation 452 *************************************************************************/ 453 454 /* In A1 Silicon, these bits are in the HC register */ 455 #define HOOKN_BIT (1L << 12) 456 #define HANDN_BIT (1L << 11) 457 #define PULSEN_BIT (1L << 10) 458 459 #define EC_GDI1 (1 << 13) 460 #define EC_GDI0 (1 << 14) 461 462 #define EC_NUM_CONTROL_BITS 20 463 464 #define EC_AC3_DATA_SELN 0x0001L 465 #define EC_EE_DATA_SEL 0x0002L 466 #define EC_EE_CNTRL_SELN 0x0004L 467 #define EC_EECLK 0x0008L 468 #define EC_EECS 0x0010L 469 #define EC_EESDO 0x0020L 470 #define EC_TRIM_CSN 0x0040L 471 #define EC_TRIM_SCLK 0x0080L 472 #define EC_TRIM_SDATA 0x0100L 473 #define EC_TRIM_MUTEN 0x0200L 474 #define EC_ADCCAL 0x0400L 475 #define EC_ADCRSTN 0x0800L 476 #define EC_DACCAL 0x1000L 477 #define EC_DACMUTEN 0x2000L 478 #define EC_LEDN 0x4000L 479 480 #define EC_SPDIF0_SEL_SHIFT 15 481 #define EC_SPDIF1_SEL_SHIFT 17 482 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 483 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 484 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 485 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 486 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 487 * be incremented any time the EEPROM's 488 * format is changed. */ 489 490 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 491 492 /* Addresses for special values stored in to EEPROM */ 493 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 494 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 495 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 496 497 #define EC_LAST_PROMFILE_ADDR 0x2f 498 499 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 500 * can be up to 30 characters in length 501 * and is stored as a NULL-terminated 502 * ASCII string. Any unused bytes must be 503 * filled with zeros */ 504 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 505 506 507 /* Most of this stuff is pretty self-evident. According to the hardware 508 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 509 * offset problem. Weird. 510 */ 511 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 512 EC_TRIM_CSN) 513 514 515 #define EC_DEFAULT_ADC_GAIN 0xC4C4 516 #define EC_DEFAULT_SPDIF0_SEL 0x0 517 #define EC_DEFAULT_SPDIF1_SEL 0x4 518 519 /************************************************************************** 520 * @func Clock bits into the Ecard's control latch. The Ecard uses a 521 * control latch will is loaded bit-serially by toggling the Modem control 522 * lines from function 2 on the E8010. This function hides these details 523 * and presents the illusion that we are actually writing to a distinct 524 * register. 525 */ 526 527 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) 528 { 529 unsigned short count; 530 unsigned int data; 531 unsigned long hc_port; 532 unsigned int hc_value; 533 534 hc_port = emu->port + HCFG; 535 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 536 outl(hc_value, hc_port); 537 538 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 539 540 /* Set up the value */ 541 data = ((value & 0x1) ? PULSEN_BIT : 0); 542 value >>= 1; 543 544 outl(hc_value | data, hc_port); 545 546 /* Clock the shift register */ 547 outl(hc_value | data | HANDN_BIT, hc_port); 548 outl(hc_value | data, hc_port); 549 } 550 551 /* Latch the bits */ 552 outl(hc_value | HOOKN_BIT, hc_port); 553 outl(hc_value, hc_port); 554 } 555 556 /************************************************************************** 557 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 558 * trim value consists of a 16bit value which is composed of two 559 * 8 bit gain/trim values, one for the left channel and one for the 560 * right channel. The following table maps from the Gain/Attenuation 561 * value in decibels into the corresponding bit pattern for a single 562 * channel. 563 */ 564 565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, 566 unsigned short gain) 567 { 568 unsigned int bit; 569 570 /* Enable writing to the TRIM registers */ 571 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 572 573 /* Do it again to insure that we meet hold time requirements */ 574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 575 576 for (bit = (1 << 15); bit; bit >>= 1) { 577 unsigned int value; 578 579 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 580 581 if (gain & bit) 582 value |= EC_TRIM_SDATA; 583 584 /* Clock the bit */ 585 snd_emu10k1_ecard_write(emu, value); 586 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 587 snd_emu10k1_ecard_write(emu, value); 588 } 589 590 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 591 } 592 593 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) 594 { 595 unsigned int hc_value; 596 597 /* Set up the initial settings */ 598 emu->ecard_ctrl = EC_RAW_RUN_MODE | 599 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 600 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 601 602 /* Step 0: Set the codec type in the hardware control register 603 * and enable audio output */ 604 hc_value = inl(emu->port + HCFG); 605 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 606 inl(emu->port + HCFG); 607 608 /* Step 1: Turn off the led and deassert TRIM_CS */ 609 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 610 611 /* Step 2: Calibrate the ADC and DAC */ 612 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 613 614 /* Step 3: Wait for awhile; XXX We can't get away with this 615 * under a real operating system; we'll need to block and wait that 616 * way. */ 617 snd_emu10k1_wait(emu, 48000); 618 619 /* Step 4: Switch off the DAC and ADC calibration. Note 620 * That ADC_CAL is actually an inverted signal, so we assert 621 * it here to stop calibration. */ 622 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 623 624 /* Step 4: Switch into run mode */ 625 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 626 627 /* Step 5: Set the analog input gain */ 628 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 629 630 return 0; 631 } 632 633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) 634 { 635 unsigned long special_port; 636 __always_unused unsigned int value; 637 638 /* Special initialisation routine 639 * before the rest of the IO-Ports become active. 640 */ 641 special_port = emu->port + 0x38; 642 value = inl(special_port); 643 outl(0x00d00000, special_port); 644 value = inl(special_port); 645 outl(0x00d00001, special_port); 646 value = inl(special_port); 647 outl(0x00d0005f, special_port); 648 value = inl(special_port); 649 outl(0x00d0007f, special_port); 650 value = inl(special_port); 651 outl(0x0090007f, special_port); 652 value = inl(special_port); 653 654 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 655 /* Delay to give time for ADC chip to switch on. It needs 113ms */ 656 msleep(200); 657 return 0; 658 } 659 660 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu, 661 const struct firmware *fw_entry) 662 { 663 int n, i; 664 u16 reg; 665 u8 value; 666 __always_unused u16 write_post; 667 unsigned long flags; 668 669 if (!fw_entry) 670 return -EIO; 671 672 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 673 /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */ 674 /* GPIO7 -> FPGA PGMN 675 * GPIO6 -> FPGA CCLK 676 * GPIO5 -> FPGA DIN 677 * FPGA CONFIG OFF -> FPGA PGMN 678 */ 679 spin_lock_irqsave(&emu->emu_lock, flags); 680 outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */ 681 write_post = inw(emu->port + A_GPIO); 682 udelay(100); 683 outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */ 684 write_post = inw(emu->port + A_GPIO); 685 udelay(100); /* Allow FPGA memory to clean */ 686 for (n = 0; n < fw_entry->size; n++) { 687 value = fw_entry->data[n]; 688 for (i = 0; i < 8; i++) { 689 reg = 0x80; 690 if (value & 0x1) 691 reg = reg | 0x20; 692 value = value >> 1; 693 outw(reg, emu->port + A_GPIO); 694 write_post = inw(emu->port + A_GPIO); 695 outw(reg | 0x40, emu->port + A_GPIO); 696 write_post = inw(emu->port + A_GPIO); 697 } 698 } 699 /* After programming, set GPIO bit 4 high again. */ 700 outw(0x10, emu->port + A_GPIO); 701 write_post = inw(emu->port + A_GPIO); 702 spin_unlock_irqrestore(&emu->emu_lock, flags); 703 704 return 0; 705 } 706 707 /* firmware file names, per model, init-fw and dock-fw (optional) */ 708 static const char * const firmware_names[5][2] = { 709 [EMU_MODEL_EMU1010] = { 710 HANA_FILENAME, DOCK_FILENAME 711 }, 712 [EMU_MODEL_EMU1010B] = { 713 EMU1010B_FILENAME, MICRO_DOCK_FILENAME 714 }, 715 [EMU_MODEL_EMU1616] = { 716 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME 717 }, 718 [EMU_MODEL_EMU0404] = { 719 EMU0404_FILENAME, NULL 720 }, 721 }; 722 723 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock, 724 const struct firmware **fw) 725 { 726 const char *filename; 727 int err; 728 729 if (!*fw) { 730 filename = firmware_names[emu->card_capabilities->emu_model][dock]; 731 if (!filename) 732 return 0; 733 err = request_firmware(fw, filename, &emu->pci->dev); 734 if (err) 735 return err; 736 } 737 738 return snd_emu1010_load_firmware_entry(emu, *fw); 739 } 740 741 static void emu1010_firmware_work(struct work_struct *work) 742 { 743 struct snd_emu10k1 *emu; 744 u32 tmp, tmp2, reg; 745 int err; 746 747 emu = container_of(work, struct snd_emu10k1, 748 emu1010.firmware_work.work); 749 if (emu->card->shutdown) 750 return; 751 #ifdef CONFIG_PM_SLEEP 752 if (emu->suspend) 753 return; 754 #endif 755 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */ 756 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ 757 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { 758 /* Audio Dock attached */ 759 /* Return to Audio Dock programming mode */ 760 dev_info(emu->card->dev, 761 "emu1010: Loading Audio Dock Firmware\n"); 762 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 763 EMU_HANA_FPGA_CONFIG_AUDIODOCK); 764 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw); 765 if (err < 0) 766 goto next; 767 768 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); 769 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); 770 dev_info(emu->card->dev, 771 "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", tmp); 772 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 773 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp); 774 dev_info(emu->card->dev, 775 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp); 776 if ((tmp & 0x1f) != 0x15) { 777 /* FPGA failed to be programmed */ 778 dev_info(emu->card->dev, 779 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", 780 tmp); 781 goto next; 782 } 783 dev_info(emu->card->dev, 784 "emu1010: Audio Dock Firmware loaded\n"); 785 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); 786 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); 787 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2); 788 /* Sync clocking between 1010 and Dock */ 789 /* Allow DLL to settle */ 790 msleep(10); 791 /* Unmute all. Default is muted after a firmware load */ 792 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 793 } else if (!reg && emu->emu1010.last_reg) { 794 /* Audio Dock removed */ 795 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n"); 796 /* The hardware auto-mutes all, so we unmute again */ 797 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 798 } 799 800 next: 801 emu->emu1010.last_reg = reg; 802 if (!emu->card->shutdown) 803 schedule_delayed_work(&emu->emu1010.firmware_work, 804 msecs_to_jiffies(1000)); 805 } 806 807 /* 808 * Current status of the driver: 809 * ---------------------------- 810 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 811 * * PCM device nb. 2: 812 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 813 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 814 */ 815 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) 816 { 817 u32 tmp, tmp2, reg; 818 int err; 819 820 dev_info(emu->card->dev, "emu1010: Special config.\n"); 821 822 /* Mute, and disable audio and lock cache, just in case. 823 * Proper init follows in snd_emu10k1_init(). */ 824 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG); 825 826 /* Disable 48Volt power to Audio Dock */ 827 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 828 829 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 830 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 831 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg); 832 if ((reg & 0x3f) == 0x15) { 833 /* FPGA netlist already present so clear it */ 834 /* Return to programming mode */ 835 836 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA); 837 } 838 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 839 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg); 840 if ((reg & 0x3f) == 0x15) { 841 /* FPGA failed to return to programming mode */ 842 dev_info(emu->card->dev, 843 "emu1010: FPGA failed to return to programming mode\n"); 844 return -ENODEV; 845 } 846 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg); 847 848 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware); 849 if (err < 0) { 850 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n"); 851 return err; 852 } 853 854 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 855 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 856 if ((reg & 0x3f) != 0x15) { 857 /* FPGA failed to be programmed */ 858 dev_info(emu->card->dev, 859 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", 860 reg); 861 return -ENODEV; 862 } 863 864 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n"); 865 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); 866 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); 867 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2); 868 /* Enable 48Volt power to Audio Dock */ 869 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); 870 871 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 872 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg); 873 if (emu->card_capabilities->no_adat) { 874 emu->emu1010.optical_in = 0; /* IN_SPDIF */ 875 emu->emu1010.optical_out = 0; /* OUT_SPDIF */ 876 } else { 877 /* Optical -> ADAT I/O */ 878 emu->emu1010.optical_in = 1; /* IN_ADAT */ 879 emu->emu1010.optical_out = 1; /* OUT_ADAT */ 880 } 881 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 882 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 883 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 884 /* Set no attenuation on Audio Dock pads. */ 885 emu->emu1010.adc_pads = 0x00; 886 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads); 887 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 888 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4); 889 /* DAC PADs. */ 890 emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 | 891 EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4; 892 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads); 893 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 894 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID); 895 /* MIDI routing */ 896 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2); 897 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2); 898 /* IRQ Enable: All on */ 899 /* snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x0f); */ 900 /* IRQ Enable: All off */ 901 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00); 902 903 emu->emu1010.internal_clock = 1; /* 48000 */ 904 /* Default WCLK set to 48kHz. */ 905 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K); 906 /* Word Clock source, Internal 48kHz x1 */ 907 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 908 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 909 /* Audio Dock LEDs. */ 910 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, EMU_HANA_DOCK_LEDS_2_LOCK | EMU_HANA_DOCK_LEDS_2_48K); 911 912 // The routes are all set to EMU_SRC_SILENCE due to the reset, 913 // so it is safe to simply enable the outputs. 914 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 915 916 return 0; 917 } 918 /* 919 * Create the EMU10K1 instance 920 */ 921 922 #ifdef CONFIG_PM_SLEEP 923 static int alloc_pm_buffer(struct snd_emu10k1 *emu); 924 static void free_pm_buffer(struct snd_emu10k1 *emu); 925 #endif 926 927 static void snd_emu10k1_free(struct snd_card *card) 928 { 929 struct snd_emu10k1 *emu = card->private_data; 930 931 if (emu->port) { /* avoid access to already used hardware */ 932 snd_emu10k1_fx8010_tram_setup(emu, 0); 933 snd_emu10k1_done(emu); 934 snd_emu10k1_free_efx(emu); 935 } 936 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { 937 /* Disable 48Volt power to Audio Dock */ 938 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 939 } 940 cancel_delayed_work_sync(&emu->emu1010.firmware_work); 941 release_firmware(emu->firmware); 942 release_firmware(emu->dock_fw); 943 snd_util_memhdr_free(emu->memhdr); 944 if (emu->silent_page.area) 945 snd_dma_free_pages(&emu->silent_page); 946 if (emu->ptb_pages.area) 947 snd_dma_free_pages(&emu->ptb_pages); 948 vfree(emu->page_ptr_table); 949 vfree(emu->page_addr_table); 950 #ifdef CONFIG_PM_SLEEP 951 free_pm_buffer(emu); 952 #endif 953 } 954 955 static const struct snd_emu_chip_details emu_chip_details[] = { 956 /* Audigy 5/Rx SB1550 */ 957 /* Tested by michael@gernoth.net 28 Mar 2015 */ 958 /* DSP: CA10300-IAT LF 959 * DAC: Cirrus Logic CS4382-KQZ 960 * ADC: Philips 1361T 961 * AC97: Sigmatel STAC9750 962 * CA0151: None 963 */ 964 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102, 965 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]", 966 .id = "Audigy2", 967 .emu10k2_chip = 1, 968 .ca0108_chip = 1, 969 .spk71 = 1, 970 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 971 .ac97_chip = 1}, 972 /* Audigy4 (Not PRO) SB0610 */ 973 /* Tested by James@superbug.co.uk 4th April 2006 */ 974 /* A_IOCFG bits 975 * Output 976 * 0: ? 977 * 1: ? 978 * 2: ? 979 * 3: 0 - Digital Out, 1 - Line in 980 * 4: ? 981 * 5: ? 982 * 6: ? 983 * 7: ? 984 * Input 985 * 8: ? 986 * 9: ? 987 * A: Green jack sense (Front) 988 * B: ? 989 * C: Black jack sense (Rear/Side Right) 990 * D: Yellow jack sense (Center/LFE/Side Left) 991 * E: ? 992 * F: ? 993 * 994 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 995 * 0 - Digital Out 996 * 1 - Line in 997 */ 998 /* Mic input not tested. 999 * Analog CD input not tested 1000 * Digital Out not tested. 1001 * Line in working. 1002 * Audio output 5.1 working. Side outputs not working. 1003 */ 1004 /* DSP: CA10300-IAT LF 1005 * DAC: Cirrus Logic CS4382-KQZ 1006 * ADC: Philips 1361T 1007 * AC97: Sigmatel STAC9750 1008 * CA0151: None 1009 */ 1010 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 1011 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", 1012 .id = "Audigy2", 1013 .emu10k2_chip = 1, 1014 .ca0108_chip = 1, 1015 .spk71 = 1, 1016 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1017 .ac97_chip = 1} , 1018 /* Audigy 2 Value AC3 out does not work yet. 1019 * Need to find out how to turn off interpolators. 1020 */ 1021 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1022 /* DSP: CA0108-IAT 1023 * DAC: CS4382-KQ 1024 * ADC: Philips 1361T 1025 * AC97: STAC9750 1026 * CA0151: None 1027 */ 1028 /* 1029 * A_IOCFG Input (GPIO) 1030 * 0x400 = Front analog jack plugged in. (Green socket) 1031 * 0x1000 = Rear analog jack plugged in. (Black socket) 1032 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket) 1033 * A_IOCFG Output (GPIO) 1034 * 0x60 = Sound out of front Left. 1035 * Win sets it to 0xXX61 1036 */ 1037 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1038 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", 1039 .id = "Audigy2", 1040 .emu10k2_chip = 1, 1041 .ca0108_chip = 1, 1042 .spk71 = 1, 1043 .ac97_chip = 1} , 1044 /* Audigy 2 ZS Notebook Cardbus card.*/ 1045 /* Tested by James@superbug.co.uk 6th November 2006 */ 1046 /* Audio output 7.1/Headphones working. 1047 * Digital output working. (AC3 not checked, only PCM) 1048 * Audio Mic/Line inputs working. 1049 * Digital input not tested. 1050 */ 1051 /* DSP: Tina2 1052 * DAC: Wolfson WM8768/WM8568 1053 * ADC: Wolfson WM8775 1054 * AC97: None 1055 * CA0151: None 1056 */ 1057 /* Tested by James@superbug.co.uk 4th April 2006 */ 1058 /* A_IOCFG bits 1059 * Output 1060 * 0: Not Used 1061 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1062 * 2: Analog input 0 = line in, 1 = mic in 1063 * 3: Not Used 1064 * 4: Digital output 0 = off, 1 = on. 1065 * 5: Not Used 1066 * 6: Not Used 1067 * 7: Not Used 1068 * Input 1069 * All bits 1 (0x3fxx) means nothing plugged in. 1070 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1071 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1072 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1073 * E-F: Always 0 1074 * 1075 */ 1076 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1077 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", 1078 .id = "Audigy2", 1079 .emu10k2_chip = 1, 1080 .ca0108_chip = 1, 1081 .ca_cardbus_chip = 1, 1082 .spi_dac = 1, 1083 .i2c_adc = 1, 1084 .spk71 = 1} , 1085 /* This is MAEM8950 "Mana" */ 1086 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */ 1087 /* Does NOT support sync daughter card (obviously). */ 1088 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1089 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1090 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]", 1091 .id = "EMU1010", 1092 .emu10k2_chip = 1, 1093 .ca0108_chip = 1, 1094 .ca_cardbus_chip = 1, 1095 .spk71 = 1 , 1096 .emu_model = EMU_MODEL_EMU1616}, 1097 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1098 /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */ 1099 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1100 * MicroDock[M] to make it an E-MU 1616[m]. */ 1101 /* Does NOT support sync daughter card. */ 1102 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1103 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]", 1104 .id = "EMU1010", 1105 .emu10k2_chip = 1, 1106 .ca0108_chip = 1, 1107 .spk71 = 1, 1108 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ 1109 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ 1110 /* This is MAEM8986, 0202 is MAEM8980 */ 1111 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1112 * MicroDockM to make it an E-MU 1616m. The non-m 1113 * version was never sold with this card, but should 1114 * still work. */ 1115 /* Does NOT support sync daughter card. */ 1116 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, 1117 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]", 1118 .id = "EMU1010", 1119 .emu10k2_chip = 1, 1120 .ca0108_chip = 1, 1121 .spk71 = 1, 1122 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ 1123 /* Tested by James@superbug.co.uk 8th July 2005. */ 1124 /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */ 1125 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an 1126 * AudioDock[M] to make it an E-MU 1820[m]. */ 1127 /* Supports sync daughter card. */ 1128 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1129 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]", 1130 .id = "EMU1010", 1131 .emu10k2_chip = 1, 1132 .ca0102_chip = 1, 1133 .spk71 = 1, 1134 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ 1135 /* This is MAEM8852 "HanaLiteLite" */ 1136 /* Supports sync daughter card. */ 1137 /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */ 1138 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, 1139 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]", 1140 .id = "EMU0404", 1141 .emu10k2_chip = 1, 1142 .ca0108_chip = 1, 1143 .spk20 = 1, 1144 .no_adat = 1, 1145 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ 1146 /* This is MAEM8850 "HanaLite" */ 1147 /* Supports sync daughter card. */ 1148 /* Tested by James@superbug.co.uk 20-3-2007. */ 1149 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, 1150 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]", 1151 .id = "EMU0404", 1152 .emu10k2_chip = 1, 1153 .ca0102_chip = 1, 1154 .spk20 = 1, 1155 .no_adat = 1, 1156 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ 1157 /* EMU0404 PCIe */ 1158 /* Does NOT support sync daughter card. */ 1159 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, 1160 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]", 1161 .id = "EMU0404", 1162 .emu10k2_chip = 1, 1163 .ca0108_chip = 1, 1164 .spk20 = 1, 1165 .no_adat = 1, 1166 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ 1167 {.vendor = 0x1102, .device = 0x0008, 1168 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", 1169 .id = "Audigy2", 1170 .emu10k2_chip = 1, 1171 .ca0108_chip = 1, 1172 .ac97_chip = 1} , 1173 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1174 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1175 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", 1176 .id = "Audigy2", 1177 .emu10k2_chip = 1, 1178 .ca0102_chip = 1, 1179 .ca0151_chip = 1, 1180 .spk71 = 1, 1181 .spdif_bug = 1, 1182 .ac97_chip = 1} , 1183 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1184 /* The 0x20061102 does have SB0350 written on it 1185 * Just like 0x20021102 1186 */ 1187 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1188 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", 1189 .id = "Audigy2", 1190 .emu10k2_chip = 1, 1191 .ca0102_chip = 1, 1192 .ca0151_chip = 1, 1193 .spk71 = 1, 1194 .spdif_bug = 1, 1195 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1196 .ac97_chip = 1} , 1197 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by 1198 Creative's Windows driver */ 1199 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, 1200 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]", 1201 .id = "Audigy2", 1202 .emu10k2_chip = 1, 1203 .ca0102_chip = 1, 1204 .ca0151_chip = 1, 1205 .spk71 = 1, 1206 .spdif_bug = 1, 1207 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1208 .ac97_chip = 1} , 1209 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1210 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", 1211 .id = "Audigy2", 1212 .emu10k2_chip = 1, 1213 .ca0102_chip = 1, 1214 .ca0151_chip = 1, 1215 .spk71 = 1, 1216 .spdif_bug = 1, 1217 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1218 .ac97_chip = 1} , 1219 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1220 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", 1221 .id = "Audigy2", 1222 .emu10k2_chip = 1, 1223 .ca0102_chip = 1, 1224 .ca0151_chip = 1, 1225 .spk71 = 1, 1226 .spdif_bug = 1, 1227 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1228 .ac97_chip = 1} , 1229 /* Audigy 2 */ 1230 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1231 /* DSP: CA0102-IAT 1232 * DAC: CS4382-KQ 1233 * ADC: Philips 1361T 1234 * AC97: STAC9721 1235 * CA0151: Yes 1236 */ 1237 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1238 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", 1239 .id = "Audigy2", 1240 .emu10k2_chip = 1, 1241 .ca0102_chip = 1, 1242 .ca0151_chip = 1, 1243 .spk71 = 1, 1244 .spdif_bug = 1, 1245 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1246 .ac97_chip = 1} , 1247 /* Audigy 2 Platinum EX */ 1248 /* Win driver sets A_IOCFG output to 0x1c00 */ 1249 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1250 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]", 1251 .id = "Audigy2", 1252 .emu10k2_chip = 1, 1253 .ca0102_chip = 1, 1254 .ca0151_chip = 1, 1255 .spk71 = 1, 1256 .spdif_bug = 1} , 1257 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1258 /* See ALSA bug#1365 */ 1259 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1260 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", 1261 .id = "Audigy2", 1262 .emu10k2_chip = 1, 1263 .ca0102_chip = 1, 1264 .ca0151_chip = 1, 1265 .spk71 = 1, 1266 .spdif_bug = 1, 1267 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1268 .ac97_chip = 1} , 1269 /* Audigy 2 Platinum */ 1270 /* Win driver sets A_IOCFG output to 0xa00 */ 1271 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1272 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", 1273 .id = "Audigy2", 1274 .emu10k2_chip = 1, 1275 .ca0102_chip = 1, 1276 .ca0151_chip = 1, 1277 .spk71 = 1, 1278 .spdif_bug = 1, 1279 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1280 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1281 .ac97_chip = 1} , 1282 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1283 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", 1284 .id = "Audigy2", 1285 .emu10k2_chip = 1, 1286 .ca0102_chip = 1, 1287 .ca0151_chip = 1, 1288 .spdif_bug = 1, 1289 .ac97_chip = 1} , 1290 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1291 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", 1292 .id = "Audigy", 1293 .emu10k2_chip = 1, 1294 .ca0102_chip = 1, 1295 .ac97_chip = 1} , 1296 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1297 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", 1298 .id = "Audigy", 1299 .emu10k2_chip = 1, 1300 .ca0102_chip = 1, 1301 .spdif_bug = 1, 1302 .ac97_chip = 1} , 1303 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1304 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", 1305 .id = "Audigy", 1306 .emu10k2_chip = 1, 1307 .ca0102_chip = 1, 1308 .ac97_chip = 1} , 1309 {.vendor = 0x1102, .device = 0x0004, 1310 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1311 .id = "Audigy", 1312 .emu10k2_chip = 1, 1313 .ca0102_chip = 1, 1314 .ac97_chip = 1} , 1315 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1316 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1317 .id = "Live", 1318 .emu10k1_chip = 1, 1319 .ac97_chip = 1, 1320 .sblive51 = 1} , 1321 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, 1322 .driver = "EMU10K1", .name = "SB Live! [SB0105]", 1323 .id = "Live", 1324 .emu10k1_chip = 1, 1325 .ac97_chip = 1, 1326 .sblive51 = 1} , 1327 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, 1328 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", 1329 .id = "Live", 1330 .emu10k1_chip = 1, 1331 .ac97_chip = 1, 1332 .sblive51 = 1} , 1333 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1334 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", 1335 .id = "Live", 1336 .emu10k1_chip = 1, 1337 .ac97_chip = 1, 1338 .sblive51 = 1} , 1339 /* Tested by ALSA bug#1680 26th December 2005 */ 1340 /* note: It really has SB0220 written on the card, */ 1341 /* but it's SB0228 according to kx.inf */ 1342 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1343 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", 1344 .id = "Live", 1345 .emu10k1_chip = 1, 1346 .ac97_chip = 1, 1347 .sblive51 = 1} , 1348 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1349 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1350 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1351 .id = "Live", 1352 .emu10k1_chip = 1, 1353 .ac97_chip = 1, 1354 .sblive51 = 1} , 1355 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1356 .driver = "EMU10K1", .name = "SB Live! 5.1", 1357 .id = "Live", 1358 .emu10k1_chip = 1, 1359 .ac97_chip = 1, 1360 .sblive51 = 1} , 1361 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1362 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1363 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", 1364 .id = "Live", 1365 .emu10k1_chip = 1, 1366 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1367 * share the same IDs! 1368 */ 1369 .sblive51 = 1} , 1370 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1371 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", 1372 .id = "Live", 1373 .emu10k1_chip = 1, 1374 .ac97_chip = 1, 1375 .sblive51 = 1} , 1376 /* SB Live! Platinum */ 1377 /* Win driver sets A_IOCFG output to 0 */ 1378 /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */ 1379 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1380 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", 1381 .id = "Live", 1382 .emu10k1_chip = 1, 1383 .ac97_chip = 1} , 1384 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1385 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", 1386 .id = "Live", 1387 .emu10k1_chip = 1, 1388 .ac97_chip = 1, 1389 .sblive51 = 1} , 1390 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1391 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", 1392 .id = "Live", 1393 .emu10k1_chip = 1, 1394 .ac97_chip = 1, 1395 .sblive51 = 1} , 1396 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1397 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", 1398 .id = "Live", 1399 .emu10k1_chip = 1, 1400 .ac97_chip = 1, 1401 .sblive51 = 1} , 1402 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1403 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1404 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", 1405 .id = "Live", 1406 .emu10k1_chip = 1, 1407 .ac97_chip = 1, 1408 .sblive51 = 1} , 1409 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1410 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", 1411 .id = "Live", 1412 .emu10k1_chip = 1, 1413 .ac97_chip = 1, 1414 .sblive51 = 1} , 1415 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1416 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1417 .id = "Live", 1418 .emu10k1_chip = 1, 1419 .ac97_chip = 1, 1420 .sblive51 = 1} , 1421 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1422 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", 1423 .id = "Live", 1424 .emu10k1_chip = 1, 1425 .ac97_chip = 1, 1426 .sblive51 = 1} , 1427 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1428 .driver = "EMU10K1", .name = "E-MU APS [PC545]", 1429 .id = "APS", 1430 .emu10k1_chip = 1, 1431 .ecard = 1} , 1432 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1433 .driver = "EMU10K1", .name = "SB Live! [CT4620]", 1434 .id = "Live", 1435 .emu10k1_chip = 1, 1436 .ac97_chip = 1, 1437 .sblive51 = 1} , 1438 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1439 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", 1440 .id = "Live", 1441 .emu10k1_chip = 1, 1442 .ac97_chip = 1, 1443 .sblive51 = 1} , 1444 {.vendor = 0x1102, .device = 0x0002, 1445 .driver = "EMU10K1", .name = "SB Live! [Unknown]", 1446 .id = "Live", 1447 .emu10k1_chip = 1, 1448 .ac97_chip = 1, 1449 .sblive51 = 1} , 1450 { } /* terminator */ 1451 }; 1452 1453 /* 1454 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too) 1455 * has a problem that from time to time it likes to do few DMA reads a bit 1456 * beyond its normal allocation and gets very confused if these reads get 1457 * blocked by a IOMMU. 1458 * 1459 * This behaviour has been observed for the first (reserved) page 1460 * (for which it happens multiple times at every playback), often for various 1461 * synth pages and sometimes for PCM playback buffers and the page table 1462 * memory itself. 1463 * 1464 * As a workaround let's widen these DMA allocations by an extra page if we 1465 * detect that the device is behind a non-passthrough IOMMU. 1466 */ 1467 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu) 1468 { 1469 struct iommu_domain *domain; 1470 1471 emu->iommu_workaround = false; 1472 1473 domain = iommu_get_domain_for_dev(emu->card->dev); 1474 if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY) 1475 return; 1476 1477 dev_notice(emu->card->dev, 1478 "non-passthrough IOMMU detected, widening DMA allocations"); 1479 emu->iommu_workaround = true; 1480 } 1481 1482 int snd_emu10k1_create(struct snd_card *card, 1483 struct pci_dev *pci, 1484 unsigned short extin_mask, 1485 unsigned short extout_mask, 1486 long max_cache_bytes, 1487 int enable_ir, 1488 uint subsystem) 1489 { 1490 struct snd_emu10k1 *emu = card->private_data; 1491 int idx, err; 1492 int is_audigy; 1493 size_t page_table_size; 1494 __le32 *pgtbl; 1495 unsigned int silent_page; 1496 const struct snd_emu_chip_details *c; 1497 1498 /* enable PCI device */ 1499 err = pcim_enable_device(pci); 1500 if (err < 0) 1501 return err; 1502 1503 card->private_free = snd_emu10k1_free; 1504 emu->card = card; 1505 spin_lock_init(&emu->reg_lock); 1506 spin_lock_init(&emu->emu_lock); 1507 spin_lock_init(&emu->spi_lock); 1508 spin_lock_init(&emu->i2c_lock); 1509 spin_lock_init(&emu->voice_lock); 1510 spin_lock_init(&emu->synth_lock); 1511 spin_lock_init(&emu->memblk_lock); 1512 mutex_init(&emu->fx8010.lock); 1513 INIT_LIST_HEAD(&emu->mapped_link_head); 1514 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1515 emu->pci = pci; 1516 emu->irq = -1; 1517 emu->synth = NULL; 1518 emu->get_synth_voice = NULL; 1519 INIT_DELAYED_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work); 1520 /* read revision & serial */ 1521 emu->revision = pci->revision; 1522 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1523 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1524 dev_dbg(card->dev, 1525 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", 1526 pci->vendor, pci->device, emu->serial, emu->model); 1527 1528 for (c = emu_chip_details; c->vendor; c++) { 1529 if (c->vendor == pci->vendor && c->device == pci->device) { 1530 if (subsystem) { 1531 if (c->subsystem && (c->subsystem == subsystem)) 1532 break; 1533 else 1534 continue; 1535 } else { 1536 if (c->subsystem && (c->subsystem != emu->serial)) 1537 continue; 1538 if (c->revision && c->revision != emu->revision) 1539 continue; 1540 } 1541 break; 1542 } 1543 } 1544 if (c->vendor == 0) { 1545 dev_err(card->dev, "emu10k1: Card not recognised\n"); 1546 return -ENOENT; 1547 } 1548 emu->card_capabilities = c; 1549 if (c->subsystem && !subsystem) 1550 dev_dbg(card->dev, "Sound card name = %s\n", c->name); 1551 else if (subsystem) 1552 dev_dbg(card->dev, "Sound card name = %s, " 1553 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " 1554 "Forced to subsystem = 0x%x\n", c->name, 1555 pci->vendor, pci->device, emu->serial, c->subsystem); 1556 else 1557 dev_dbg(card->dev, "Sound card name = %s, " 1558 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", 1559 c->name, pci->vendor, pci->device, 1560 emu->serial); 1561 1562 if (!*card->id && c->id) 1563 strscpy(card->id, c->id, sizeof(card->id)); 1564 1565 is_audigy = emu->audigy = c->emu10k2_chip; 1566 1567 snd_emu10k1_detect_iommu(emu); 1568 1569 /* set addressing mode */ 1570 emu->address_mode = is_audigy ? 0 : 1; 1571 /* set the DMA transfer mask */ 1572 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK; 1573 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) { 1574 dev_err(card->dev, 1575 "architecture does not support PCI busmaster DMA with mask 0x%lx\n", 1576 emu->dma_mask); 1577 return -ENXIO; 1578 } 1579 if (is_audigy) 1580 emu->gpr_base = A_FXGPREGBASE; 1581 else 1582 emu->gpr_base = FXGPREGBASE; 1583 1584 err = pci_request_regions(pci, "EMU10K1"); 1585 if (err < 0) 1586 return err; 1587 emu->port = pci_resource_start(pci, 0); 1588 1589 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1590 1591 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 : 1592 MAXPAGES0); 1593 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size, 1594 &emu->ptb_pages) < 0) 1595 return -ENOMEM; 1596 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n", 1597 (unsigned long)emu->ptb_pages.addr, 1598 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes)); 1599 1600 emu->page_ptr_table = vmalloc(array_size(sizeof(void *), 1601 emu->max_cache_pages)); 1602 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long), 1603 emu->max_cache_pages)); 1604 if (!emu->page_ptr_table || !emu->page_addr_table) 1605 return -ENOMEM; 1606 1607 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE, 1608 &emu->silent_page) < 0) 1609 return -ENOMEM; 1610 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n", 1611 (unsigned long)emu->silent_page.addr, 1612 (unsigned long)(emu->silent_page.addr + 1613 emu->silent_page.bytes)); 1614 1615 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1616 if (!emu->memhdr) 1617 return -ENOMEM; 1618 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1619 sizeof(struct snd_util_memblk); 1620 1621 pci_set_master(pci); 1622 1623 // The masks are not used for Audigy. 1624 // FIXME: these should come from the card_capabilites table. 1625 if (extin_mask == 0) 1626 extin_mask = 0x3fcf; // EXTIN_* 1627 if (extout_mask == 0) 1628 extout_mask = 0x7fff; // EXTOUT_* 1629 emu->fx8010.extin_mask = extin_mask; 1630 emu->fx8010.extout_mask = extout_mask; 1631 emu->enable_ir = enable_ir; 1632 1633 if (emu->card_capabilities->ca_cardbus_chip) { 1634 err = snd_emu10k1_cardbus_init(emu); 1635 if (err < 0) 1636 return err; 1637 } 1638 if (emu->card_capabilities->ecard) { 1639 err = snd_emu10k1_ecard_init(emu); 1640 if (err < 0) 1641 return err; 1642 } else if (emu->card_capabilities->emu_model) { 1643 err = snd_emu10k1_emu1010_init(emu); 1644 if (err < 0) 1645 return err; 1646 } else { 1647 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1648 does not support this, it shouldn't do any harm */ 1649 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, 1650 AC97SLOT_CNTR|AC97SLOT_LFE); 1651 } 1652 1653 /* initialize TRAM setup */ 1654 emu->fx8010.itram_size = (16 * 1024)/2; 1655 emu->fx8010.etram_pages.area = NULL; 1656 emu->fx8010.etram_pages.bytes = 0; 1657 1658 /* irq handler must be registered after I/O ports are activated */ 1659 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt, 1660 IRQF_SHARED, KBUILD_MODNAME, emu)) 1661 return -EBUSY; 1662 emu->irq = pci->irq; 1663 card->sync_irq = emu->irq; 1664 1665 /* 1666 * Init to 0x02109204 : 1667 * Clock accuracy = 0 (1000ppm) 1668 * Sample Rate = 2 (48kHz) 1669 * Audio Channel = 1 (Left of 2) 1670 * Source Number = 0 (Unspecified) 1671 * Generation Status = 1 (Original for Cat Code 12) 1672 * Cat Code = 12 (Digital Signal Mixer) 1673 * Mode = 0 (Mode 0) 1674 * Emphasis = 0 (None) 1675 * CP = 1 (Copyright unasserted) 1676 * AN = 0 (Audio data) 1677 * P = 0 (Consumer) 1678 */ 1679 emu->spdif_bits[0] = emu->spdif_bits[1] = 1680 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1681 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1682 SPCS_GENERATIONSTATUS | 0x00001200 | 1683 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1684 1685 /* Clear silent pages and set up pointers */ 1686 memset(emu->silent_page.area, 0, emu->silent_page.bytes); 1687 silent_page = emu->silent_page.addr << emu->address_mode; 1688 pgtbl = (__le32 *)emu->ptb_pages.area; 1689 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++) 1690 pgtbl[idx] = cpu_to_le32(silent_page | idx); 1691 1692 /* set up voice indices */ 1693 for (idx = 0; idx < NUM_G; idx++) 1694 emu->voices[idx].number = idx; 1695 1696 err = snd_emu10k1_init(emu, enable_ir); 1697 if (err < 0) 1698 return err; 1699 #ifdef CONFIG_PM_SLEEP 1700 err = alloc_pm_buffer(emu); 1701 if (err < 0) 1702 return err; 1703 #endif 1704 1705 /* Initialize the effect engine */ 1706 err = snd_emu10k1_init_efx(emu); 1707 if (err < 0) 1708 return err; 1709 snd_emu10k1_audio_enable(emu); 1710 1711 #ifdef CONFIG_SND_PROC_FS 1712 snd_emu10k1_proc_init(emu); 1713 #endif 1714 return 0; 1715 } 1716 1717 #ifdef CONFIG_PM_SLEEP 1718 static const unsigned char saved_regs[] = { 1719 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 1720 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 1721 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 1722 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 1723 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 1724 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 1725 0xff /* end */ 1726 }; 1727 static const unsigned char saved_regs_audigy[] = { 1728 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC, 1729 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 1730 0xff /* end */ 1731 }; 1732 1733 static int alloc_pm_buffer(struct snd_emu10k1 *emu) 1734 { 1735 int size; 1736 1737 size = ARRAY_SIZE(saved_regs); 1738 if (emu->audigy) 1739 size += ARRAY_SIZE(saved_regs_audigy); 1740 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size)); 1741 if (!emu->saved_ptr) 1742 return -ENOMEM; 1743 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 1744 return -ENOMEM; 1745 if (emu->card_capabilities->ca0151_chip && 1746 snd_p16v_alloc_pm_buffer(emu) < 0) 1747 return -ENOMEM; 1748 return 0; 1749 } 1750 1751 static void free_pm_buffer(struct snd_emu10k1 *emu) 1752 { 1753 vfree(emu->saved_ptr); 1754 snd_emu10k1_efx_free_pm_buffer(emu); 1755 if (emu->card_capabilities->ca0151_chip) 1756 snd_p16v_free_pm_buffer(emu); 1757 } 1758 1759 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 1760 { 1761 int i; 1762 const unsigned char *reg; 1763 unsigned int *val; 1764 1765 val = emu->saved_ptr; 1766 for (reg = saved_regs; *reg != 0xff; reg++) 1767 for (i = 0; i < NUM_G; i++, val++) 1768 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1769 if (emu->audigy) { 1770 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1771 for (i = 0; i < NUM_G; i++, val++) 1772 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1773 } 1774 if (emu->audigy) 1775 emu->saved_a_iocfg = inw(emu->port + A_IOCFG); 1776 emu->saved_hcfg = inl(emu->port + HCFG); 1777 } 1778 1779 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 1780 { 1781 if (emu->card_capabilities->ca_cardbus_chip) 1782 snd_emu10k1_cardbus_init(emu); 1783 if (emu->card_capabilities->ecard) 1784 snd_emu10k1_ecard_init(emu); 1785 else if (emu->card_capabilities->emu_model) 1786 snd_emu10k1_emu1010_init(emu); 1787 else 1788 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1789 snd_emu10k1_init(emu, emu->enable_ir); 1790 } 1791 1792 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 1793 { 1794 int i; 1795 const unsigned char *reg; 1796 unsigned int *val; 1797 1798 snd_emu10k1_audio_enable(emu); 1799 1800 /* resore for spdif */ 1801 if (emu->audigy) 1802 outw(emu->saved_a_iocfg, emu->port + A_IOCFG); 1803 outl(emu->saved_hcfg, emu->port + HCFG); 1804 1805 val = emu->saved_ptr; 1806 for (reg = saved_regs; *reg != 0xff; reg++) 1807 for (i = 0; i < NUM_G; i++, val++) 1808 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1809 if (emu->audigy) { 1810 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1811 for (i = 0; i < NUM_G; i++, val++) 1812 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1813 } 1814 } 1815 #endif 1816