xref: /openbmc/linux/sound/pci/echoaudio/echoaudio_dsp.c (revision dd7b254d8dd3a9528f423ac3bf875e6f0c8da561)
1*dd7b254dSGiuliano Pochini /****************************************************************************
2*dd7b254dSGiuliano Pochini 
3*dd7b254dSGiuliano Pochini    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4*dd7b254dSGiuliano Pochini    All rights reserved
5*dd7b254dSGiuliano Pochini    www.echoaudio.com
6*dd7b254dSGiuliano Pochini 
7*dd7b254dSGiuliano Pochini    This file is part of Echo Digital Audio's generic driver library.
8*dd7b254dSGiuliano Pochini 
9*dd7b254dSGiuliano Pochini    Echo Digital Audio's generic driver library is free software;
10*dd7b254dSGiuliano Pochini    you can redistribute it and/or modify it under the terms of
11*dd7b254dSGiuliano Pochini    the GNU General Public License as published by the Free Software
12*dd7b254dSGiuliano Pochini    Foundation.
13*dd7b254dSGiuliano Pochini 
14*dd7b254dSGiuliano Pochini    This program is distributed in the hope that it will be useful,
15*dd7b254dSGiuliano Pochini    but WITHOUT ANY WARRANTY; without even the implied warranty of
16*dd7b254dSGiuliano Pochini    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*dd7b254dSGiuliano Pochini    GNU General Public License for more details.
18*dd7b254dSGiuliano Pochini 
19*dd7b254dSGiuliano Pochini    You should have received a copy of the GNU General Public License
20*dd7b254dSGiuliano Pochini    along with this program; if not, write to the Free Software
21*dd7b254dSGiuliano Pochini    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22*dd7b254dSGiuliano Pochini    MA  02111-1307, USA.
23*dd7b254dSGiuliano Pochini 
24*dd7b254dSGiuliano Pochini    *************************************************************************
25*dd7b254dSGiuliano Pochini 
26*dd7b254dSGiuliano Pochini  Translation from C++ and adaptation for use in ALSA-Driver
27*dd7b254dSGiuliano Pochini  were made by Giuliano Pochini <pochini@shiny.it>
28*dd7b254dSGiuliano Pochini 
29*dd7b254dSGiuliano Pochini ****************************************************************************/
30*dd7b254dSGiuliano Pochini 
31*dd7b254dSGiuliano Pochini #if PAGE_SIZE < 4096
32*dd7b254dSGiuliano Pochini #error PAGE_SIZE is < 4k
33*dd7b254dSGiuliano Pochini #endif
34*dd7b254dSGiuliano Pochini 
35*dd7b254dSGiuliano Pochini static int restore_dsp_rettings(struct echoaudio *chip);
36*dd7b254dSGiuliano Pochini 
37*dd7b254dSGiuliano Pochini 
38*dd7b254dSGiuliano Pochini /* Some vector commands involve the DSP reading or writing data to and from the
39*dd7b254dSGiuliano Pochini comm page; if you send one of these commands to the DSP, it will complete the
40*dd7b254dSGiuliano Pochini command and then write a non-zero value to the Handshake field in the
41*dd7b254dSGiuliano Pochini comm page.  This function waits for the handshake to show up. */
42*dd7b254dSGiuliano Pochini static int wait_handshake(struct echoaudio *chip)
43*dd7b254dSGiuliano Pochini {
44*dd7b254dSGiuliano Pochini 	int i;
45*dd7b254dSGiuliano Pochini 
46*dd7b254dSGiuliano Pochini 	/* Wait up to 10ms for the handshake from the DSP */
47*dd7b254dSGiuliano Pochini 	for (i = 0; i < HANDSHAKE_TIMEOUT; i++) {
48*dd7b254dSGiuliano Pochini 		/* Look for the handshake value */
49*dd7b254dSGiuliano Pochini 		if (chip->comm_page->handshake) {
50*dd7b254dSGiuliano Pochini 			/*if (i)  DE_ACT(("Handshake time: %d\n", i));*/
51*dd7b254dSGiuliano Pochini 			return 0;
52*dd7b254dSGiuliano Pochini 		}
53*dd7b254dSGiuliano Pochini 		udelay(1);
54*dd7b254dSGiuliano Pochini 	}
55*dd7b254dSGiuliano Pochini 
56*dd7b254dSGiuliano Pochini 	snd_printk(KERN_ERR "wait_handshake(): Timeout waiting for DSP\n");
57*dd7b254dSGiuliano Pochini 	return -EBUSY;
58*dd7b254dSGiuliano Pochini }
59*dd7b254dSGiuliano Pochini 
60*dd7b254dSGiuliano Pochini 
61*dd7b254dSGiuliano Pochini 
62*dd7b254dSGiuliano Pochini /* Much of the interaction between the DSP and the driver is done via vector
63*dd7b254dSGiuliano Pochini commands; send_vector writes a vector command to the DSP.  Typically, this
64*dd7b254dSGiuliano Pochini causes the DSP to read or write fields in the comm page.
65*dd7b254dSGiuliano Pochini PCI posting is not required thanks to the handshake logic. */
66*dd7b254dSGiuliano Pochini static int send_vector(struct echoaudio *chip, u32 command)
67*dd7b254dSGiuliano Pochini {
68*dd7b254dSGiuliano Pochini 	int i;
69*dd7b254dSGiuliano Pochini 
70*dd7b254dSGiuliano Pochini 	wmb();	/* Flush all pending writes before sending the command */
71*dd7b254dSGiuliano Pochini 
72*dd7b254dSGiuliano Pochini 	/* Wait up to 100ms for the "vector busy" bit to be off */
73*dd7b254dSGiuliano Pochini 	for (i = 0; i < VECTOR_BUSY_TIMEOUT; i++) {
74*dd7b254dSGiuliano Pochini 		if (!(get_dsp_register(chip, CHI32_VECTOR_REG) &
75*dd7b254dSGiuliano Pochini 		      CHI32_VECTOR_BUSY)) {
76*dd7b254dSGiuliano Pochini 			set_dsp_register(chip, CHI32_VECTOR_REG, command);
77*dd7b254dSGiuliano Pochini 			/*if (i)  DE_ACT(("send_vector time: %d\n", i));*/
78*dd7b254dSGiuliano Pochini 			return 0;
79*dd7b254dSGiuliano Pochini 		}
80*dd7b254dSGiuliano Pochini 		udelay(1);
81*dd7b254dSGiuliano Pochini 	}
82*dd7b254dSGiuliano Pochini 
83*dd7b254dSGiuliano Pochini 	DE_ACT((KERN_ERR "timeout on send_vector\n"));
84*dd7b254dSGiuliano Pochini 	return -EBUSY;
85*dd7b254dSGiuliano Pochini }
86*dd7b254dSGiuliano Pochini 
87*dd7b254dSGiuliano Pochini 
88*dd7b254dSGiuliano Pochini 
89*dd7b254dSGiuliano Pochini /* write_dsp writes a 32-bit value to the DSP; this is used almost
90*dd7b254dSGiuliano Pochini exclusively for loading the DSP. */
91*dd7b254dSGiuliano Pochini static int write_dsp(struct echoaudio *chip, u32 data)
92*dd7b254dSGiuliano Pochini {
93*dd7b254dSGiuliano Pochini 	u32 status, i;
94*dd7b254dSGiuliano Pochini 
95*dd7b254dSGiuliano Pochini 	for (i = 0; i < 10000000; i++) {	/* timeout = 10s */
96*dd7b254dSGiuliano Pochini 		status = get_dsp_register(chip, CHI32_STATUS_REG);
97*dd7b254dSGiuliano Pochini 		if ((status & CHI32_STATUS_HOST_WRITE_EMPTY) != 0) {
98*dd7b254dSGiuliano Pochini 			set_dsp_register(chip, CHI32_DATA_REG, data);
99*dd7b254dSGiuliano Pochini 			wmb();			/* write it immediately */
100*dd7b254dSGiuliano Pochini 			return 0;
101*dd7b254dSGiuliano Pochini 		}
102*dd7b254dSGiuliano Pochini 		udelay(1);
103*dd7b254dSGiuliano Pochini 		cond_resched();
104*dd7b254dSGiuliano Pochini 	}
105*dd7b254dSGiuliano Pochini 
106*dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;		/* Set TRUE until DSP re-loaded */
107*dd7b254dSGiuliano Pochini 	DE_ACT((KERN_ERR "write_dsp: Set bad_board to TRUE\n"));
108*dd7b254dSGiuliano Pochini 	return -EIO;
109*dd7b254dSGiuliano Pochini }
110*dd7b254dSGiuliano Pochini 
111*dd7b254dSGiuliano Pochini 
112*dd7b254dSGiuliano Pochini 
113*dd7b254dSGiuliano Pochini /* read_dsp reads a 32-bit value from the DSP; this is used almost
114*dd7b254dSGiuliano Pochini exclusively for loading the DSP and checking the status of the ASIC. */
115*dd7b254dSGiuliano Pochini static int read_dsp(struct echoaudio *chip, u32 *data)
116*dd7b254dSGiuliano Pochini {
117*dd7b254dSGiuliano Pochini 	u32 status, i;
118*dd7b254dSGiuliano Pochini 
119*dd7b254dSGiuliano Pochini 	for (i = 0; i < READ_DSP_TIMEOUT; i++) {
120*dd7b254dSGiuliano Pochini 		status = get_dsp_register(chip, CHI32_STATUS_REG);
121*dd7b254dSGiuliano Pochini 		if ((status & CHI32_STATUS_HOST_READ_FULL) != 0) {
122*dd7b254dSGiuliano Pochini 			*data = get_dsp_register(chip, CHI32_DATA_REG);
123*dd7b254dSGiuliano Pochini 			return 0;
124*dd7b254dSGiuliano Pochini 		}
125*dd7b254dSGiuliano Pochini 		udelay(1);
126*dd7b254dSGiuliano Pochini 		cond_resched();
127*dd7b254dSGiuliano Pochini 	}
128*dd7b254dSGiuliano Pochini 
129*dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;		/* Set TRUE until DSP re-loaded */
130*dd7b254dSGiuliano Pochini 	DE_INIT((KERN_ERR "read_dsp: Set bad_board to TRUE\n"));
131*dd7b254dSGiuliano Pochini 	return -EIO;
132*dd7b254dSGiuliano Pochini }
133*dd7b254dSGiuliano Pochini 
134*dd7b254dSGiuliano Pochini 
135*dd7b254dSGiuliano Pochini 
136*dd7b254dSGiuliano Pochini /****************************************************************************
137*dd7b254dSGiuliano Pochini 	Firmware loading functions
138*dd7b254dSGiuliano Pochini  ****************************************************************************/
139*dd7b254dSGiuliano Pochini 
140*dd7b254dSGiuliano Pochini /* This function is used to read back the serial number from the DSP;
141*dd7b254dSGiuliano Pochini this is triggered by the SET_COMMPAGE_ADDR command.
142*dd7b254dSGiuliano Pochini Only some early Echogals products have serial numbers in the ROM;
143*dd7b254dSGiuliano Pochini the serial number is not used, but you still need to do this as
144*dd7b254dSGiuliano Pochini part of the DSP load process. */
145*dd7b254dSGiuliano Pochini static int read_sn(struct echoaudio *chip)
146*dd7b254dSGiuliano Pochini {
147*dd7b254dSGiuliano Pochini 	int i;
148*dd7b254dSGiuliano Pochini 	u32 sn[6];
149*dd7b254dSGiuliano Pochini 
150*dd7b254dSGiuliano Pochini 	for (i = 0; i < 5; i++) {
151*dd7b254dSGiuliano Pochini 		if (read_dsp(chip, &sn[i])) {
152*dd7b254dSGiuliano Pochini 			snd_printk(KERN_ERR "Failed to read serial number\n");
153*dd7b254dSGiuliano Pochini 			return -EIO;
154*dd7b254dSGiuliano Pochini 		}
155*dd7b254dSGiuliano Pochini 	}
156*dd7b254dSGiuliano Pochini 	DE_INIT(("Read serial number %08x %08x %08x %08x %08x\n",
157*dd7b254dSGiuliano Pochini 		 sn[0], sn[1], sn[2], sn[3], sn[4]));
158*dd7b254dSGiuliano Pochini 	return 0;
159*dd7b254dSGiuliano Pochini }
160*dd7b254dSGiuliano Pochini 
161*dd7b254dSGiuliano Pochini 
162*dd7b254dSGiuliano Pochini 
163*dd7b254dSGiuliano Pochini #ifndef ECHOCARD_HAS_ASIC
164*dd7b254dSGiuliano Pochini /* This card has no ASIC, just return ok */
165*dd7b254dSGiuliano Pochini static inline int check_asic_status(struct echoaudio *chip)
166*dd7b254dSGiuliano Pochini {
167*dd7b254dSGiuliano Pochini 	chip->asic_loaded = TRUE;
168*dd7b254dSGiuliano Pochini 	return 0;
169*dd7b254dSGiuliano Pochini }
170*dd7b254dSGiuliano Pochini 
171*dd7b254dSGiuliano Pochini #endif /* !ECHOCARD_HAS_ASIC */
172*dd7b254dSGiuliano Pochini 
173*dd7b254dSGiuliano Pochini 
174*dd7b254dSGiuliano Pochini 
175*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_ASIC
176*dd7b254dSGiuliano Pochini 
177*dd7b254dSGiuliano Pochini /* Load ASIC code - done after the DSP is loaded */
178*dd7b254dSGiuliano Pochini static int load_asic_generic(struct echoaudio *chip, u32 cmd,
179*dd7b254dSGiuliano Pochini 			     const struct firmware *asic)
180*dd7b254dSGiuliano Pochini {
181*dd7b254dSGiuliano Pochini 	const struct firmware *fw;
182*dd7b254dSGiuliano Pochini 	int err;
183*dd7b254dSGiuliano Pochini 	u32 i, size;
184*dd7b254dSGiuliano Pochini 	u8 *code;
185*dd7b254dSGiuliano Pochini 
186*dd7b254dSGiuliano Pochini 	if ((err = get_firmware(&fw, asic, chip)) < 0) {
187*dd7b254dSGiuliano Pochini 		snd_printk(KERN_WARNING "Firmware not found !\n");
188*dd7b254dSGiuliano Pochini 		return err;
189*dd7b254dSGiuliano Pochini 	}
190*dd7b254dSGiuliano Pochini 
191*dd7b254dSGiuliano Pochini 	code = (u8 *)fw->data;
192*dd7b254dSGiuliano Pochini 	size = fw->size;
193*dd7b254dSGiuliano Pochini 
194*dd7b254dSGiuliano Pochini 	/* Send the "Here comes the ASIC" command */
195*dd7b254dSGiuliano Pochini 	if (write_dsp(chip, cmd) < 0)
196*dd7b254dSGiuliano Pochini 		goto la_error;
197*dd7b254dSGiuliano Pochini 
198*dd7b254dSGiuliano Pochini 	/* Write length of ASIC file in bytes */
199*dd7b254dSGiuliano Pochini 	if (write_dsp(chip, size) < 0)
200*dd7b254dSGiuliano Pochini 		goto la_error;
201*dd7b254dSGiuliano Pochini 
202*dd7b254dSGiuliano Pochini 	for (i = 0; i < size; i++) {
203*dd7b254dSGiuliano Pochini 		if (write_dsp(chip, code[i]) < 0)
204*dd7b254dSGiuliano Pochini 			goto la_error;
205*dd7b254dSGiuliano Pochini 	}
206*dd7b254dSGiuliano Pochini 
207*dd7b254dSGiuliano Pochini 	DE_INIT(("ASIC loaded\n"));
208*dd7b254dSGiuliano Pochini 	free_firmware(fw);
209*dd7b254dSGiuliano Pochini 	return 0;
210*dd7b254dSGiuliano Pochini 
211*dd7b254dSGiuliano Pochini la_error:
212*dd7b254dSGiuliano Pochini 	DE_INIT(("failed on write_dsp\n"));
213*dd7b254dSGiuliano Pochini 	free_firmware(fw);
214*dd7b254dSGiuliano Pochini 	return -EIO;
215*dd7b254dSGiuliano Pochini }
216*dd7b254dSGiuliano Pochini 
217*dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_ASIC */
218*dd7b254dSGiuliano Pochini 
219*dd7b254dSGiuliano Pochini 
220*dd7b254dSGiuliano Pochini 
221*dd7b254dSGiuliano Pochini #ifdef DSP_56361
222*dd7b254dSGiuliano Pochini 
223*dd7b254dSGiuliano Pochini /* Install the resident loader for 56361 DSPs;  The resident loader is on
224*dd7b254dSGiuliano Pochini the EPROM on the board for 56301 DSP. The resident loader is a tiny little
225*dd7b254dSGiuliano Pochini program that is used to load the real DSP code. */
226*dd7b254dSGiuliano Pochini static int install_resident_loader(struct echoaudio *chip)
227*dd7b254dSGiuliano Pochini {
228*dd7b254dSGiuliano Pochini 	u32 address;
229*dd7b254dSGiuliano Pochini 	int index, words, i;
230*dd7b254dSGiuliano Pochini 	u16 *code;
231*dd7b254dSGiuliano Pochini 	u32 status;
232*dd7b254dSGiuliano Pochini 	const struct firmware *fw;
233*dd7b254dSGiuliano Pochini 
234*dd7b254dSGiuliano Pochini 	/* 56361 cards only!  This check is required by the old 56301-based
235*dd7b254dSGiuliano Pochini 	Mona and Gina24 */
236*dd7b254dSGiuliano Pochini 	if (chip->device_id != DEVICE_ID_56361)
237*dd7b254dSGiuliano Pochini 		return 0;
238*dd7b254dSGiuliano Pochini 
239*dd7b254dSGiuliano Pochini 	/* Look to see if the resident loader is present.  If the resident
240*dd7b254dSGiuliano Pochini 	loader is already installed, host flag 5 will be on. */
241*dd7b254dSGiuliano Pochini 	status = get_dsp_register(chip, CHI32_STATUS_REG);
242*dd7b254dSGiuliano Pochini 	if (status & CHI32_STATUS_REG_HF5) {
243*dd7b254dSGiuliano Pochini 		DE_INIT(("Resident loader already installed; status is 0x%x\n",
244*dd7b254dSGiuliano Pochini 			 status));
245*dd7b254dSGiuliano Pochini 		return 0;
246*dd7b254dSGiuliano Pochini 	}
247*dd7b254dSGiuliano Pochini 
248*dd7b254dSGiuliano Pochini 	if ((i = get_firmware(&fw, &card_fw[FW_361_LOADER], chip)) < 0) {
249*dd7b254dSGiuliano Pochini 		snd_printk(KERN_WARNING "Firmware not found !\n");
250*dd7b254dSGiuliano Pochini 		return i;
251*dd7b254dSGiuliano Pochini 	}
252*dd7b254dSGiuliano Pochini 
253*dd7b254dSGiuliano Pochini 	/* The DSP code is an array of 16 bit words.  The array is divided up
254*dd7b254dSGiuliano Pochini 	into sections.  The first word of each section is the size in words,
255*dd7b254dSGiuliano Pochini 	followed by the section type.
256*dd7b254dSGiuliano Pochini 	Since DSP addresses and data are 24 bits wide, they each take up two
257*dd7b254dSGiuliano Pochini 	16 bit words in the array.
258*dd7b254dSGiuliano Pochini 	This is a lot like the other loader loop, but it's not a loop, you
259*dd7b254dSGiuliano Pochini 	don't write the memory type, and you don't write a zero at the end. */
260*dd7b254dSGiuliano Pochini 
261*dd7b254dSGiuliano Pochini 	/* Set DSP format bits for 24 bit mode */
262*dd7b254dSGiuliano Pochini 	set_dsp_register(chip, CHI32_CONTROL_REG,
263*dd7b254dSGiuliano Pochini 			 get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900);
264*dd7b254dSGiuliano Pochini 
265*dd7b254dSGiuliano Pochini 	code = (u16 *)fw->data;
266*dd7b254dSGiuliano Pochini 
267*dd7b254dSGiuliano Pochini 	/* Skip the header section; the first word in the array is the size
268*dd7b254dSGiuliano Pochini 	of the first section, so the first real section of code is pointed
269*dd7b254dSGiuliano Pochini 	to by Code[0]. */
270*dd7b254dSGiuliano Pochini 	index = code[0];
271*dd7b254dSGiuliano Pochini 
272*dd7b254dSGiuliano Pochini 	/* Skip the section size, LRS block type, and DSP memory type */
273*dd7b254dSGiuliano Pochini 	index += 3;
274*dd7b254dSGiuliano Pochini 
275*dd7b254dSGiuliano Pochini 	/* Get the number of DSP words to write */
276*dd7b254dSGiuliano Pochini 	words = code[index++];
277*dd7b254dSGiuliano Pochini 
278*dd7b254dSGiuliano Pochini 	/* Get the DSP address for this block; 24 bits, so build from two words */
279*dd7b254dSGiuliano Pochini 	address = ((u32)code[index] << 16) + code[index + 1];
280*dd7b254dSGiuliano Pochini 	index += 2;
281*dd7b254dSGiuliano Pochini 
282*dd7b254dSGiuliano Pochini 	/* Write the count to the DSP */
283*dd7b254dSGiuliano Pochini 	if (write_dsp(chip, words)) {
284*dd7b254dSGiuliano Pochini 		DE_INIT(("install_resident_loader: Failed to write word count!\n"));
285*dd7b254dSGiuliano Pochini 		goto irl_error;
286*dd7b254dSGiuliano Pochini 	}
287*dd7b254dSGiuliano Pochini 	/* Write the DSP address */
288*dd7b254dSGiuliano Pochini 	if (write_dsp(chip, address)) {
289*dd7b254dSGiuliano Pochini 		DE_INIT(("install_resident_loader: Failed to write DSP address!\n"));
290*dd7b254dSGiuliano Pochini 		goto irl_error;
291*dd7b254dSGiuliano Pochini 	}
292*dd7b254dSGiuliano Pochini 	/* Write out this block of code to the DSP */
293*dd7b254dSGiuliano Pochini 	for (i = 0; i < words; i++) {
294*dd7b254dSGiuliano Pochini 		u32 data;
295*dd7b254dSGiuliano Pochini 
296*dd7b254dSGiuliano Pochini 		data = ((u32)code[index] << 16) + code[index + 1];
297*dd7b254dSGiuliano Pochini 		if (write_dsp(chip, data)) {
298*dd7b254dSGiuliano Pochini 			DE_INIT(("install_resident_loader: Failed to write DSP code\n"));
299*dd7b254dSGiuliano Pochini 			goto irl_error;
300*dd7b254dSGiuliano Pochini 		}
301*dd7b254dSGiuliano Pochini 		index += 2;
302*dd7b254dSGiuliano Pochini 	}
303*dd7b254dSGiuliano Pochini 
304*dd7b254dSGiuliano Pochini 	/* Wait for flag 5 to come up */
305*dd7b254dSGiuliano Pochini 	for (i = 0; i < 200; i++) {	/* Timeout is 50us * 200 = 10ms */
306*dd7b254dSGiuliano Pochini 		udelay(50);
307*dd7b254dSGiuliano Pochini 		status = get_dsp_register(chip, CHI32_STATUS_REG);
308*dd7b254dSGiuliano Pochini 		if (status & CHI32_STATUS_REG_HF5)
309*dd7b254dSGiuliano Pochini 			break;
310*dd7b254dSGiuliano Pochini 	}
311*dd7b254dSGiuliano Pochini 
312*dd7b254dSGiuliano Pochini 	if (i == 200) {
313*dd7b254dSGiuliano Pochini 		DE_INIT(("Resident loader failed to set HF5\n"));
314*dd7b254dSGiuliano Pochini 		goto irl_error;
315*dd7b254dSGiuliano Pochini 	}
316*dd7b254dSGiuliano Pochini 
317*dd7b254dSGiuliano Pochini 	DE_INIT(("Resident loader successfully installed\n"));
318*dd7b254dSGiuliano Pochini 	free_firmware(fw);
319*dd7b254dSGiuliano Pochini 	return 0;
320*dd7b254dSGiuliano Pochini 
321*dd7b254dSGiuliano Pochini irl_error:
322*dd7b254dSGiuliano Pochini 	free_firmware(fw);
323*dd7b254dSGiuliano Pochini 	return -EIO;
324*dd7b254dSGiuliano Pochini }
325*dd7b254dSGiuliano Pochini 
326*dd7b254dSGiuliano Pochini #endif /* DSP_56361 */
327*dd7b254dSGiuliano Pochini 
328*dd7b254dSGiuliano Pochini 
329*dd7b254dSGiuliano Pochini static int load_dsp(struct echoaudio *chip, u16 *code)
330*dd7b254dSGiuliano Pochini {
331*dd7b254dSGiuliano Pochini 	u32 address, data;
332*dd7b254dSGiuliano Pochini 	int index, words, i;
333*dd7b254dSGiuliano Pochini 
334*dd7b254dSGiuliano Pochini 	if (chip->dsp_code == code) {
335*dd7b254dSGiuliano Pochini 		DE_INIT(("DSP is already loaded!\n"));
336*dd7b254dSGiuliano Pochini 		return 0;
337*dd7b254dSGiuliano Pochini 	}
338*dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;		/* Set TRUE until DSP loaded */
339*dd7b254dSGiuliano Pochini 	chip->dsp_code = NULL;		/* Current DSP code not loaded */
340*dd7b254dSGiuliano Pochini 	chip->asic_loaded = FALSE;	/* Loading the DSP code will reset the ASIC */
341*dd7b254dSGiuliano Pochini 
342*dd7b254dSGiuliano Pochini 	DE_INIT(("load_dsp: Set bad_board to TRUE\n"));
343*dd7b254dSGiuliano Pochini 
344*dd7b254dSGiuliano Pochini 	/* If this board requires a resident loader, install it. */
345*dd7b254dSGiuliano Pochini #ifdef DSP_56361
346*dd7b254dSGiuliano Pochini 	if ((i = install_resident_loader(chip)) < 0)
347*dd7b254dSGiuliano Pochini 		return i;
348*dd7b254dSGiuliano Pochini #endif
349*dd7b254dSGiuliano Pochini 
350*dd7b254dSGiuliano Pochini 	/* Send software reset command */
351*dd7b254dSGiuliano Pochini 	if (send_vector(chip, DSP_VC_RESET) < 0) {
352*dd7b254dSGiuliano Pochini 		DE_INIT(("LoadDsp: send_vector DSP_VC_RESET failed, Critical Failure\n"));
353*dd7b254dSGiuliano Pochini 		return -EIO;
354*dd7b254dSGiuliano Pochini 	}
355*dd7b254dSGiuliano Pochini 	/* Delay 10us */
356*dd7b254dSGiuliano Pochini 	udelay(10);
357*dd7b254dSGiuliano Pochini 
358*dd7b254dSGiuliano Pochini 	/* Wait 10ms for HF3 to indicate that software reset is complete */
359*dd7b254dSGiuliano Pochini 	for (i = 0; i < 1000; i++) {	/* Timeout is 10us * 1000 = 10ms */
360*dd7b254dSGiuliano Pochini 		if (get_dsp_register(chip, CHI32_STATUS_REG) &
361*dd7b254dSGiuliano Pochini 		    CHI32_STATUS_REG_HF3)
362*dd7b254dSGiuliano Pochini 			break;
363*dd7b254dSGiuliano Pochini 		udelay(10);
364*dd7b254dSGiuliano Pochini 	}
365*dd7b254dSGiuliano Pochini 
366*dd7b254dSGiuliano Pochini 	if (i == 1000) {
367*dd7b254dSGiuliano Pochini 		DE_INIT(("load_dsp: Timeout waiting for CHI32_STATUS_REG_HF3\n"));
368*dd7b254dSGiuliano Pochini 		return -EIO;
369*dd7b254dSGiuliano Pochini 	}
370*dd7b254dSGiuliano Pochini 
371*dd7b254dSGiuliano Pochini 	/* Set DSP format bits for 24 bit mode now that soft reset is done */
372*dd7b254dSGiuliano Pochini 	set_dsp_register(chip, CHI32_CONTROL_REG,
373*dd7b254dSGiuliano Pochini 			 get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900);
374*dd7b254dSGiuliano Pochini 
375*dd7b254dSGiuliano Pochini 	/* Main loader loop */
376*dd7b254dSGiuliano Pochini 
377*dd7b254dSGiuliano Pochini 	index = code[0];
378*dd7b254dSGiuliano Pochini 	for (;;) {
379*dd7b254dSGiuliano Pochini 		int block_type, mem_type;
380*dd7b254dSGiuliano Pochini 
381*dd7b254dSGiuliano Pochini 		/* Total Block Size */
382*dd7b254dSGiuliano Pochini 		index++;
383*dd7b254dSGiuliano Pochini 
384*dd7b254dSGiuliano Pochini 		/* Block Type */
385*dd7b254dSGiuliano Pochini 		block_type = code[index];
386*dd7b254dSGiuliano Pochini 		if (block_type == 4)	/* We're finished */
387*dd7b254dSGiuliano Pochini 			break;
388*dd7b254dSGiuliano Pochini 
389*dd7b254dSGiuliano Pochini 		index++;
390*dd7b254dSGiuliano Pochini 
391*dd7b254dSGiuliano Pochini 		/* Memory Type  P=0,X=1,Y=2 */
392*dd7b254dSGiuliano Pochini 		mem_type = code[index++];
393*dd7b254dSGiuliano Pochini 
394*dd7b254dSGiuliano Pochini 		/* Block Code Size */
395*dd7b254dSGiuliano Pochini 		words = code[index++];
396*dd7b254dSGiuliano Pochini 		if (words == 0)		/* We're finished */
397*dd7b254dSGiuliano Pochini 			break;
398*dd7b254dSGiuliano Pochini 
399*dd7b254dSGiuliano Pochini 		/* Start Address */
400*dd7b254dSGiuliano Pochini 		address = ((u32)code[index] << 16) + code[index + 1];
401*dd7b254dSGiuliano Pochini 		index += 2;
402*dd7b254dSGiuliano Pochini 
403*dd7b254dSGiuliano Pochini 		if (write_dsp(chip, words) < 0) {
404*dd7b254dSGiuliano Pochini 			DE_INIT(("load_dsp: failed to write number of DSP words\n"));
405*dd7b254dSGiuliano Pochini 			return -EIO;
406*dd7b254dSGiuliano Pochini 		}
407*dd7b254dSGiuliano Pochini 		if (write_dsp(chip, address) < 0) {
408*dd7b254dSGiuliano Pochini 			DE_INIT(("load_dsp: failed to write DSP address\n"));
409*dd7b254dSGiuliano Pochini 			return -EIO;
410*dd7b254dSGiuliano Pochini 		}
411*dd7b254dSGiuliano Pochini 		if (write_dsp(chip, mem_type) < 0) {
412*dd7b254dSGiuliano Pochini 			DE_INIT(("load_dsp: failed to write DSP memory type\n"));
413*dd7b254dSGiuliano Pochini 			return -EIO;
414*dd7b254dSGiuliano Pochini 		}
415*dd7b254dSGiuliano Pochini 		/* Code */
416*dd7b254dSGiuliano Pochini 		for (i = 0; i < words; i++, index+=2) {
417*dd7b254dSGiuliano Pochini 			data = ((u32)code[index] << 16) + code[index + 1];
418*dd7b254dSGiuliano Pochini 			if (write_dsp(chip, data) < 0) {
419*dd7b254dSGiuliano Pochini 				DE_INIT(("load_dsp: failed to write DSP data\n"));
420*dd7b254dSGiuliano Pochini 				return -EIO;
421*dd7b254dSGiuliano Pochini 			}
422*dd7b254dSGiuliano Pochini 		}
423*dd7b254dSGiuliano Pochini 	}
424*dd7b254dSGiuliano Pochini 
425*dd7b254dSGiuliano Pochini 	if (write_dsp(chip, 0) < 0) {	/* We're done!!! */
426*dd7b254dSGiuliano Pochini 		DE_INIT(("load_dsp: Failed to write final zero\n"));
427*dd7b254dSGiuliano Pochini 		return -EIO;
428*dd7b254dSGiuliano Pochini 	}
429*dd7b254dSGiuliano Pochini 	udelay(10);
430*dd7b254dSGiuliano Pochini 
431*dd7b254dSGiuliano Pochini 	for (i = 0; i < 5000; i++) {	/* Timeout is 100us * 5000 = 500ms */
432*dd7b254dSGiuliano Pochini 		/* Wait for flag 4 - indicates that the DSP loaded OK */
433*dd7b254dSGiuliano Pochini 		if (get_dsp_register(chip, CHI32_STATUS_REG) &
434*dd7b254dSGiuliano Pochini 		    CHI32_STATUS_REG_HF4) {
435*dd7b254dSGiuliano Pochini 			set_dsp_register(chip, CHI32_CONTROL_REG,
436*dd7b254dSGiuliano Pochini 					 get_dsp_register(chip, CHI32_CONTROL_REG) & ~0x1b00);
437*dd7b254dSGiuliano Pochini 
438*dd7b254dSGiuliano Pochini 			if (write_dsp(chip, DSP_FNC_SET_COMMPAGE_ADDR) < 0) {
439*dd7b254dSGiuliano Pochini 				DE_INIT(("load_dsp: Failed to write DSP_FNC_SET_COMMPAGE_ADDR\n"));
440*dd7b254dSGiuliano Pochini 				return -EIO;
441*dd7b254dSGiuliano Pochini 			}
442*dd7b254dSGiuliano Pochini 
443*dd7b254dSGiuliano Pochini 			if (write_dsp(chip, chip->comm_page_phys) < 0) {
444*dd7b254dSGiuliano Pochini 				DE_INIT(("load_dsp: Failed to write comm page address\n"));
445*dd7b254dSGiuliano Pochini 				return -EIO;
446*dd7b254dSGiuliano Pochini 			}
447*dd7b254dSGiuliano Pochini 
448*dd7b254dSGiuliano Pochini 			/* Get the serial number via slave mode.
449*dd7b254dSGiuliano Pochini 			This is triggered by the SET_COMMPAGE_ADDR command.
450*dd7b254dSGiuliano Pochini 			We don't actually use the serial number but we have to
451*dd7b254dSGiuliano Pochini 			get it as part of the DSP init voodoo. */
452*dd7b254dSGiuliano Pochini 			if (read_sn(chip) < 0) {
453*dd7b254dSGiuliano Pochini 				DE_INIT(("load_dsp: Failed to read serial number\n"));
454*dd7b254dSGiuliano Pochini 				return -EIO;
455*dd7b254dSGiuliano Pochini 			}
456*dd7b254dSGiuliano Pochini 
457*dd7b254dSGiuliano Pochini 			chip->dsp_code = code;		/* Show which DSP code loaded */
458*dd7b254dSGiuliano Pochini 			chip->bad_board = FALSE;	/* DSP OK */
459*dd7b254dSGiuliano Pochini 			DE_INIT(("load_dsp: OK!\n"));
460*dd7b254dSGiuliano Pochini 			return 0;
461*dd7b254dSGiuliano Pochini 		}
462*dd7b254dSGiuliano Pochini 		udelay(100);
463*dd7b254dSGiuliano Pochini 	}
464*dd7b254dSGiuliano Pochini 
465*dd7b254dSGiuliano Pochini 	DE_INIT(("load_dsp: DSP load timed out waiting for HF4\n"));
466*dd7b254dSGiuliano Pochini 	return -EIO;
467*dd7b254dSGiuliano Pochini }
468*dd7b254dSGiuliano Pochini 
469*dd7b254dSGiuliano Pochini 
470*dd7b254dSGiuliano Pochini 
471*dd7b254dSGiuliano Pochini /* load_firmware takes care of loading the DSP and any ASIC code. */
472*dd7b254dSGiuliano Pochini static int load_firmware(struct echoaudio *chip)
473*dd7b254dSGiuliano Pochini {
474*dd7b254dSGiuliano Pochini 	const struct firmware *fw;
475*dd7b254dSGiuliano Pochini 	int box_type, err;
476*dd7b254dSGiuliano Pochini 
477*dd7b254dSGiuliano Pochini 	snd_assert(chip->dsp_code_to_load && chip->comm_page, return -EPERM);
478*dd7b254dSGiuliano Pochini 
479*dd7b254dSGiuliano Pochini 	/* See if the ASIC is present and working - only if the DSP is already loaded */
480*dd7b254dSGiuliano Pochini 	if (chip->dsp_code) {
481*dd7b254dSGiuliano Pochini 		if ((box_type = check_asic_status(chip)) >= 0)
482*dd7b254dSGiuliano Pochini 			return box_type;
483*dd7b254dSGiuliano Pochini 		/* ASIC check failed; force the DSP to reload */
484*dd7b254dSGiuliano Pochini 		chip->dsp_code = NULL;
485*dd7b254dSGiuliano Pochini 	}
486*dd7b254dSGiuliano Pochini 
487*dd7b254dSGiuliano Pochini 	if ((err = get_firmware(&fw, chip->dsp_code_to_load, chip)) < 0)
488*dd7b254dSGiuliano Pochini 		return err;
489*dd7b254dSGiuliano Pochini 	err = load_dsp(chip, (u16 *)fw->data);
490*dd7b254dSGiuliano Pochini 	free_firmware(fw);
491*dd7b254dSGiuliano Pochini 	if (err < 0)
492*dd7b254dSGiuliano Pochini 		return err;
493*dd7b254dSGiuliano Pochini 
494*dd7b254dSGiuliano Pochini 	if ((box_type = load_asic(chip)) < 0)
495*dd7b254dSGiuliano Pochini 		return box_type;	/* error */
496*dd7b254dSGiuliano Pochini 
497*dd7b254dSGiuliano Pochini 	if ((err = restore_dsp_rettings(chip)) < 0)
498*dd7b254dSGiuliano Pochini 		return err;
499*dd7b254dSGiuliano Pochini 
500*dd7b254dSGiuliano Pochini 	return box_type;
501*dd7b254dSGiuliano Pochini }
502*dd7b254dSGiuliano Pochini 
503*dd7b254dSGiuliano Pochini 
504*dd7b254dSGiuliano Pochini 
505*dd7b254dSGiuliano Pochini /****************************************************************************
506*dd7b254dSGiuliano Pochini 	Mixer functions
507*dd7b254dSGiuliano Pochini  ****************************************************************************/
508*dd7b254dSGiuliano Pochini 
509*dd7b254dSGiuliano Pochini #if defined(ECHOCARD_HAS_INPUT_NOMINAL_LEVEL) || \
510*dd7b254dSGiuliano Pochini 	defined(ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL)
511*dd7b254dSGiuliano Pochini 
512*dd7b254dSGiuliano Pochini /* Set the nominal level for an input or output bus (true = -10dBV, false = +4dBu) */
513*dd7b254dSGiuliano Pochini static int set_nominal_level(struct echoaudio *chip, u16 index, char consumer)
514*dd7b254dSGiuliano Pochini {
515*dd7b254dSGiuliano Pochini 	snd_assert(index < num_busses_out(chip) + num_busses_in(chip),
516*dd7b254dSGiuliano Pochini 		   return -EINVAL);
517*dd7b254dSGiuliano Pochini 
518*dd7b254dSGiuliano Pochini 	/* Wait for the handshake (OK even if ASIC is not loaded) */
519*dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
520*dd7b254dSGiuliano Pochini 		return -EIO;
521*dd7b254dSGiuliano Pochini 
522*dd7b254dSGiuliano Pochini 	chip->nominal_level[index] = consumer;
523*dd7b254dSGiuliano Pochini 
524*dd7b254dSGiuliano Pochini 	if (consumer)
525*dd7b254dSGiuliano Pochini 		chip->comm_page->nominal_level_mask |= cpu_to_le32(1 << index);
526*dd7b254dSGiuliano Pochini 	else
527*dd7b254dSGiuliano Pochini 		chip->comm_page->nominal_level_mask &= ~cpu_to_le32(1 << index);
528*dd7b254dSGiuliano Pochini 
529*dd7b254dSGiuliano Pochini 	return 0;
530*dd7b254dSGiuliano Pochini }
531*dd7b254dSGiuliano Pochini 
532*dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_*_NOMINAL_LEVEL */
533*dd7b254dSGiuliano Pochini 
534*dd7b254dSGiuliano Pochini 
535*dd7b254dSGiuliano Pochini 
536*dd7b254dSGiuliano Pochini /* Set the gain for a single physical output channel (dB). */
537*dd7b254dSGiuliano Pochini static int set_output_gain(struct echoaudio *chip, u16 channel, s8 gain)
538*dd7b254dSGiuliano Pochini {
539*dd7b254dSGiuliano Pochini 	snd_assert(channel < num_busses_out(chip), return -EINVAL);
540*dd7b254dSGiuliano Pochini 
541*dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
542*dd7b254dSGiuliano Pochini 		return -EIO;
543*dd7b254dSGiuliano Pochini 
544*dd7b254dSGiuliano Pochini 	/* Save the new value */
545*dd7b254dSGiuliano Pochini 	chip->output_gain[channel] = gain;
546*dd7b254dSGiuliano Pochini 	chip->comm_page->line_out_level[channel] = gain;
547*dd7b254dSGiuliano Pochini 	return 0;
548*dd7b254dSGiuliano Pochini }
549*dd7b254dSGiuliano Pochini 
550*dd7b254dSGiuliano Pochini 
551*dd7b254dSGiuliano Pochini 
552*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MONITOR
553*dd7b254dSGiuliano Pochini /* Set the monitor level from an input bus to an output bus. */
554*dd7b254dSGiuliano Pochini static int set_monitor_gain(struct echoaudio *chip, u16 output, u16 input,
555*dd7b254dSGiuliano Pochini 			    s8 gain)
556*dd7b254dSGiuliano Pochini {
557*dd7b254dSGiuliano Pochini 	snd_assert(output < num_busses_out(chip) &&
558*dd7b254dSGiuliano Pochini 		   input < num_busses_in(chip), return -EINVAL);
559*dd7b254dSGiuliano Pochini 
560*dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
561*dd7b254dSGiuliano Pochini 		return -EIO;
562*dd7b254dSGiuliano Pochini 
563*dd7b254dSGiuliano Pochini 	chip->monitor_gain[output][input] = gain;
564*dd7b254dSGiuliano Pochini 	chip->comm_page->monitors[monitor_index(chip, output, input)] = gain;
565*dd7b254dSGiuliano Pochini 	return 0;
566*dd7b254dSGiuliano Pochini }
567*dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_MONITOR */
568*dd7b254dSGiuliano Pochini 
569*dd7b254dSGiuliano Pochini 
570*dd7b254dSGiuliano Pochini /* Tell the DSP to read and update output, nominal & monitor levels in comm page. */
571*dd7b254dSGiuliano Pochini static int update_output_line_level(struct echoaudio *chip)
572*dd7b254dSGiuliano Pochini {
573*dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
574*dd7b254dSGiuliano Pochini 		return -EIO;
575*dd7b254dSGiuliano Pochini 	clear_handshake(chip);
576*dd7b254dSGiuliano Pochini 	return send_vector(chip, DSP_VC_UPDATE_OUTVOL);
577*dd7b254dSGiuliano Pochini }
578*dd7b254dSGiuliano Pochini 
579*dd7b254dSGiuliano Pochini 
580*dd7b254dSGiuliano Pochini 
581*dd7b254dSGiuliano Pochini /* Tell the DSP to read and update input levels in comm page */
582*dd7b254dSGiuliano Pochini static int update_input_line_level(struct echoaudio *chip)
583*dd7b254dSGiuliano Pochini {
584*dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
585*dd7b254dSGiuliano Pochini 		return -EIO;
586*dd7b254dSGiuliano Pochini 	clear_handshake(chip);
587*dd7b254dSGiuliano Pochini 	return send_vector(chip, DSP_VC_UPDATE_INGAIN);
588*dd7b254dSGiuliano Pochini }
589*dd7b254dSGiuliano Pochini 
590*dd7b254dSGiuliano Pochini 
591*dd7b254dSGiuliano Pochini 
592*dd7b254dSGiuliano Pochini /* set_meters_on turns the meters on or off.  If meters are turned on, the DSP
593*dd7b254dSGiuliano Pochini will write the meter and clock detect values to the comm page at about 30Hz */
594*dd7b254dSGiuliano Pochini static void set_meters_on(struct echoaudio *chip, char on)
595*dd7b254dSGiuliano Pochini {
596*dd7b254dSGiuliano Pochini 	if (on && !chip->meters_enabled) {
597*dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_METERS_ON);
598*dd7b254dSGiuliano Pochini 		chip->meters_enabled = 1;
599*dd7b254dSGiuliano Pochini 	} else if (!on && chip->meters_enabled) {
600*dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_METERS_OFF);
601*dd7b254dSGiuliano Pochini 		chip->meters_enabled = 0;
602*dd7b254dSGiuliano Pochini 		memset((s8 *)chip->comm_page->vu_meter, ECHOGAIN_MUTED,
603*dd7b254dSGiuliano Pochini 		       DSP_MAXPIPES);
604*dd7b254dSGiuliano Pochini 		memset((s8 *)chip->comm_page->peak_meter, ECHOGAIN_MUTED,
605*dd7b254dSGiuliano Pochini 		       DSP_MAXPIPES);
606*dd7b254dSGiuliano Pochini 	}
607*dd7b254dSGiuliano Pochini }
608*dd7b254dSGiuliano Pochini 
609*dd7b254dSGiuliano Pochini 
610*dd7b254dSGiuliano Pochini 
611*dd7b254dSGiuliano Pochini /* Fill out an the given array using the current values in the comm page.
612*dd7b254dSGiuliano Pochini Meters are written in the comm page by the DSP in this order:
613*dd7b254dSGiuliano Pochini  Output busses
614*dd7b254dSGiuliano Pochini  Input busses
615*dd7b254dSGiuliano Pochini  Output pipes (vmixer cards only)
616*dd7b254dSGiuliano Pochini 
617*dd7b254dSGiuliano Pochini This function assumes there are no more than 16 in/out busses or pipes
618*dd7b254dSGiuliano Pochini Meters is an array [3][16][2] of long. */
619*dd7b254dSGiuliano Pochini static void get_audio_meters(struct echoaudio *chip, long *meters)
620*dd7b254dSGiuliano Pochini {
621*dd7b254dSGiuliano Pochini 	int i, m, n;
622*dd7b254dSGiuliano Pochini 
623*dd7b254dSGiuliano Pochini 	m = 0;
624*dd7b254dSGiuliano Pochini 	n = 0;
625*dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_out(chip); i++, m++) {
626*dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->vu_meter[m];
627*dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->peak_meter[m];
628*dd7b254dSGiuliano Pochini 	}
629*dd7b254dSGiuliano Pochini 	for (; n < 32; n++)
630*dd7b254dSGiuliano Pochini 		meters[n] = 0;
631*dd7b254dSGiuliano Pochini 
632*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_ECHO3G
633*dd7b254dSGiuliano Pochini 	m = E3G_MAX_OUTPUTS;	/* Skip unused meters */
634*dd7b254dSGiuliano Pochini #endif
635*dd7b254dSGiuliano Pochini 
636*dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_in(chip); i++, m++) {
637*dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->vu_meter[m];
638*dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->peak_meter[m];
639*dd7b254dSGiuliano Pochini 	}
640*dd7b254dSGiuliano Pochini 	for (; n < 64; n++)
641*dd7b254dSGiuliano Pochini 		meters[n] = 0;
642*dd7b254dSGiuliano Pochini 
643*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_VMIXER
644*dd7b254dSGiuliano Pochini 	for (i = 0; i < num_pipes_out(chip); i++, m++) {
645*dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->vu_meter[m];
646*dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->peak_meter[m];
647*dd7b254dSGiuliano Pochini 	}
648*dd7b254dSGiuliano Pochini #endif
649*dd7b254dSGiuliano Pochini 	for (; n < 96; n++)
650*dd7b254dSGiuliano Pochini 		meters[n] = 0;
651*dd7b254dSGiuliano Pochini }
652*dd7b254dSGiuliano Pochini 
653*dd7b254dSGiuliano Pochini 
654*dd7b254dSGiuliano Pochini 
655*dd7b254dSGiuliano Pochini static int restore_dsp_rettings(struct echoaudio *chip)
656*dd7b254dSGiuliano Pochini {
657*dd7b254dSGiuliano Pochini 	int err;
658*dd7b254dSGiuliano Pochini 	DE_INIT(("restore_dsp_settings\n"));
659*dd7b254dSGiuliano Pochini 
660*dd7b254dSGiuliano Pochini 	if ((err = check_asic_status(chip)) < 0)
661*dd7b254dSGiuliano Pochini 		return err;
662*dd7b254dSGiuliano Pochini 
663*dd7b254dSGiuliano Pochini 	/* @ Gina20/Darla20 only. Should be harmless for other cards. */
664*dd7b254dSGiuliano Pochini 	chip->comm_page->gd_clock_state = GD_CLOCK_UNDEF;
665*dd7b254dSGiuliano Pochini 	chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_UNDEF;
666*dd7b254dSGiuliano Pochini 	chip->comm_page->handshake = 0xffffffff;
667*dd7b254dSGiuliano Pochini 
668*dd7b254dSGiuliano Pochini 	if ((err = set_sample_rate(chip, chip->sample_rate)) < 0)
669*dd7b254dSGiuliano Pochini 		return err;
670*dd7b254dSGiuliano Pochini 
671*dd7b254dSGiuliano Pochini 	if (chip->meters_enabled)
672*dd7b254dSGiuliano Pochini 		if (send_vector(chip, DSP_VC_METERS_ON) < 0)
673*dd7b254dSGiuliano Pochini 			return -EIO;
674*dd7b254dSGiuliano Pochini 
675*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_EXTERNAL_CLOCK
676*dd7b254dSGiuliano Pochini 	if (set_input_clock(chip, chip->input_clock) < 0)
677*dd7b254dSGiuliano Pochini 		return -EIO;
678*dd7b254dSGiuliano Pochini #endif
679*dd7b254dSGiuliano Pochini 
680*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_OUTPUT_CLOCK_SWITCH
681*dd7b254dSGiuliano Pochini 	if (set_output_clock(chip, chip->output_clock) < 0)
682*dd7b254dSGiuliano Pochini 		return -EIO;
683*dd7b254dSGiuliano Pochini #endif
684*dd7b254dSGiuliano Pochini 
685*dd7b254dSGiuliano Pochini 	if (update_output_line_level(chip) < 0)
686*dd7b254dSGiuliano Pochini 		return -EIO;
687*dd7b254dSGiuliano Pochini 
688*dd7b254dSGiuliano Pochini 	if (update_input_line_level(chip) < 0)
689*dd7b254dSGiuliano Pochini 		return -EIO;
690*dd7b254dSGiuliano Pochini 
691*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_VMIXER
692*dd7b254dSGiuliano Pochini 	if (update_vmixer_level(chip) < 0)
693*dd7b254dSGiuliano Pochini 		return -EIO;
694*dd7b254dSGiuliano Pochini #endif
695*dd7b254dSGiuliano Pochini 
696*dd7b254dSGiuliano Pochini 	if (wait_handshake(chip) < 0)
697*dd7b254dSGiuliano Pochini 		return -EIO;
698*dd7b254dSGiuliano Pochini 	clear_handshake(chip);
699*dd7b254dSGiuliano Pochini 
700*dd7b254dSGiuliano Pochini 	DE_INIT(("restore_dsp_rettings done\n"));
701*dd7b254dSGiuliano Pochini 	return send_vector(chip, DSP_VC_UPDATE_FLAGS);
702*dd7b254dSGiuliano Pochini }
703*dd7b254dSGiuliano Pochini 
704*dd7b254dSGiuliano Pochini 
705*dd7b254dSGiuliano Pochini 
706*dd7b254dSGiuliano Pochini /****************************************************************************
707*dd7b254dSGiuliano Pochini 	Transport functions
708*dd7b254dSGiuliano Pochini  ****************************************************************************/
709*dd7b254dSGiuliano Pochini 
710*dd7b254dSGiuliano Pochini /* set_audio_format() sets the format of the audio data in host memory for
711*dd7b254dSGiuliano Pochini this pipe.  Note that _MS_ (mono-to-stereo) playback modes are not used by ALSA
712*dd7b254dSGiuliano Pochini but they are here because they are just mono while capturing */
713*dd7b254dSGiuliano Pochini static void set_audio_format(struct echoaudio *chip, u16 pipe_index,
714*dd7b254dSGiuliano Pochini 			     const struct audioformat *format)
715*dd7b254dSGiuliano Pochini {
716*dd7b254dSGiuliano Pochini 	u16 dsp_format;
717*dd7b254dSGiuliano Pochini 
718*dd7b254dSGiuliano Pochini 	dsp_format = DSP_AUDIOFORM_SS_16LE;
719*dd7b254dSGiuliano Pochini 
720*dd7b254dSGiuliano Pochini 	/* Look for super-interleave (no big-endian and 8 bits) */
721*dd7b254dSGiuliano Pochini 	if (format->interleave > 2) {
722*dd7b254dSGiuliano Pochini 		switch (format->bits_per_sample) {
723*dd7b254dSGiuliano Pochini 		case 16:
724*dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_16LE;
725*dd7b254dSGiuliano Pochini 			break;
726*dd7b254dSGiuliano Pochini 		case 24:
727*dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_24LE;
728*dd7b254dSGiuliano Pochini 			break;
729*dd7b254dSGiuliano Pochini 		case 32:
730*dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_32LE;
731*dd7b254dSGiuliano Pochini 			break;
732*dd7b254dSGiuliano Pochini 		}
733*dd7b254dSGiuliano Pochini 		dsp_format |= format->interleave;
734*dd7b254dSGiuliano Pochini 	} else if (format->data_are_bigendian) {
735*dd7b254dSGiuliano Pochini 		/* For big-endian data, only 32 bit samples are supported */
736*dd7b254dSGiuliano Pochini 		switch (format->interleave) {
737*dd7b254dSGiuliano Pochini 		case 1:
738*dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_MM_32BE;
739*dd7b254dSGiuliano Pochini 			break;
740*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_STEREO_BIG_ENDIAN32
741*dd7b254dSGiuliano Pochini 		case 2:
742*dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SS_32BE;
743*dd7b254dSGiuliano Pochini 			break;
744*dd7b254dSGiuliano Pochini #endif
745*dd7b254dSGiuliano Pochini 		}
746*dd7b254dSGiuliano Pochini 	} else if (format->interleave == 1 &&
747*dd7b254dSGiuliano Pochini 		   format->bits_per_sample == 32 && !format->mono_to_stereo) {
748*dd7b254dSGiuliano Pochini 		/* 32 bit little-endian mono->mono case */
749*dd7b254dSGiuliano Pochini 		dsp_format = DSP_AUDIOFORM_MM_32LE;
750*dd7b254dSGiuliano Pochini 	} else {
751*dd7b254dSGiuliano Pochini 		/* Handle the other little-endian formats */
752*dd7b254dSGiuliano Pochini 		switch (format->bits_per_sample) {
753*dd7b254dSGiuliano Pochini 		case 8:
754*dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
755*dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_8;
756*dd7b254dSGiuliano Pochini 			else
757*dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_8;
758*dd7b254dSGiuliano Pochini 			break;
759*dd7b254dSGiuliano Pochini 		default:
760*dd7b254dSGiuliano Pochini 		case 16:
761*dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
762*dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_16LE;
763*dd7b254dSGiuliano Pochini 			else
764*dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_16LE;
765*dd7b254dSGiuliano Pochini 			break;
766*dd7b254dSGiuliano Pochini 		case 24:
767*dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
768*dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_24LE;
769*dd7b254dSGiuliano Pochini 			else
770*dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_24LE;
771*dd7b254dSGiuliano Pochini 			break;
772*dd7b254dSGiuliano Pochini 		case 32:
773*dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
774*dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_32LE;
775*dd7b254dSGiuliano Pochini 			else
776*dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_32LE;
777*dd7b254dSGiuliano Pochini 			break;
778*dd7b254dSGiuliano Pochini 		}
779*dd7b254dSGiuliano Pochini 	}
780*dd7b254dSGiuliano Pochini 	DE_ACT(("set_audio_format[%d] = %x\n", pipe_index, dsp_format));
781*dd7b254dSGiuliano Pochini 	chip->comm_page->audio_format[pipe_index] = cpu_to_le16(dsp_format);
782*dd7b254dSGiuliano Pochini }
783*dd7b254dSGiuliano Pochini 
784*dd7b254dSGiuliano Pochini 
785*dd7b254dSGiuliano Pochini 
786*dd7b254dSGiuliano Pochini /* start_transport starts transport for a set of pipes.
787*dd7b254dSGiuliano Pochini The bits 1 in channel_mask specify what pipes to start. Only the bit of the
788*dd7b254dSGiuliano Pochini first channel must be set, regardless its interleave.
789*dd7b254dSGiuliano Pochini Same thing for pause_ and stop_ -trasport below. */
790*dd7b254dSGiuliano Pochini static int start_transport(struct echoaudio *chip, u32 channel_mask,
791*dd7b254dSGiuliano Pochini 			   u32 cyclic_mask)
792*dd7b254dSGiuliano Pochini {
793*dd7b254dSGiuliano Pochini 	DE_ACT(("start_transport %x\n", channel_mask));
794*dd7b254dSGiuliano Pochini 
795*dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
796*dd7b254dSGiuliano Pochini 		return -EIO;
797*dd7b254dSGiuliano Pochini 
798*dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_start |= cpu_to_le32(channel_mask);
799*dd7b254dSGiuliano Pochini 
800*dd7b254dSGiuliano Pochini 	if (chip->comm_page->cmd_start) {
801*dd7b254dSGiuliano Pochini 		clear_handshake(chip);
802*dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_START_TRANSFER);
803*dd7b254dSGiuliano Pochini 		if (wait_handshake(chip))
804*dd7b254dSGiuliano Pochini 			return -EIO;
805*dd7b254dSGiuliano Pochini 		/* Keep track of which pipes are transporting */
806*dd7b254dSGiuliano Pochini 		chip->active_mask |= channel_mask;
807*dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_start = 0;
808*dd7b254dSGiuliano Pochini 		return 0;
809*dd7b254dSGiuliano Pochini 	}
810*dd7b254dSGiuliano Pochini 
811*dd7b254dSGiuliano Pochini 	DE_ACT(("start_transport: No pipes to start!\n"));
812*dd7b254dSGiuliano Pochini 	return -EINVAL;
813*dd7b254dSGiuliano Pochini }
814*dd7b254dSGiuliano Pochini 
815*dd7b254dSGiuliano Pochini 
816*dd7b254dSGiuliano Pochini 
817*dd7b254dSGiuliano Pochini static int pause_transport(struct echoaudio *chip, u32 channel_mask)
818*dd7b254dSGiuliano Pochini {
819*dd7b254dSGiuliano Pochini 	DE_ACT(("pause_transport %x\n", channel_mask));
820*dd7b254dSGiuliano Pochini 
821*dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
822*dd7b254dSGiuliano Pochini 		return -EIO;
823*dd7b254dSGiuliano Pochini 
824*dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask);
825*dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_reset = 0;
826*dd7b254dSGiuliano Pochini 	if (chip->comm_page->cmd_stop) {
827*dd7b254dSGiuliano Pochini 		clear_handshake(chip);
828*dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_STOP_TRANSFER);
829*dd7b254dSGiuliano Pochini 		if (wait_handshake(chip))
830*dd7b254dSGiuliano Pochini 			return -EIO;
831*dd7b254dSGiuliano Pochini 		/* Keep track of which pipes are transporting */
832*dd7b254dSGiuliano Pochini 		chip->active_mask &= ~channel_mask;
833*dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_stop = 0;
834*dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_reset = 0;
835*dd7b254dSGiuliano Pochini 		return 0;
836*dd7b254dSGiuliano Pochini 	}
837*dd7b254dSGiuliano Pochini 
838*dd7b254dSGiuliano Pochini 	DE_ACT(("pause_transport: No pipes to stop!\n"));
839*dd7b254dSGiuliano Pochini 	return 0;
840*dd7b254dSGiuliano Pochini }
841*dd7b254dSGiuliano Pochini 
842*dd7b254dSGiuliano Pochini 
843*dd7b254dSGiuliano Pochini 
844*dd7b254dSGiuliano Pochini static int stop_transport(struct echoaudio *chip, u32 channel_mask)
845*dd7b254dSGiuliano Pochini {
846*dd7b254dSGiuliano Pochini 	DE_ACT(("stop_transport %x\n", channel_mask));
847*dd7b254dSGiuliano Pochini 
848*dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
849*dd7b254dSGiuliano Pochini 		return -EIO;
850*dd7b254dSGiuliano Pochini 
851*dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask);
852*dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_reset |= cpu_to_le32(channel_mask);
853*dd7b254dSGiuliano Pochini 	if (chip->comm_page->cmd_reset) {
854*dd7b254dSGiuliano Pochini 		clear_handshake(chip);
855*dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_STOP_TRANSFER);
856*dd7b254dSGiuliano Pochini 		if (wait_handshake(chip))
857*dd7b254dSGiuliano Pochini 			return -EIO;
858*dd7b254dSGiuliano Pochini 		/* Keep track of which pipes are transporting */
859*dd7b254dSGiuliano Pochini 		chip->active_mask &= ~channel_mask;
860*dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_stop = 0;
861*dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_reset = 0;
862*dd7b254dSGiuliano Pochini 		return 0;
863*dd7b254dSGiuliano Pochini 	}
864*dd7b254dSGiuliano Pochini 
865*dd7b254dSGiuliano Pochini 	DE_ACT(("stop_transport: No pipes to stop!\n"));
866*dd7b254dSGiuliano Pochini 	return 0;
867*dd7b254dSGiuliano Pochini }
868*dd7b254dSGiuliano Pochini 
869*dd7b254dSGiuliano Pochini 
870*dd7b254dSGiuliano Pochini 
871*dd7b254dSGiuliano Pochini static inline int is_pipe_allocated(struct echoaudio *chip, u16 pipe_index)
872*dd7b254dSGiuliano Pochini {
873*dd7b254dSGiuliano Pochini 	return (chip->pipe_alloc_mask & (1 << pipe_index));
874*dd7b254dSGiuliano Pochini }
875*dd7b254dSGiuliano Pochini 
876*dd7b254dSGiuliano Pochini 
877*dd7b254dSGiuliano Pochini 
878*dd7b254dSGiuliano Pochini /* Stops everything and turns off the DSP. All pipes should be already
879*dd7b254dSGiuliano Pochini stopped and unallocated. */
880*dd7b254dSGiuliano Pochini static int rest_in_peace(struct echoaudio *chip)
881*dd7b254dSGiuliano Pochini {
882*dd7b254dSGiuliano Pochini 	DE_ACT(("rest_in_peace() open=%x\n", chip->pipe_alloc_mask));
883*dd7b254dSGiuliano Pochini 
884*dd7b254dSGiuliano Pochini 	/* Stops all active pipes (just to be sure) */
885*dd7b254dSGiuliano Pochini 	stop_transport(chip, chip->active_mask);
886*dd7b254dSGiuliano Pochini 
887*dd7b254dSGiuliano Pochini 	set_meters_on(chip, FALSE);
888*dd7b254dSGiuliano Pochini 
889*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MIDI
890*dd7b254dSGiuliano Pochini 	enable_midi_input(chip, FALSE);
891*dd7b254dSGiuliano Pochini #endif
892*dd7b254dSGiuliano Pochini 
893*dd7b254dSGiuliano Pochini 	/* Go to sleep */
894*dd7b254dSGiuliano Pochini 	if (chip->dsp_code) {
895*dd7b254dSGiuliano Pochini 		/* Make load_firmware do a complete reload */
896*dd7b254dSGiuliano Pochini 		chip->dsp_code = NULL;
897*dd7b254dSGiuliano Pochini 		/* Put the DSP to sleep */
898*dd7b254dSGiuliano Pochini 		return send_vector(chip, DSP_VC_GO_COMATOSE);
899*dd7b254dSGiuliano Pochini 	}
900*dd7b254dSGiuliano Pochini 	return 0;
901*dd7b254dSGiuliano Pochini }
902*dd7b254dSGiuliano Pochini 
903*dd7b254dSGiuliano Pochini 
904*dd7b254dSGiuliano Pochini 
905*dd7b254dSGiuliano Pochini /* Fills the comm page with default values */
906*dd7b254dSGiuliano Pochini static int init_dsp_comm_page(struct echoaudio *chip)
907*dd7b254dSGiuliano Pochini {
908*dd7b254dSGiuliano Pochini 	/* Check if the compiler added extra padding inside the structure */
909*dd7b254dSGiuliano Pochini 	if (offsetof(struct comm_page, midi_output) != 0xbe0) {
910*dd7b254dSGiuliano Pochini 		DE_INIT(("init_dsp_comm_page() - Invalid struct comm_page structure\n"));
911*dd7b254dSGiuliano Pochini 		return -EPERM;
912*dd7b254dSGiuliano Pochini 	}
913*dd7b254dSGiuliano Pochini 
914*dd7b254dSGiuliano Pochini 	/* Init all the basic stuff */
915*dd7b254dSGiuliano Pochini 	chip->card_name = ECHOCARD_NAME;
916*dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;	/* Set TRUE until DSP loaded */
917*dd7b254dSGiuliano Pochini 	chip->dsp_code = NULL;	/* Current DSP code not loaded */
918*dd7b254dSGiuliano Pochini 	chip->digital_mode = DIGITAL_MODE_NONE;
919*dd7b254dSGiuliano Pochini 	chip->input_clock = ECHO_CLOCK_INTERNAL;
920*dd7b254dSGiuliano Pochini 	chip->output_clock = ECHO_CLOCK_WORD;
921*dd7b254dSGiuliano Pochini 	chip->asic_loaded = FALSE;
922*dd7b254dSGiuliano Pochini 	memset(chip->comm_page, 0, sizeof(struct comm_page));
923*dd7b254dSGiuliano Pochini 
924*dd7b254dSGiuliano Pochini 	/* Init the comm page */
925*dd7b254dSGiuliano Pochini 	chip->comm_page->comm_size =
926*dd7b254dSGiuliano Pochini 		__constant_cpu_to_le32(sizeof(struct comm_page));
927*dd7b254dSGiuliano Pochini 	chip->comm_page->handshake = 0xffffffff;
928*dd7b254dSGiuliano Pochini 	chip->comm_page->midi_out_free_count =
929*dd7b254dSGiuliano Pochini 		__constant_cpu_to_le32(DSP_MIDI_OUT_FIFO_SIZE);
930*dd7b254dSGiuliano Pochini 	chip->comm_page->sample_rate = __constant_cpu_to_le32(44100);
931*dd7b254dSGiuliano Pochini 	chip->sample_rate = 44100;
932*dd7b254dSGiuliano Pochini 
933*dd7b254dSGiuliano Pochini 	/* Set line levels so we don't blast any inputs on startup */
934*dd7b254dSGiuliano Pochini 	memset(chip->comm_page->monitors, ECHOGAIN_MUTED, MONITOR_ARRAY_SIZE);
935*dd7b254dSGiuliano Pochini 	memset(chip->comm_page->vmixer, ECHOGAIN_MUTED, VMIXER_ARRAY_SIZE);
936*dd7b254dSGiuliano Pochini 
937*dd7b254dSGiuliano Pochini 	return 0;
938*dd7b254dSGiuliano Pochini }
939*dd7b254dSGiuliano Pochini 
940*dd7b254dSGiuliano Pochini 
941*dd7b254dSGiuliano Pochini 
942*dd7b254dSGiuliano Pochini /* This function initializes the several volume controls for busses and pipes.
943*dd7b254dSGiuliano Pochini This MUST be called after the DSP is up and running ! */
944*dd7b254dSGiuliano Pochini static int init_line_levels(struct echoaudio *chip)
945*dd7b254dSGiuliano Pochini {
946*dd7b254dSGiuliano Pochini 	int st, i, o;
947*dd7b254dSGiuliano Pochini 
948*dd7b254dSGiuliano Pochini 	DE_INIT(("init_line_levels\n"));
949*dd7b254dSGiuliano Pochini 
950*dd7b254dSGiuliano Pochini 	/* Mute output busses */
951*dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_out(chip); i++)
952*dd7b254dSGiuliano Pochini 		if ((st = set_output_gain(chip, i, ECHOGAIN_MUTED)))
953*dd7b254dSGiuliano Pochini 			return st;
954*dd7b254dSGiuliano Pochini 	if ((st = update_output_line_level(chip)))
955*dd7b254dSGiuliano Pochini 		return st;
956*dd7b254dSGiuliano Pochini 
957*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_VMIXER
958*dd7b254dSGiuliano Pochini 	/* Mute the Vmixer */
959*dd7b254dSGiuliano Pochini 	for (i = 0; i < num_pipes_out(chip); i++)
960*dd7b254dSGiuliano Pochini 		for (o = 0; o < num_busses_out(chip); o++)
961*dd7b254dSGiuliano Pochini 			if ((st = set_vmixer_gain(chip, o, i, ECHOGAIN_MUTED)))
962*dd7b254dSGiuliano Pochini 				return st;
963*dd7b254dSGiuliano Pochini 	if ((st = update_vmixer_level(chip)))
964*dd7b254dSGiuliano Pochini 		return st;
965*dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_VMIXER */
966*dd7b254dSGiuliano Pochini 
967*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MONITOR
968*dd7b254dSGiuliano Pochini 	/* Mute the monitor mixer */
969*dd7b254dSGiuliano Pochini 	for (o = 0; o < num_busses_out(chip); o++)
970*dd7b254dSGiuliano Pochini 		for (i = 0; i < num_busses_in(chip); i++)
971*dd7b254dSGiuliano Pochini 			if ((st = set_monitor_gain(chip, o, i, ECHOGAIN_MUTED)))
972*dd7b254dSGiuliano Pochini 				return st;
973*dd7b254dSGiuliano Pochini 	if ((st = update_output_line_level(chip)))
974*dd7b254dSGiuliano Pochini 		return st;
975*dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_MONITOR */
976*dd7b254dSGiuliano Pochini 
977*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_INPUT_GAIN
978*dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_in(chip); i++)
979*dd7b254dSGiuliano Pochini 		if ((st = set_input_gain(chip, i, ECHOGAIN_MUTED)))
980*dd7b254dSGiuliano Pochini 			return st;
981*dd7b254dSGiuliano Pochini 	if ((st = update_input_line_level(chip)))
982*dd7b254dSGiuliano Pochini 		return st;
983*dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_INPUT_GAIN */
984*dd7b254dSGiuliano Pochini 
985*dd7b254dSGiuliano Pochini 	return 0;
986*dd7b254dSGiuliano Pochini }
987*dd7b254dSGiuliano Pochini 
988*dd7b254dSGiuliano Pochini 
989*dd7b254dSGiuliano Pochini 
990*dd7b254dSGiuliano Pochini /* This is low level part of the interrupt handler.
991*dd7b254dSGiuliano Pochini It returns -1 if the IRQ is not ours, or N>=0 if it is, where N is the number
992*dd7b254dSGiuliano Pochini of midi data in the input queue. */
993*dd7b254dSGiuliano Pochini static int service_irq(struct echoaudio *chip)
994*dd7b254dSGiuliano Pochini {
995*dd7b254dSGiuliano Pochini 	int st;
996*dd7b254dSGiuliano Pochini 
997*dd7b254dSGiuliano Pochini 	/* Read the DSP status register and see if this DSP generated this interrupt */
998*dd7b254dSGiuliano Pochini 	if (get_dsp_register(chip, CHI32_STATUS_REG) & CHI32_STATUS_IRQ) {
999*dd7b254dSGiuliano Pochini 		st = 0;
1000*dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MIDI
1001*dd7b254dSGiuliano Pochini 		/* Get and parse midi data if present */
1002*dd7b254dSGiuliano Pochini 		if (chip->comm_page->midi_input[0])	/* The count is at index 0 */
1003*dd7b254dSGiuliano Pochini 			st = midi_service_irq(chip);	/* Returns how many midi bytes we received */
1004*dd7b254dSGiuliano Pochini #endif
1005*dd7b254dSGiuliano Pochini 		/* Clear the hardware interrupt */
1006*dd7b254dSGiuliano Pochini 		chip->comm_page->midi_input[0] = 0;
1007*dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_ACK_INT);
1008*dd7b254dSGiuliano Pochini 		return st;
1009*dd7b254dSGiuliano Pochini 	}
1010*dd7b254dSGiuliano Pochini 	return -1;
1011*dd7b254dSGiuliano Pochini }
1012*dd7b254dSGiuliano Pochini 
1013*dd7b254dSGiuliano Pochini 
1014*dd7b254dSGiuliano Pochini 
1015*dd7b254dSGiuliano Pochini 
1016*dd7b254dSGiuliano Pochini /******************************************************************************
1017*dd7b254dSGiuliano Pochini 	Functions for opening and closing pipes
1018*dd7b254dSGiuliano Pochini  ******************************************************************************/
1019*dd7b254dSGiuliano Pochini 
1020*dd7b254dSGiuliano Pochini /* allocate_pipes is used to reserve audio pipes for your exclusive use.
1021*dd7b254dSGiuliano Pochini The call will fail if some pipes are already allocated. */
1022*dd7b254dSGiuliano Pochini static int allocate_pipes(struct echoaudio *chip, struct audiopipe *pipe,
1023*dd7b254dSGiuliano Pochini 			  int pipe_index, int interleave)
1024*dd7b254dSGiuliano Pochini {
1025*dd7b254dSGiuliano Pochini 	int i;
1026*dd7b254dSGiuliano Pochini 	u32 channel_mask;
1027*dd7b254dSGiuliano Pochini 	char is_cyclic;
1028*dd7b254dSGiuliano Pochini 
1029*dd7b254dSGiuliano Pochini 	DE_ACT(("allocate_pipes: ch=%d int=%d\n", pipe_index, interleave));
1030*dd7b254dSGiuliano Pochini 
1031*dd7b254dSGiuliano Pochini 	if (chip->bad_board)
1032*dd7b254dSGiuliano Pochini 		return -EIO;
1033*dd7b254dSGiuliano Pochini 
1034*dd7b254dSGiuliano Pochini 	is_cyclic = 1;	/* This driver uses cyclic buffers only */
1035*dd7b254dSGiuliano Pochini 
1036*dd7b254dSGiuliano Pochini 	for (channel_mask = i = 0; i < interleave; i++)
1037*dd7b254dSGiuliano Pochini 		channel_mask |= 1 << (pipe_index + i);
1038*dd7b254dSGiuliano Pochini 	if (chip->pipe_alloc_mask & channel_mask) {
1039*dd7b254dSGiuliano Pochini 		DE_ACT(("allocate_pipes: channel already open\n"));
1040*dd7b254dSGiuliano Pochini 		return -EAGAIN;
1041*dd7b254dSGiuliano Pochini 	}
1042*dd7b254dSGiuliano Pochini 
1043*dd7b254dSGiuliano Pochini 	chip->comm_page->position[pipe_index] = 0;
1044*dd7b254dSGiuliano Pochini 	chip->pipe_alloc_mask |= channel_mask;
1045*dd7b254dSGiuliano Pochini 	if (is_cyclic)
1046*dd7b254dSGiuliano Pochini 		chip->pipe_cyclic_mask |= channel_mask;
1047*dd7b254dSGiuliano Pochini 	pipe->index = pipe_index;
1048*dd7b254dSGiuliano Pochini 	pipe->interleave = interleave;
1049*dd7b254dSGiuliano Pochini 	pipe->state = PIPE_STATE_STOPPED;
1050*dd7b254dSGiuliano Pochini 
1051*dd7b254dSGiuliano Pochini 	/* The counter register is where the DSP writes the 32 bit DMA
1052*dd7b254dSGiuliano Pochini 	position for a pipe.  The DSP is constantly updating this value as
1053*dd7b254dSGiuliano Pochini 	it moves data. The DMA counter is in units of bytes, not samples. */
1054*dd7b254dSGiuliano Pochini 	pipe->dma_counter = &chip->comm_page->position[pipe_index];
1055*dd7b254dSGiuliano Pochini 	*pipe->dma_counter = 0;
1056*dd7b254dSGiuliano Pochini 	DE_ACT(("allocate_pipes: ok\n"));
1057*dd7b254dSGiuliano Pochini 	return pipe_index;
1058*dd7b254dSGiuliano Pochini }
1059*dd7b254dSGiuliano Pochini 
1060*dd7b254dSGiuliano Pochini 
1061*dd7b254dSGiuliano Pochini 
1062*dd7b254dSGiuliano Pochini static int free_pipes(struct echoaudio *chip, struct audiopipe *pipe)
1063*dd7b254dSGiuliano Pochini {
1064*dd7b254dSGiuliano Pochini 	u32 channel_mask;
1065*dd7b254dSGiuliano Pochini 	int i;
1066*dd7b254dSGiuliano Pochini 
1067*dd7b254dSGiuliano Pochini 	DE_ACT(("free_pipes: Pipe %d\n", pipe->index));
1068*dd7b254dSGiuliano Pochini 	snd_assert(is_pipe_allocated(chip, pipe->index), return -EINVAL);
1069*dd7b254dSGiuliano Pochini 	snd_assert(pipe->state == PIPE_STATE_STOPPED, return -EINVAL);
1070*dd7b254dSGiuliano Pochini 
1071*dd7b254dSGiuliano Pochini 	for (channel_mask = i = 0; i < pipe->interleave; i++)
1072*dd7b254dSGiuliano Pochini 		channel_mask |= 1 << (pipe->index + i);
1073*dd7b254dSGiuliano Pochini 
1074*dd7b254dSGiuliano Pochini 	chip->pipe_alloc_mask &= ~channel_mask;
1075*dd7b254dSGiuliano Pochini 	chip->pipe_cyclic_mask &= ~channel_mask;
1076*dd7b254dSGiuliano Pochini 	return 0;
1077*dd7b254dSGiuliano Pochini }
1078*dd7b254dSGiuliano Pochini 
1079*dd7b254dSGiuliano Pochini 
1080*dd7b254dSGiuliano Pochini 
1081*dd7b254dSGiuliano Pochini /******************************************************************************
1082*dd7b254dSGiuliano Pochini 	Functions for managing the scatter-gather list
1083*dd7b254dSGiuliano Pochini ******************************************************************************/
1084*dd7b254dSGiuliano Pochini 
1085*dd7b254dSGiuliano Pochini static int sglist_init(struct echoaudio *chip, struct audiopipe *pipe)
1086*dd7b254dSGiuliano Pochini {
1087*dd7b254dSGiuliano Pochini 	pipe->sglist_head = 0;
1088*dd7b254dSGiuliano Pochini 	memset(pipe->sgpage.area, 0, PAGE_SIZE);
1089*dd7b254dSGiuliano Pochini 	chip->comm_page->sglist_addr[pipe->index].addr =
1090*dd7b254dSGiuliano Pochini 		cpu_to_le32(pipe->sgpage.addr);
1091*dd7b254dSGiuliano Pochini 	return 0;
1092*dd7b254dSGiuliano Pochini }
1093*dd7b254dSGiuliano Pochini 
1094*dd7b254dSGiuliano Pochini 
1095*dd7b254dSGiuliano Pochini 
1096*dd7b254dSGiuliano Pochini static int sglist_add_mapping(struct echoaudio *chip, struct audiopipe *pipe,
1097*dd7b254dSGiuliano Pochini 				dma_addr_t address, size_t length)
1098*dd7b254dSGiuliano Pochini {
1099*dd7b254dSGiuliano Pochini 	int head = pipe->sglist_head;
1100*dd7b254dSGiuliano Pochini 	struct sg_entry *list = (struct sg_entry *)pipe->sgpage.area;
1101*dd7b254dSGiuliano Pochini 
1102*dd7b254dSGiuliano Pochini 	if (head < MAX_SGLIST_ENTRIES - 1) {
1103*dd7b254dSGiuliano Pochini 		list[head].addr = cpu_to_le32(address);
1104*dd7b254dSGiuliano Pochini 		list[head].size = cpu_to_le32(length);
1105*dd7b254dSGiuliano Pochini 		pipe->sglist_head++;
1106*dd7b254dSGiuliano Pochini 	} else {
1107*dd7b254dSGiuliano Pochini 		DE_ACT(("SGlist: too many fragments\n"));
1108*dd7b254dSGiuliano Pochini 		return -ENOMEM;
1109*dd7b254dSGiuliano Pochini 	}
1110*dd7b254dSGiuliano Pochini 	return 0;
1111*dd7b254dSGiuliano Pochini }
1112*dd7b254dSGiuliano Pochini 
1113*dd7b254dSGiuliano Pochini 
1114*dd7b254dSGiuliano Pochini 
1115*dd7b254dSGiuliano Pochini static inline int sglist_add_irq(struct echoaudio *chip, struct audiopipe *pipe)
1116*dd7b254dSGiuliano Pochini {
1117*dd7b254dSGiuliano Pochini 	return sglist_add_mapping(chip, pipe, 0, 0);
1118*dd7b254dSGiuliano Pochini }
1119*dd7b254dSGiuliano Pochini 
1120*dd7b254dSGiuliano Pochini 
1121*dd7b254dSGiuliano Pochini 
1122*dd7b254dSGiuliano Pochini static inline int sglist_wrap(struct echoaudio *chip, struct audiopipe *pipe)
1123*dd7b254dSGiuliano Pochini {
1124*dd7b254dSGiuliano Pochini 	return sglist_add_mapping(chip, pipe, pipe->sgpage.addr, 0);
1125*dd7b254dSGiuliano Pochini }
1126