xref: /openbmc/linux/sound/pci/echoaudio/echoaudio_dsp.c (revision b5b4a41b392960010fccf1f9ccf8334d612bd450)
1dd7b254dSGiuliano Pochini /****************************************************************************
2dd7b254dSGiuliano Pochini 
3dd7b254dSGiuliano Pochini    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4dd7b254dSGiuliano Pochini    All rights reserved
5dd7b254dSGiuliano Pochini    www.echoaudio.com
6dd7b254dSGiuliano Pochini 
7dd7b254dSGiuliano Pochini    This file is part of Echo Digital Audio's generic driver library.
8dd7b254dSGiuliano Pochini 
9dd7b254dSGiuliano Pochini    Echo Digital Audio's generic driver library is free software;
10dd7b254dSGiuliano Pochini    you can redistribute it and/or modify it under the terms of
11dd7b254dSGiuliano Pochini    the GNU General Public License as published by the Free Software
12dd7b254dSGiuliano Pochini    Foundation.
13dd7b254dSGiuliano Pochini 
14dd7b254dSGiuliano Pochini    This program is distributed in the hope that it will be useful,
15dd7b254dSGiuliano Pochini    but WITHOUT ANY WARRANTY; without even the implied warranty of
16dd7b254dSGiuliano Pochini    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17dd7b254dSGiuliano Pochini    GNU General Public License for more details.
18dd7b254dSGiuliano Pochini 
19dd7b254dSGiuliano Pochini    You should have received a copy of the GNU General Public License
20dd7b254dSGiuliano Pochini    along with this program; if not, write to the Free Software
21dd7b254dSGiuliano Pochini    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22dd7b254dSGiuliano Pochini    MA  02111-1307, USA.
23dd7b254dSGiuliano Pochini 
24dd7b254dSGiuliano Pochini    *************************************************************************
25dd7b254dSGiuliano Pochini 
26dd7b254dSGiuliano Pochini  Translation from C++ and adaptation for use in ALSA-Driver
27dd7b254dSGiuliano Pochini  were made by Giuliano Pochini <pochini@shiny.it>
28dd7b254dSGiuliano Pochini 
29dd7b254dSGiuliano Pochini ****************************************************************************/
30dd7b254dSGiuliano Pochini 
31dd7b254dSGiuliano Pochini #if PAGE_SIZE < 4096
32dd7b254dSGiuliano Pochini #error PAGE_SIZE is < 4k
33dd7b254dSGiuliano Pochini #endif
34dd7b254dSGiuliano Pochini 
35dd7b254dSGiuliano Pochini static int restore_dsp_rettings(struct echoaudio *chip);
36dd7b254dSGiuliano Pochini 
37dd7b254dSGiuliano Pochini 
38dd7b254dSGiuliano Pochini /* Some vector commands involve the DSP reading or writing data to and from the
39dd7b254dSGiuliano Pochini comm page; if you send one of these commands to the DSP, it will complete the
40dd7b254dSGiuliano Pochini command and then write a non-zero value to the Handshake field in the
41dd7b254dSGiuliano Pochini comm page.  This function waits for the handshake to show up. */
42dd7b254dSGiuliano Pochini static int wait_handshake(struct echoaudio *chip)
43dd7b254dSGiuliano Pochini {
44dd7b254dSGiuliano Pochini 	int i;
45dd7b254dSGiuliano Pochini 
4622d3a200SGiuliano Pochini 	/* Wait up to 20ms for the handshake from the DSP */
47dd7b254dSGiuliano Pochini 	for (i = 0; i < HANDSHAKE_TIMEOUT; i++) {
48dd7b254dSGiuliano Pochini 		/* Look for the handshake value */
4922d3a200SGiuliano Pochini 		barrier();
50dd7b254dSGiuliano Pochini 		if (chip->comm_page->handshake) {
51dd7b254dSGiuliano Pochini 			return 0;
52dd7b254dSGiuliano Pochini 		}
53dd7b254dSGiuliano Pochini 		udelay(1);
54dd7b254dSGiuliano Pochini 	}
55dd7b254dSGiuliano Pochini 
56ece7a36dSTakashi Iwai 	dev_err(chip->card->dev, "wait_handshake(): Timeout waiting for DSP\n");
57dd7b254dSGiuliano Pochini 	return -EBUSY;
58dd7b254dSGiuliano Pochini }
59dd7b254dSGiuliano Pochini 
60dd7b254dSGiuliano Pochini 
61dd7b254dSGiuliano Pochini 
62dd7b254dSGiuliano Pochini /* Much of the interaction between the DSP and the driver is done via vector
63dd7b254dSGiuliano Pochini commands; send_vector writes a vector command to the DSP.  Typically, this
64dd7b254dSGiuliano Pochini causes the DSP to read or write fields in the comm page.
65dd7b254dSGiuliano Pochini PCI posting is not required thanks to the handshake logic. */
66dd7b254dSGiuliano Pochini static int send_vector(struct echoaudio *chip, u32 command)
67dd7b254dSGiuliano Pochini {
68dd7b254dSGiuliano Pochini 	int i;
69dd7b254dSGiuliano Pochini 
70dd7b254dSGiuliano Pochini 	wmb();	/* Flush all pending writes before sending the command */
71dd7b254dSGiuliano Pochini 
72dd7b254dSGiuliano Pochini 	/* Wait up to 100ms for the "vector busy" bit to be off */
73dd7b254dSGiuliano Pochini 	for (i = 0; i < VECTOR_BUSY_TIMEOUT; i++) {
74dd7b254dSGiuliano Pochini 		if (!(get_dsp_register(chip, CHI32_VECTOR_REG) &
75dd7b254dSGiuliano Pochini 		      CHI32_VECTOR_BUSY)) {
76dd7b254dSGiuliano Pochini 			set_dsp_register(chip, CHI32_VECTOR_REG, command);
77dd7b254dSGiuliano Pochini 			/*if (i)  DE_ACT(("send_vector time: %d\n", i));*/
78dd7b254dSGiuliano Pochini 			return 0;
79dd7b254dSGiuliano Pochini 		}
80dd7b254dSGiuliano Pochini 		udelay(1);
81dd7b254dSGiuliano Pochini 	}
82dd7b254dSGiuliano Pochini 
83*b5b4a41bSSudip Mukherjee 	dev_err(chip->card->dev, "timeout on send_vector\n");
84dd7b254dSGiuliano Pochini 	return -EBUSY;
85dd7b254dSGiuliano Pochini }
86dd7b254dSGiuliano Pochini 
87dd7b254dSGiuliano Pochini 
88dd7b254dSGiuliano Pochini 
89dd7b254dSGiuliano Pochini /* write_dsp writes a 32-bit value to the DSP; this is used almost
90dd7b254dSGiuliano Pochini exclusively for loading the DSP. */
91dd7b254dSGiuliano Pochini static int write_dsp(struct echoaudio *chip, u32 data)
92dd7b254dSGiuliano Pochini {
93dd7b254dSGiuliano Pochini 	u32 status, i;
94dd7b254dSGiuliano Pochini 
95dd7b254dSGiuliano Pochini 	for (i = 0; i < 10000000; i++) {	/* timeout = 10s */
96dd7b254dSGiuliano Pochini 		status = get_dsp_register(chip, CHI32_STATUS_REG);
97dd7b254dSGiuliano Pochini 		if ((status & CHI32_STATUS_HOST_WRITE_EMPTY) != 0) {
98dd7b254dSGiuliano Pochini 			set_dsp_register(chip, CHI32_DATA_REG, data);
99dd7b254dSGiuliano Pochini 			wmb();			/* write it immediately */
100dd7b254dSGiuliano Pochini 			return 0;
101dd7b254dSGiuliano Pochini 		}
102dd7b254dSGiuliano Pochini 		udelay(1);
103dd7b254dSGiuliano Pochini 		cond_resched();
104dd7b254dSGiuliano Pochini 	}
105dd7b254dSGiuliano Pochini 
106dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;		/* Set TRUE until DSP re-loaded */
107*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "write_dsp: Set bad_board to TRUE\n");
108dd7b254dSGiuliano Pochini 	return -EIO;
109dd7b254dSGiuliano Pochini }
110dd7b254dSGiuliano Pochini 
111dd7b254dSGiuliano Pochini 
112dd7b254dSGiuliano Pochini 
113dd7b254dSGiuliano Pochini /* read_dsp reads a 32-bit value from the DSP; this is used almost
114dd7b254dSGiuliano Pochini exclusively for loading the DSP and checking the status of the ASIC. */
115dd7b254dSGiuliano Pochini static int read_dsp(struct echoaudio *chip, u32 *data)
116dd7b254dSGiuliano Pochini {
117dd7b254dSGiuliano Pochini 	u32 status, i;
118dd7b254dSGiuliano Pochini 
119dd7b254dSGiuliano Pochini 	for (i = 0; i < READ_DSP_TIMEOUT; i++) {
120dd7b254dSGiuliano Pochini 		status = get_dsp_register(chip, CHI32_STATUS_REG);
121dd7b254dSGiuliano Pochini 		if ((status & CHI32_STATUS_HOST_READ_FULL) != 0) {
122dd7b254dSGiuliano Pochini 			*data = get_dsp_register(chip, CHI32_DATA_REG);
123dd7b254dSGiuliano Pochini 			return 0;
124dd7b254dSGiuliano Pochini 		}
125dd7b254dSGiuliano Pochini 		udelay(1);
126dd7b254dSGiuliano Pochini 		cond_resched();
127dd7b254dSGiuliano Pochini 	}
128dd7b254dSGiuliano Pochini 
129dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;		/* Set TRUE until DSP re-loaded */
130*b5b4a41bSSudip Mukherjee 	dev_err(chip->card->dev, "read_dsp: Set bad_board to TRUE\n");
131dd7b254dSGiuliano Pochini 	return -EIO;
132dd7b254dSGiuliano Pochini }
133dd7b254dSGiuliano Pochini 
134dd7b254dSGiuliano Pochini 
135dd7b254dSGiuliano Pochini 
136dd7b254dSGiuliano Pochini /****************************************************************************
137dd7b254dSGiuliano Pochini 	Firmware loading functions
138dd7b254dSGiuliano Pochini  ****************************************************************************/
139dd7b254dSGiuliano Pochini 
140dd7b254dSGiuliano Pochini /* This function is used to read back the serial number from the DSP;
141dd7b254dSGiuliano Pochini this is triggered by the SET_COMMPAGE_ADDR command.
142dd7b254dSGiuliano Pochini Only some early Echogals products have serial numbers in the ROM;
143dd7b254dSGiuliano Pochini the serial number is not used, but you still need to do this as
144dd7b254dSGiuliano Pochini part of the DSP load process. */
145dd7b254dSGiuliano Pochini static int read_sn(struct echoaudio *chip)
146dd7b254dSGiuliano Pochini {
147dd7b254dSGiuliano Pochini 	int i;
148dd7b254dSGiuliano Pochini 	u32 sn[6];
149dd7b254dSGiuliano Pochini 
150dd7b254dSGiuliano Pochini 	for (i = 0; i < 5; i++) {
151dd7b254dSGiuliano Pochini 		if (read_dsp(chip, &sn[i])) {
152ece7a36dSTakashi Iwai 			dev_err(chip->card->dev,
153ece7a36dSTakashi Iwai 				"Failed to read serial number\n");
154dd7b254dSGiuliano Pochini 			return -EIO;
155dd7b254dSGiuliano Pochini 		}
156dd7b254dSGiuliano Pochini 	}
157*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev,
158*b5b4a41bSSudip Mukherjee 		"Read serial number %08x %08x %08x %08x %08x\n",
159*b5b4a41bSSudip Mukherjee 		 sn[0], sn[1], sn[2], sn[3], sn[4]);
160dd7b254dSGiuliano Pochini 	return 0;
161dd7b254dSGiuliano Pochini }
162dd7b254dSGiuliano Pochini 
163dd7b254dSGiuliano Pochini 
164dd7b254dSGiuliano Pochini 
165dd7b254dSGiuliano Pochini #ifndef ECHOCARD_HAS_ASIC
166dd7b254dSGiuliano Pochini /* This card has no ASIC, just return ok */
167dd7b254dSGiuliano Pochini static inline int check_asic_status(struct echoaudio *chip)
168dd7b254dSGiuliano Pochini {
169dd7b254dSGiuliano Pochini 	chip->asic_loaded = TRUE;
170dd7b254dSGiuliano Pochini 	return 0;
171dd7b254dSGiuliano Pochini }
172dd7b254dSGiuliano Pochini 
173dd7b254dSGiuliano Pochini #endif /* !ECHOCARD_HAS_ASIC */
174dd7b254dSGiuliano Pochini 
175dd7b254dSGiuliano Pochini 
176dd7b254dSGiuliano Pochini 
177dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_ASIC
178dd7b254dSGiuliano Pochini 
179dd7b254dSGiuliano Pochini /* Load ASIC code - done after the DSP is loaded */
18019b50063SGiuliano Pochini static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic)
181dd7b254dSGiuliano Pochini {
182dd7b254dSGiuliano Pochini 	const struct firmware *fw;
183dd7b254dSGiuliano Pochini 	int err;
184dd7b254dSGiuliano Pochini 	u32 i, size;
185dd7b254dSGiuliano Pochini 	u8 *code;
186dd7b254dSGiuliano Pochini 
18719b50063SGiuliano Pochini 	err = get_firmware(&fw, chip, asic);
18819b50063SGiuliano Pochini 	if (err < 0) {
189ece7a36dSTakashi Iwai 		dev_warn(chip->card->dev, "Firmware not found !\n");
190dd7b254dSGiuliano Pochini 		return err;
191dd7b254dSGiuliano Pochini 	}
192dd7b254dSGiuliano Pochini 
193dd7b254dSGiuliano Pochini 	code = (u8 *)fw->data;
194dd7b254dSGiuliano Pochini 	size = fw->size;
195dd7b254dSGiuliano Pochini 
196dd7b254dSGiuliano Pochini 	/* Send the "Here comes the ASIC" command */
197dd7b254dSGiuliano Pochini 	if (write_dsp(chip, cmd) < 0)
198dd7b254dSGiuliano Pochini 		goto la_error;
199dd7b254dSGiuliano Pochini 
200dd7b254dSGiuliano Pochini 	/* Write length of ASIC file in bytes */
201dd7b254dSGiuliano Pochini 	if (write_dsp(chip, size) < 0)
202dd7b254dSGiuliano Pochini 		goto la_error;
203dd7b254dSGiuliano Pochini 
204dd7b254dSGiuliano Pochini 	for (i = 0; i < size; i++) {
205dd7b254dSGiuliano Pochini 		if (write_dsp(chip, code[i]) < 0)
206dd7b254dSGiuliano Pochini 			goto la_error;
207dd7b254dSGiuliano Pochini 	}
208dd7b254dSGiuliano Pochini 
209*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "ASIC loaded\n");
210e3690869SSudip Mukherjee 	free_firmware(fw, chip);
211dd7b254dSGiuliano Pochini 	return 0;
212dd7b254dSGiuliano Pochini 
213dd7b254dSGiuliano Pochini la_error:
214*b5b4a41bSSudip Mukherjee 	dev_err(chip->card->dev, "failed on write_dsp\n");
215e3690869SSudip Mukherjee 	free_firmware(fw, chip);
216dd7b254dSGiuliano Pochini 	return -EIO;
217dd7b254dSGiuliano Pochini }
218dd7b254dSGiuliano Pochini 
219dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_ASIC */
220dd7b254dSGiuliano Pochini 
221dd7b254dSGiuliano Pochini 
222dd7b254dSGiuliano Pochini 
223dd7b254dSGiuliano Pochini #ifdef DSP_56361
224dd7b254dSGiuliano Pochini 
225dd7b254dSGiuliano Pochini /* Install the resident loader for 56361 DSPs;  The resident loader is on
226dd7b254dSGiuliano Pochini the EPROM on the board for 56301 DSP. The resident loader is a tiny little
227dd7b254dSGiuliano Pochini program that is used to load the real DSP code. */
228dd7b254dSGiuliano Pochini static int install_resident_loader(struct echoaudio *chip)
229dd7b254dSGiuliano Pochini {
230dd7b254dSGiuliano Pochini 	u32 address;
231dd7b254dSGiuliano Pochini 	int index, words, i;
232dd7b254dSGiuliano Pochini 	u16 *code;
233dd7b254dSGiuliano Pochini 	u32 status;
234dd7b254dSGiuliano Pochini 	const struct firmware *fw;
235dd7b254dSGiuliano Pochini 
236dd7b254dSGiuliano Pochini 	/* 56361 cards only!  This check is required by the old 56301-based
237dd7b254dSGiuliano Pochini 	Mona and Gina24 */
238dd7b254dSGiuliano Pochini 	if (chip->device_id != DEVICE_ID_56361)
239dd7b254dSGiuliano Pochini 		return 0;
240dd7b254dSGiuliano Pochini 
241dd7b254dSGiuliano Pochini 	/* Look to see if the resident loader is present.  If the resident
242dd7b254dSGiuliano Pochini 	loader is already installed, host flag 5 will be on. */
243dd7b254dSGiuliano Pochini 	status = get_dsp_register(chip, CHI32_STATUS_REG);
244dd7b254dSGiuliano Pochini 	if (status & CHI32_STATUS_REG_HF5) {
245*b5b4a41bSSudip Mukherjee 		dev_dbg(chip->card->dev,
246*b5b4a41bSSudip Mukherjee 			"Resident loader already installed; status is 0x%x\n",
247*b5b4a41bSSudip Mukherjee 			 status);
248dd7b254dSGiuliano Pochini 		return 0;
249dd7b254dSGiuliano Pochini 	}
250dd7b254dSGiuliano Pochini 
25119b50063SGiuliano Pochini 	i = get_firmware(&fw, chip, FW_361_LOADER);
25219b50063SGiuliano Pochini 	if (i < 0) {
253ece7a36dSTakashi Iwai 		dev_warn(chip->card->dev, "Firmware not found !\n");
254dd7b254dSGiuliano Pochini 		return i;
255dd7b254dSGiuliano Pochini 	}
256dd7b254dSGiuliano Pochini 
257dd7b254dSGiuliano Pochini 	/* The DSP code is an array of 16 bit words.  The array is divided up
258dd7b254dSGiuliano Pochini 	into sections.  The first word of each section is the size in words,
259dd7b254dSGiuliano Pochini 	followed by the section type.
260dd7b254dSGiuliano Pochini 	Since DSP addresses and data are 24 bits wide, they each take up two
261dd7b254dSGiuliano Pochini 	16 bit words in the array.
262dd7b254dSGiuliano Pochini 	This is a lot like the other loader loop, but it's not a loop, you
263dd7b254dSGiuliano Pochini 	don't write the memory type, and you don't write a zero at the end. */
264dd7b254dSGiuliano Pochini 
265dd7b254dSGiuliano Pochini 	/* Set DSP format bits for 24 bit mode */
266dd7b254dSGiuliano Pochini 	set_dsp_register(chip, CHI32_CONTROL_REG,
267dd7b254dSGiuliano Pochini 			 get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900);
268dd7b254dSGiuliano Pochini 
269dd7b254dSGiuliano Pochini 	code = (u16 *)fw->data;
270dd7b254dSGiuliano Pochini 
271dd7b254dSGiuliano Pochini 	/* Skip the header section; the first word in the array is the size
272dd7b254dSGiuliano Pochini 	of the first section, so the first real section of code is pointed
273dd7b254dSGiuliano Pochini 	to by Code[0]. */
274dd7b254dSGiuliano Pochini 	index = code[0];
275dd7b254dSGiuliano Pochini 
276dd7b254dSGiuliano Pochini 	/* Skip the section size, LRS block type, and DSP memory type */
277dd7b254dSGiuliano Pochini 	index += 3;
278dd7b254dSGiuliano Pochini 
279dd7b254dSGiuliano Pochini 	/* Get the number of DSP words to write */
280dd7b254dSGiuliano Pochini 	words = code[index++];
281dd7b254dSGiuliano Pochini 
282dd7b254dSGiuliano Pochini 	/* Get the DSP address for this block; 24 bits, so build from two words */
283dd7b254dSGiuliano Pochini 	address = ((u32)code[index] << 16) + code[index + 1];
284dd7b254dSGiuliano Pochini 	index += 2;
285dd7b254dSGiuliano Pochini 
286dd7b254dSGiuliano Pochini 	/* Write the count to the DSP */
287dd7b254dSGiuliano Pochini 	if (write_dsp(chip, words)) {
288*b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev,
289*b5b4a41bSSudip Mukherjee 			"install_resident_loader: Failed to write word count!\n");
290dd7b254dSGiuliano Pochini 		goto irl_error;
291dd7b254dSGiuliano Pochini 	}
292dd7b254dSGiuliano Pochini 	/* Write the DSP address */
293dd7b254dSGiuliano Pochini 	if (write_dsp(chip, address)) {
294*b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev,
295*b5b4a41bSSudip Mukherjee 			"install_resident_loader: Failed to write DSP address!\n");
296dd7b254dSGiuliano Pochini 		goto irl_error;
297dd7b254dSGiuliano Pochini 	}
298dd7b254dSGiuliano Pochini 	/* Write out this block of code to the DSP */
299dd7b254dSGiuliano Pochini 	for (i = 0; i < words; i++) {
300dd7b254dSGiuliano Pochini 		u32 data;
301dd7b254dSGiuliano Pochini 
302dd7b254dSGiuliano Pochini 		data = ((u32)code[index] << 16) + code[index + 1];
303dd7b254dSGiuliano Pochini 		if (write_dsp(chip, data)) {
304*b5b4a41bSSudip Mukherjee 			dev_err(chip->card->dev,
305*b5b4a41bSSudip Mukherjee 				"install_resident_loader: Failed to write DSP code\n");
306dd7b254dSGiuliano Pochini 			goto irl_error;
307dd7b254dSGiuliano Pochini 		}
308dd7b254dSGiuliano Pochini 		index += 2;
309dd7b254dSGiuliano Pochini 	}
310dd7b254dSGiuliano Pochini 
311dd7b254dSGiuliano Pochini 	/* Wait for flag 5 to come up */
312dd7b254dSGiuliano Pochini 	for (i = 0; i < 200; i++) {	/* Timeout is 50us * 200 = 10ms */
313dd7b254dSGiuliano Pochini 		udelay(50);
314dd7b254dSGiuliano Pochini 		status = get_dsp_register(chip, CHI32_STATUS_REG);
315dd7b254dSGiuliano Pochini 		if (status & CHI32_STATUS_REG_HF5)
316dd7b254dSGiuliano Pochini 			break;
317dd7b254dSGiuliano Pochini 	}
318dd7b254dSGiuliano Pochini 
319dd7b254dSGiuliano Pochini 	if (i == 200) {
320*b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev, "Resident loader failed to set HF5\n");
321dd7b254dSGiuliano Pochini 		goto irl_error;
322dd7b254dSGiuliano Pochini 	}
323dd7b254dSGiuliano Pochini 
324*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "Resident loader successfully installed\n");
325e3690869SSudip Mukherjee 	free_firmware(fw, chip);
326dd7b254dSGiuliano Pochini 	return 0;
327dd7b254dSGiuliano Pochini 
328dd7b254dSGiuliano Pochini irl_error:
329e3690869SSudip Mukherjee 	free_firmware(fw, chip);
330dd7b254dSGiuliano Pochini 	return -EIO;
331dd7b254dSGiuliano Pochini }
332dd7b254dSGiuliano Pochini 
333dd7b254dSGiuliano Pochini #endif /* DSP_56361 */
334dd7b254dSGiuliano Pochini 
335dd7b254dSGiuliano Pochini 
336dd7b254dSGiuliano Pochini static int load_dsp(struct echoaudio *chip, u16 *code)
337dd7b254dSGiuliano Pochini {
338dd7b254dSGiuliano Pochini 	u32 address, data;
339dd7b254dSGiuliano Pochini 	int index, words, i;
340dd7b254dSGiuliano Pochini 
341dd7b254dSGiuliano Pochini 	if (chip->dsp_code == code) {
342*b5b4a41bSSudip Mukherjee 		dev_warn(chip->card->dev, "DSP is already loaded!\n");
343dd7b254dSGiuliano Pochini 		return 0;
344dd7b254dSGiuliano Pochini 	}
345dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;		/* Set TRUE until DSP loaded */
346dd7b254dSGiuliano Pochini 	chip->dsp_code = NULL;		/* Current DSP code not loaded */
347dd7b254dSGiuliano Pochini 	chip->asic_loaded = FALSE;	/* Loading the DSP code will reset the ASIC */
348dd7b254dSGiuliano Pochini 
349*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "load_dsp: Set bad_board to TRUE\n");
350dd7b254dSGiuliano Pochini 
351dd7b254dSGiuliano Pochini 	/* If this board requires a resident loader, install it. */
352dd7b254dSGiuliano Pochini #ifdef DSP_56361
353dd7b254dSGiuliano Pochini 	if ((i = install_resident_loader(chip)) < 0)
354dd7b254dSGiuliano Pochini 		return i;
355dd7b254dSGiuliano Pochini #endif
356dd7b254dSGiuliano Pochini 
357dd7b254dSGiuliano Pochini 	/* Send software reset command */
358dd7b254dSGiuliano Pochini 	if (send_vector(chip, DSP_VC_RESET) < 0) {
359*b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev,
360*b5b4a41bSSudip Mukherjee 			"LoadDsp: send_vector DSP_VC_RESET failed, Critical Failure\n");
361dd7b254dSGiuliano Pochini 		return -EIO;
362dd7b254dSGiuliano Pochini 	}
363dd7b254dSGiuliano Pochini 	/* Delay 10us */
364dd7b254dSGiuliano Pochini 	udelay(10);
365dd7b254dSGiuliano Pochini 
366dd7b254dSGiuliano Pochini 	/* Wait 10ms for HF3 to indicate that software reset is complete */
367dd7b254dSGiuliano Pochini 	for (i = 0; i < 1000; i++) {	/* Timeout is 10us * 1000 = 10ms */
368dd7b254dSGiuliano Pochini 		if (get_dsp_register(chip, CHI32_STATUS_REG) &
369dd7b254dSGiuliano Pochini 		    CHI32_STATUS_REG_HF3)
370dd7b254dSGiuliano Pochini 			break;
371dd7b254dSGiuliano Pochini 		udelay(10);
372dd7b254dSGiuliano Pochini 	}
373dd7b254dSGiuliano Pochini 
374dd7b254dSGiuliano Pochini 	if (i == 1000) {
375*b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev,
376*b5b4a41bSSudip Mukherjee 			"load_dsp: Timeout waiting for CHI32_STATUS_REG_HF3\n");
377dd7b254dSGiuliano Pochini 		return -EIO;
378dd7b254dSGiuliano Pochini 	}
379dd7b254dSGiuliano Pochini 
380dd7b254dSGiuliano Pochini 	/* Set DSP format bits for 24 bit mode now that soft reset is done */
381dd7b254dSGiuliano Pochini 	set_dsp_register(chip, CHI32_CONTROL_REG,
382dd7b254dSGiuliano Pochini 			 get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900);
383dd7b254dSGiuliano Pochini 
384dd7b254dSGiuliano Pochini 	/* Main loader loop */
385dd7b254dSGiuliano Pochini 
386dd7b254dSGiuliano Pochini 	index = code[0];
387dd7b254dSGiuliano Pochini 	for (;;) {
388dd7b254dSGiuliano Pochini 		int block_type, mem_type;
389dd7b254dSGiuliano Pochini 
390dd7b254dSGiuliano Pochini 		/* Total Block Size */
391dd7b254dSGiuliano Pochini 		index++;
392dd7b254dSGiuliano Pochini 
393dd7b254dSGiuliano Pochini 		/* Block Type */
394dd7b254dSGiuliano Pochini 		block_type = code[index];
395dd7b254dSGiuliano Pochini 		if (block_type == 4)	/* We're finished */
396dd7b254dSGiuliano Pochini 			break;
397dd7b254dSGiuliano Pochini 
398dd7b254dSGiuliano Pochini 		index++;
399dd7b254dSGiuliano Pochini 
400dd7b254dSGiuliano Pochini 		/* Memory Type  P=0,X=1,Y=2 */
401dd7b254dSGiuliano Pochini 		mem_type = code[index++];
402dd7b254dSGiuliano Pochini 
403dd7b254dSGiuliano Pochini 		/* Block Code Size */
404dd7b254dSGiuliano Pochini 		words = code[index++];
405dd7b254dSGiuliano Pochini 		if (words == 0)		/* We're finished */
406dd7b254dSGiuliano Pochini 			break;
407dd7b254dSGiuliano Pochini 
408dd7b254dSGiuliano Pochini 		/* Start Address */
409dd7b254dSGiuliano Pochini 		address = ((u32)code[index] << 16) + code[index + 1];
410dd7b254dSGiuliano Pochini 		index += 2;
411dd7b254dSGiuliano Pochini 
412dd7b254dSGiuliano Pochini 		if (write_dsp(chip, words) < 0) {
413*b5b4a41bSSudip Mukherjee 			dev_err(chip->card->dev,
414*b5b4a41bSSudip Mukherjee 				"load_dsp: failed to write number of DSP words\n");
415dd7b254dSGiuliano Pochini 			return -EIO;
416dd7b254dSGiuliano Pochini 		}
417dd7b254dSGiuliano Pochini 		if (write_dsp(chip, address) < 0) {
418*b5b4a41bSSudip Mukherjee 			dev_err(chip->card->dev,
419*b5b4a41bSSudip Mukherjee 				"load_dsp: failed to write DSP address\n");
420dd7b254dSGiuliano Pochini 			return -EIO;
421dd7b254dSGiuliano Pochini 		}
422dd7b254dSGiuliano Pochini 		if (write_dsp(chip, mem_type) < 0) {
423*b5b4a41bSSudip Mukherjee 			dev_err(chip->card->dev,
424*b5b4a41bSSudip Mukherjee 				"load_dsp: failed to write DSP memory type\n");
425dd7b254dSGiuliano Pochini 			return -EIO;
426dd7b254dSGiuliano Pochini 		}
427dd7b254dSGiuliano Pochini 		/* Code */
428dd7b254dSGiuliano Pochini 		for (i = 0; i < words; i++, index+=2) {
429dd7b254dSGiuliano Pochini 			data = ((u32)code[index] << 16) + code[index + 1];
430dd7b254dSGiuliano Pochini 			if (write_dsp(chip, data) < 0) {
431*b5b4a41bSSudip Mukherjee 				dev_err(chip->card->dev,
432*b5b4a41bSSudip Mukherjee 					"load_dsp: failed to write DSP data\n");
433dd7b254dSGiuliano Pochini 				return -EIO;
434dd7b254dSGiuliano Pochini 			}
435dd7b254dSGiuliano Pochini 		}
436dd7b254dSGiuliano Pochini 	}
437dd7b254dSGiuliano Pochini 
438dd7b254dSGiuliano Pochini 	if (write_dsp(chip, 0) < 0) {	/* We're done!!! */
439*b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev,
440*b5b4a41bSSudip Mukherjee 			"load_dsp: Failed to write final zero\n");
441dd7b254dSGiuliano Pochini 		return -EIO;
442dd7b254dSGiuliano Pochini 	}
443dd7b254dSGiuliano Pochini 	udelay(10);
444dd7b254dSGiuliano Pochini 
445dd7b254dSGiuliano Pochini 	for (i = 0; i < 5000; i++) {	/* Timeout is 100us * 5000 = 500ms */
446dd7b254dSGiuliano Pochini 		/* Wait for flag 4 - indicates that the DSP loaded OK */
447dd7b254dSGiuliano Pochini 		if (get_dsp_register(chip, CHI32_STATUS_REG) &
448dd7b254dSGiuliano Pochini 		    CHI32_STATUS_REG_HF4) {
449dd7b254dSGiuliano Pochini 			set_dsp_register(chip, CHI32_CONTROL_REG,
450dd7b254dSGiuliano Pochini 					 get_dsp_register(chip, CHI32_CONTROL_REG) & ~0x1b00);
451dd7b254dSGiuliano Pochini 
452dd7b254dSGiuliano Pochini 			if (write_dsp(chip, DSP_FNC_SET_COMMPAGE_ADDR) < 0) {
453*b5b4a41bSSudip Mukherjee 				dev_err(chip->card->dev,
454*b5b4a41bSSudip Mukherjee 					"load_dsp: Failed to write DSP_FNC_SET_COMMPAGE_ADDR\n");
455dd7b254dSGiuliano Pochini 				return -EIO;
456dd7b254dSGiuliano Pochini 			}
457dd7b254dSGiuliano Pochini 
458dd7b254dSGiuliano Pochini 			if (write_dsp(chip, chip->comm_page_phys) < 0) {
459*b5b4a41bSSudip Mukherjee 				dev_err(chip->card->dev,
460*b5b4a41bSSudip Mukherjee 					"load_dsp: Failed to write comm page address\n");
461dd7b254dSGiuliano Pochini 				return -EIO;
462dd7b254dSGiuliano Pochini 			}
463dd7b254dSGiuliano Pochini 
464dd7b254dSGiuliano Pochini 			/* Get the serial number via slave mode.
465dd7b254dSGiuliano Pochini 			This is triggered by the SET_COMMPAGE_ADDR command.
466dd7b254dSGiuliano Pochini 			We don't actually use the serial number but we have to
467dd7b254dSGiuliano Pochini 			get it as part of the DSP init voodoo. */
468dd7b254dSGiuliano Pochini 			if (read_sn(chip) < 0) {
469*b5b4a41bSSudip Mukherjee 				dev_err(chip->card->dev,
470*b5b4a41bSSudip Mukherjee 					"load_dsp: Failed to read serial number\n");
471dd7b254dSGiuliano Pochini 				return -EIO;
472dd7b254dSGiuliano Pochini 			}
473dd7b254dSGiuliano Pochini 
474dd7b254dSGiuliano Pochini 			chip->dsp_code = code;		/* Show which DSP code loaded */
475dd7b254dSGiuliano Pochini 			chip->bad_board = FALSE;	/* DSP OK */
476*b5b4a41bSSudip Mukherjee 			dev_dbg(chip->card->dev, "load_dsp: OK!\n");
477dd7b254dSGiuliano Pochini 			return 0;
478dd7b254dSGiuliano Pochini 		}
479dd7b254dSGiuliano Pochini 		udelay(100);
480dd7b254dSGiuliano Pochini 	}
481dd7b254dSGiuliano Pochini 
482*b5b4a41bSSudip Mukherjee 	dev_err(chip->card->dev,
483*b5b4a41bSSudip Mukherjee 		"load_dsp: DSP load timed out waiting for HF4\n");
484dd7b254dSGiuliano Pochini 	return -EIO;
485dd7b254dSGiuliano Pochini }
486dd7b254dSGiuliano Pochini 
487dd7b254dSGiuliano Pochini 
488dd7b254dSGiuliano Pochini 
489dd7b254dSGiuliano Pochini /* load_firmware takes care of loading the DSP and any ASIC code. */
490dd7b254dSGiuliano Pochini static int load_firmware(struct echoaudio *chip)
491dd7b254dSGiuliano Pochini {
492dd7b254dSGiuliano Pochini 	const struct firmware *fw;
493dd7b254dSGiuliano Pochini 	int box_type, err;
494dd7b254dSGiuliano Pochini 
495c914f55fSMark Hills 	if (snd_BUG_ON(!chip->comm_page))
496da3cec35STakashi Iwai 		return -EPERM;
497dd7b254dSGiuliano Pochini 
498dd7b254dSGiuliano Pochini 	/* See if the ASIC is present and working - only if the DSP is already loaded */
499dd7b254dSGiuliano Pochini 	if (chip->dsp_code) {
500dd7b254dSGiuliano Pochini 		if ((box_type = check_asic_status(chip)) >= 0)
501dd7b254dSGiuliano Pochini 			return box_type;
502dd7b254dSGiuliano Pochini 		/* ASIC check failed; force the DSP to reload */
503dd7b254dSGiuliano Pochini 		chip->dsp_code = NULL;
504dd7b254dSGiuliano Pochini 	}
505dd7b254dSGiuliano Pochini 
50619b50063SGiuliano Pochini 	err = get_firmware(&fw, chip, chip->dsp_code_to_load);
50719b50063SGiuliano Pochini 	if (err < 0)
508dd7b254dSGiuliano Pochini 		return err;
509dd7b254dSGiuliano Pochini 	err = load_dsp(chip, (u16 *)fw->data);
510e3690869SSudip Mukherjee 	free_firmware(fw, chip);
511dd7b254dSGiuliano Pochini 	if (err < 0)
512dd7b254dSGiuliano Pochini 		return err;
513dd7b254dSGiuliano Pochini 
514dd7b254dSGiuliano Pochini 	if ((box_type = load_asic(chip)) < 0)
515dd7b254dSGiuliano Pochini 		return box_type;	/* error */
516dd7b254dSGiuliano Pochini 
517dd7b254dSGiuliano Pochini 	return box_type;
518dd7b254dSGiuliano Pochini }
519dd7b254dSGiuliano Pochini 
520dd7b254dSGiuliano Pochini 
521dd7b254dSGiuliano Pochini 
522dd7b254dSGiuliano Pochini /****************************************************************************
523dd7b254dSGiuliano Pochini 	Mixer functions
524dd7b254dSGiuliano Pochini  ****************************************************************************/
525dd7b254dSGiuliano Pochini 
526dd7b254dSGiuliano Pochini #if defined(ECHOCARD_HAS_INPUT_NOMINAL_LEVEL) || \
527dd7b254dSGiuliano Pochini 	defined(ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL)
528dd7b254dSGiuliano Pochini 
529dd7b254dSGiuliano Pochini /* Set the nominal level for an input or output bus (true = -10dBV, false = +4dBu) */
530dd7b254dSGiuliano Pochini static int set_nominal_level(struct echoaudio *chip, u16 index, char consumer)
531dd7b254dSGiuliano Pochini {
532da3cec35STakashi Iwai 	if (snd_BUG_ON(index >= num_busses_out(chip) + num_busses_in(chip)))
533da3cec35STakashi Iwai 		return -EINVAL;
534dd7b254dSGiuliano Pochini 
535dd7b254dSGiuliano Pochini 	/* Wait for the handshake (OK even if ASIC is not loaded) */
536dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
537dd7b254dSGiuliano Pochini 		return -EIO;
538dd7b254dSGiuliano Pochini 
539dd7b254dSGiuliano Pochini 	chip->nominal_level[index] = consumer;
540dd7b254dSGiuliano Pochini 
541dd7b254dSGiuliano Pochini 	if (consumer)
542dd7b254dSGiuliano Pochini 		chip->comm_page->nominal_level_mask |= cpu_to_le32(1 << index);
543dd7b254dSGiuliano Pochini 	else
544dd7b254dSGiuliano Pochini 		chip->comm_page->nominal_level_mask &= ~cpu_to_le32(1 << index);
545dd7b254dSGiuliano Pochini 
546dd7b254dSGiuliano Pochini 	return 0;
547dd7b254dSGiuliano Pochini }
548dd7b254dSGiuliano Pochini 
549dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_*_NOMINAL_LEVEL */
550dd7b254dSGiuliano Pochini 
551dd7b254dSGiuliano Pochini 
552dd7b254dSGiuliano Pochini 
553dd7b254dSGiuliano Pochini /* Set the gain for a single physical output channel (dB). */
554dd7b254dSGiuliano Pochini static int set_output_gain(struct echoaudio *chip, u16 channel, s8 gain)
555dd7b254dSGiuliano Pochini {
556da3cec35STakashi Iwai 	if (snd_BUG_ON(channel >= num_busses_out(chip)))
557da3cec35STakashi Iwai 		return -EINVAL;
558dd7b254dSGiuliano Pochini 
559dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
560dd7b254dSGiuliano Pochini 		return -EIO;
561dd7b254dSGiuliano Pochini 
562dd7b254dSGiuliano Pochini 	/* Save the new value */
563dd7b254dSGiuliano Pochini 	chip->output_gain[channel] = gain;
564dd7b254dSGiuliano Pochini 	chip->comm_page->line_out_level[channel] = gain;
565dd7b254dSGiuliano Pochini 	return 0;
566dd7b254dSGiuliano Pochini }
567dd7b254dSGiuliano Pochini 
568dd7b254dSGiuliano Pochini 
569dd7b254dSGiuliano Pochini 
570dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MONITOR
571dd7b254dSGiuliano Pochini /* Set the monitor level from an input bus to an output bus. */
572dd7b254dSGiuliano Pochini static int set_monitor_gain(struct echoaudio *chip, u16 output, u16 input,
573dd7b254dSGiuliano Pochini 			    s8 gain)
574dd7b254dSGiuliano Pochini {
575da3cec35STakashi Iwai 	if (snd_BUG_ON(output >= num_busses_out(chip) ||
576da3cec35STakashi Iwai 		    input >= num_busses_in(chip)))
577da3cec35STakashi Iwai 		return -EINVAL;
578dd7b254dSGiuliano Pochini 
579dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
580dd7b254dSGiuliano Pochini 		return -EIO;
581dd7b254dSGiuliano Pochini 
582dd7b254dSGiuliano Pochini 	chip->monitor_gain[output][input] = gain;
583dd7b254dSGiuliano Pochini 	chip->comm_page->monitors[monitor_index(chip, output, input)] = gain;
584dd7b254dSGiuliano Pochini 	return 0;
585dd7b254dSGiuliano Pochini }
586dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_MONITOR */
587dd7b254dSGiuliano Pochini 
588dd7b254dSGiuliano Pochini 
589dd7b254dSGiuliano Pochini /* Tell the DSP to read and update output, nominal & monitor levels in comm page. */
590dd7b254dSGiuliano Pochini static int update_output_line_level(struct echoaudio *chip)
591dd7b254dSGiuliano Pochini {
592dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
593dd7b254dSGiuliano Pochini 		return -EIO;
594dd7b254dSGiuliano Pochini 	clear_handshake(chip);
595dd7b254dSGiuliano Pochini 	return send_vector(chip, DSP_VC_UPDATE_OUTVOL);
596dd7b254dSGiuliano Pochini }
597dd7b254dSGiuliano Pochini 
598dd7b254dSGiuliano Pochini 
599dd7b254dSGiuliano Pochini 
600dd7b254dSGiuliano Pochini /* Tell the DSP to read and update input levels in comm page */
601dd7b254dSGiuliano Pochini static int update_input_line_level(struct echoaudio *chip)
602dd7b254dSGiuliano Pochini {
603dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
604dd7b254dSGiuliano Pochini 		return -EIO;
605dd7b254dSGiuliano Pochini 	clear_handshake(chip);
606dd7b254dSGiuliano Pochini 	return send_vector(chip, DSP_VC_UPDATE_INGAIN);
607dd7b254dSGiuliano Pochini }
608dd7b254dSGiuliano Pochini 
609dd7b254dSGiuliano Pochini 
610dd7b254dSGiuliano Pochini 
611dd7b254dSGiuliano Pochini /* set_meters_on turns the meters on or off.  If meters are turned on, the DSP
612dd7b254dSGiuliano Pochini will write the meter and clock detect values to the comm page at about 30Hz */
613dd7b254dSGiuliano Pochini static void set_meters_on(struct echoaudio *chip, char on)
614dd7b254dSGiuliano Pochini {
615dd7b254dSGiuliano Pochini 	if (on && !chip->meters_enabled) {
616dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_METERS_ON);
617dd7b254dSGiuliano Pochini 		chip->meters_enabled = 1;
618dd7b254dSGiuliano Pochini 	} else if (!on && chip->meters_enabled) {
619dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_METERS_OFF);
620dd7b254dSGiuliano Pochini 		chip->meters_enabled = 0;
621dd7b254dSGiuliano Pochini 		memset((s8 *)chip->comm_page->vu_meter, ECHOGAIN_MUTED,
622dd7b254dSGiuliano Pochini 		       DSP_MAXPIPES);
623dd7b254dSGiuliano Pochini 		memset((s8 *)chip->comm_page->peak_meter, ECHOGAIN_MUTED,
624dd7b254dSGiuliano Pochini 		       DSP_MAXPIPES);
625dd7b254dSGiuliano Pochini 	}
626dd7b254dSGiuliano Pochini }
627dd7b254dSGiuliano Pochini 
628dd7b254dSGiuliano Pochini 
629dd7b254dSGiuliano Pochini 
630dd7b254dSGiuliano Pochini /* Fill out an the given array using the current values in the comm page.
631dd7b254dSGiuliano Pochini Meters are written in the comm page by the DSP in this order:
632dd7b254dSGiuliano Pochini  Output busses
633dd7b254dSGiuliano Pochini  Input busses
634dd7b254dSGiuliano Pochini  Output pipes (vmixer cards only)
635dd7b254dSGiuliano Pochini 
636dd7b254dSGiuliano Pochini This function assumes there are no more than 16 in/out busses or pipes
637dd7b254dSGiuliano Pochini Meters is an array [3][16][2] of long. */
638dd7b254dSGiuliano Pochini static void get_audio_meters(struct echoaudio *chip, long *meters)
639dd7b254dSGiuliano Pochini {
640dd7b254dSGiuliano Pochini 	int i, m, n;
641dd7b254dSGiuliano Pochini 
642dd7b254dSGiuliano Pochini 	m = 0;
643dd7b254dSGiuliano Pochini 	n = 0;
644dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_out(chip); i++, m++) {
645dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->vu_meter[m];
646dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->peak_meter[m];
647dd7b254dSGiuliano Pochini 	}
648dd7b254dSGiuliano Pochini 	for (; n < 32; n++)
649dd7b254dSGiuliano Pochini 		meters[n] = 0;
650dd7b254dSGiuliano Pochini 
651dd7b254dSGiuliano Pochini #ifdef ECHOCARD_ECHO3G
652dd7b254dSGiuliano Pochini 	m = E3G_MAX_OUTPUTS;	/* Skip unused meters */
653dd7b254dSGiuliano Pochini #endif
654dd7b254dSGiuliano Pochini 
655dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_in(chip); i++, m++) {
656dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->vu_meter[m];
657dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->peak_meter[m];
658dd7b254dSGiuliano Pochini 	}
659dd7b254dSGiuliano Pochini 	for (; n < 64; n++)
660dd7b254dSGiuliano Pochini 		meters[n] = 0;
661dd7b254dSGiuliano Pochini 
662dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_VMIXER
663dd7b254dSGiuliano Pochini 	for (i = 0; i < num_pipes_out(chip); i++, m++) {
664dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->vu_meter[m];
665dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->peak_meter[m];
666dd7b254dSGiuliano Pochini 	}
667dd7b254dSGiuliano Pochini #endif
668dd7b254dSGiuliano Pochini 	for (; n < 96; n++)
669dd7b254dSGiuliano Pochini 		meters[n] = 0;
670dd7b254dSGiuliano Pochini }
671dd7b254dSGiuliano Pochini 
672dd7b254dSGiuliano Pochini 
673dd7b254dSGiuliano Pochini 
674dd7b254dSGiuliano Pochini static int restore_dsp_rettings(struct echoaudio *chip)
675dd7b254dSGiuliano Pochini {
67647b5d028SGiuliano Pochini 	int i, o, err;
677*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "restore_dsp_settings\n");
678dd7b254dSGiuliano Pochini 
679dd7b254dSGiuliano Pochini 	if ((err = check_asic_status(chip)) < 0)
680dd7b254dSGiuliano Pochini 		return err;
681dd7b254dSGiuliano Pochini 
68247b5d028SGiuliano Pochini 	/* Gina20/Darla20 only. Should be harmless for other cards. */
683dd7b254dSGiuliano Pochini 	chip->comm_page->gd_clock_state = GD_CLOCK_UNDEF;
684dd7b254dSGiuliano Pochini 	chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_UNDEF;
685dd7b254dSGiuliano Pochini 	chip->comm_page->handshake = 0xffffffff;
686dd7b254dSGiuliano Pochini 
68747b5d028SGiuliano Pochini 	/* Restore output busses */
68847b5d028SGiuliano Pochini 	for (i = 0; i < num_busses_out(chip); i++) {
68947b5d028SGiuliano Pochini 		err = set_output_gain(chip, i, chip->output_gain[i]);
69047b5d028SGiuliano Pochini 		if (err < 0)
69147b5d028SGiuliano Pochini 			return err;
69247b5d028SGiuliano Pochini 	}
69347b5d028SGiuliano Pochini 
69447b5d028SGiuliano Pochini #ifdef ECHOCARD_HAS_VMIXER
69547b5d028SGiuliano Pochini 	for (i = 0; i < num_pipes_out(chip); i++)
69647b5d028SGiuliano Pochini 		for (o = 0; o < num_busses_out(chip); o++) {
69747b5d028SGiuliano Pochini 			err = set_vmixer_gain(chip, o, i,
69847b5d028SGiuliano Pochini 						chip->vmixer_gain[o][i]);
69947b5d028SGiuliano Pochini 			if (err < 0)
70047b5d028SGiuliano Pochini 				return err;
70147b5d028SGiuliano Pochini 		}
70247b5d028SGiuliano Pochini 	if (update_vmixer_level(chip) < 0)
70347b5d028SGiuliano Pochini 		return -EIO;
70447b5d028SGiuliano Pochini #endif /* ECHOCARD_HAS_VMIXER */
70547b5d028SGiuliano Pochini 
70647b5d028SGiuliano Pochini #ifdef ECHOCARD_HAS_MONITOR
70747b5d028SGiuliano Pochini 	for (o = 0; o < num_busses_out(chip); o++)
70847b5d028SGiuliano Pochini 		for (i = 0; i < num_busses_in(chip); i++) {
70947b5d028SGiuliano Pochini 			err = set_monitor_gain(chip, o, i,
71047b5d028SGiuliano Pochini 						chip->monitor_gain[o][i]);
71147b5d028SGiuliano Pochini 			if (err < 0)
71247b5d028SGiuliano Pochini 				return err;
71347b5d028SGiuliano Pochini 		}
71447b5d028SGiuliano Pochini #endif /* ECHOCARD_HAS_MONITOR */
71547b5d028SGiuliano Pochini 
71647b5d028SGiuliano Pochini #ifdef ECHOCARD_HAS_INPUT_GAIN
71747b5d028SGiuliano Pochini 	for (i = 0; i < num_busses_in(chip); i++) {
71847b5d028SGiuliano Pochini 		err = set_input_gain(chip, i, chip->input_gain[i]);
71947b5d028SGiuliano Pochini 		if (err < 0)
72047b5d028SGiuliano Pochini 			return err;
72147b5d028SGiuliano Pochini 	}
72247b5d028SGiuliano Pochini #endif /* ECHOCARD_HAS_INPUT_GAIN */
72347b5d028SGiuliano Pochini 
72447b5d028SGiuliano Pochini 	err = update_output_line_level(chip);
72547b5d028SGiuliano Pochini 	if (err < 0)
726dd7b254dSGiuliano Pochini 		return err;
727dd7b254dSGiuliano Pochini 
72847b5d028SGiuliano Pochini 	err = update_input_line_level(chip);
72947b5d028SGiuliano Pochini 	if (err < 0)
73047b5d028SGiuliano Pochini 		return err;
73147b5d028SGiuliano Pochini 
73247b5d028SGiuliano Pochini 	err = set_sample_rate(chip, chip->sample_rate);
73347b5d028SGiuliano Pochini 	if (err < 0)
73447b5d028SGiuliano Pochini 		return err;
73547b5d028SGiuliano Pochini 
73647b5d028SGiuliano Pochini 	if (chip->meters_enabled) {
73747b5d028SGiuliano Pochini 		err = send_vector(chip, DSP_VC_METERS_ON);
73847b5d028SGiuliano Pochini 		if (err < 0)
73947b5d028SGiuliano Pochini 			return err;
74047b5d028SGiuliano Pochini 	}
74147b5d028SGiuliano Pochini 
74247b5d028SGiuliano Pochini #ifdef ECHOCARD_HAS_DIGITAL_MODE_SWITCH
74347b5d028SGiuliano Pochini 	if (set_digital_mode(chip, chip->digital_mode) < 0)
744dd7b254dSGiuliano Pochini 		return -EIO;
74547b5d028SGiuliano Pochini #endif
74647b5d028SGiuliano Pochini 
74747b5d028SGiuliano Pochini #ifdef ECHOCARD_HAS_DIGITAL_IO
74847b5d028SGiuliano Pochini 	if (set_professional_spdif(chip, chip->professional_spdif) < 0)
74947b5d028SGiuliano Pochini 		return -EIO;
75047b5d028SGiuliano Pochini #endif
75147b5d028SGiuliano Pochini 
75247b5d028SGiuliano Pochini #ifdef ECHOCARD_HAS_PHANTOM_POWER
75347b5d028SGiuliano Pochini 	if (set_phantom_power(chip, chip->phantom_power) < 0)
75447b5d028SGiuliano Pochini 		return -EIO;
75547b5d028SGiuliano Pochini #endif
756dd7b254dSGiuliano Pochini 
757dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_EXTERNAL_CLOCK
75847b5d028SGiuliano Pochini 	/* set_input_clock() also restores automute setting */
759dd7b254dSGiuliano Pochini 	if (set_input_clock(chip, chip->input_clock) < 0)
760dd7b254dSGiuliano Pochini 		return -EIO;
761dd7b254dSGiuliano Pochini #endif
762dd7b254dSGiuliano Pochini 
763dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_OUTPUT_CLOCK_SWITCH
764dd7b254dSGiuliano Pochini 	if (set_output_clock(chip, chip->output_clock) < 0)
765dd7b254dSGiuliano Pochini 		return -EIO;
766dd7b254dSGiuliano Pochini #endif
767dd7b254dSGiuliano Pochini 
768dd7b254dSGiuliano Pochini 	if (wait_handshake(chip) < 0)
769dd7b254dSGiuliano Pochini 		return -EIO;
770dd7b254dSGiuliano Pochini 	clear_handshake(chip);
77147b5d028SGiuliano Pochini 	if (send_vector(chip, DSP_VC_UPDATE_FLAGS) < 0)
77247b5d028SGiuliano Pochini 		return -EIO;
773dd7b254dSGiuliano Pochini 
774*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "restore_dsp_rettings done\n");
77547b5d028SGiuliano Pochini 	return 0;
776dd7b254dSGiuliano Pochini }
777dd7b254dSGiuliano Pochini 
778dd7b254dSGiuliano Pochini 
779dd7b254dSGiuliano Pochini 
780dd7b254dSGiuliano Pochini /****************************************************************************
781dd7b254dSGiuliano Pochini 	Transport functions
782dd7b254dSGiuliano Pochini  ****************************************************************************/
783dd7b254dSGiuliano Pochini 
784dd7b254dSGiuliano Pochini /* set_audio_format() sets the format of the audio data in host memory for
785dd7b254dSGiuliano Pochini this pipe.  Note that _MS_ (mono-to-stereo) playback modes are not used by ALSA
786dd7b254dSGiuliano Pochini but they are here because they are just mono while capturing */
787dd7b254dSGiuliano Pochini static void set_audio_format(struct echoaudio *chip, u16 pipe_index,
788dd7b254dSGiuliano Pochini 			     const struct audioformat *format)
789dd7b254dSGiuliano Pochini {
790dd7b254dSGiuliano Pochini 	u16 dsp_format;
791dd7b254dSGiuliano Pochini 
792dd7b254dSGiuliano Pochini 	dsp_format = DSP_AUDIOFORM_SS_16LE;
793dd7b254dSGiuliano Pochini 
794dd7b254dSGiuliano Pochini 	/* Look for super-interleave (no big-endian and 8 bits) */
795dd7b254dSGiuliano Pochini 	if (format->interleave > 2) {
796dd7b254dSGiuliano Pochini 		switch (format->bits_per_sample) {
797dd7b254dSGiuliano Pochini 		case 16:
798dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_16LE;
799dd7b254dSGiuliano Pochini 			break;
800dd7b254dSGiuliano Pochini 		case 24:
801dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_24LE;
802dd7b254dSGiuliano Pochini 			break;
803dd7b254dSGiuliano Pochini 		case 32:
804dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_32LE;
805dd7b254dSGiuliano Pochini 			break;
806dd7b254dSGiuliano Pochini 		}
807dd7b254dSGiuliano Pochini 		dsp_format |= format->interleave;
808dd7b254dSGiuliano Pochini 	} else if (format->data_are_bigendian) {
809dd7b254dSGiuliano Pochini 		/* For big-endian data, only 32 bit samples are supported */
810dd7b254dSGiuliano Pochini 		switch (format->interleave) {
811dd7b254dSGiuliano Pochini 		case 1:
812dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_MM_32BE;
813dd7b254dSGiuliano Pochini 			break;
814dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_STEREO_BIG_ENDIAN32
815dd7b254dSGiuliano Pochini 		case 2:
816dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SS_32BE;
817dd7b254dSGiuliano Pochini 			break;
818dd7b254dSGiuliano Pochini #endif
819dd7b254dSGiuliano Pochini 		}
820dd7b254dSGiuliano Pochini 	} else if (format->interleave == 1 &&
821dd7b254dSGiuliano Pochini 		   format->bits_per_sample == 32 && !format->mono_to_stereo) {
822dd7b254dSGiuliano Pochini 		/* 32 bit little-endian mono->mono case */
823dd7b254dSGiuliano Pochini 		dsp_format = DSP_AUDIOFORM_MM_32LE;
824dd7b254dSGiuliano Pochini 	} else {
825dd7b254dSGiuliano Pochini 		/* Handle the other little-endian formats */
826dd7b254dSGiuliano Pochini 		switch (format->bits_per_sample) {
827dd7b254dSGiuliano Pochini 		case 8:
828dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
829dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_8;
830dd7b254dSGiuliano Pochini 			else
831dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_8;
832dd7b254dSGiuliano Pochini 			break;
833dd7b254dSGiuliano Pochini 		default:
834dd7b254dSGiuliano Pochini 		case 16:
835dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
836dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_16LE;
837dd7b254dSGiuliano Pochini 			else
838dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_16LE;
839dd7b254dSGiuliano Pochini 			break;
840dd7b254dSGiuliano Pochini 		case 24:
841dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
842dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_24LE;
843dd7b254dSGiuliano Pochini 			else
844dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_24LE;
845dd7b254dSGiuliano Pochini 			break;
846dd7b254dSGiuliano Pochini 		case 32:
847dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
848dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_32LE;
849dd7b254dSGiuliano Pochini 			else
850dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_32LE;
851dd7b254dSGiuliano Pochini 			break;
852dd7b254dSGiuliano Pochini 		}
853dd7b254dSGiuliano Pochini 	}
854*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev,
855*b5b4a41bSSudip Mukherjee 		 "set_audio_format[%d] = %x\n", pipe_index, dsp_format);
856dd7b254dSGiuliano Pochini 	chip->comm_page->audio_format[pipe_index] = cpu_to_le16(dsp_format);
857dd7b254dSGiuliano Pochini }
858dd7b254dSGiuliano Pochini 
859dd7b254dSGiuliano Pochini 
860dd7b254dSGiuliano Pochini 
861dd7b254dSGiuliano Pochini /* start_transport starts transport for a set of pipes.
862dd7b254dSGiuliano Pochini The bits 1 in channel_mask specify what pipes to start. Only the bit of the
863dd7b254dSGiuliano Pochini first channel must be set, regardless its interleave.
864dd7b254dSGiuliano Pochini Same thing for pause_ and stop_ -trasport below. */
865dd7b254dSGiuliano Pochini static int start_transport(struct echoaudio *chip, u32 channel_mask,
866dd7b254dSGiuliano Pochini 			   u32 cyclic_mask)
867dd7b254dSGiuliano Pochini {
868*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "start_transport %x\n", channel_mask);
869dd7b254dSGiuliano Pochini 
870dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
871dd7b254dSGiuliano Pochini 		return -EIO;
872dd7b254dSGiuliano Pochini 
873dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_start |= cpu_to_le32(channel_mask);
874dd7b254dSGiuliano Pochini 
875dd7b254dSGiuliano Pochini 	if (chip->comm_page->cmd_start) {
876dd7b254dSGiuliano Pochini 		clear_handshake(chip);
877dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_START_TRANSFER);
878dd7b254dSGiuliano Pochini 		if (wait_handshake(chip))
879dd7b254dSGiuliano Pochini 			return -EIO;
880dd7b254dSGiuliano Pochini 		/* Keep track of which pipes are transporting */
881dd7b254dSGiuliano Pochini 		chip->active_mask |= channel_mask;
882dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_start = 0;
883dd7b254dSGiuliano Pochini 		return 0;
884dd7b254dSGiuliano Pochini 	}
885dd7b254dSGiuliano Pochini 
886*b5b4a41bSSudip Mukherjee 	dev_err(chip->card->dev, "start_transport: No pipes to start!\n");
887dd7b254dSGiuliano Pochini 	return -EINVAL;
888dd7b254dSGiuliano Pochini }
889dd7b254dSGiuliano Pochini 
890dd7b254dSGiuliano Pochini 
891dd7b254dSGiuliano Pochini 
892dd7b254dSGiuliano Pochini static int pause_transport(struct echoaudio *chip, u32 channel_mask)
893dd7b254dSGiuliano Pochini {
894*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "pause_transport %x\n", channel_mask);
895dd7b254dSGiuliano Pochini 
896dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
897dd7b254dSGiuliano Pochini 		return -EIO;
898dd7b254dSGiuliano Pochini 
899dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask);
900dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_reset = 0;
901dd7b254dSGiuliano Pochini 	if (chip->comm_page->cmd_stop) {
902dd7b254dSGiuliano Pochini 		clear_handshake(chip);
903dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_STOP_TRANSFER);
904dd7b254dSGiuliano Pochini 		if (wait_handshake(chip))
905dd7b254dSGiuliano Pochini 			return -EIO;
906dd7b254dSGiuliano Pochini 		/* Keep track of which pipes are transporting */
907dd7b254dSGiuliano Pochini 		chip->active_mask &= ~channel_mask;
908dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_stop = 0;
909dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_reset = 0;
910dd7b254dSGiuliano Pochini 		return 0;
911dd7b254dSGiuliano Pochini 	}
912dd7b254dSGiuliano Pochini 
913*b5b4a41bSSudip Mukherjee 	dev_warn(chip->card->dev, "pause_transport: No pipes to stop!\n");
914dd7b254dSGiuliano Pochini 	return 0;
915dd7b254dSGiuliano Pochini }
916dd7b254dSGiuliano Pochini 
917dd7b254dSGiuliano Pochini 
918dd7b254dSGiuliano Pochini 
919dd7b254dSGiuliano Pochini static int stop_transport(struct echoaudio *chip, u32 channel_mask)
920dd7b254dSGiuliano Pochini {
921*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "stop_transport %x\n", channel_mask);
922dd7b254dSGiuliano Pochini 
923dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
924dd7b254dSGiuliano Pochini 		return -EIO;
925dd7b254dSGiuliano Pochini 
926dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask);
927dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_reset |= cpu_to_le32(channel_mask);
928dd7b254dSGiuliano Pochini 	if (chip->comm_page->cmd_reset) {
929dd7b254dSGiuliano Pochini 		clear_handshake(chip);
930dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_STOP_TRANSFER);
931dd7b254dSGiuliano Pochini 		if (wait_handshake(chip))
932dd7b254dSGiuliano Pochini 			return -EIO;
933dd7b254dSGiuliano Pochini 		/* Keep track of which pipes are transporting */
934dd7b254dSGiuliano Pochini 		chip->active_mask &= ~channel_mask;
935dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_stop = 0;
936dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_reset = 0;
937dd7b254dSGiuliano Pochini 		return 0;
938dd7b254dSGiuliano Pochini 	}
939dd7b254dSGiuliano Pochini 
940*b5b4a41bSSudip Mukherjee 	dev_warn(chip->card->dev, "stop_transport: No pipes to stop!\n");
941dd7b254dSGiuliano Pochini 	return 0;
942dd7b254dSGiuliano Pochini }
943dd7b254dSGiuliano Pochini 
944dd7b254dSGiuliano Pochini 
945dd7b254dSGiuliano Pochini 
946dd7b254dSGiuliano Pochini static inline int is_pipe_allocated(struct echoaudio *chip, u16 pipe_index)
947dd7b254dSGiuliano Pochini {
948dd7b254dSGiuliano Pochini 	return (chip->pipe_alloc_mask & (1 << pipe_index));
949dd7b254dSGiuliano Pochini }
950dd7b254dSGiuliano Pochini 
951dd7b254dSGiuliano Pochini 
952dd7b254dSGiuliano Pochini 
953dd7b254dSGiuliano Pochini /* Stops everything and turns off the DSP. All pipes should be already
954dd7b254dSGiuliano Pochini stopped and unallocated. */
955dd7b254dSGiuliano Pochini static int rest_in_peace(struct echoaudio *chip)
956dd7b254dSGiuliano Pochini {
957*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev,
958*b5b4a41bSSudip Mukherjee 		"rest_in_peace() open=%x\n", chip->pipe_alloc_mask);
959dd7b254dSGiuliano Pochini 
960dd7b254dSGiuliano Pochini 	/* Stops all active pipes (just to be sure) */
961dd7b254dSGiuliano Pochini 	stop_transport(chip, chip->active_mask);
962dd7b254dSGiuliano Pochini 
963dd7b254dSGiuliano Pochini 	set_meters_on(chip, FALSE);
964dd7b254dSGiuliano Pochini 
965dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MIDI
966dd7b254dSGiuliano Pochini 	enable_midi_input(chip, FALSE);
967dd7b254dSGiuliano Pochini #endif
968dd7b254dSGiuliano Pochini 
969dd7b254dSGiuliano Pochini 	/* Go to sleep */
970dd7b254dSGiuliano Pochini 	if (chip->dsp_code) {
971dd7b254dSGiuliano Pochini 		/* Make load_firmware do a complete reload */
972dd7b254dSGiuliano Pochini 		chip->dsp_code = NULL;
973dd7b254dSGiuliano Pochini 		/* Put the DSP to sleep */
974dd7b254dSGiuliano Pochini 		return send_vector(chip, DSP_VC_GO_COMATOSE);
975dd7b254dSGiuliano Pochini 	}
976dd7b254dSGiuliano Pochini 	return 0;
977dd7b254dSGiuliano Pochini }
978dd7b254dSGiuliano Pochini 
979dd7b254dSGiuliano Pochini 
980dd7b254dSGiuliano Pochini 
981dd7b254dSGiuliano Pochini /* Fills the comm page with default values */
982dd7b254dSGiuliano Pochini static int init_dsp_comm_page(struct echoaudio *chip)
983dd7b254dSGiuliano Pochini {
984dd7b254dSGiuliano Pochini 	/* Check if the compiler added extra padding inside the structure */
985dd7b254dSGiuliano Pochini 	if (offsetof(struct comm_page, midi_output) != 0xbe0) {
986*b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev,
987*b5b4a41bSSudip Mukherjee 			"init_dsp_comm_page() - Invalid struct comm_page structure\n");
988dd7b254dSGiuliano Pochini 		return -EPERM;
989dd7b254dSGiuliano Pochini 	}
990dd7b254dSGiuliano Pochini 
991dd7b254dSGiuliano Pochini 	/* Init all the basic stuff */
992dd7b254dSGiuliano Pochini 	chip->card_name = ECHOCARD_NAME;
993dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;	/* Set TRUE until DSP loaded */
994dd7b254dSGiuliano Pochini 	chip->dsp_code = NULL;	/* Current DSP code not loaded */
995dd7b254dSGiuliano Pochini 	chip->asic_loaded = FALSE;
996dd7b254dSGiuliano Pochini 	memset(chip->comm_page, 0, sizeof(struct comm_page));
997dd7b254dSGiuliano Pochini 
998dd7b254dSGiuliano Pochini 	/* Init the comm page */
999dd7b254dSGiuliano Pochini 	chip->comm_page->comm_size =
1000e930e995SHarvey Harrison 		cpu_to_le32(sizeof(struct comm_page));
1001dd7b254dSGiuliano Pochini 	chip->comm_page->handshake = 0xffffffff;
1002dd7b254dSGiuliano Pochini 	chip->comm_page->midi_out_free_count =
1003e930e995SHarvey Harrison 		cpu_to_le32(DSP_MIDI_OUT_FIFO_SIZE);
1004e930e995SHarvey Harrison 	chip->comm_page->sample_rate = cpu_to_le32(44100);
1005dd7b254dSGiuliano Pochini 
1006dd7b254dSGiuliano Pochini 	/* Set line levels so we don't blast any inputs on startup */
1007dd7b254dSGiuliano Pochini 	memset(chip->comm_page->monitors, ECHOGAIN_MUTED, MONITOR_ARRAY_SIZE);
1008dd7b254dSGiuliano Pochini 	memset(chip->comm_page->vmixer, ECHOGAIN_MUTED, VMIXER_ARRAY_SIZE);
1009dd7b254dSGiuliano Pochini 
1010dd7b254dSGiuliano Pochini 	return 0;
1011dd7b254dSGiuliano Pochini }
1012dd7b254dSGiuliano Pochini 
1013dd7b254dSGiuliano Pochini 
1014dd7b254dSGiuliano Pochini 
101547b5d028SGiuliano Pochini /* This function initializes the chip structure with default values, ie. all
101647b5d028SGiuliano Pochini  * muted and internal clock source. Then it copies the settings to the DSP.
101747b5d028SGiuliano Pochini  * This MUST be called after the DSP is up and running !
101847b5d028SGiuliano Pochini  */
1019dd7b254dSGiuliano Pochini static int init_line_levels(struct echoaudio *chip)
1020dd7b254dSGiuliano Pochini {
1021*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "init_line_levels\n");
102247b5d028SGiuliano Pochini 	memset(chip->output_gain, ECHOGAIN_MUTED, sizeof(chip->output_gain));
102347b5d028SGiuliano Pochini 	memset(chip->input_gain, ECHOGAIN_MUTED, sizeof(chip->input_gain));
102447b5d028SGiuliano Pochini 	memset(chip->monitor_gain, ECHOGAIN_MUTED, sizeof(chip->monitor_gain));
102547b5d028SGiuliano Pochini 	memset(chip->vmixer_gain, ECHOGAIN_MUTED, sizeof(chip->vmixer_gain));
102647b5d028SGiuliano Pochini 	chip->input_clock = ECHO_CLOCK_INTERNAL;
102747b5d028SGiuliano Pochini 	chip->output_clock = ECHO_CLOCK_WORD;
102847b5d028SGiuliano Pochini 	chip->sample_rate = 44100;
102947b5d028SGiuliano Pochini 	return restore_dsp_rettings(chip);
1030dd7b254dSGiuliano Pochini }
1031dd7b254dSGiuliano Pochini 
1032dd7b254dSGiuliano Pochini 
1033dd7b254dSGiuliano Pochini 
1034dd7b254dSGiuliano Pochini /* This is low level part of the interrupt handler.
1035dd7b254dSGiuliano Pochini It returns -1 if the IRQ is not ours, or N>=0 if it is, where N is the number
1036dd7b254dSGiuliano Pochini of midi data in the input queue. */
1037dd7b254dSGiuliano Pochini static int service_irq(struct echoaudio *chip)
1038dd7b254dSGiuliano Pochini {
1039dd7b254dSGiuliano Pochini 	int st;
1040dd7b254dSGiuliano Pochini 
1041dd7b254dSGiuliano Pochini 	/* Read the DSP status register and see if this DSP generated this interrupt */
1042dd7b254dSGiuliano Pochini 	if (get_dsp_register(chip, CHI32_STATUS_REG) & CHI32_STATUS_IRQ) {
1043dd7b254dSGiuliano Pochini 		st = 0;
1044dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MIDI
1045dd7b254dSGiuliano Pochini 		/* Get and parse midi data if present */
1046dd7b254dSGiuliano Pochini 		if (chip->comm_page->midi_input[0])	/* The count is at index 0 */
1047dd7b254dSGiuliano Pochini 			st = midi_service_irq(chip);	/* Returns how many midi bytes we received */
1048dd7b254dSGiuliano Pochini #endif
1049dd7b254dSGiuliano Pochini 		/* Clear the hardware interrupt */
1050dd7b254dSGiuliano Pochini 		chip->comm_page->midi_input[0] = 0;
1051dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_ACK_INT);
1052dd7b254dSGiuliano Pochini 		return st;
1053dd7b254dSGiuliano Pochini 	}
1054dd7b254dSGiuliano Pochini 	return -1;
1055dd7b254dSGiuliano Pochini }
1056dd7b254dSGiuliano Pochini 
1057dd7b254dSGiuliano Pochini 
1058dd7b254dSGiuliano Pochini 
1059dd7b254dSGiuliano Pochini 
1060dd7b254dSGiuliano Pochini /******************************************************************************
1061dd7b254dSGiuliano Pochini 	Functions for opening and closing pipes
1062dd7b254dSGiuliano Pochini  ******************************************************************************/
1063dd7b254dSGiuliano Pochini 
1064dd7b254dSGiuliano Pochini /* allocate_pipes is used to reserve audio pipes for your exclusive use.
1065dd7b254dSGiuliano Pochini The call will fail if some pipes are already allocated. */
1066dd7b254dSGiuliano Pochini static int allocate_pipes(struct echoaudio *chip, struct audiopipe *pipe,
1067dd7b254dSGiuliano Pochini 			  int pipe_index, int interleave)
1068dd7b254dSGiuliano Pochini {
1069dd7b254dSGiuliano Pochini 	int i;
1070dd7b254dSGiuliano Pochini 	u32 channel_mask;
1071dd7b254dSGiuliano Pochini 	char is_cyclic;
1072dd7b254dSGiuliano Pochini 
1073*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev,
1074*b5b4a41bSSudip Mukherjee 		"allocate_pipes: ch=%d int=%d\n", pipe_index, interleave);
1075dd7b254dSGiuliano Pochini 
1076dd7b254dSGiuliano Pochini 	if (chip->bad_board)
1077dd7b254dSGiuliano Pochini 		return -EIO;
1078dd7b254dSGiuliano Pochini 
1079dd7b254dSGiuliano Pochini 	is_cyclic = 1;	/* This driver uses cyclic buffers only */
1080dd7b254dSGiuliano Pochini 
1081dd7b254dSGiuliano Pochini 	for (channel_mask = i = 0; i < interleave; i++)
1082dd7b254dSGiuliano Pochini 		channel_mask |= 1 << (pipe_index + i);
1083dd7b254dSGiuliano Pochini 	if (chip->pipe_alloc_mask & channel_mask) {
1084*b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev,
1085*b5b4a41bSSudip Mukherjee 			"allocate_pipes: channel already open\n");
1086dd7b254dSGiuliano Pochini 		return -EAGAIN;
1087dd7b254dSGiuliano Pochini 	}
1088dd7b254dSGiuliano Pochini 
1089dd7b254dSGiuliano Pochini 	chip->comm_page->position[pipe_index] = 0;
1090dd7b254dSGiuliano Pochini 	chip->pipe_alloc_mask |= channel_mask;
1091dd7b254dSGiuliano Pochini 	if (is_cyclic)
1092dd7b254dSGiuliano Pochini 		chip->pipe_cyclic_mask |= channel_mask;
1093dd7b254dSGiuliano Pochini 	pipe->index = pipe_index;
1094dd7b254dSGiuliano Pochini 	pipe->interleave = interleave;
1095dd7b254dSGiuliano Pochini 	pipe->state = PIPE_STATE_STOPPED;
1096dd7b254dSGiuliano Pochini 
1097dd7b254dSGiuliano Pochini 	/* The counter register is where the DSP writes the 32 bit DMA
1098dd7b254dSGiuliano Pochini 	position for a pipe.  The DSP is constantly updating this value as
1099dd7b254dSGiuliano Pochini 	it moves data. The DMA counter is in units of bytes, not samples. */
1100dd7b254dSGiuliano Pochini 	pipe->dma_counter = &chip->comm_page->position[pipe_index];
1101dd7b254dSGiuliano Pochini 	*pipe->dma_counter = 0;
1102*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "allocate_pipes: ok\n");
1103dd7b254dSGiuliano Pochini 	return pipe_index;
1104dd7b254dSGiuliano Pochini }
1105dd7b254dSGiuliano Pochini 
1106dd7b254dSGiuliano Pochini 
1107dd7b254dSGiuliano Pochini 
1108dd7b254dSGiuliano Pochini static int free_pipes(struct echoaudio *chip, struct audiopipe *pipe)
1109dd7b254dSGiuliano Pochini {
1110dd7b254dSGiuliano Pochini 	u32 channel_mask;
1111dd7b254dSGiuliano Pochini 	int i;
1112dd7b254dSGiuliano Pochini 
1113*b5b4a41bSSudip Mukherjee 	dev_dbg(chip->card->dev, "free_pipes: Pipe %d\n", pipe->index);
1114da3cec35STakashi Iwai 	if (snd_BUG_ON(!is_pipe_allocated(chip, pipe->index)))
1115da3cec35STakashi Iwai 		return -EINVAL;
1116da3cec35STakashi Iwai 	if (snd_BUG_ON(pipe->state != PIPE_STATE_STOPPED))
1117da3cec35STakashi Iwai 		return -EINVAL;
1118dd7b254dSGiuliano Pochini 
1119dd7b254dSGiuliano Pochini 	for (channel_mask = i = 0; i < pipe->interleave; i++)
1120dd7b254dSGiuliano Pochini 		channel_mask |= 1 << (pipe->index + i);
1121dd7b254dSGiuliano Pochini 
1122dd7b254dSGiuliano Pochini 	chip->pipe_alloc_mask &= ~channel_mask;
1123dd7b254dSGiuliano Pochini 	chip->pipe_cyclic_mask &= ~channel_mask;
1124dd7b254dSGiuliano Pochini 	return 0;
1125dd7b254dSGiuliano Pochini }
1126dd7b254dSGiuliano Pochini 
1127dd7b254dSGiuliano Pochini 
1128dd7b254dSGiuliano Pochini 
1129dd7b254dSGiuliano Pochini /******************************************************************************
1130dd7b254dSGiuliano Pochini 	Functions for managing the scatter-gather list
1131dd7b254dSGiuliano Pochini ******************************************************************************/
1132dd7b254dSGiuliano Pochini 
1133dd7b254dSGiuliano Pochini static int sglist_init(struct echoaudio *chip, struct audiopipe *pipe)
1134dd7b254dSGiuliano Pochini {
1135dd7b254dSGiuliano Pochini 	pipe->sglist_head = 0;
1136dd7b254dSGiuliano Pochini 	memset(pipe->sgpage.area, 0, PAGE_SIZE);
1137dd7b254dSGiuliano Pochini 	chip->comm_page->sglist_addr[pipe->index].addr =
1138dd7b254dSGiuliano Pochini 		cpu_to_le32(pipe->sgpage.addr);
1139dd7b254dSGiuliano Pochini 	return 0;
1140dd7b254dSGiuliano Pochini }
1141dd7b254dSGiuliano Pochini 
1142dd7b254dSGiuliano Pochini 
1143dd7b254dSGiuliano Pochini 
1144dd7b254dSGiuliano Pochini static int sglist_add_mapping(struct echoaudio *chip, struct audiopipe *pipe,
1145dd7b254dSGiuliano Pochini 				dma_addr_t address, size_t length)
1146dd7b254dSGiuliano Pochini {
1147dd7b254dSGiuliano Pochini 	int head = pipe->sglist_head;
1148dd7b254dSGiuliano Pochini 	struct sg_entry *list = (struct sg_entry *)pipe->sgpage.area;
1149dd7b254dSGiuliano Pochini 
1150dd7b254dSGiuliano Pochini 	if (head < MAX_SGLIST_ENTRIES - 1) {
1151dd7b254dSGiuliano Pochini 		list[head].addr = cpu_to_le32(address);
1152dd7b254dSGiuliano Pochini 		list[head].size = cpu_to_le32(length);
1153dd7b254dSGiuliano Pochini 		pipe->sglist_head++;
1154dd7b254dSGiuliano Pochini 	} else {
1155*b5b4a41bSSudip Mukherjee 		dev_err(chip->card->dev, "SGlist: too many fragments\n");
1156dd7b254dSGiuliano Pochini 		return -ENOMEM;
1157dd7b254dSGiuliano Pochini 	}
1158dd7b254dSGiuliano Pochini 	return 0;
1159dd7b254dSGiuliano Pochini }
1160dd7b254dSGiuliano Pochini 
1161dd7b254dSGiuliano Pochini 
1162dd7b254dSGiuliano Pochini 
1163dd7b254dSGiuliano Pochini static inline int sglist_add_irq(struct echoaudio *chip, struct audiopipe *pipe)
1164dd7b254dSGiuliano Pochini {
1165dd7b254dSGiuliano Pochini 	return sglist_add_mapping(chip, pipe, 0, 0);
1166dd7b254dSGiuliano Pochini }
1167dd7b254dSGiuliano Pochini 
1168dd7b254dSGiuliano Pochini 
1169dd7b254dSGiuliano Pochini 
1170dd7b254dSGiuliano Pochini static inline int sglist_wrap(struct echoaudio *chip, struct audiopipe *pipe)
1171dd7b254dSGiuliano Pochini {
1172dd7b254dSGiuliano Pochini 	return sglist_add_mapping(chip, pipe, pipe->sgpage.addr, 0);
1173dd7b254dSGiuliano Pochini }
1174