xref: /openbmc/linux/sound/pci/echoaudio/echoaudio_dsp.c (revision 22d3a20030439420bf2795c60529ba0e89b4d82c)
1dd7b254dSGiuliano Pochini /****************************************************************************
2dd7b254dSGiuliano Pochini 
3dd7b254dSGiuliano Pochini    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4dd7b254dSGiuliano Pochini    All rights reserved
5dd7b254dSGiuliano Pochini    www.echoaudio.com
6dd7b254dSGiuliano Pochini 
7dd7b254dSGiuliano Pochini    This file is part of Echo Digital Audio's generic driver library.
8dd7b254dSGiuliano Pochini 
9dd7b254dSGiuliano Pochini    Echo Digital Audio's generic driver library is free software;
10dd7b254dSGiuliano Pochini    you can redistribute it and/or modify it under the terms of
11dd7b254dSGiuliano Pochini    the GNU General Public License as published by the Free Software
12dd7b254dSGiuliano Pochini    Foundation.
13dd7b254dSGiuliano Pochini 
14dd7b254dSGiuliano Pochini    This program is distributed in the hope that it will be useful,
15dd7b254dSGiuliano Pochini    but WITHOUT ANY WARRANTY; without even the implied warranty of
16dd7b254dSGiuliano Pochini    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17dd7b254dSGiuliano Pochini    GNU General Public License for more details.
18dd7b254dSGiuliano Pochini 
19dd7b254dSGiuliano Pochini    You should have received a copy of the GNU General Public License
20dd7b254dSGiuliano Pochini    along with this program; if not, write to the Free Software
21dd7b254dSGiuliano Pochini    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22dd7b254dSGiuliano Pochini    MA  02111-1307, USA.
23dd7b254dSGiuliano Pochini 
24dd7b254dSGiuliano Pochini    *************************************************************************
25dd7b254dSGiuliano Pochini 
26dd7b254dSGiuliano Pochini  Translation from C++ and adaptation for use in ALSA-Driver
27dd7b254dSGiuliano Pochini  were made by Giuliano Pochini <pochini@shiny.it>
28dd7b254dSGiuliano Pochini 
29dd7b254dSGiuliano Pochini ****************************************************************************/
30dd7b254dSGiuliano Pochini 
31dd7b254dSGiuliano Pochini #if PAGE_SIZE < 4096
32dd7b254dSGiuliano Pochini #error PAGE_SIZE is < 4k
33dd7b254dSGiuliano Pochini #endif
34dd7b254dSGiuliano Pochini 
35dd7b254dSGiuliano Pochini static int restore_dsp_rettings(struct echoaudio *chip);
36dd7b254dSGiuliano Pochini 
37dd7b254dSGiuliano Pochini 
38dd7b254dSGiuliano Pochini /* Some vector commands involve the DSP reading or writing data to and from the
39dd7b254dSGiuliano Pochini comm page; if you send one of these commands to the DSP, it will complete the
40dd7b254dSGiuliano Pochini command and then write a non-zero value to the Handshake field in the
41dd7b254dSGiuliano Pochini comm page.  This function waits for the handshake to show up. */
42dd7b254dSGiuliano Pochini static int wait_handshake(struct echoaudio *chip)
43dd7b254dSGiuliano Pochini {
44dd7b254dSGiuliano Pochini 	int i;
45dd7b254dSGiuliano Pochini 
46*22d3a200SGiuliano Pochini 	/* Wait up to 20ms for the handshake from the DSP */
47dd7b254dSGiuliano Pochini 	for (i = 0; i < HANDSHAKE_TIMEOUT; i++) {
48dd7b254dSGiuliano Pochini 		/* Look for the handshake value */
49*22d3a200SGiuliano Pochini 		barrier();
50dd7b254dSGiuliano Pochini 		if (chip->comm_page->handshake) {
51dd7b254dSGiuliano Pochini 			return 0;
52dd7b254dSGiuliano Pochini 		}
53dd7b254dSGiuliano Pochini 		udelay(1);
54dd7b254dSGiuliano Pochini 	}
55dd7b254dSGiuliano Pochini 
56dd7b254dSGiuliano Pochini 	snd_printk(KERN_ERR "wait_handshake(): Timeout waiting for DSP\n");
57dd7b254dSGiuliano Pochini 	return -EBUSY;
58dd7b254dSGiuliano Pochini }
59dd7b254dSGiuliano Pochini 
60dd7b254dSGiuliano Pochini 
61dd7b254dSGiuliano Pochini 
62dd7b254dSGiuliano Pochini /* Much of the interaction between the DSP and the driver is done via vector
63dd7b254dSGiuliano Pochini commands; send_vector writes a vector command to the DSP.  Typically, this
64dd7b254dSGiuliano Pochini causes the DSP to read or write fields in the comm page.
65dd7b254dSGiuliano Pochini PCI posting is not required thanks to the handshake logic. */
66dd7b254dSGiuliano Pochini static int send_vector(struct echoaudio *chip, u32 command)
67dd7b254dSGiuliano Pochini {
68dd7b254dSGiuliano Pochini 	int i;
69dd7b254dSGiuliano Pochini 
70dd7b254dSGiuliano Pochini 	wmb();	/* Flush all pending writes before sending the command */
71dd7b254dSGiuliano Pochini 
72dd7b254dSGiuliano Pochini 	/* Wait up to 100ms for the "vector busy" bit to be off */
73dd7b254dSGiuliano Pochini 	for (i = 0; i < VECTOR_BUSY_TIMEOUT; i++) {
74dd7b254dSGiuliano Pochini 		if (!(get_dsp_register(chip, CHI32_VECTOR_REG) &
75dd7b254dSGiuliano Pochini 		      CHI32_VECTOR_BUSY)) {
76dd7b254dSGiuliano Pochini 			set_dsp_register(chip, CHI32_VECTOR_REG, command);
77dd7b254dSGiuliano Pochini 			/*if (i)  DE_ACT(("send_vector time: %d\n", i));*/
78dd7b254dSGiuliano Pochini 			return 0;
79dd7b254dSGiuliano Pochini 		}
80dd7b254dSGiuliano Pochini 		udelay(1);
81dd7b254dSGiuliano Pochini 	}
82dd7b254dSGiuliano Pochini 
83dd7b254dSGiuliano Pochini 	DE_ACT((KERN_ERR "timeout on send_vector\n"));
84dd7b254dSGiuliano Pochini 	return -EBUSY;
85dd7b254dSGiuliano Pochini }
86dd7b254dSGiuliano Pochini 
87dd7b254dSGiuliano Pochini 
88dd7b254dSGiuliano Pochini 
89dd7b254dSGiuliano Pochini /* write_dsp writes a 32-bit value to the DSP; this is used almost
90dd7b254dSGiuliano Pochini exclusively for loading the DSP. */
91dd7b254dSGiuliano Pochini static int write_dsp(struct echoaudio *chip, u32 data)
92dd7b254dSGiuliano Pochini {
93dd7b254dSGiuliano Pochini 	u32 status, i;
94dd7b254dSGiuliano Pochini 
95dd7b254dSGiuliano Pochini 	for (i = 0; i < 10000000; i++) {	/* timeout = 10s */
96dd7b254dSGiuliano Pochini 		status = get_dsp_register(chip, CHI32_STATUS_REG);
97dd7b254dSGiuliano Pochini 		if ((status & CHI32_STATUS_HOST_WRITE_EMPTY) != 0) {
98dd7b254dSGiuliano Pochini 			set_dsp_register(chip, CHI32_DATA_REG, data);
99dd7b254dSGiuliano Pochini 			wmb();			/* write it immediately */
100dd7b254dSGiuliano Pochini 			return 0;
101dd7b254dSGiuliano Pochini 		}
102dd7b254dSGiuliano Pochini 		udelay(1);
103dd7b254dSGiuliano Pochini 		cond_resched();
104dd7b254dSGiuliano Pochini 	}
105dd7b254dSGiuliano Pochini 
106dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;		/* Set TRUE until DSP re-loaded */
107dd7b254dSGiuliano Pochini 	DE_ACT((KERN_ERR "write_dsp: Set bad_board to TRUE\n"));
108dd7b254dSGiuliano Pochini 	return -EIO;
109dd7b254dSGiuliano Pochini }
110dd7b254dSGiuliano Pochini 
111dd7b254dSGiuliano Pochini 
112dd7b254dSGiuliano Pochini 
113dd7b254dSGiuliano Pochini /* read_dsp reads a 32-bit value from the DSP; this is used almost
114dd7b254dSGiuliano Pochini exclusively for loading the DSP and checking the status of the ASIC. */
115dd7b254dSGiuliano Pochini static int read_dsp(struct echoaudio *chip, u32 *data)
116dd7b254dSGiuliano Pochini {
117dd7b254dSGiuliano Pochini 	u32 status, i;
118dd7b254dSGiuliano Pochini 
119dd7b254dSGiuliano Pochini 	for (i = 0; i < READ_DSP_TIMEOUT; i++) {
120dd7b254dSGiuliano Pochini 		status = get_dsp_register(chip, CHI32_STATUS_REG);
121dd7b254dSGiuliano Pochini 		if ((status & CHI32_STATUS_HOST_READ_FULL) != 0) {
122dd7b254dSGiuliano Pochini 			*data = get_dsp_register(chip, CHI32_DATA_REG);
123dd7b254dSGiuliano Pochini 			return 0;
124dd7b254dSGiuliano Pochini 		}
125dd7b254dSGiuliano Pochini 		udelay(1);
126dd7b254dSGiuliano Pochini 		cond_resched();
127dd7b254dSGiuliano Pochini 	}
128dd7b254dSGiuliano Pochini 
129dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;		/* Set TRUE until DSP re-loaded */
130dd7b254dSGiuliano Pochini 	DE_INIT((KERN_ERR "read_dsp: Set bad_board to TRUE\n"));
131dd7b254dSGiuliano Pochini 	return -EIO;
132dd7b254dSGiuliano Pochini }
133dd7b254dSGiuliano Pochini 
134dd7b254dSGiuliano Pochini 
135dd7b254dSGiuliano Pochini 
136dd7b254dSGiuliano Pochini /****************************************************************************
137dd7b254dSGiuliano Pochini 	Firmware loading functions
138dd7b254dSGiuliano Pochini  ****************************************************************************/
139dd7b254dSGiuliano Pochini 
140dd7b254dSGiuliano Pochini /* This function is used to read back the serial number from the DSP;
141dd7b254dSGiuliano Pochini this is triggered by the SET_COMMPAGE_ADDR command.
142dd7b254dSGiuliano Pochini Only some early Echogals products have serial numbers in the ROM;
143dd7b254dSGiuliano Pochini the serial number is not used, but you still need to do this as
144dd7b254dSGiuliano Pochini part of the DSP load process. */
145dd7b254dSGiuliano Pochini static int read_sn(struct echoaudio *chip)
146dd7b254dSGiuliano Pochini {
147dd7b254dSGiuliano Pochini 	int i;
148dd7b254dSGiuliano Pochini 	u32 sn[6];
149dd7b254dSGiuliano Pochini 
150dd7b254dSGiuliano Pochini 	for (i = 0; i < 5; i++) {
151dd7b254dSGiuliano Pochini 		if (read_dsp(chip, &sn[i])) {
152dd7b254dSGiuliano Pochini 			snd_printk(KERN_ERR "Failed to read serial number\n");
153dd7b254dSGiuliano Pochini 			return -EIO;
154dd7b254dSGiuliano Pochini 		}
155dd7b254dSGiuliano Pochini 	}
156dd7b254dSGiuliano Pochini 	DE_INIT(("Read serial number %08x %08x %08x %08x %08x\n",
157dd7b254dSGiuliano Pochini 		 sn[0], sn[1], sn[2], sn[3], sn[4]));
158dd7b254dSGiuliano Pochini 	return 0;
159dd7b254dSGiuliano Pochini }
160dd7b254dSGiuliano Pochini 
161dd7b254dSGiuliano Pochini 
162dd7b254dSGiuliano Pochini 
163dd7b254dSGiuliano Pochini #ifndef ECHOCARD_HAS_ASIC
164dd7b254dSGiuliano Pochini /* This card has no ASIC, just return ok */
165dd7b254dSGiuliano Pochini static inline int check_asic_status(struct echoaudio *chip)
166dd7b254dSGiuliano Pochini {
167dd7b254dSGiuliano Pochini 	chip->asic_loaded = TRUE;
168dd7b254dSGiuliano Pochini 	return 0;
169dd7b254dSGiuliano Pochini }
170dd7b254dSGiuliano Pochini 
171dd7b254dSGiuliano Pochini #endif /* !ECHOCARD_HAS_ASIC */
172dd7b254dSGiuliano Pochini 
173dd7b254dSGiuliano Pochini 
174dd7b254dSGiuliano Pochini 
175dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_ASIC
176dd7b254dSGiuliano Pochini 
177dd7b254dSGiuliano Pochini /* Load ASIC code - done after the DSP is loaded */
178dd7b254dSGiuliano Pochini static int load_asic_generic(struct echoaudio *chip, u32 cmd,
179dd7b254dSGiuliano Pochini 			     const struct firmware *asic)
180dd7b254dSGiuliano Pochini {
181dd7b254dSGiuliano Pochini 	const struct firmware *fw;
182dd7b254dSGiuliano Pochini 	int err;
183dd7b254dSGiuliano Pochini 	u32 i, size;
184dd7b254dSGiuliano Pochini 	u8 *code;
185dd7b254dSGiuliano Pochini 
186dd7b254dSGiuliano Pochini 	if ((err = get_firmware(&fw, asic, chip)) < 0) {
187dd7b254dSGiuliano Pochini 		snd_printk(KERN_WARNING "Firmware not found !\n");
188dd7b254dSGiuliano Pochini 		return err;
189dd7b254dSGiuliano Pochini 	}
190dd7b254dSGiuliano Pochini 
191dd7b254dSGiuliano Pochini 	code = (u8 *)fw->data;
192dd7b254dSGiuliano Pochini 	size = fw->size;
193dd7b254dSGiuliano Pochini 
194dd7b254dSGiuliano Pochini 	/* Send the "Here comes the ASIC" command */
195dd7b254dSGiuliano Pochini 	if (write_dsp(chip, cmd) < 0)
196dd7b254dSGiuliano Pochini 		goto la_error;
197dd7b254dSGiuliano Pochini 
198dd7b254dSGiuliano Pochini 	/* Write length of ASIC file in bytes */
199dd7b254dSGiuliano Pochini 	if (write_dsp(chip, size) < 0)
200dd7b254dSGiuliano Pochini 		goto la_error;
201dd7b254dSGiuliano Pochini 
202dd7b254dSGiuliano Pochini 	for (i = 0; i < size; i++) {
203dd7b254dSGiuliano Pochini 		if (write_dsp(chip, code[i]) < 0)
204dd7b254dSGiuliano Pochini 			goto la_error;
205dd7b254dSGiuliano Pochini 	}
206dd7b254dSGiuliano Pochini 
207dd7b254dSGiuliano Pochini 	DE_INIT(("ASIC loaded\n"));
208dd7b254dSGiuliano Pochini 	free_firmware(fw);
209dd7b254dSGiuliano Pochini 	return 0;
210dd7b254dSGiuliano Pochini 
211dd7b254dSGiuliano Pochini la_error:
212dd7b254dSGiuliano Pochini 	DE_INIT(("failed on write_dsp\n"));
213dd7b254dSGiuliano Pochini 	free_firmware(fw);
214dd7b254dSGiuliano Pochini 	return -EIO;
215dd7b254dSGiuliano Pochini }
216dd7b254dSGiuliano Pochini 
217dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_ASIC */
218dd7b254dSGiuliano Pochini 
219dd7b254dSGiuliano Pochini 
220dd7b254dSGiuliano Pochini 
221dd7b254dSGiuliano Pochini #ifdef DSP_56361
222dd7b254dSGiuliano Pochini 
223dd7b254dSGiuliano Pochini /* Install the resident loader for 56361 DSPs;  The resident loader is on
224dd7b254dSGiuliano Pochini the EPROM on the board for 56301 DSP. The resident loader is a tiny little
225dd7b254dSGiuliano Pochini program that is used to load the real DSP code. */
226dd7b254dSGiuliano Pochini static int install_resident_loader(struct echoaudio *chip)
227dd7b254dSGiuliano Pochini {
228dd7b254dSGiuliano Pochini 	u32 address;
229dd7b254dSGiuliano Pochini 	int index, words, i;
230dd7b254dSGiuliano Pochini 	u16 *code;
231dd7b254dSGiuliano Pochini 	u32 status;
232dd7b254dSGiuliano Pochini 	const struct firmware *fw;
233dd7b254dSGiuliano Pochini 
234dd7b254dSGiuliano Pochini 	/* 56361 cards only!  This check is required by the old 56301-based
235dd7b254dSGiuliano Pochini 	Mona and Gina24 */
236dd7b254dSGiuliano Pochini 	if (chip->device_id != DEVICE_ID_56361)
237dd7b254dSGiuliano Pochini 		return 0;
238dd7b254dSGiuliano Pochini 
239dd7b254dSGiuliano Pochini 	/* Look to see if the resident loader is present.  If the resident
240dd7b254dSGiuliano Pochini 	loader is already installed, host flag 5 will be on. */
241dd7b254dSGiuliano Pochini 	status = get_dsp_register(chip, CHI32_STATUS_REG);
242dd7b254dSGiuliano Pochini 	if (status & CHI32_STATUS_REG_HF5) {
243dd7b254dSGiuliano Pochini 		DE_INIT(("Resident loader already installed; status is 0x%x\n",
244dd7b254dSGiuliano Pochini 			 status));
245dd7b254dSGiuliano Pochini 		return 0;
246dd7b254dSGiuliano Pochini 	}
247dd7b254dSGiuliano Pochini 
248dd7b254dSGiuliano Pochini 	if ((i = get_firmware(&fw, &card_fw[FW_361_LOADER], chip)) < 0) {
249dd7b254dSGiuliano Pochini 		snd_printk(KERN_WARNING "Firmware not found !\n");
250dd7b254dSGiuliano Pochini 		return i;
251dd7b254dSGiuliano Pochini 	}
252dd7b254dSGiuliano Pochini 
253dd7b254dSGiuliano Pochini 	/* The DSP code is an array of 16 bit words.  The array is divided up
254dd7b254dSGiuliano Pochini 	into sections.  The first word of each section is the size in words,
255dd7b254dSGiuliano Pochini 	followed by the section type.
256dd7b254dSGiuliano Pochini 	Since DSP addresses and data are 24 bits wide, they each take up two
257dd7b254dSGiuliano Pochini 	16 bit words in the array.
258dd7b254dSGiuliano Pochini 	This is a lot like the other loader loop, but it's not a loop, you
259dd7b254dSGiuliano Pochini 	don't write the memory type, and you don't write a zero at the end. */
260dd7b254dSGiuliano Pochini 
261dd7b254dSGiuliano Pochini 	/* Set DSP format bits for 24 bit mode */
262dd7b254dSGiuliano Pochini 	set_dsp_register(chip, CHI32_CONTROL_REG,
263dd7b254dSGiuliano Pochini 			 get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900);
264dd7b254dSGiuliano Pochini 
265dd7b254dSGiuliano Pochini 	code = (u16 *)fw->data;
266dd7b254dSGiuliano Pochini 
267dd7b254dSGiuliano Pochini 	/* Skip the header section; the first word in the array is the size
268dd7b254dSGiuliano Pochini 	of the first section, so the first real section of code is pointed
269dd7b254dSGiuliano Pochini 	to by Code[0]. */
270dd7b254dSGiuliano Pochini 	index = code[0];
271dd7b254dSGiuliano Pochini 
272dd7b254dSGiuliano Pochini 	/* Skip the section size, LRS block type, and DSP memory type */
273dd7b254dSGiuliano Pochini 	index += 3;
274dd7b254dSGiuliano Pochini 
275dd7b254dSGiuliano Pochini 	/* Get the number of DSP words to write */
276dd7b254dSGiuliano Pochini 	words = code[index++];
277dd7b254dSGiuliano Pochini 
278dd7b254dSGiuliano Pochini 	/* Get the DSP address for this block; 24 bits, so build from two words */
279dd7b254dSGiuliano Pochini 	address = ((u32)code[index] << 16) + code[index + 1];
280dd7b254dSGiuliano Pochini 	index += 2;
281dd7b254dSGiuliano Pochini 
282dd7b254dSGiuliano Pochini 	/* Write the count to the DSP */
283dd7b254dSGiuliano Pochini 	if (write_dsp(chip, words)) {
284dd7b254dSGiuliano Pochini 		DE_INIT(("install_resident_loader: Failed to write word count!\n"));
285dd7b254dSGiuliano Pochini 		goto irl_error;
286dd7b254dSGiuliano Pochini 	}
287dd7b254dSGiuliano Pochini 	/* Write the DSP address */
288dd7b254dSGiuliano Pochini 	if (write_dsp(chip, address)) {
289dd7b254dSGiuliano Pochini 		DE_INIT(("install_resident_loader: Failed to write DSP address!\n"));
290dd7b254dSGiuliano Pochini 		goto irl_error;
291dd7b254dSGiuliano Pochini 	}
292dd7b254dSGiuliano Pochini 	/* Write out this block of code to the DSP */
293dd7b254dSGiuliano Pochini 	for (i = 0; i < words; i++) {
294dd7b254dSGiuliano Pochini 		u32 data;
295dd7b254dSGiuliano Pochini 
296dd7b254dSGiuliano Pochini 		data = ((u32)code[index] << 16) + code[index + 1];
297dd7b254dSGiuliano Pochini 		if (write_dsp(chip, data)) {
298dd7b254dSGiuliano Pochini 			DE_INIT(("install_resident_loader: Failed to write DSP code\n"));
299dd7b254dSGiuliano Pochini 			goto irl_error;
300dd7b254dSGiuliano Pochini 		}
301dd7b254dSGiuliano Pochini 		index += 2;
302dd7b254dSGiuliano Pochini 	}
303dd7b254dSGiuliano Pochini 
304dd7b254dSGiuliano Pochini 	/* Wait for flag 5 to come up */
305dd7b254dSGiuliano Pochini 	for (i = 0; i < 200; i++) {	/* Timeout is 50us * 200 = 10ms */
306dd7b254dSGiuliano Pochini 		udelay(50);
307dd7b254dSGiuliano Pochini 		status = get_dsp_register(chip, CHI32_STATUS_REG);
308dd7b254dSGiuliano Pochini 		if (status & CHI32_STATUS_REG_HF5)
309dd7b254dSGiuliano Pochini 			break;
310dd7b254dSGiuliano Pochini 	}
311dd7b254dSGiuliano Pochini 
312dd7b254dSGiuliano Pochini 	if (i == 200) {
313dd7b254dSGiuliano Pochini 		DE_INIT(("Resident loader failed to set HF5\n"));
314dd7b254dSGiuliano Pochini 		goto irl_error;
315dd7b254dSGiuliano Pochini 	}
316dd7b254dSGiuliano Pochini 
317dd7b254dSGiuliano Pochini 	DE_INIT(("Resident loader successfully installed\n"));
318dd7b254dSGiuliano Pochini 	free_firmware(fw);
319dd7b254dSGiuliano Pochini 	return 0;
320dd7b254dSGiuliano Pochini 
321dd7b254dSGiuliano Pochini irl_error:
322dd7b254dSGiuliano Pochini 	free_firmware(fw);
323dd7b254dSGiuliano Pochini 	return -EIO;
324dd7b254dSGiuliano Pochini }
325dd7b254dSGiuliano Pochini 
326dd7b254dSGiuliano Pochini #endif /* DSP_56361 */
327dd7b254dSGiuliano Pochini 
328dd7b254dSGiuliano Pochini 
329dd7b254dSGiuliano Pochini static int load_dsp(struct echoaudio *chip, u16 *code)
330dd7b254dSGiuliano Pochini {
331dd7b254dSGiuliano Pochini 	u32 address, data;
332dd7b254dSGiuliano Pochini 	int index, words, i;
333dd7b254dSGiuliano Pochini 
334dd7b254dSGiuliano Pochini 	if (chip->dsp_code == code) {
335dd7b254dSGiuliano Pochini 		DE_INIT(("DSP is already loaded!\n"));
336dd7b254dSGiuliano Pochini 		return 0;
337dd7b254dSGiuliano Pochini 	}
338dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;		/* Set TRUE until DSP loaded */
339dd7b254dSGiuliano Pochini 	chip->dsp_code = NULL;		/* Current DSP code not loaded */
340dd7b254dSGiuliano Pochini 	chip->asic_loaded = FALSE;	/* Loading the DSP code will reset the ASIC */
341dd7b254dSGiuliano Pochini 
342dd7b254dSGiuliano Pochini 	DE_INIT(("load_dsp: Set bad_board to TRUE\n"));
343dd7b254dSGiuliano Pochini 
344dd7b254dSGiuliano Pochini 	/* If this board requires a resident loader, install it. */
345dd7b254dSGiuliano Pochini #ifdef DSP_56361
346dd7b254dSGiuliano Pochini 	if ((i = install_resident_loader(chip)) < 0)
347dd7b254dSGiuliano Pochini 		return i;
348dd7b254dSGiuliano Pochini #endif
349dd7b254dSGiuliano Pochini 
350dd7b254dSGiuliano Pochini 	/* Send software reset command */
351dd7b254dSGiuliano Pochini 	if (send_vector(chip, DSP_VC_RESET) < 0) {
352dd7b254dSGiuliano Pochini 		DE_INIT(("LoadDsp: send_vector DSP_VC_RESET failed, Critical Failure\n"));
353dd7b254dSGiuliano Pochini 		return -EIO;
354dd7b254dSGiuliano Pochini 	}
355dd7b254dSGiuliano Pochini 	/* Delay 10us */
356dd7b254dSGiuliano Pochini 	udelay(10);
357dd7b254dSGiuliano Pochini 
358dd7b254dSGiuliano Pochini 	/* Wait 10ms for HF3 to indicate that software reset is complete */
359dd7b254dSGiuliano Pochini 	for (i = 0; i < 1000; i++) {	/* Timeout is 10us * 1000 = 10ms */
360dd7b254dSGiuliano Pochini 		if (get_dsp_register(chip, CHI32_STATUS_REG) &
361dd7b254dSGiuliano Pochini 		    CHI32_STATUS_REG_HF3)
362dd7b254dSGiuliano Pochini 			break;
363dd7b254dSGiuliano Pochini 		udelay(10);
364dd7b254dSGiuliano Pochini 	}
365dd7b254dSGiuliano Pochini 
366dd7b254dSGiuliano Pochini 	if (i == 1000) {
367dd7b254dSGiuliano Pochini 		DE_INIT(("load_dsp: Timeout waiting for CHI32_STATUS_REG_HF3\n"));
368dd7b254dSGiuliano Pochini 		return -EIO;
369dd7b254dSGiuliano Pochini 	}
370dd7b254dSGiuliano Pochini 
371dd7b254dSGiuliano Pochini 	/* Set DSP format bits for 24 bit mode now that soft reset is done */
372dd7b254dSGiuliano Pochini 	set_dsp_register(chip, CHI32_CONTROL_REG,
373dd7b254dSGiuliano Pochini 			 get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900);
374dd7b254dSGiuliano Pochini 
375dd7b254dSGiuliano Pochini 	/* Main loader loop */
376dd7b254dSGiuliano Pochini 
377dd7b254dSGiuliano Pochini 	index = code[0];
378dd7b254dSGiuliano Pochini 	for (;;) {
379dd7b254dSGiuliano Pochini 		int block_type, mem_type;
380dd7b254dSGiuliano Pochini 
381dd7b254dSGiuliano Pochini 		/* Total Block Size */
382dd7b254dSGiuliano Pochini 		index++;
383dd7b254dSGiuliano Pochini 
384dd7b254dSGiuliano Pochini 		/* Block Type */
385dd7b254dSGiuliano Pochini 		block_type = code[index];
386dd7b254dSGiuliano Pochini 		if (block_type == 4)	/* We're finished */
387dd7b254dSGiuliano Pochini 			break;
388dd7b254dSGiuliano Pochini 
389dd7b254dSGiuliano Pochini 		index++;
390dd7b254dSGiuliano Pochini 
391dd7b254dSGiuliano Pochini 		/* Memory Type  P=0,X=1,Y=2 */
392dd7b254dSGiuliano Pochini 		mem_type = code[index++];
393dd7b254dSGiuliano Pochini 
394dd7b254dSGiuliano Pochini 		/* Block Code Size */
395dd7b254dSGiuliano Pochini 		words = code[index++];
396dd7b254dSGiuliano Pochini 		if (words == 0)		/* We're finished */
397dd7b254dSGiuliano Pochini 			break;
398dd7b254dSGiuliano Pochini 
399dd7b254dSGiuliano Pochini 		/* Start Address */
400dd7b254dSGiuliano Pochini 		address = ((u32)code[index] << 16) + code[index + 1];
401dd7b254dSGiuliano Pochini 		index += 2;
402dd7b254dSGiuliano Pochini 
403dd7b254dSGiuliano Pochini 		if (write_dsp(chip, words) < 0) {
404dd7b254dSGiuliano Pochini 			DE_INIT(("load_dsp: failed to write number of DSP words\n"));
405dd7b254dSGiuliano Pochini 			return -EIO;
406dd7b254dSGiuliano Pochini 		}
407dd7b254dSGiuliano Pochini 		if (write_dsp(chip, address) < 0) {
408dd7b254dSGiuliano Pochini 			DE_INIT(("load_dsp: failed to write DSP address\n"));
409dd7b254dSGiuliano Pochini 			return -EIO;
410dd7b254dSGiuliano Pochini 		}
411dd7b254dSGiuliano Pochini 		if (write_dsp(chip, mem_type) < 0) {
412dd7b254dSGiuliano Pochini 			DE_INIT(("load_dsp: failed to write DSP memory type\n"));
413dd7b254dSGiuliano Pochini 			return -EIO;
414dd7b254dSGiuliano Pochini 		}
415dd7b254dSGiuliano Pochini 		/* Code */
416dd7b254dSGiuliano Pochini 		for (i = 0; i < words; i++, index+=2) {
417dd7b254dSGiuliano Pochini 			data = ((u32)code[index] << 16) + code[index + 1];
418dd7b254dSGiuliano Pochini 			if (write_dsp(chip, data) < 0) {
419dd7b254dSGiuliano Pochini 				DE_INIT(("load_dsp: failed to write DSP data\n"));
420dd7b254dSGiuliano Pochini 				return -EIO;
421dd7b254dSGiuliano Pochini 			}
422dd7b254dSGiuliano Pochini 		}
423dd7b254dSGiuliano Pochini 	}
424dd7b254dSGiuliano Pochini 
425dd7b254dSGiuliano Pochini 	if (write_dsp(chip, 0) < 0) {	/* We're done!!! */
426dd7b254dSGiuliano Pochini 		DE_INIT(("load_dsp: Failed to write final zero\n"));
427dd7b254dSGiuliano Pochini 		return -EIO;
428dd7b254dSGiuliano Pochini 	}
429dd7b254dSGiuliano Pochini 	udelay(10);
430dd7b254dSGiuliano Pochini 
431dd7b254dSGiuliano Pochini 	for (i = 0; i < 5000; i++) {	/* Timeout is 100us * 5000 = 500ms */
432dd7b254dSGiuliano Pochini 		/* Wait for flag 4 - indicates that the DSP loaded OK */
433dd7b254dSGiuliano Pochini 		if (get_dsp_register(chip, CHI32_STATUS_REG) &
434dd7b254dSGiuliano Pochini 		    CHI32_STATUS_REG_HF4) {
435dd7b254dSGiuliano Pochini 			set_dsp_register(chip, CHI32_CONTROL_REG,
436dd7b254dSGiuliano Pochini 					 get_dsp_register(chip, CHI32_CONTROL_REG) & ~0x1b00);
437dd7b254dSGiuliano Pochini 
438dd7b254dSGiuliano Pochini 			if (write_dsp(chip, DSP_FNC_SET_COMMPAGE_ADDR) < 0) {
439dd7b254dSGiuliano Pochini 				DE_INIT(("load_dsp: Failed to write DSP_FNC_SET_COMMPAGE_ADDR\n"));
440dd7b254dSGiuliano Pochini 				return -EIO;
441dd7b254dSGiuliano Pochini 			}
442dd7b254dSGiuliano Pochini 
443dd7b254dSGiuliano Pochini 			if (write_dsp(chip, chip->comm_page_phys) < 0) {
444dd7b254dSGiuliano Pochini 				DE_INIT(("load_dsp: Failed to write comm page address\n"));
445dd7b254dSGiuliano Pochini 				return -EIO;
446dd7b254dSGiuliano Pochini 			}
447dd7b254dSGiuliano Pochini 
448dd7b254dSGiuliano Pochini 			/* Get the serial number via slave mode.
449dd7b254dSGiuliano Pochini 			This is triggered by the SET_COMMPAGE_ADDR command.
450dd7b254dSGiuliano Pochini 			We don't actually use the serial number but we have to
451dd7b254dSGiuliano Pochini 			get it as part of the DSP init voodoo. */
452dd7b254dSGiuliano Pochini 			if (read_sn(chip) < 0) {
453dd7b254dSGiuliano Pochini 				DE_INIT(("load_dsp: Failed to read serial number\n"));
454dd7b254dSGiuliano Pochini 				return -EIO;
455dd7b254dSGiuliano Pochini 			}
456dd7b254dSGiuliano Pochini 
457dd7b254dSGiuliano Pochini 			chip->dsp_code = code;		/* Show which DSP code loaded */
458dd7b254dSGiuliano Pochini 			chip->bad_board = FALSE;	/* DSP OK */
459dd7b254dSGiuliano Pochini 			DE_INIT(("load_dsp: OK!\n"));
460dd7b254dSGiuliano Pochini 			return 0;
461dd7b254dSGiuliano Pochini 		}
462dd7b254dSGiuliano Pochini 		udelay(100);
463dd7b254dSGiuliano Pochini 	}
464dd7b254dSGiuliano Pochini 
465dd7b254dSGiuliano Pochini 	DE_INIT(("load_dsp: DSP load timed out waiting for HF4\n"));
466dd7b254dSGiuliano Pochini 	return -EIO;
467dd7b254dSGiuliano Pochini }
468dd7b254dSGiuliano Pochini 
469dd7b254dSGiuliano Pochini 
470dd7b254dSGiuliano Pochini 
471dd7b254dSGiuliano Pochini /* load_firmware takes care of loading the DSP and any ASIC code. */
472dd7b254dSGiuliano Pochini static int load_firmware(struct echoaudio *chip)
473dd7b254dSGiuliano Pochini {
474dd7b254dSGiuliano Pochini 	const struct firmware *fw;
475dd7b254dSGiuliano Pochini 	int box_type, err;
476dd7b254dSGiuliano Pochini 
477dd7b254dSGiuliano Pochini 	snd_assert(chip->dsp_code_to_load && chip->comm_page, return -EPERM);
478dd7b254dSGiuliano Pochini 
479dd7b254dSGiuliano Pochini 	/* See if the ASIC is present and working - only if the DSP is already loaded */
480dd7b254dSGiuliano Pochini 	if (chip->dsp_code) {
481dd7b254dSGiuliano Pochini 		if ((box_type = check_asic_status(chip)) >= 0)
482dd7b254dSGiuliano Pochini 			return box_type;
483dd7b254dSGiuliano Pochini 		/* ASIC check failed; force the DSP to reload */
484dd7b254dSGiuliano Pochini 		chip->dsp_code = NULL;
485dd7b254dSGiuliano Pochini 	}
486dd7b254dSGiuliano Pochini 
487dd7b254dSGiuliano Pochini 	if ((err = get_firmware(&fw, chip->dsp_code_to_load, chip)) < 0)
488dd7b254dSGiuliano Pochini 		return err;
489dd7b254dSGiuliano Pochini 	err = load_dsp(chip, (u16 *)fw->data);
490dd7b254dSGiuliano Pochini 	free_firmware(fw);
491dd7b254dSGiuliano Pochini 	if (err < 0)
492dd7b254dSGiuliano Pochini 		return err;
493dd7b254dSGiuliano Pochini 
494dd7b254dSGiuliano Pochini 	if ((box_type = load_asic(chip)) < 0)
495dd7b254dSGiuliano Pochini 		return box_type;	/* error */
496dd7b254dSGiuliano Pochini 
497dd7b254dSGiuliano Pochini 	if ((err = restore_dsp_rettings(chip)) < 0)
498dd7b254dSGiuliano Pochini 		return err;
499dd7b254dSGiuliano Pochini 
500dd7b254dSGiuliano Pochini 	return box_type;
501dd7b254dSGiuliano Pochini }
502dd7b254dSGiuliano Pochini 
503dd7b254dSGiuliano Pochini 
504dd7b254dSGiuliano Pochini 
505dd7b254dSGiuliano Pochini /****************************************************************************
506dd7b254dSGiuliano Pochini 	Mixer functions
507dd7b254dSGiuliano Pochini  ****************************************************************************/
508dd7b254dSGiuliano Pochini 
509dd7b254dSGiuliano Pochini #if defined(ECHOCARD_HAS_INPUT_NOMINAL_LEVEL) || \
510dd7b254dSGiuliano Pochini 	defined(ECHOCARD_HAS_OUTPUT_NOMINAL_LEVEL)
511dd7b254dSGiuliano Pochini 
512dd7b254dSGiuliano Pochini /* Set the nominal level for an input or output bus (true = -10dBV, false = +4dBu) */
513dd7b254dSGiuliano Pochini static int set_nominal_level(struct echoaudio *chip, u16 index, char consumer)
514dd7b254dSGiuliano Pochini {
515dd7b254dSGiuliano Pochini 	snd_assert(index < num_busses_out(chip) + num_busses_in(chip),
516dd7b254dSGiuliano Pochini 		   return -EINVAL);
517dd7b254dSGiuliano Pochini 
518dd7b254dSGiuliano Pochini 	/* Wait for the handshake (OK even if ASIC is not loaded) */
519dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
520dd7b254dSGiuliano Pochini 		return -EIO;
521dd7b254dSGiuliano Pochini 
522dd7b254dSGiuliano Pochini 	chip->nominal_level[index] = consumer;
523dd7b254dSGiuliano Pochini 
524dd7b254dSGiuliano Pochini 	if (consumer)
525dd7b254dSGiuliano Pochini 		chip->comm_page->nominal_level_mask |= cpu_to_le32(1 << index);
526dd7b254dSGiuliano Pochini 	else
527dd7b254dSGiuliano Pochini 		chip->comm_page->nominal_level_mask &= ~cpu_to_le32(1 << index);
528dd7b254dSGiuliano Pochini 
529dd7b254dSGiuliano Pochini 	return 0;
530dd7b254dSGiuliano Pochini }
531dd7b254dSGiuliano Pochini 
532dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_*_NOMINAL_LEVEL */
533dd7b254dSGiuliano Pochini 
534dd7b254dSGiuliano Pochini 
535dd7b254dSGiuliano Pochini 
536dd7b254dSGiuliano Pochini /* Set the gain for a single physical output channel (dB). */
537dd7b254dSGiuliano Pochini static int set_output_gain(struct echoaudio *chip, u16 channel, s8 gain)
538dd7b254dSGiuliano Pochini {
539dd7b254dSGiuliano Pochini 	snd_assert(channel < num_busses_out(chip), return -EINVAL);
540dd7b254dSGiuliano Pochini 
541dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
542dd7b254dSGiuliano Pochini 		return -EIO;
543dd7b254dSGiuliano Pochini 
544dd7b254dSGiuliano Pochini 	/* Save the new value */
545dd7b254dSGiuliano Pochini 	chip->output_gain[channel] = gain;
546dd7b254dSGiuliano Pochini 	chip->comm_page->line_out_level[channel] = gain;
547dd7b254dSGiuliano Pochini 	return 0;
548dd7b254dSGiuliano Pochini }
549dd7b254dSGiuliano Pochini 
550dd7b254dSGiuliano Pochini 
551dd7b254dSGiuliano Pochini 
552dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MONITOR
553dd7b254dSGiuliano Pochini /* Set the monitor level from an input bus to an output bus. */
554dd7b254dSGiuliano Pochini static int set_monitor_gain(struct echoaudio *chip, u16 output, u16 input,
555dd7b254dSGiuliano Pochini 			    s8 gain)
556dd7b254dSGiuliano Pochini {
557dd7b254dSGiuliano Pochini 	snd_assert(output < num_busses_out(chip) &&
558dd7b254dSGiuliano Pochini 		   input < num_busses_in(chip), return -EINVAL);
559dd7b254dSGiuliano Pochini 
560dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
561dd7b254dSGiuliano Pochini 		return -EIO;
562dd7b254dSGiuliano Pochini 
563dd7b254dSGiuliano Pochini 	chip->monitor_gain[output][input] = gain;
564dd7b254dSGiuliano Pochini 	chip->comm_page->monitors[monitor_index(chip, output, input)] = gain;
565dd7b254dSGiuliano Pochini 	return 0;
566dd7b254dSGiuliano Pochini }
567dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_MONITOR */
568dd7b254dSGiuliano Pochini 
569dd7b254dSGiuliano Pochini 
570dd7b254dSGiuliano Pochini /* Tell the DSP to read and update output, nominal & monitor levels in comm page. */
571dd7b254dSGiuliano Pochini static int update_output_line_level(struct echoaudio *chip)
572dd7b254dSGiuliano Pochini {
573dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
574dd7b254dSGiuliano Pochini 		return -EIO;
575dd7b254dSGiuliano Pochini 	clear_handshake(chip);
576dd7b254dSGiuliano Pochini 	return send_vector(chip, DSP_VC_UPDATE_OUTVOL);
577dd7b254dSGiuliano Pochini }
578dd7b254dSGiuliano Pochini 
579dd7b254dSGiuliano Pochini 
580dd7b254dSGiuliano Pochini 
581dd7b254dSGiuliano Pochini /* Tell the DSP to read and update input levels in comm page */
582dd7b254dSGiuliano Pochini static int update_input_line_level(struct echoaudio *chip)
583dd7b254dSGiuliano Pochini {
584dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
585dd7b254dSGiuliano Pochini 		return -EIO;
586dd7b254dSGiuliano Pochini 	clear_handshake(chip);
587dd7b254dSGiuliano Pochini 	return send_vector(chip, DSP_VC_UPDATE_INGAIN);
588dd7b254dSGiuliano Pochini }
589dd7b254dSGiuliano Pochini 
590dd7b254dSGiuliano Pochini 
591dd7b254dSGiuliano Pochini 
592dd7b254dSGiuliano Pochini /* set_meters_on turns the meters on or off.  If meters are turned on, the DSP
593dd7b254dSGiuliano Pochini will write the meter and clock detect values to the comm page at about 30Hz */
594dd7b254dSGiuliano Pochini static void set_meters_on(struct echoaudio *chip, char on)
595dd7b254dSGiuliano Pochini {
596dd7b254dSGiuliano Pochini 	if (on && !chip->meters_enabled) {
597dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_METERS_ON);
598dd7b254dSGiuliano Pochini 		chip->meters_enabled = 1;
599dd7b254dSGiuliano Pochini 	} else if (!on && chip->meters_enabled) {
600dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_METERS_OFF);
601dd7b254dSGiuliano Pochini 		chip->meters_enabled = 0;
602dd7b254dSGiuliano Pochini 		memset((s8 *)chip->comm_page->vu_meter, ECHOGAIN_MUTED,
603dd7b254dSGiuliano Pochini 		       DSP_MAXPIPES);
604dd7b254dSGiuliano Pochini 		memset((s8 *)chip->comm_page->peak_meter, ECHOGAIN_MUTED,
605dd7b254dSGiuliano Pochini 		       DSP_MAXPIPES);
606dd7b254dSGiuliano Pochini 	}
607dd7b254dSGiuliano Pochini }
608dd7b254dSGiuliano Pochini 
609dd7b254dSGiuliano Pochini 
610dd7b254dSGiuliano Pochini 
611dd7b254dSGiuliano Pochini /* Fill out an the given array using the current values in the comm page.
612dd7b254dSGiuliano Pochini Meters are written in the comm page by the DSP in this order:
613dd7b254dSGiuliano Pochini  Output busses
614dd7b254dSGiuliano Pochini  Input busses
615dd7b254dSGiuliano Pochini  Output pipes (vmixer cards only)
616dd7b254dSGiuliano Pochini 
617dd7b254dSGiuliano Pochini This function assumes there are no more than 16 in/out busses or pipes
618dd7b254dSGiuliano Pochini Meters is an array [3][16][2] of long. */
619dd7b254dSGiuliano Pochini static void get_audio_meters(struct echoaudio *chip, long *meters)
620dd7b254dSGiuliano Pochini {
621dd7b254dSGiuliano Pochini 	int i, m, n;
622dd7b254dSGiuliano Pochini 
623dd7b254dSGiuliano Pochini 	m = 0;
624dd7b254dSGiuliano Pochini 	n = 0;
625dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_out(chip); i++, m++) {
626dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->vu_meter[m];
627dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->peak_meter[m];
628dd7b254dSGiuliano Pochini 	}
629dd7b254dSGiuliano Pochini 	for (; n < 32; n++)
630dd7b254dSGiuliano Pochini 		meters[n] = 0;
631dd7b254dSGiuliano Pochini 
632dd7b254dSGiuliano Pochini #ifdef ECHOCARD_ECHO3G
633dd7b254dSGiuliano Pochini 	m = E3G_MAX_OUTPUTS;	/* Skip unused meters */
634dd7b254dSGiuliano Pochini #endif
635dd7b254dSGiuliano Pochini 
636dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_in(chip); i++, m++) {
637dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->vu_meter[m];
638dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->peak_meter[m];
639dd7b254dSGiuliano Pochini 	}
640dd7b254dSGiuliano Pochini 	for (; n < 64; n++)
641dd7b254dSGiuliano Pochini 		meters[n] = 0;
642dd7b254dSGiuliano Pochini 
643dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_VMIXER
644dd7b254dSGiuliano Pochini 	for (i = 0; i < num_pipes_out(chip); i++, m++) {
645dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->vu_meter[m];
646dd7b254dSGiuliano Pochini 		meters[n++] = chip->comm_page->peak_meter[m];
647dd7b254dSGiuliano Pochini 	}
648dd7b254dSGiuliano Pochini #endif
649dd7b254dSGiuliano Pochini 	for (; n < 96; n++)
650dd7b254dSGiuliano Pochini 		meters[n] = 0;
651dd7b254dSGiuliano Pochini }
652dd7b254dSGiuliano Pochini 
653dd7b254dSGiuliano Pochini 
654dd7b254dSGiuliano Pochini 
655dd7b254dSGiuliano Pochini static int restore_dsp_rettings(struct echoaudio *chip)
656dd7b254dSGiuliano Pochini {
657dd7b254dSGiuliano Pochini 	int err;
658dd7b254dSGiuliano Pochini 	DE_INIT(("restore_dsp_settings\n"));
659dd7b254dSGiuliano Pochini 
660dd7b254dSGiuliano Pochini 	if ((err = check_asic_status(chip)) < 0)
661dd7b254dSGiuliano Pochini 		return err;
662dd7b254dSGiuliano Pochini 
663dd7b254dSGiuliano Pochini 	/* @ Gina20/Darla20 only. Should be harmless for other cards. */
664dd7b254dSGiuliano Pochini 	chip->comm_page->gd_clock_state = GD_CLOCK_UNDEF;
665dd7b254dSGiuliano Pochini 	chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_UNDEF;
666dd7b254dSGiuliano Pochini 	chip->comm_page->handshake = 0xffffffff;
667dd7b254dSGiuliano Pochini 
668dd7b254dSGiuliano Pochini 	if ((err = set_sample_rate(chip, chip->sample_rate)) < 0)
669dd7b254dSGiuliano Pochini 		return err;
670dd7b254dSGiuliano Pochini 
671dd7b254dSGiuliano Pochini 	if (chip->meters_enabled)
672dd7b254dSGiuliano Pochini 		if (send_vector(chip, DSP_VC_METERS_ON) < 0)
673dd7b254dSGiuliano Pochini 			return -EIO;
674dd7b254dSGiuliano Pochini 
675dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_EXTERNAL_CLOCK
676dd7b254dSGiuliano Pochini 	if (set_input_clock(chip, chip->input_clock) < 0)
677dd7b254dSGiuliano Pochini 		return -EIO;
678dd7b254dSGiuliano Pochini #endif
679dd7b254dSGiuliano Pochini 
680dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_OUTPUT_CLOCK_SWITCH
681dd7b254dSGiuliano Pochini 	if (set_output_clock(chip, chip->output_clock) < 0)
682dd7b254dSGiuliano Pochini 		return -EIO;
683dd7b254dSGiuliano Pochini #endif
684dd7b254dSGiuliano Pochini 
685dd7b254dSGiuliano Pochini 	if (update_output_line_level(chip) < 0)
686dd7b254dSGiuliano Pochini 		return -EIO;
687dd7b254dSGiuliano Pochini 
688dd7b254dSGiuliano Pochini 	if (update_input_line_level(chip) < 0)
689dd7b254dSGiuliano Pochini 		return -EIO;
690dd7b254dSGiuliano Pochini 
691dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_VMIXER
692dd7b254dSGiuliano Pochini 	if (update_vmixer_level(chip) < 0)
693dd7b254dSGiuliano Pochini 		return -EIO;
694dd7b254dSGiuliano Pochini #endif
695dd7b254dSGiuliano Pochini 
696dd7b254dSGiuliano Pochini 	if (wait_handshake(chip) < 0)
697dd7b254dSGiuliano Pochini 		return -EIO;
698dd7b254dSGiuliano Pochini 	clear_handshake(chip);
699dd7b254dSGiuliano Pochini 
700dd7b254dSGiuliano Pochini 	DE_INIT(("restore_dsp_rettings done\n"));
701dd7b254dSGiuliano Pochini 	return send_vector(chip, DSP_VC_UPDATE_FLAGS);
702dd7b254dSGiuliano Pochini }
703dd7b254dSGiuliano Pochini 
704dd7b254dSGiuliano Pochini 
705dd7b254dSGiuliano Pochini 
706dd7b254dSGiuliano Pochini /****************************************************************************
707dd7b254dSGiuliano Pochini 	Transport functions
708dd7b254dSGiuliano Pochini  ****************************************************************************/
709dd7b254dSGiuliano Pochini 
710dd7b254dSGiuliano Pochini /* set_audio_format() sets the format of the audio data in host memory for
711dd7b254dSGiuliano Pochini this pipe.  Note that _MS_ (mono-to-stereo) playback modes are not used by ALSA
712dd7b254dSGiuliano Pochini but they are here because they are just mono while capturing */
713dd7b254dSGiuliano Pochini static void set_audio_format(struct echoaudio *chip, u16 pipe_index,
714dd7b254dSGiuliano Pochini 			     const struct audioformat *format)
715dd7b254dSGiuliano Pochini {
716dd7b254dSGiuliano Pochini 	u16 dsp_format;
717dd7b254dSGiuliano Pochini 
718dd7b254dSGiuliano Pochini 	dsp_format = DSP_AUDIOFORM_SS_16LE;
719dd7b254dSGiuliano Pochini 
720dd7b254dSGiuliano Pochini 	/* Look for super-interleave (no big-endian and 8 bits) */
721dd7b254dSGiuliano Pochini 	if (format->interleave > 2) {
722dd7b254dSGiuliano Pochini 		switch (format->bits_per_sample) {
723dd7b254dSGiuliano Pochini 		case 16:
724dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_16LE;
725dd7b254dSGiuliano Pochini 			break;
726dd7b254dSGiuliano Pochini 		case 24:
727dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_24LE;
728dd7b254dSGiuliano Pochini 			break;
729dd7b254dSGiuliano Pochini 		case 32:
730dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SUPER_INTERLEAVE_32LE;
731dd7b254dSGiuliano Pochini 			break;
732dd7b254dSGiuliano Pochini 		}
733dd7b254dSGiuliano Pochini 		dsp_format |= format->interleave;
734dd7b254dSGiuliano Pochini 	} else if (format->data_are_bigendian) {
735dd7b254dSGiuliano Pochini 		/* For big-endian data, only 32 bit samples are supported */
736dd7b254dSGiuliano Pochini 		switch (format->interleave) {
737dd7b254dSGiuliano Pochini 		case 1:
738dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_MM_32BE;
739dd7b254dSGiuliano Pochini 			break;
740dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_STEREO_BIG_ENDIAN32
741dd7b254dSGiuliano Pochini 		case 2:
742dd7b254dSGiuliano Pochini 			dsp_format = DSP_AUDIOFORM_SS_32BE;
743dd7b254dSGiuliano Pochini 			break;
744dd7b254dSGiuliano Pochini #endif
745dd7b254dSGiuliano Pochini 		}
746dd7b254dSGiuliano Pochini 	} else if (format->interleave == 1 &&
747dd7b254dSGiuliano Pochini 		   format->bits_per_sample == 32 && !format->mono_to_stereo) {
748dd7b254dSGiuliano Pochini 		/* 32 bit little-endian mono->mono case */
749dd7b254dSGiuliano Pochini 		dsp_format = DSP_AUDIOFORM_MM_32LE;
750dd7b254dSGiuliano Pochini 	} else {
751dd7b254dSGiuliano Pochini 		/* Handle the other little-endian formats */
752dd7b254dSGiuliano Pochini 		switch (format->bits_per_sample) {
753dd7b254dSGiuliano Pochini 		case 8:
754dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
755dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_8;
756dd7b254dSGiuliano Pochini 			else
757dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_8;
758dd7b254dSGiuliano Pochini 			break;
759dd7b254dSGiuliano Pochini 		default:
760dd7b254dSGiuliano Pochini 		case 16:
761dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
762dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_16LE;
763dd7b254dSGiuliano Pochini 			else
764dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_16LE;
765dd7b254dSGiuliano Pochini 			break;
766dd7b254dSGiuliano Pochini 		case 24:
767dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
768dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_24LE;
769dd7b254dSGiuliano Pochini 			else
770dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_24LE;
771dd7b254dSGiuliano Pochini 			break;
772dd7b254dSGiuliano Pochini 		case 32:
773dd7b254dSGiuliano Pochini 			if (format->interleave == 2)
774dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_SS_32LE;
775dd7b254dSGiuliano Pochini 			else
776dd7b254dSGiuliano Pochini 				dsp_format = DSP_AUDIOFORM_MS_32LE;
777dd7b254dSGiuliano Pochini 			break;
778dd7b254dSGiuliano Pochini 		}
779dd7b254dSGiuliano Pochini 	}
780dd7b254dSGiuliano Pochini 	DE_ACT(("set_audio_format[%d] = %x\n", pipe_index, dsp_format));
781dd7b254dSGiuliano Pochini 	chip->comm_page->audio_format[pipe_index] = cpu_to_le16(dsp_format);
782dd7b254dSGiuliano Pochini }
783dd7b254dSGiuliano Pochini 
784dd7b254dSGiuliano Pochini 
785dd7b254dSGiuliano Pochini 
786dd7b254dSGiuliano Pochini /* start_transport starts transport for a set of pipes.
787dd7b254dSGiuliano Pochini The bits 1 in channel_mask specify what pipes to start. Only the bit of the
788dd7b254dSGiuliano Pochini first channel must be set, regardless its interleave.
789dd7b254dSGiuliano Pochini Same thing for pause_ and stop_ -trasport below. */
790dd7b254dSGiuliano Pochini static int start_transport(struct echoaudio *chip, u32 channel_mask,
791dd7b254dSGiuliano Pochini 			   u32 cyclic_mask)
792dd7b254dSGiuliano Pochini {
793dd7b254dSGiuliano Pochini 	DE_ACT(("start_transport %x\n", channel_mask));
794dd7b254dSGiuliano Pochini 
795dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
796dd7b254dSGiuliano Pochini 		return -EIO;
797dd7b254dSGiuliano Pochini 
798dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_start |= cpu_to_le32(channel_mask);
799dd7b254dSGiuliano Pochini 
800dd7b254dSGiuliano Pochini 	if (chip->comm_page->cmd_start) {
801dd7b254dSGiuliano Pochini 		clear_handshake(chip);
802dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_START_TRANSFER);
803dd7b254dSGiuliano Pochini 		if (wait_handshake(chip))
804dd7b254dSGiuliano Pochini 			return -EIO;
805dd7b254dSGiuliano Pochini 		/* Keep track of which pipes are transporting */
806dd7b254dSGiuliano Pochini 		chip->active_mask |= channel_mask;
807dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_start = 0;
808dd7b254dSGiuliano Pochini 		return 0;
809dd7b254dSGiuliano Pochini 	}
810dd7b254dSGiuliano Pochini 
811dd7b254dSGiuliano Pochini 	DE_ACT(("start_transport: No pipes to start!\n"));
812dd7b254dSGiuliano Pochini 	return -EINVAL;
813dd7b254dSGiuliano Pochini }
814dd7b254dSGiuliano Pochini 
815dd7b254dSGiuliano Pochini 
816dd7b254dSGiuliano Pochini 
817dd7b254dSGiuliano Pochini static int pause_transport(struct echoaudio *chip, u32 channel_mask)
818dd7b254dSGiuliano Pochini {
819dd7b254dSGiuliano Pochini 	DE_ACT(("pause_transport %x\n", channel_mask));
820dd7b254dSGiuliano Pochini 
821dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
822dd7b254dSGiuliano Pochini 		return -EIO;
823dd7b254dSGiuliano Pochini 
824dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask);
825dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_reset = 0;
826dd7b254dSGiuliano Pochini 	if (chip->comm_page->cmd_stop) {
827dd7b254dSGiuliano Pochini 		clear_handshake(chip);
828dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_STOP_TRANSFER);
829dd7b254dSGiuliano Pochini 		if (wait_handshake(chip))
830dd7b254dSGiuliano Pochini 			return -EIO;
831dd7b254dSGiuliano Pochini 		/* Keep track of which pipes are transporting */
832dd7b254dSGiuliano Pochini 		chip->active_mask &= ~channel_mask;
833dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_stop = 0;
834dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_reset = 0;
835dd7b254dSGiuliano Pochini 		return 0;
836dd7b254dSGiuliano Pochini 	}
837dd7b254dSGiuliano Pochini 
838dd7b254dSGiuliano Pochini 	DE_ACT(("pause_transport: No pipes to stop!\n"));
839dd7b254dSGiuliano Pochini 	return 0;
840dd7b254dSGiuliano Pochini }
841dd7b254dSGiuliano Pochini 
842dd7b254dSGiuliano Pochini 
843dd7b254dSGiuliano Pochini 
844dd7b254dSGiuliano Pochini static int stop_transport(struct echoaudio *chip, u32 channel_mask)
845dd7b254dSGiuliano Pochini {
846dd7b254dSGiuliano Pochini 	DE_ACT(("stop_transport %x\n", channel_mask));
847dd7b254dSGiuliano Pochini 
848dd7b254dSGiuliano Pochini 	if (wait_handshake(chip))
849dd7b254dSGiuliano Pochini 		return -EIO;
850dd7b254dSGiuliano Pochini 
851dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask);
852dd7b254dSGiuliano Pochini 	chip->comm_page->cmd_reset |= cpu_to_le32(channel_mask);
853dd7b254dSGiuliano Pochini 	if (chip->comm_page->cmd_reset) {
854dd7b254dSGiuliano Pochini 		clear_handshake(chip);
855dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_STOP_TRANSFER);
856dd7b254dSGiuliano Pochini 		if (wait_handshake(chip))
857dd7b254dSGiuliano Pochini 			return -EIO;
858dd7b254dSGiuliano Pochini 		/* Keep track of which pipes are transporting */
859dd7b254dSGiuliano Pochini 		chip->active_mask &= ~channel_mask;
860dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_stop = 0;
861dd7b254dSGiuliano Pochini 		chip->comm_page->cmd_reset = 0;
862dd7b254dSGiuliano Pochini 		return 0;
863dd7b254dSGiuliano Pochini 	}
864dd7b254dSGiuliano Pochini 
865dd7b254dSGiuliano Pochini 	DE_ACT(("stop_transport: No pipes to stop!\n"));
866dd7b254dSGiuliano Pochini 	return 0;
867dd7b254dSGiuliano Pochini }
868dd7b254dSGiuliano Pochini 
869dd7b254dSGiuliano Pochini 
870dd7b254dSGiuliano Pochini 
871dd7b254dSGiuliano Pochini static inline int is_pipe_allocated(struct echoaudio *chip, u16 pipe_index)
872dd7b254dSGiuliano Pochini {
873dd7b254dSGiuliano Pochini 	return (chip->pipe_alloc_mask & (1 << pipe_index));
874dd7b254dSGiuliano Pochini }
875dd7b254dSGiuliano Pochini 
876dd7b254dSGiuliano Pochini 
877dd7b254dSGiuliano Pochini 
878dd7b254dSGiuliano Pochini /* Stops everything and turns off the DSP. All pipes should be already
879dd7b254dSGiuliano Pochini stopped and unallocated. */
880dd7b254dSGiuliano Pochini static int rest_in_peace(struct echoaudio *chip)
881dd7b254dSGiuliano Pochini {
882dd7b254dSGiuliano Pochini 	DE_ACT(("rest_in_peace() open=%x\n", chip->pipe_alloc_mask));
883dd7b254dSGiuliano Pochini 
884dd7b254dSGiuliano Pochini 	/* Stops all active pipes (just to be sure) */
885dd7b254dSGiuliano Pochini 	stop_transport(chip, chip->active_mask);
886dd7b254dSGiuliano Pochini 
887dd7b254dSGiuliano Pochini 	set_meters_on(chip, FALSE);
888dd7b254dSGiuliano Pochini 
889dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MIDI
890dd7b254dSGiuliano Pochini 	enable_midi_input(chip, FALSE);
891dd7b254dSGiuliano Pochini #endif
892dd7b254dSGiuliano Pochini 
893dd7b254dSGiuliano Pochini 	/* Go to sleep */
894dd7b254dSGiuliano Pochini 	if (chip->dsp_code) {
895dd7b254dSGiuliano Pochini 		/* Make load_firmware do a complete reload */
896dd7b254dSGiuliano Pochini 		chip->dsp_code = NULL;
897dd7b254dSGiuliano Pochini 		/* Put the DSP to sleep */
898dd7b254dSGiuliano Pochini 		return send_vector(chip, DSP_VC_GO_COMATOSE);
899dd7b254dSGiuliano Pochini 	}
900dd7b254dSGiuliano Pochini 	return 0;
901dd7b254dSGiuliano Pochini }
902dd7b254dSGiuliano Pochini 
903dd7b254dSGiuliano Pochini 
904dd7b254dSGiuliano Pochini 
905dd7b254dSGiuliano Pochini /* Fills the comm page with default values */
906dd7b254dSGiuliano Pochini static int init_dsp_comm_page(struct echoaudio *chip)
907dd7b254dSGiuliano Pochini {
908dd7b254dSGiuliano Pochini 	/* Check if the compiler added extra padding inside the structure */
909dd7b254dSGiuliano Pochini 	if (offsetof(struct comm_page, midi_output) != 0xbe0) {
910dd7b254dSGiuliano Pochini 		DE_INIT(("init_dsp_comm_page() - Invalid struct comm_page structure\n"));
911dd7b254dSGiuliano Pochini 		return -EPERM;
912dd7b254dSGiuliano Pochini 	}
913dd7b254dSGiuliano Pochini 
914dd7b254dSGiuliano Pochini 	/* Init all the basic stuff */
915dd7b254dSGiuliano Pochini 	chip->card_name = ECHOCARD_NAME;
916dd7b254dSGiuliano Pochini 	chip->bad_board = TRUE;	/* Set TRUE until DSP loaded */
917dd7b254dSGiuliano Pochini 	chip->dsp_code = NULL;	/* Current DSP code not loaded */
918dd7b254dSGiuliano Pochini 	chip->digital_mode = DIGITAL_MODE_NONE;
919dd7b254dSGiuliano Pochini 	chip->input_clock = ECHO_CLOCK_INTERNAL;
920dd7b254dSGiuliano Pochini 	chip->output_clock = ECHO_CLOCK_WORD;
921dd7b254dSGiuliano Pochini 	chip->asic_loaded = FALSE;
922dd7b254dSGiuliano Pochini 	memset(chip->comm_page, 0, sizeof(struct comm_page));
923dd7b254dSGiuliano Pochini 
924dd7b254dSGiuliano Pochini 	/* Init the comm page */
925dd7b254dSGiuliano Pochini 	chip->comm_page->comm_size =
926dd7b254dSGiuliano Pochini 		__constant_cpu_to_le32(sizeof(struct comm_page));
927dd7b254dSGiuliano Pochini 	chip->comm_page->handshake = 0xffffffff;
928dd7b254dSGiuliano Pochini 	chip->comm_page->midi_out_free_count =
929dd7b254dSGiuliano Pochini 		__constant_cpu_to_le32(DSP_MIDI_OUT_FIFO_SIZE);
930dd7b254dSGiuliano Pochini 	chip->comm_page->sample_rate = __constant_cpu_to_le32(44100);
931dd7b254dSGiuliano Pochini 	chip->sample_rate = 44100;
932dd7b254dSGiuliano Pochini 
933dd7b254dSGiuliano Pochini 	/* Set line levels so we don't blast any inputs on startup */
934dd7b254dSGiuliano Pochini 	memset(chip->comm_page->monitors, ECHOGAIN_MUTED, MONITOR_ARRAY_SIZE);
935dd7b254dSGiuliano Pochini 	memset(chip->comm_page->vmixer, ECHOGAIN_MUTED, VMIXER_ARRAY_SIZE);
936dd7b254dSGiuliano Pochini 
937dd7b254dSGiuliano Pochini 	return 0;
938dd7b254dSGiuliano Pochini }
939dd7b254dSGiuliano Pochini 
940dd7b254dSGiuliano Pochini 
941dd7b254dSGiuliano Pochini 
942dd7b254dSGiuliano Pochini /* This function initializes the several volume controls for busses and pipes.
943dd7b254dSGiuliano Pochini This MUST be called after the DSP is up and running ! */
944dd7b254dSGiuliano Pochini static int init_line_levels(struct echoaudio *chip)
945dd7b254dSGiuliano Pochini {
946dd7b254dSGiuliano Pochini 	int st, i, o;
947dd7b254dSGiuliano Pochini 
948dd7b254dSGiuliano Pochini 	DE_INIT(("init_line_levels\n"));
949dd7b254dSGiuliano Pochini 
950dd7b254dSGiuliano Pochini 	/* Mute output busses */
951dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_out(chip); i++)
952dd7b254dSGiuliano Pochini 		if ((st = set_output_gain(chip, i, ECHOGAIN_MUTED)))
953dd7b254dSGiuliano Pochini 			return st;
954dd7b254dSGiuliano Pochini 	if ((st = update_output_line_level(chip)))
955dd7b254dSGiuliano Pochini 		return st;
956dd7b254dSGiuliano Pochini 
957dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_VMIXER
958dd7b254dSGiuliano Pochini 	/* Mute the Vmixer */
959dd7b254dSGiuliano Pochini 	for (i = 0; i < num_pipes_out(chip); i++)
960dd7b254dSGiuliano Pochini 		for (o = 0; o < num_busses_out(chip); o++)
961dd7b254dSGiuliano Pochini 			if ((st = set_vmixer_gain(chip, o, i, ECHOGAIN_MUTED)))
962dd7b254dSGiuliano Pochini 				return st;
963dd7b254dSGiuliano Pochini 	if ((st = update_vmixer_level(chip)))
964dd7b254dSGiuliano Pochini 		return st;
965dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_VMIXER */
966dd7b254dSGiuliano Pochini 
967dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MONITOR
968dd7b254dSGiuliano Pochini 	/* Mute the monitor mixer */
969dd7b254dSGiuliano Pochini 	for (o = 0; o < num_busses_out(chip); o++)
970dd7b254dSGiuliano Pochini 		for (i = 0; i < num_busses_in(chip); i++)
971dd7b254dSGiuliano Pochini 			if ((st = set_monitor_gain(chip, o, i, ECHOGAIN_MUTED)))
972dd7b254dSGiuliano Pochini 				return st;
973dd7b254dSGiuliano Pochini 	if ((st = update_output_line_level(chip)))
974dd7b254dSGiuliano Pochini 		return st;
975dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_MONITOR */
976dd7b254dSGiuliano Pochini 
977dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_INPUT_GAIN
978dd7b254dSGiuliano Pochini 	for (i = 0; i < num_busses_in(chip); i++)
979dd7b254dSGiuliano Pochini 		if ((st = set_input_gain(chip, i, ECHOGAIN_MUTED)))
980dd7b254dSGiuliano Pochini 			return st;
981dd7b254dSGiuliano Pochini 	if ((st = update_input_line_level(chip)))
982dd7b254dSGiuliano Pochini 		return st;
983dd7b254dSGiuliano Pochini #endif /* ECHOCARD_HAS_INPUT_GAIN */
984dd7b254dSGiuliano Pochini 
985dd7b254dSGiuliano Pochini 	return 0;
986dd7b254dSGiuliano Pochini }
987dd7b254dSGiuliano Pochini 
988dd7b254dSGiuliano Pochini 
989dd7b254dSGiuliano Pochini 
990dd7b254dSGiuliano Pochini /* This is low level part of the interrupt handler.
991dd7b254dSGiuliano Pochini It returns -1 if the IRQ is not ours, or N>=0 if it is, where N is the number
992dd7b254dSGiuliano Pochini of midi data in the input queue. */
993dd7b254dSGiuliano Pochini static int service_irq(struct echoaudio *chip)
994dd7b254dSGiuliano Pochini {
995dd7b254dSGiuliano Pochini 	int st;
996dd7b254dSGiuliano Pochini 
997dd7b254dSGiuliano Pochini 	/* Read the DSP status register and see if this DSP generated this interrupt */
998dd7b254dSGiuliano Pochini 	if (get_dsp_register(chip, CHI32_STATUS_REG) & CHI32_STATUS_IRQ) {
999dd7b254dSGiuliano Pochini 		st = 0;
1000dd7b254dSGiuliano Pochini #ifdef ECHOCARD_HAS_MIDI
1001dd7b254dSGiuliano Pochini 		/* Get and parse midi data if present */
1002dd7b254dSGiuliano Pochini 		if (chip->comm_page->midi_input[0])	/* The count is at index 0 */
1003dd7b254dSGiuliano Pochini 			st = midi_service_irq(chip);	/* Returns how many midi bytes we received */
1004dd7b254dSGiuliano Pochini #endif
1005dd7b254dSGiuliano Pochini 		/* Clear the hardware interrupt */
1006dd7b254dSGiuliano Pochini 		chip->comm_page->midi_input[0] = 0;
1007dd7b254dSGiuliano Pochini 		send_vector(chip, DSP_VC_ACK_INT);
1008dd7b254dSGiuliano Pochini 		return st;
1009dd7b254dSGiuliano Pochini 	}
1010dd7b254dSGiuliano Pochini 	return -1;
1011dd7b254dSGiuliano Pochini }
1012dd7b254dSGiuliano Pochini 
1013dd7b254dSGiuliano Pochini 
1014dd7b254dSGiuliano Pochini 
1015dd7b254dSGiuliano Pochini 
1016dd7b254dSGiuliano Pochini /******************************************************************************
1017dd7b254dSGiuliano Pochini 	Functions for opening and closing pipes
1018dd7b254dSGiuliano Pochini  ******************************************************************************/
1019dd7b254dSGiuliano Pochini 
1020dd7b254dSGiuliano Pochini /* allocate_pipes is used to reserve audio pipes for your exclusive use.
1021dd7b254dSGiuliano Pochini The call will fail if some pipes are already allocated. */
1022dd7b254dSGiuliano Pochini static int allocate_pipes(struct echoaudio *chip, struct audiopipe *pipe,
1023dd7b254dSGiuliano Pochini 			  int pipe_index, int interleave)
1024dd7b254dSGiuliano Pochini {
1025dd7b254dSGiuliano Pochini 	int i;
1026dd7b254dSGiuliano Pochini 	u32 channel_mask;
1027dd7b254dSGiuliano Pochini 	char is_cyclic;
1028dd7b254dSGiuliano Pochini 
1029dd7b254dSGiuliano Pochini 	DE_ACT(("allocate_pipes: ch=%d int=%d\n", pipe_index, interleave));
1030dd7b254dSGiuliano Pochini 
1031dd7b254dSGiuliano Pochini 	if (chip->bad_board)
1032dd7b254dSGiuliano Pochini 		return -EIO;
1033dd7b254dSGiuliano Pochini 
1034dd7b254dSGiuliano Pochini 	is_cyclic = 1;	/* This driver uses cyclic buffers only */
1035dd7b254dSGiuliano Pochini 
1036dd7b254dSGiuliano Pochini 	for (channel_mask = i = 0; i < interleave; i++)
1037dd7b254dSGiuliano Pochini 		channel_mask |= 1 << (pipe_index + i);
1038dd7b254dSGiuliano Pochini 	if (chip->pipe_alloc_mask & channel_mask) {
1039dd7b254dSGiuliano Pochini 		DE_ACT(("allocate_pipes: channel already open\n"));
1040dd7b254dSGiuliano Pochini 		return -EAGAIN;
1041dd7b254dSGiuliano Pochini 	}
1042dd7b254dSGiuliano Pochini 
1043dd7b254dSGiuliano Pochini 	chip->comm_page->position[pipe_index] = 0;
1044dd7b254dSGiuliano Pochini 	chip->pipe_alloc_mask |= channel_mask;
1045dd7b254dSGiuliano Pochini 	if (is_cyclic)
1046dd7b254dSGiuliano Pochini 		chip->pipe_cyclic_mask |= channel_mask;
1047dd7b254dSGiuliano Pochini 	pipe->index = pipe_index;
1048dd7b254dSGiuliano Pochini 	pipe->interleave = interleave;
1049dd7b254dSGiuliano Pochini 	pipe->state = PIPE_STATE_STOPPED;
1050dd7b254dSGiuliano Pochini 
1051dd7b254dSGiuliano Pochini 	/* The counter register is where the DSP writes the 32 bit DMA
1052dd7b254dSGiuliano Pochini 	position for a pipe.  The DSP is constantly updating this value as
1053dd7b254dSGiuliano Pochini 	it moves data. The DMA counter is in units of bytes, not samples. */
1054dd7b254dSGiuliano Pochini 	pipe->dma_counter = &chip->comm_page->position[pipe_index];
1055dd7b254dSGiuliano Pochini 	*pipe->dma_counter = 0;
1056dd7b254dSGiuliano Pochini 	DE_ACT(("allocate_pipes: ok\n"));
1057dd7b254dSGiuliano Pochini 	return pipe_index;
1058dd7b254dSGiuliano Pochini }
1059dd7b254dSGiuliano Pochini 
1060dd7b254dSGiuliano Pochini 
1061dd7b254dSGiuliano Pochini 
1062dd7b254dSGiuliano Pochini static int free_pipes(struct echoaudio *chip, struct audiopipe *pipe)
1063dd7b254dSGiuliano Pochini {
1064dd7b254dSGiuliano Pochini 	u32 channel_mask;
1065dd7b254dSGiuliano Pochini 	int i;
1066dd7b254dSGiuliano Pochini 
1067dd7b254dSGiuliano Pochini 	DE_ACT(("free_pipes: Pipe %d\n", pipe->index));
1068dd7b254dSGiuliano Pochini 	snd_assert(is_pipe_allocated(chip, pipe->index), return -EINVAL);
1069dd7b254dSGiuliano Pochini 	snd_assert(pipe->state == PIPE_STATE_STOPPED, return -EINVAL);
1070dd7b254dSGiuliano Pochini 
1071dd7b254dSGiuliano Pochini 	for (channel_mask = i = 0; i < pipe->interleave; i++)
1072dd7b254dSGiuliano Pochini 		channel_mask |= 1 << (pipe->index + i);
1073dd7b254dSGiuliano Pochini 
1074dd7b254dSGiuliano Pochini 	chip->pipe_alloc_mask &= ~channel_mask;
1075dd7b254dSGiuliano Pochini 	chip->pipe_cyclic_mask &= ~channel_mask;
1076dd7b254dSGiuliano Pochini 	return 0;
1077dd7b254dSGiuliano Pochini }
1078dd7b254dSGiuliano Pochini 
1079dd7b254dSGiuliano Pochini 
1080dd7b254dSGiuliano Pochini 
1081dd7b254dSGiuliano Pochini /******************************************************************************
1082dd7b254dSGiuliano Pochini 	Functions for managing the scatter-gather list
1083dd7b254dSGiuliano Pochini ******************************************************************************/
1084dd7b254dSGiuliano Pochini 
1085dd7b254dSGiuliano Pochini static int sglist_init(struct echoaudio *chip, struct audiopipe *pipe)
1086dd7b254dSGiuliano Pochini {
1087dd7b254dSGiuliano Pochini 	pipe->sglist_head = 0;
1088dd7b254dSGiuliano Pochini 	memset(pipe->sgpage.area, 0, PAGE_SIZE);
1089dd7b254dSGiuliano Pochini 	chip->comm_page->sglist_addr[pipe->index].addr =
1090dd7b254dSGiuliano Pochini 		cpu_to_le32(pipe->sgpage.addr);
1091dd7b254dSGiuliano Pochini 	return 0;
1092dd7b254dSGiuliano Pochini }
1093dd7b254dSGiuliano Pochini 
1094dd7b254dSGiuliano Pochini 
1095dd7b254dSGiuliano Pochini 
1096dd7b254dSGiuliano Pochini static int sglist_add_mapping(struct echoaudio *chip, struct audiopipe *pipe,
1097dd7b254dSGiuliano Pochini 				dma_addr_t address, size_t length)
1098dd7b254dSGiuliano Pochini {
1099dd7b254dSGiuliano Pochini 	int head = pipe->sglist_head;
1100dd7b254dSGiuliano Pochini 	struct sg_entry *list = (struct sg_entry *)pipe->sgpage.area;
1101dd7b254dSGiuliano Pochini 
1102dd7b254dSGiuliano Pochini 	if (head < MAX_SGLIST_ENTRIES - 1) {
1103dd7b254dSGiuliano Pochini 		list[head].addr = cpu_to_le32(address);
1104dd7b254dSGiuliano Pochini 		list[head].size = cpu_to_le32(length);
1105dd7b254dSGiuliano Pochini 		pipe->sglist_head++;
1106dd7b254dSGiuliano Pochini 	} else {
1107dd7b254dSGiuliano Pochini 		DE_ACT(("SGlist: too many fragments\n"));
1108dd7b254dSGiuliano Pochini 		return -ENOMEM;
1109dd7b254dSGiuliano Pochini 	}
1110dd7b254dSGiuliano Pochini 	return 0;
1111dd7b254dSGiuliano Pochini }
1112dd7b254dSGiuliano Pochini 
1113dd7b254dSGiuliano Pochini 
1114dd7b254dSGiuliano Pochini 
1115dd7b254dSGiuliano Pochini static inline int sglist_add_irq(struct echoaudio *chip, struct audiopipe *pipe)
1116dd7b254dSGiuliano Pochini {
1117dd7b254dSGiuliano Pochini 	return sglist_add_mapping(chip, pipe, 0, 0);
1118dd7b254dSGiuliano Pochini }
1119dd7b254dSGiuliano Pochini 
1120dd7b254dSGiuliano Pochini 
1121dd7b254dSGiuliano Pochini 
1122dd7b254dSGiuliano Pochini static inline int sglist_wrap(struct echoaudio *chip, struct audiopipe *pipe)
1123dd7b254dSGiuliano Pochini {
1124dd7b254dSGiuliano Pochini 	return sglist_add_mapping(chip, pipe, pipe->sgpage.addr, 0);
1125dd7b254dSGiuliano Pochini }
1126