xref: /openbmc/linux/sound/drivers/vx/vx_core.c (revision 96de0e252cedffad61b3cb5e05662c591898e69a)
1 /*
2  * Driver for Digigram VX soundcards
3  *
4  * Hardware core part
5  *
6  * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
7  *
8  *   This program is free software; you can redistribute it and/or modify
9  *   it under the terms of the GNU General Public License as published by
10  *   the Free Software Foundation; either version 2 of the License, or
11  *   (at your option) any later version.
12  *
13  *   This program is distributed in the hope that it will be useful,
14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *   GNU General Public License for more details.
17  *
18  *   You should have received a copy of the GNU General Public License
19  *   along with this program; if not, write to the Free Software
20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
21  */
22 
23 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/slab.h>
26 #include <linux/interrupt.h>
27 #include <linux/init.h>
28 #include <linux/device.h>
29 #include <linux/firmware.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/asoundef.h>
33 #include <sound/info.h>
34 #include <asm/io.h>
35 #include <sound/vx_core.h>
36 #include "vx_cmd.h"
37 
38 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
39 MODULE_DESCRIPTION("Common routines for Digigram VX drivers");
40 MODULE_LICENSE("GPL");
41 
42 
43 /*
44  * vx_check_reg_bit - wait for the specified bit is set/reset on a register
45  * @reg: register to check
46  * @mask: bit mask
47  * @bit: resultant bit to be checked
48  * @time: time-out of loop in msec
49  *
50  * returns zero if a bit matches, or a negative error code.
51  */
52 int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time)
53 {
54 	unsigned long end_time = jiffies + (time * HZ + 999) / 1000;
55 #ifdef CONFIG_SND_DEBUG
56 	static char *reg_names[VX_REG_MAX] = {
57 		"ICR", "CVR", "ISR", "IVR", "RXH", "RXM", "RXL",
58 		"DMA", "CDSP", "RFREQ", "RUER/V2", "DATA", "MEMIRQ",
59 		"ACQ", "BIT0", "BIT1", "MIC0", "MIC1", "MIC2",
60 		"MIC3", "INTCSR", "CNTRL", "GPIOC",
61 		"LOFREQ", "HIFREQ", "CSUER", "RUER"
62 	};
63 #endif
64 	do {
65 		if ((snd_vx_inb(chip, reg) & mask) == bit)
66 			return 0;
67 		//msleep(10);
68 	} while (time_after_eq(end_time, jiffies));
69 	snd_printd(KERN_DEBUG "vx_check_reg_bit: timeout, reg=%s, mask=0x%x, val=0x%x\n", reg_names[reg], mask, snd_vx_inb(chip, reg));
70 	return -EIO;
71 }
72 
73 EXPORT_SYMBOL(snd_vx_check_reg_bit);
74 
75 /*
76  * vx_send_irq_dsp - set command irq bit
77  * @num: the requested IRQ type, IRQ_XXX
78  *
79  * this triggers the specified IRQ request
80  * returns 0 if successful, or a negative error code.
81  *
82  */
83 static int vx_send_irq_dsp(struct vx_core *chip, int num)
84 {
85 	int nirq;
86 
87 	/* wait for Hc = 0 */
88 	if (snd_vx_check_reg_bit(chip, VX_CVR, CVR_HC, 0, 200) < 0)
89 		return -EIO;
90 
91 	nirq = num;
92 	if (vx_has_new_dsp(chip))
93 		nirq += VXP_IRQ_OFFSET;
94 	vx_outb(chip, CVR, (nirq >> 1) | CVR_HC);
95 	return 0;
96 }
97 
98 
99 /*
100  * vx_reset_chk - reset CHK bit on ISR
101  *
102  * returns 0 if successful, or a negative error code.
103  */
104 static int vx_reset_chk(struct vx_core *chip)
105 {
106 	/* Reset irq CHK */
107 	if (vx_send_irq_dsp(chip, IRQ_RESET_CHK) < 0)
108 		return -EIO;
109 	/* Wait until CHK = 0 */
110 	if (vx_check_isr(chip, ISR_CHK, 0, 200) < 0)
111 		return -EIO;
112 	return 0;
113 }
114 
115 /*
116  * vx_transfer_end - terminate message transfer
117  * @cmd: IRQ message to send (IRQ_MESS_XXX_END)
118  *
119  * returns 0 if successful, or a negative error code.
120  * the error code can be VX-specific, retrieved via vx_get_error().
121  * NB: call with spinlock held!
122  */
123 static int vx_transfer_end(struct vx_core *chip, int cmd)
124 {
125 	int err;
126 
127 	if ((err = vx_reset_chk(chip)) < 0)
128 		return err;
129 
130 	/* irq MESS_READ/WRITE_END */
131 	if ((err = vx_send_irq_dsp(chip, cmd)) < 0)
132 		return err;
133 
134 	/* Wait CHK = 1 */
135 	if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
136 		return err;
137 
138 	/* If error, Read RX */
139 	if ((err = vx_inb(chip, ISR)) & ISR_ERR) {
140 		if ((err = vx_wait_for_rx_full(chip)) < 0) {
141 			snd_printd(KERN_DEBUG "transfer_end: error in rx_full\n");
142 			return err;
143 		}
144 		err = vx_inb(chip, RXH) << 16;
145 		err |= vx_inb(chip, RXM) << 8;
146 		err |= vx_inb(chip, RXL);
147 		snd_printd(KERN_DEBUG "transfer_end: error = 0x%x\n", err);
148 		return -(VX_ERR_MASK | err);
149 	}
150 	return 0;
151 }
152 
153 /*
154  * vx_read_status - return the status rmh
155  * @rmh: rmh record to store the status
156  *
157  * returns 0 if successful, or a negative error code.
158  * the error code can be VX-specific, retrieved via vx_get_error().
159  * NB: call with spinlock held!
160  */
161 static int vx_read_status(struct vx_core *chip, struct vx_rmh *rmh)
162 {
163 	int i, err, val, size;
164 
165 	/* no read necessary? */
166 	if (rmh->DspStat == RMH_SSIZE_FIXED && rmh->LgStat == 0)
167 		return 0;
168 
169 	/* Wait for RX full (with timeout protection)
170 	 * The first word of status is in RX
171 	 */
172 	err = vx_wait_for_rx_full(chip);
173 	if (err < 0)
174 		return err;
175 
176 	/* Read RX */
177 	val = vx_inb(chip, RXH) << 16;
178 	val |= vx_inb(chip, RXM) << 8;
179 	val |= vx_inb(chip, RXL);
180 
181 	/* If status given by DSP, let's decode its size */
182 	switch (rmh->DspStat) {
183 	case RMH_SSIZE_ARG:
184 		size = val & 0xff;
185 		rmh->Stat[0] = val & 0xffff00;
186 		rmh->LgStat = size + 1;
187 		break;
188 	case RMH_SSIZE_MASK:
189 		/* Let's count the arg numbers from a mask */
190 		rmh->Stat[0] = val;
191 		size = 0;
192 		while (val) {
193 			if (val & 0x01)
194 				size++;
195 			val >>= 1;
196 		}
197 		rmh->LgStat = size + 1;
198 		break;
199 	default:
200 		/* else retrieve the status length given by the driver */
201 		size = rmh->LgStat;
202 		rmh->Stat[0] = val;  /* Val is the status 1st word */
203 		size--;              /* hence adjust remaining length */
204 		break;
205         }
206 
207 	if (size < 1)
208 		return 0;
209 	snd_assert(size <= SIZE_MAX_STATUS, return -EINVAL);
210 
211 	for (i = 1; i <= size; i++) {
212 		/* trigger an irq MESS_WRITE_NEXT */
213 		err = vx_send_irq_dsp(chip, IRQ_MESS_WRITE_NEXT);
214 		if (err < 0)
215 			return err;
216 		/* Wait for RX full (with timeout protection) */
217 		err = vx_wait_for_rx_full(chip);
218 		if (err < 0)
219 			return err;
220 		rmh->Stat[i] = vx_inb(chip, RXH) << 16;
221 		rmh->Stat[i] |= vx_inb(chip, RXM) <<  8;
222 		rmh->Stat[i] |= vx_inb(chip, RXL);
223 	}
224 
225 	return vx_transfer_end(chip, IRQ_MESS_WRITE_END);
226 }
227 
228 
229 #define MASK_MORE_THAN_1_WORD_COMMAND   0x00008000
230 #define MASK_1_WORD_COMMAND             0x00ff7fff
231 
232 /*
233  * vx_send_msg_nolock - send a DSP message and read back the status
234  * @rmh: the rmh record to send and receive
235  *
236  * returns 0 if successful, or a negative error code.
237  * the error code can be VX-specific, retrieved via vx_get_error().
238  *
239  * this function doesn't call spinlock at all.
240  */
241 int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh)
242 {
243 	int i, err;
244 
245 	if (chip->chip_status & VX_STAT_IS_STALE)
246 		return -EBUSY;
247 
248 	if ((err = vx_reset_chk(chip)) < 0) {
249 		snd_printd(KERN_DEBUG "vx_send_msg: vx_reset_chk error\n");
250 		return err;
251 	}
252 
253 #if 0
254 	printk(KERN_DEBUG "rmh: cmd = 0x%06x, length = %d, stype = %d\n",
255 	       rmh->Cmd[0], rmh->LgCmd, rmh->DspStat);
256 	if (rmh->LgCmd > 1) {
257 		printk(KERN_DEBUG "  ");
258 		for (i = 1; i < rmh->LgCmd; i++)
259 			printk("0x%06x ", rmh->Cmd[i]);
260 		printk("\n");
261 	}
262 #endif
263 	/* Check bit M is set according to length of the command */
264 	if (rmh->LgCmd > 1)
265 		rmh->Cmd[0] |= MASK_MORE_THAN_1_WORD_COMMAND;
266 	else
267 		rmh->Cmd[0] &= MASK_1_WORD_COMMAND;
268 
269 	/* Wait for TX empty */
270 	if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) {
271 		snd_printd(KERN_DEBUG "vx_send_msg: wait tx empty error\n");
272 		return err;
273 	}
274 
275 	/* Write Cmd[0] */
276 	vx_outb(chip, TXH, (rmh->Cmd[0] >> 16) & 0xff);
277 	vx_outb(chip, TXM, (rmh->Cmd[0] >> 8) & 0xff);
278 	vx_outb(chip, TXL, rmh->Cmd[0] & 0xff);
279 
280 	/* Trigger irq MESSAGE */
281 	if ((err = vx_send_irq_dsp(chip, IRQ_MESSAGE)) < 0) {
282 		snd_printd(KERN_DEBUG "vx_send_msg: send IRQ_MESSAGE error\n");
283 		return err;
284 	}
285 
286 	/* Wait for CHK = 1 */
287 	if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
288 		return err;
289 
290 	/* If error, get error value from RX */
291 	if (vx_inb(chip, ISR) & ISR_ERR) {
292 		if ((err = vx_wait_for_rx_full(chip)) < 0) {
293 			snd_printd(KERN_DEBUG "vx_send_msg: rx_full read error\n");
294 			return err;
295 		}
296 		err = vx_inb(chip, RXH) << 16;
297 		err |= vx_inb(chip, RXM) << 8;
298 		err |= vx_inb(chip, RXL);
299 		snd_printd(KERN_DEBUG "msg got error = 0x%x at cmd[0]\n", err);
300 		err = -(VX_ERR_MASK | err);
301 		return err;
302 	}
303 
304 	/* Send the other words */
305 	if (rmh->LgCmd > 1) {
306 		for (i = 1; i < rmh->LgCmd; i++) {
307 			/* Wait for TX ready */
308 			if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) {
309 				snd_printd(KERN_DEBUG "vx_send_msg: tx_ready error\n");
310 				return err;
311 			}
312 
313 			/* Write Cmd[i] */
314 			vx_outb(chip, TXH, (rmh->Cmd[i] >> 16) & 0xff);
315 			vx_outb(chip, TXM, (rmh->Cmd[i] >> 8) & 0xff);
316 			vx_outb(chip, TXL, rmh->Cmd[i] & 0xff);
317 
318 			/* Trigger irq MESS_READ_NEXT */
319 			if ((err = vx_send_irq_dsp(chip, IRQ_MESS_READ_NEXT)) < 0) {
320 				snd_printd(KERN_DEBUG "vx_send_msg: IRQ_READ_NEXT error\n");
321 				return err;
322 			}
323 		}
324 		/* Wait for TX empty */
325 		if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) {
326 			snd_printd(KERN_DEBUG "vx_send_msg: TX_READY error\n");
327 			return err;
328 		}
329 		/* End of transfer */
330 		err = vx_transfer_end(chip, IRQ_MESS_READ_END);
331 		if (err < 0)
332 			return err;
333 	}
334 
335 	return vx_read_status(chip, rmh);
336 }
337 
338 
339 /*
340  * vx_send_msg - send a DSP message with spinlock
341  * @rmh: the rmh record to send and receive
342  *
343  * returns 0 if successful, or a negative error code.
344  * see vx_send_msg_nolock().
345  */
346 int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh)
347 {
348 	unsigned long flags;
349 	int err;
350 
351 	spin_lock_irqsave(&chip->lock, flags);
352 	err = vx_send_msg_nolock(chip, rmh);
353 	spin_unlock_irqrestore(&chip->lock, flags);
354 	return err;
355 }
356 
357 
358 /*
359  * vx_send_rih_nolock - send an RIH to xilinx
360  * @cmd: the command to send
361  *
362  * returns 0 if successful, or a negative error code.
363  * the error code can be VX-specific, retrieved via vx_get_error().
364  *
365  * this function doesn't call spinlock at all.
366  *
367  * unlike RMH, no command is sent to DSP.
368  */
369 int vx_send_rih_nolock(struct vx_core *chip, int cmd)
370 {
371 	int err;
372 
373 	if (chip->chip_status & VX_STAT_IS_STALE)
374 		return -EBUSY;
375 
376 #if 0
377 	printk(KERN_DEBUG "send_rih: cmd = 0x%x\n", cmd);
378 #endif
379 	if ((err = vx_reset_chk(chip)) < 0)
380 		return err;
381 	/* send the IRQ */
382 	if ((err = vx_send_irq_dsp(chip, cmd)) < 0)
383 		return err;
384 	/* Wait CHK = 1 */
385 	if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
386 		return err;
387 	/* If error, read RX */
388 	if (vx_inb(chip, ISR) & ISR_ERR) {
389 		if ((err = vx_wait_for_rx_full(chip)) < 0)
390 			return err;
391 		err = vx_inb(chip, RXH) << 16;
392 		err |= vx_inb(chip, RXM) << 8;
393 		err |= vx_inb(chip, RXL);
394 		return -(VX_ERR_MASK | err);
395 	}
396 	return 0;
397 }
398 
399 
400 /*
401  * vx_send_rih - send an RIH with spinlock
402  * @cmd: the command to send
403  *
404  * see vx_send_rih_nolock().
405  */
406 int vx_send_rih(struct vx_core *chip, int cmd)
407 {
408 	unsigned long flags;
409 	int err;
410 
411 	spin_lock_irqsave(&chip->lock, flags);
412 	err = vx_send_rih_nolock(chip, cmd);
413 	spin_unlock_irqrestore(&chip->lock, flags);
414 	return err;
415 }
416 
417 #define END_OF_RESET_WAIT_TIME		500	/* us */
418 
419 /**
420  * snd_vx_boot_xilinx - boot up the xilinx interface
421  * @boot: the boot record to load
422  */
423 int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *boot)
424 {
425 	unsigned int i;
426 	int no_fillup = vx_has_new_dsp(chip);
427 
428 	/* check the length of boot image */
429 	snd_assert(boot->size > 0, return -EINVAL);
430 	snd_assert(boot->size % 3 == 0, return -EINVAL);
431 #if 0
432 	{
433 		/* more strict check */
434 		unsigned int c = ((u32)boot->data[0] << 16) | ((u32)boot->data[1] << 8) | boot->data[2];
435 		snd_assert(boot->size == (c + 2) * 3, return -EINVAL);
436 	}
437 #endif
438 
439 	/* reset dsp */
440 	vx_reset_dsp(chip);
441 
442 	udelay(END_OF_RESET_WAIT_TIME); /* another wait? */
443 
444 	/* download boot strap */
445 	for (i = 0; i < 0x600; i += 3) {
446 		if (i >= boot->size) {
447 			if (no_fillup)
448 				break;
449 			if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) {
450 				snd_printk(KERN_ERR "dsp boot failed at %d\n", i);
451 				return -EIO;
452 			}
453 			vx_outb(chip, TXH, 0);
454 			vx_outb(chip, TXM, 0);
455 			vx_outb(chip, TXL, 0);
456 		} else {
457 			unsigned char *image = boot->data + i;
458 			if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) {
459 				snd_printk(KERN_ERR "dsp boot failed at %d\n", i);
460 				return -EIO;
461 			}
462 			vx_outb(chip, TXH, image[0]);
463 			vx_outb(chip, TXM, image[1]);
464 			vx_outb(chip, TXL, image[2]);
465 		}
466 	}
467 	return 0;
468 }
469 
470 EXPORT_SYMBOL(snd_vx_load_boot_image);
471 
472 /*
473  * vx_test_irq_src - query the source of interrupts
474  *
475  * called from irq handler only
476  */
477 static int vx_test_irq_src(struct vx_core *chip, unsigned int *ret)
478 {
479 	int err;
480 
481 	vx_init_rmh(&chip->irq_rmh, CMD_TEST_IT);
482 	spin_lock(&chip->lock);
483 	err = vx_send_msg_nolock(chip, &chip->irq_rmh);
484 	if (err < 0)
485 		*ret = 0;
486 	else
487 		*ret = chip->irq_rmh.Stat[0];
488 	spin_unlock(&chip->lock);
489 	return err;
490 }
491 
492 
493 /*
494  * vx_interrupt - soft irq handler
495  */
496 static void vx_interrupt(unsigned long private_data)
497 {
498 	struct vx_core *chip = (struct vx_core *) private_data;
499 	unsigned int events;
500 
501 	if (chip->chip_status & VX_STAT_IS_STALE)
502 		return;
503 
504 	if (vx_test_irq_src(chip, &events) < 0)
505 		return;
506 
507 #if 0
508 	if (events & 0x000800)
509 		printk(KERN_ERR "DSP Stream underrun ! IRQ events = 0x%x\n", events);
510 #endif
511 	// printk(KERN_DEBUG "IRQ events = 0x%x\n", events);
512 
513 	/* We must prevent any application using this DSP
514 	 * and block any further request until the application
515 	 * either unregisters or reloads the DSP
516 	 */
517 	if (events & FATAL_DSP_ERROR) {
518 		snd_printk(KERN_ERR "vx_core: fatal DSP error!!\n");
519 		return;
520 	}
521 
522 	/* The start on time code conditions are filled (ie the time code
523 	 * received by the board is equal to one of those given to it).
524 	 */
525 	if (events & TIME_CODE_EVENT_PENDING)
526 		; /* so far, nothing to do yet */
527 
528 	/* The frequency has changed on the board (UER mode). */
529 	if (events & FREQUENCY_CHANGE_EVENT_PENDING)
530 		vx_change_frequency(chip);
531 
532 	/* update the pcm streams */
533 	vx_pcm_update_intr(chip, events);
534 }
535 
536 
537 /**
538  * snd_vx_irq_handler - interrupt handler
539  */
540 irqreturn_t snd_vx_irq_handler(int irq, void *dev)
541 {
542 	struct vx_core *chip = dev;
543 
544 	if (! (chip->chip_status & VX_STAT_CHIP_INIT) ||
545 	    (chip->chip_status & VX_STAT_IS_STALE))
546 		return IRQ_NONE;
547 	if (! vx_test_and_ack(chip))
548 		tasklet_hi_schedule(&chip->tq);
549 	return IRQ_HANDLED;
550 }
551 
552 EXPORT_SYMBOL(snd_vx_irq_handler);
553 
554 /*
555  */
556 static void vx_reset_board(struct vx_core *chip, int cold_reset)
557 {
558 	snd_assert(chip->ops->reset_board, return);
559 
560 	/* current source, later sync'ed with target */
561 	chip->audio_source = VX_AUDIO_SRC_LINE;
562 	if (cold_reset) {
563 		chip->audio_source_target = chip->audio_source;
564 		chip->clock_source = INTERNAL_QUARTZ;
565 		chip->clock_mode = VX_CLOCK_MODE_AUTO;
566 		chip->freq = 48000;
567 		chip->uer_detected = VX_UER_MODE_NOT_PRESENT;
568 		chip->uer_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
569 	}
570 
571 	chip->ops->reset_board(chip, cold_reset);
572 
573 	vx_reset_codec(chip, cold_reset);
574 
575 	vx_set_internal_clock(chip, chip->freq);
576 
577 	/* Reset the DSP */
578 	vx_reset_dsp(chip);
579 
580 	if (vx_is_pcmcia(chip)) {
581 		/* Acknowledge any pending IRQ and reset the MEMIRQ flag. */
582 		vx_test_and_ack(chip);
583 		vx_validate_irq(chip, 1);
584 	}
585 
586 	/* init CBits */
587 	vx_set_iec958_status(chip, chip->uer_bits);
588 }
589 
590 
591 /*
592  * proc interface
593  */
594 
595 static void vx_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
596 {
597 	struct vx_core *chip = entry->private_data;
598 	static char *audio_src_vxp[] = { "Line", "Mic", "Digital" };
599 	static char *audio_src_vx2[] = { "Analog", "Analog", "Digital" };
600 	static char *clock_mode[] = { "Auto", "Internal", "External" };
601 	static char *clock_src[] = { "Internal", "External" };
602 	static char *uer_type[] = { "Consumer", "Professional", "Not Present" };
603 
604 	snd_iprintf(buffer, "%s\n", chip->card->longname);
605 	snd_iprintf(buffer, "Xilinx Firmware: %s\n",
606 		    chip->chip_status & VX_STAT_XILINX_LOADED ? "Loaded" : "No");
607 	snd_iprintf(buffer, "Device Initialized: %s\n",
608 		    chip->chip_status & VX_STAT_DEVICE_INIT ? "Yes" : "No");
609 	snd_iprintf(buffer, "DSP audio info:");
610 	if (chip->audio_info & VX_AUDIO_INFO_REAL_TIME)
611 		snd_iprintf(buffer, " realtime");
612 	if (chip->audio_info & VX_AUDIO_INFO_OFFLINE)
613 		snd_iprintf(buffer, " offline");
614 	if (chip->audio_info & VX_AUDIO_INFO_MPEG1)
615 		snd_iprintf(buffer, " mpeg1");
616 	if (chip->audio_info & VX_AUDIO_INFO_MPEG2)
617 		snd_iprintf(buffer, " mpeg2");
618 	if (chip->audio_info & VX_AUDIO_INFO_LINEAR_8)
619 		snd_iprintf(buffer, " linear8");
620 	if (chip->audio_info & VX_AUDIO_INFO_LINEAR_16)
621 		snd_iprintf(buffer, " linear16");
622 	if (chip->audio_info & VX_AUDIO_INFO_LINEAR_24)
623 		snd_iprintf(buffer, " linear24");
624 	snd_iprintf(buffer, "\n");
625 	snd_iprintf(buffer, "Input Source: %s\n", vx_is_pcmcia(chip) ?
626 		    audio_src_vxp[chip->audio_source] :
627 		    audio_src_vx2[chip->audio_source]);
628 	snd_iprintf(buffer, "Clock Mode: %s\n", clock_mode[chip->clock_mode]);
629 	snd_iprintf(buffer, "Clock Source: %s\n", clock_src[chip->clock_source]);
630 	snd_iprintf(buffer, "Frequency: %d\n", chip->freq);
631 	snd_iprintf(buffer, "Detected Frequency: %d\n", chip->freq_detected);
632 	snd_iprintf(buffer, "Detected UER type: %s\n", uer_type[chip->uer_detected]);
633 	snd_iprintf(buffer, "Min/Max/Cur IBL: %d/%d/%d (granularity=%d)\n",
634 		    chip->ibl.min_size, chip->ibl.max_size, chip->ibl.size,
635 		    chip->ibl.granularity);
636 }
637 
638 static void vx_proc_init(struct vx_core *chip)
639 {
640 	struct snd_info_entry *entry;
641 
642 	if (! snd_card_proc_new(chip->card, "vx-status", &entry))
643 		snd_info_set_text_ops(entry, chip, vx_proc_read);
644 }
645 
646 
647 /**
648  * snd_vx_dsp_boot - load the DSP boot
649  */
650 int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *boot)
651 {
652 	int err;
653 	int cold_reset = !(chip->chip_status & VX_STAT_DEVICE_INIT);
654 
655 	vx_reset_board(chip, cold_reset);
656 	vx_validate_irq(chip, 0);
657 
658 	if ((err = snd_vx_load_boot_image(chip, boot)) < 0)
659 		return err;
660 	msleep(10);
661 
662 	return 0;
663 }
664 
665 EXPORT_SYMBOL(snd_vx_dsp_boot);
666 
667 /**
668  * snd_vx_dsp_load - load the DSP image
669  */
670 int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp)
671 {
672 	unsigned int i;
673 	int err;
674 	unsigned int csum = 0;
675 	unsigned char *image, *cptr;
676 
677 	snd_assert(dsp->size % 3 == 0, return -EINVAL);
678 
679 	vx_toggle_dac_mute(chip, 1);
680 
681 	/* Transfert data buffer from PC to DSP */
682 	for (i = 0; i < dsp->size; i += 3) {
683 		image = dsp->data + i;
684 		/* Wait DSP ready for a new read */
685 		if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) {
686 			printk("dsp loading error at position %d\n", i);
687 			return err;
688 		}
689 		cptr = image;
690 		csum ^= *cptr;
691 		csum = (csum >> 24) | (csum << 8);
692 		vx_outb(chip, TXH, *cptr++);
693 		csum ^= *cptr;
694 		csum = (csum >> 24) | (csum << 8);
695 		vx_outb(chip, TXM, *cptr++);
696 		csum ^= *cptr;
697 		csum = (csum >> 24) | (csum << 8);
698 		vx_outb(chip, TXL, *cptr++);
699 	}
700 	snd_printdd(KERN_DEBUG "checksum = 0x%08x\n", csum);
701 
702 	msleep(200);
703 
704 	if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
705 		return err;
706 
707 	vx_toggle_dac_mute(chip, 0);
708 
709 	vx_test_and_ack(chip);
710 	vx_validate_irq(chip, 1);
711 
712 	return 0;
713 }
714 
715 EXPORT_SYMBOL(snd_vx_dsp_load);
716 
717 #ifdef CONFIG_PM
718 /*
719  * suspend
720  */
721 int snd_vx_suspend(struct vx_core *chip, pm_message_t state)
722 {
723 	unsigned int i;
724 
725 	snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot);
726 	chip->chip_status |= VX_STAT_IN_SUSPEND;
727 	for (i = 0; i < chip->hw->num_codecs; i++)
728 		snd_pcm_suspend_all(chip->pcm[i]);
729 
730 	return 0;
731 }
732 
733 EXPORT_SYMBOL(snd_vx_suspend);
734 
735 /*
736  * resume
737  */
738 int snd_vx_resume(struct vx_core *chip)
739 {
740 	int i, err;
741 
742 	chip->chip_status &= ~VX_STAT_CHIP_INIT;
743 
744 	for (i = 0; i < 4; i++) {
745 		if (! chip->firmware[i])
746 			continue;
747 		err = chip->ops->load_dsp(chip, i, chip->firmware[i]);
748 		if (err < 0) {
749 			snd_printk(KERN_ERR "vx: firmware resume error at DSP %d\n", i);
750 			return -EIO;
751 		}
752 	}
753 
754 	chip->chip_status |= VX_STAT_CHIP_INIT;
755 	chip->chip_status &= ~VX_STAT_IN_SUSPEND;
756 
757 	snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0);
758 	return 0;
759 }
760 
761 EXPORT_SYMBOL(snd_vx_resume);
762 #endif
763 
764 /**
765  * snd_vx_create - constructor for struct vx_core
766  * @hw: hardware specific record
767  *
768  * this function allocates the instance and prepare for the hardware
769  * initialization.
770  *
771  * return the instance pointer if successful, NULL in error.
772  */
773 struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw,
774 			      struct snd_vx_ops *ops,
775 			      int extra_size)
776 {
777 	struct vx_core *chip;
778 
779 	snd_assert(card && hw && ops, return NULL);
780 
781 	chip = kzalloc(sizeof(*chip) + extra_size, GFP_KERNEL);
782 	if (! chip) {
783 		snd_printk(KERN_ERR "vx_core: no memory\n");
784 		return NULL;
785 	}
786 	spin_lock_init(&chip->lock);
787 	spin_lock_init(&chip->irq_lock);
788 	chip->irq = -1;
789 	chip->hw = hw;
790 	chip->type = hw->type;
791 	chip->ops = ops;
792 	tasklet_init(&chip->tq, vx_interrupt, (unsigned long)chip);
793 	mutex_init(&chip->mixer_mutex);
794 
795 	chip->card = card;
796 	card->private_data = chip;
797 	strcpy(card->driver, hw->name);
798 	sprintf(card->shortname, "Digigram %s", hw->name);
799 
800 	vx_proc_init(chip);
801 
802 	return chip;
803 }
804 
805 EXPORT_SYMBOL(snd_vx_create);
806 
807 /*
808  * module entries
809  */
810 static int __init alsa_vx_core_init(void)
811 {
812 	return 0;
813 }
814 
815 static void __exit alsa_vx_core_exit(void)
816 {
817 }
818 
819 module_init(alsa_vx_core_init)
820 module_exit(alsa_vx_core_exit)
821