1*1da177e4SLinus Torvalds /* 2*1da177e4SLinus Torvalds * Copyright (c) by Jaroslav Kysela <perex@suse.cz>, 3*1da177e4SLinus Torvalds * Hannu Savolainen 1993-1996, 4*1da177e4SLinus Torvalds * Rob Hooft 5*1da177e4SLinus Torvalds * 6*1da177e4SLinus Torvalds * Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips) 7*1da177e4SLinus Torvalds * 8*1da177e4SLinus Torvalds * Most if code is ported from OSS/Lite. 9*1da177e4SLinus Torvalds * 10*1da177e4SLinus Torvalds * This program is free software; you can redistribute it and/or modify 11*1da177e4SLinus Torvalds * it under the terms of the GNU General Public License as published by 12*1da177e4SLinus Torvalds * the Free Software Foundation; either version 2 of the License, or 13*1da177e4SLinus Torvalds * (at your option) any later version. 14*1da177e4SLinus Torvalds * 15*1da177e4SLinus Torvalds * This program is distributed in the hope that it will be useful, 16*1da177e4SLinus Torvalds * but WITHOUT ANY WARRANTY; without even the implied warranty of 17*1da177e4SLinus Torvalds * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18*1da177e4SLinus Torvalds * GNU General Public License for more details. 19*1da177e4SLinus Torvalds * 20*1da177e4SLinus Torvalds * You should have received a copy of the GNU General Public License 21*1da177e4SLinus Torvalds * along with this program; if not, write to the Free Software 22*1da177e4SLinus Torvalds * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23*1da177e4SLinus Torvalds * 24*1da177e4SLinus Torvalds */ 25*1da177e4SLinus Torvalds 26*1da177e4SLinus Torvalds #include <sound/opl3.h> 27*1da177e4SLinus Torvalds #include <asm/io.h> 28*1da177e4SLinus Torvalds #include <linux/delay.h> 29*1da177e4SLinus Torvalds #include <linux/init.h> 30*1da177e4SLinus Torvalds #include <linux/slab.h> 31*1da177e4SLinus Torvalds #include <linux/ioport.h> 32*1da177e4SLinus Torvalds #include <sound/minors.h> 33*1da177e4SLinus Torvalds 34*1da177e4SLinus Torvalds MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Hannu Savolainen 1993-1996, Rob Hooft"); 35*1da177e4SLinus Torvalds MODULE_DESCRIPTION("Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)"); 36*1da177e4SLinus Torvalds MODULE_LICENSE("GPL"); 37*1da177e4SLinus Torvalds 38*1da177e4SLinus Torvalds extern char snd_opl3_regmap[MAX_OPL2_VOICES][4]; 39*1da177e4SLinus Torvalds 40*1da177e4SLinus Torvalds static void snd_opl2_command(opl3_t * opl3, unsigned short cmd, unsigned char val) 41*1da177e4SLinus Torvalds { 42*1da177e4SLinus Torvalds unsigned long flags; 43*1da177e4SLinus Torvalds unsigned long port; 44*1da177e4SLinus Torvalds 45*1da177e4SLinus Torvalds /* 46*1da177e4SLinus Torvalds * The original 2-OP synth requires a quite long delay 47*1da177e4SLinus Torvalds * after writing to a register. 48*1da177e4SLinus Torvalds */ 49*1da177e4SLinus Torvalds 50*1da177e4SLinus Torvalds port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port; 51*1da177e4SLinus Torvalds 52*1da177e4SLinus Torvalds spin_lock_irqsave(&opl3->reg_lock, flags); 53*1da177e4SLinus Torvalds 54*1da177e4SLinus Torvalds outb((unsigned char) cmd, port); 55*1da177e4SLinus Torvalds udelay(10); 56*1da177e4SLinus Torvalds 57*1da177e4SLinus Torvalds outb((unsigned char) val, port + 1); 58*1da177e4SLinus Torvalds udelay(30); 59*1da177e4SLinus Torvalds 60*1da177e4SLinus Torvalds spin_unlock_irqrestore(&opl3->reg_lock, flags); 61*1da177e4SLinus Torvalds } 62*1da177e4SLinus Torvalds 63*1da177e4SLinus Torvalds static void snd_opl3_command(opl3_t * opl3, unsigned short cmd, unsigned char val) 64*1da177e4SLinus Torvalds { 65*1da177e4SLinus Torvalds unsigned long flags; 66*1da177e4SLinus Torvalds unsigned long port; 67*1da177e4SLinus Torvalds 68*1da177e4SLinus Torvalds /* 69*1da177e4SLinus Torvalds * The OPL-3 survives with just two INBs 70*1da177e4SLinus Torvalds * after writing to a register. 71*1da177e4SLinus Torvalds */ 72*1da177e4SLinus Torvalds 73*1da177e4SLinus Torvalds port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port; 74*1da177e4SLinus Torvalds 75*1da177e4SLinus Torvalds spin_lock_irqsave(&opl3->reg_lock, flags); 76*1da177e4SLinus Torvalds 77*1da177e4SLinus Torvalds outb((unsigned char) cmd, port); 78*1da177e4SLinus Torvalds inb(opl3->l_port); 79*1da177e4SLinus Torvalds inb(opl3->l_port); 80*1da177e4SLinus Torvalds 81*1da177e4SLinus Torvalds outb((unsigned char) val, port + 1); 82*1da177e4SLinus Torvalds inb(opl3->l_port); 83*1da177e4SLinus Torvalds inb(opl3->l_port); 84*1da177e4SLinus Torvalds 85*1da177e4SLinus Torvalds spin_unlock_irqrestore(&opl3->reg_lock, flags); 86*1da177e4SLinus Torvalds } 87*1da177e4SLinus Torvalds 88*1da177e4SLinus Torvalds static int snd_opl3_detect(opl3_t * opl3) 89*1da177e4SLinus Torvalds { 90*1da177e4SLinus Torvalds /* 91*1da177e4SLinus Torvalds * This function returns 1 if the FM chip is present at the given I/O port 92*1da177e4SLinus Torvalds * The detection algorithm plays with the timer built in the FM chip and 93*1da177e4SLinus Torvalds * looks for a change in the status register. 94*1da177e4SLinus Torvalds * 95*1da177e4SLinus Torvalds * Note! The timers of the FM chip are not connected to AdLib (and compatible) 96*1da177e4SLinus Torvalds * boards. 97*1da177e4SLinus Torvalds * 98*1da177e4SLinus Torvalds * Note2! The chip is initialized if detected. 99*1da177e4SLinus Torvalds */ 100*1da177e4SLinus Torvalds 101*1da177e4SLinus Torvalds unsigned char stat1, stat2, signature; 102*1da177e4SLinus Torvalds 103*1da177e4SLinus Torvalds /* Reset timers 1 and 2 */ 104*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK); 105*1da177e4SLinus Torvalds /* Reset the IRQ of the FM chip */ 106*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET); 107*1da177e4SLinus Torvalds signature = stat1 = inb(opl3->l_port); /* Status register */ 108*1da177e4SLinus Torvalds if ((stat1 & 0xe0) != 0x00) { /* Should be 0x00 */ 109*1da177e4SLinus Torvalds snd_printd("OPL3: stat1 = 0x%x\n", stat1); 110*1da177e4SLinus Torvalds return -ENODEV; 111*1da177e4SLinus Torvalds } 112*1da177e4SLinus Torvalds /* Set timer1 to 0xff */ 113*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 0xff); 114*1da177e4SLinus Torvalds /* Unmask and start timer 1 */ 115*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER2_MASK | OPL3_TIMER1_START); 116*1da177e4SLinus Torvalds /* Now we have to delay at least 80us */ 117*1da177e4SLinus Torvalds udelay(200); 118*1da177e4SLinus Torvalds /* Read status after timers have expired */ 119*1da177e4SLinus Torvalds stat2 = inb(opl3->l_port); 120*1da177e4SLinus Torvalds /* Stop the timers */ 121*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK); 122*1da177e4SLinus Torvalds /* Reset the IRQ of the FM chip */ 123*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET); 124*1da177e4SLinus Torvalds if ((stat2 & 0xe0) != 0xc0) { /* There is no YM3812 */ 125*1da177e4SLinus Torvalds snd_printd("OPL3: stat2 = 0x%x\n", stat2); 126*1da177e4SLinus Torvalds return -ENODEV; 127*1da177e4SLinus Torvalds } 128*1da177e4SLinus Torvalds 129*1da177e4SLinus Torvalds /* If the toplevel code knows exactly the type of chip, don't try 130*1da177e4SLinus Torvalds to detect it. */ 131*1da177e4SLinus Torvalds if (opl3->hardware != OPL3_HW_AUTO) 132*1da177e4SLinus Torvalds return 0; 133*1da177e4SLinus Torvalds 134*1da177e4SLinus Torvalds /* There is a FM chip on this address. Detect the type (OPL2 to OPL4) */ 135*1da177e4SLinus Torvalds if (signature == 0x06) { /* OPL2 */ 136*1da177e4SLinus Torvalds opl3->hardware = OPL3_HW_OPL2; 137*1da177e4SLinus Torvalds } else { 138*1da177e4SLinus Torvalds /* 139*1da177e4SLinus Torvalds * If we had an OPL4 chip, opl3->hardware would have been set 140*1da177e4SLinus Torvalds * by the OPL4 driver; so we can assume OPL3 here. 141*1da177e4SLinus Torvalds */ 142*1da177e4SLinus Torvalds snd_assert(opl3->r_port != 0, return -ENODEV); 143*1da177e4SLinus Torvalds opl3->hardware = OPL3_HW_OPL3; 144*1da177e4SLinus Torvalds } 145*1da177e4SLinus Torvalds return 0; 146*1da177e4SLinus Torvalds } 147*1da177e4SLinus Torvalds 148*1da177e4SLinus Torvalds /* 149*1da177e4SLinus Torvalds * AdLib timers 150*1da177e4SLinus Torvalds */ 151*1da177e4SLinus Torvalds 152*1da177e4SLinus Torvalds /* 153*1da177e4SLinus Torvalds * Timer 1 - 80us 154*1da177e4SLinus Torvalds */ 155*1da177e4SLinus Torvalds 156*1da177e4SLinus Torvalds static int snd_opl3_timer1_start(snd_timer_t * timer) 157*1da177e4SLinus Torvalds { 158*1da177e4SLinus Torvalds unsigned long flags; 159*1da177e4SLinus Torvalds unsigned char tmp; 160*1da177e4SLinus Torvalds unsigned int ticks; 161*1da177e4SLinus Torvalds opl3_t *opl3; 162*1da177e4SLinus Torvalds 163*1da177e4SLinus Torvalds opl3 = snd_timer_chip(timer); 164*1da177e4SLinus Torvalds spin_lock_irqsave(&opl3->timer_lock, flags); 165*1da177e4SLinus Torvalds ticks = timer->sticks; 166*1da177e4SLinus Torvalds tmp = (opl3->timer_enable | OPL3_TIMER1_START) & ~OPL3_TIMER1_MASK; 167*1da177e4SLinus Torvalds opl3->timer_enable = tmp; 168*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks); /* timer 1 count */ 169*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */ 170*1da177e4SLinus Torvalds spin_unlock_irqrestore(&opl3->timer_lock, flags); 171*1da177e4SLinus Torvalds return 0; 172*1da177e4SLinus Torvalds } 173*1da177e4SLinus Torvalds 174*1da177e4SLinus Torvalds static int snd_opl3_timer1_stop(snd_timer_t * timer) 175*1da177e4SLinus Torvalds { 176*1da177e4SLinus Torvalds unsigned long flags; 177*1da177e4SLinus Torvalds unsigned char tmp; 178*1da177e4SLinus Torvalds opl3_t *opl3; 179*1da177e4SLinus Torvalds 180*1da177e4SLinus Torvalds opl3 = snd_timer_chip(timer); 181*1da177e4SLinus Torvalds spin_lock_irqsave(&opl3->timer_lock, flags); 182*1da177e4SLinus Torvalds tmp = (opl3->timer_enable | OPL3_TIMER1_MASK) & ~OPL3_TIMER1_START; 183*1da177e4SLinus Torvalds opl3->timer_enable = tmp; 184*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */ 185*1da177e4SLinus Torvalds spin_unlock_irqrestore(&opl3->timer_lock, flags); 186*1da177e4SLinus Torvalds return 0; 187*1da177e4SLinus Torvalds } 188*1da177e4SLinus Torvalds 189*1da177e4SLinus Torvalds /* 190*1da177e4SLinus Torvalds * Timer 2 - 320us 191*1da177e4SLinus Torvalds */ 192*1da177e4SLinus Torvalds 193*1da177e4SLinus Torvalds static int snd_opl3_timer2_start(snd_timer_t * timer) 194*1da177e4SLinus Torvalds { 195*1da177e4SLinus Torvalds unsigned long flags; 196*1da177e4SLinus Torvalds unsigned char tmp; 197*1da177e4SLinus Torvalds unsigned int ticks; 198*1da177e4SLinus Torvalds opl3_t *opl3; 199*1da177e4SLinus Torvalds 200*1da177e4SLinus Torvalds opl3 = snd_timer_chip(timer); 201*1da177e4SLinus Torvalds spin_lock_irqsave(&opl3->timer_lock, flags); 202*1da177e4SLinus Torvalds ticks = timer->sticks; 203*1da177e4SLinus Torvalds tmp = (opl3->timer_enable | OPL3_TIMER2_START) & ~OPL3_TIMER2_MASK; 204*1da177e4SLinus Torvalds opl3->timer_enable = tmp; 205*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks); /* timer 1 count */ 206*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */ 207*1da177e4SLinus Torvalds spin_unlock_irqrestore(&opl3->timer_lock, flags); 208*1da177e4SLinus Torvalds return 0; 209*1da177e4SLinus Torvalds } 210*1da177e4SLinus Torvalds 211*1da177e4SLinus Torvalds static int snd_opl3_timer2_stop(snd_timer_t * timer) 212*1da177e4SLinus Torvalds { 213*1da177e4SLinus Torvalds unsigned long flags; 214*1da177e4SLinus Torvalds unsigned char tmp; 215*1da177e4SLinus Torvalds opl3_t *opl3; 216*1da177e4SLinus Torvalds 217*1da177e4SLinus Torvalds opl3 = snd_timer_chip(timer); 218*1da177e4SLinus Torvalds spin_lock_irqsave(&opl3->timer_lock, flags); 219*1da177e4SLinus Torvalds tmp = (opl3->timer_enable | OPL3_TIMER2_MASK) & ~OPL3_TIMER2_START; 220*1da177e4SLinus Torvalds opl3->timer_enable = tmp; 221*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */ 222*1da177e4SLinus Torvalds spin_unlock_irqrestore(&opl3->timer_lock, flags); 223*1da177e4SLinus Torvalds return 0; 224*1da177e4SLinus Torvalds } 225*1da177e4SLinus Torvalds 226*1da177e4SLinus Torvalds /* 227*1da177e4SLinus Torvalds 228*1da177e4SLinus Torvalds */ 229*1da177e4SLinus Torvalds 230*1da177e4SLinus Torvalds static struct _snd_timer_hardware snd_opl3_timer1 = 231*1da177e4SLinus Torvalds { 232*1da177e4SLinus Torvalds .flags = SNDRV_TIMER_HW_STOP, 233*1da177e4SLinus Torvalds .resolution = 80000, 234*1da177e4SLinus Torvalds .ticks = 256, 235*1da177e4SLinus Torvalds .start = snd_opl3_timer1_start, 236*1da177e4SLinus Torvalds .stop = snd_opl3_timer1_stop, 237*1da177e4SLinus Torvalds }; 238*1da177e4SLinus Torvalds 239*1da177e4SLinus Torvalds static struct _snd_timer_hardware snd_opl3_timer2 = 240*1da177e4SLinus Torvalds { 241*1da177e4SLinus Torvalds .flags = SNDRV_TIMER_HW_STOP, 242*1da177e4SLinus Torvalds .resolution = 320000, 243*1da177e4SLinus Torvalds .ticks = 256, 244*1da177e4SLinus Torvalds .start = snd_opl3_timer2_start, 245*1da177e4SLinus Torvalds .stop = snd_opl3_timer2_stop, 246*1da177e4SLinus Torvalds }; 247*1da177e4SLinus Torvalds 248*1da177e4SLinus Torvalds static int snd_opl3_timer1_init(opl3_t * opl3, int timer_no) 249*1da177e4SLinus Torvalds { 250*1da177e4SLinus Torvalds snd_timer_t *timer = NULL; 251*1da177e4SLinus Torvalds snd_timer_id_t tid; 252*1da177e4SLinus Torvalds int err; 253*1da177e4SLinus Torvalds 254*1da177e4SLinus Torvalds tid.dev_class = SNDRV_TIMER_CLASS_CARD; 255*1da177e4SLinus Torvalds tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 256*1da177e4SLinus Torvalds tid.card = opl3->card->number; 257*1da177e4SLinus Torvalds tid.device = timer_no; 258*1da177e4SLinus Torvalds tid.subdevice = 0; 259*1da177e4SLinus Torvalds if ((err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer)) >= 0) { 260*1da177e4SLinus Torvalds strcpy(timer->name, "AdLib timer #1"); 261*1da177e4SLinus Torvalds timer->private_data = opl3; 262*1da177e4SLinus Torvalds timer->hw = snd_opl3_timer1; 263*1da177e4SLinus Torvalds } 264*1da177e4SLinus Torvalds opl3->timer1 = timer; 265*1da177e4SLinus Torvalds return err; 266*1da177e4SLinus Torvalds } 267*1da177e4SLinus Torvalds 268*1da177e4SLinus Torvalds static int snd_opl3_timer2_init(opl3_t * opl3, int timer_no) 269*1da177e4SLinus Torvalds { 270*1da177e4SLinus Torvalds snd_timer_t *timer = NULL; 271*1da177e4SLinus Torvalds snd_timer_id_t tid; 272*1da177e4SLinus Torvalds int err; 273*1da177e4SLinus Torvalds 274*1da177e4SLinus Torvalds tid.dev_class = SNDRV_TIMER_CLASS_CARD; 275*1da177e4SLinus Torvalds tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 276*1da177e4SLinus Torvalds tid.card = opl3->card->number; 277*1da177e4SLinus Torvalds tid.device = timer_no; 278*1da177e4SLinus Torvalds tid.subdevice = 0; 279*1da177e4SLinus Torvalds if ((err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer)) >= 0) { 280*1da177e4SLinus Torvalds strcpy(timer->name, "AdLib timer #2"); 281*1da177e4SLinus Torvalds timer->private_data = opl3; 282*1da177e4SLinus Torvalds timer->hw = snd_opl3_timer2; 283*1da177e4SLinus Torvalds } 284*1da177e4SLinus Torvalds opl3->timer2 = timer; 285*1da177e4SLinus Torvalds return err; 286*1da177e4SLinus Torvalds } 287*1da177e4SLinus Torvalds 288*1da177e4SLinus Torvalds /* 289*1da177e4SLinus Torvalds 290*1da177e4SLinus Torvalds */ 291*1da177e4SLinus Torvalds 292*1da177e4SLinus Torvalds void snd_opl3_interrupt(snd_hwdep_t * hw) 293*1da177e4SLinus Torvalds { 294*1da177e4SLinus Torvalds unsigned char status; 295*1da177e4SLinus Torvalds opl3_t *opl3; 296*1da177e4SLinus Torvalds snd_timer_t *timer; 297*1da177e4SLinus Torvalds 298*1da177e4SLinus Torvalds if (hw == NULL) 299*1da177e4SLinus Torvalds return; 300*1da177e4SLinus Torvalds 301*1da177e4SLinus Torvalds opl3 = hw->private_data; 302*1da177e4SLinus Torvalds status = inb(opl3->l_port); 303*1da177e4SLinus Torvalds #if 0 304*1da177e4SLinus Torvalds snd_printk("AdLib IRQ status = 0x%x\n", status); 305*1da177e4SLinus Torvalds #endif 306*1da177e4SLinus Torvalds if (!(status & 0x80)) 307*1da177e4SLinus Torvalds return; 308*1da177e4SLinus Torvalds 309*1da177e4SLinus Torvalds if (status & 0x40) { 310*1da177e4SLinus Torvalds timer = opl3->timer1; 311*1da177e4SLinus Torvalds snd_timer_interrupt(timer, timer->sticks); 312*1da177e4SLinus Torvalds } 313*1da177e4SLinus Torvalds if (status & 0x20) { 314*1da177e4SLinus Torvalds timer = opl3->timer2; 315*1da177e4SLinus Torvalds snd_timer_interrupt(timer, timer->sticks); 316*1da177e4SLinus Torvalds } 317*1da177e4SLinus Torvalds } 318*1da177e4SLinus Torvalds 319*1da177e4SLinus Torvalds /* 320*1da177e4SLinus Torvalds 321*1da177e4SLinus Torvalds */ 322*1da177e4SLinus Torvalds 323*1da177e4SLinus Torvalds static int snd_opl3_free(opl3_t *opl3) 324*1da177e4SLinus Torvalds { 325*1da177e4SLinus Torvalds snd_assert(opl3 != NULL, return -ENXIO); 326*1da177e4SLinus Torvalds if (opl3->private_free) 327*1da177e4SLinus Torvalds opl3->private_free(opl3); 328*1da177e4SLinus Torvalds if (opl3->res_l_port) { 329*1da177e4SLinus Torvalds release_resource(opl3->res_l_port); 330*1da177e4SLinus Torvalds kfree_nocheck(opl3->res_l_port); 331*1da177e4SLinus Torvalds } 332*1da177e4SLinus Torvalds if (opl3->res_r_port) { 333*1da177e4SLinus Torvalds release_resource(opl3->res_r_port); 334*1da177e4SLinus Torvalds kfree_nocheck(opl3->res_r_port); 335*1da177e4SLinus Torvalds } 336*1da177e4SLinus Torvalds kfree(opl3); 337*1da177e4SLinus Torvalds return 0; 338*1da177e4SLinus Torvalds } 339*1da177e4SLinus Torvalds 340*1da177e4SLinus Torvalds static int snd_opl3_dev_free(snd_device_t *device) 341*1da177e4SLinus Torvalds { 342*1da177e4SLinus Torvalds opl3_t *opl3 = device->device_data; 343*1da177e4SLinus Torvalds return snd_opl3_free(opl3); 344*1da177e4SLinus Torvalds } 345*1da177e4SLinus Torvalds 346*1da177e4SLinus Torvalds int snd_opl3_new(snd_card_t *card, 347*1da177e4SLinus Torvalds unsigned short hardware, 348*1da177e4SLinus Torvalds opl3_t **ropl3) 349*1da177e4SLinus Torvalds { 350*1da177e4SLinus Torvalds static snd_device_ops_t ops = { 351*1da177e4SLinus Torvalds .dev_free = snd_opl3_dev_free, 352*1da177e4SLinus Torvalds }; 353*1da177e4SLinus Torvalds opl3_t *opl3; 354*1da177e4SLinus Torvalds int err; 355*1da177e4SLinus Torvalds 356*1da177e4SLinus Torvalds *ropl3 = NULL; 357*1da177e4SLinus Torvalds opl3 = kcalloc(1, sizeof(*opl3), GFP_KERNEL); 358*1da177e4SLinus Torvalds if (opl3 == NULL) 359*1da177e4SLinus Torvalds return -ENOMEM; 360*1da177e4SLinus Torvalds 361*1da177e4SLinus Torvalds opl3->card = card; 362*1da177e4SLinus Torvalds opl3->hardware = hardware; 363*1da177e4SLinus Torvalds spin_lock_init(&opl3->reg_lock); 364*1da177e4SLinus Torvalds spin_lock_init(&opl3->timer_lock); 365*1da177e4SLinus Torvalds init_MUTEX(&opl3->access_mutex); 366*1da177e4SLinus Torvalds 367*1da177e4SLinus Torvalds if ((err = snd_device_new(card, SNDRV_DEV_CODEC, opl3, &ops)) < 0) { 368*1da177e4SLinus Torvalds snd_opl3_free(opl3); 369*1da177e4SLinus Torvalds return err; 370*1da177e4SLinus Torvalds } 371*1da177e4SLinus Torvalds 372*1da177e4SLinus Torvalds *ropl3 = opl3; 373*1da177e4SLinus Torvalds return 0; 374*1da177e4SLinus Torvalds } 375*1da177e4SLinus Torvalds 376*1da177e4SLinus Torvalds int snd_opl3_init(opl3_t *opl3) 377*1da177e4SLinus Torvalds { 378*1da177e4SLinus Torvalds if (! opl3->command) { 379*1da177e4SLinus Torvalds printk(KERN_ERR "snd_opl3_init: command not defined!\n"); 380*1da177e4SLinus Torvalds return -EINVAL; 381*1da177e4SLinus Torvalds } 382*1da177e4SLinus Torvalds 383*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_TEST, OPL3_ENABLE_WAVE_SELECT); 384*1da177e4SLinus Torvalds /* Melodic mode */ 385*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_LEFT | OPL3_REG_PERCUSSION, 0x00); 386*1da177e4SLinus Torvalds 387*1da177e4SLinus Torvalds switch (opl3->hardware & OPL3_HW_MASK) { 388*1da177e4SLinus Torvalds case OPL3_HW_OPL2: 389*1da177e4SLinus Torvalds opl3->max_voices = MAX_OPL2_VOICES; 390*1da177e4SLinus Torvalds break; 391*1da177e4SLinus Torvalds case OPL3_HW_OPL3: 392*1da177e4SLinus Torvalds case OPL3_HW_OPL4: 393*1da177e4SLinus Torvalds opl3->max_voices = MAX_OPL3_VOICES; 394*1da177e4SLinus Torvalds /* Enter OPL3 mode */ 395*1da177e4SLinus Torvalds opl3->command(opl3, OPL3_RIGHT | OPL3_REG_MODE, OPL3_OPL3_ENABLE); 396*1da177e4SLinus Torvalds } 397*1da177e4SLinus Torvalds return 0; 398*1da177e4SLinus Torvalds } 399*1da177e4SLinus Torvalds 400*1da177e4SLinus Torvalds int snd_opl3_create(snd_card_t * card, 401*1da177e4SLinus Torvalds unsigned long l_port, 402*1da177e4SLinus Torvalds unsigned long r_port, 403*1da177e4SLinus Torvalds unsigned short hardware, 404*1da177e4SLinus Torvalds int integrated, 405*1da177e4SLinus Torvalds opl3_t ** ropl3) 406*1da177e4SLinus Torvalds { 407*1da177e4SLinus Torvalds opl3_t *opl3; 408*1da177e4SLinus Torvalds int err; 409*1da177e4SLinus Torvalds 410*1da177e4SLinus Torvalds *ropl3 = NULL; 411*1da177e4SLinus Torvalds if ((err = snd_opl3_new(card, hardware, &opl3)) < 0) 412*1da177e4SLinus Torvalds return err; 413*1da177e4SLinus Torvalds if (! integrated) { 414*1da177e4SLinus Torvalds if ((opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)")) == NULL) { 415*1da177e4SLinus Torvalds snd_printk(KERN_ERR "opl3: can't grab left port 0x%lx\n", l_port); 416*1da177e4SLinus Torvalds snd_opl3_free(opl3); 417*1da177e4SLinus Torvalds return -EBUSY; 418*1da177e4SLinus Torvalds } 419*1da177e4SLinus Torvalds if (r_port != 0 && 420*1da177e4SLinus Torvalds (opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)")) == NULL) { 421*1da177e4SLinus Torvalds snd_printk(KERN_ERR "opl3: can't grab right port 0x%lx\n", r_port); 422*1da177e4SLinus Torvalds snd_opl3_free(opl3); 423*1da177e4SLinus Torvalds return -EBUSY; 424*1da177e4SLinus Torvalds } 425*1da177e4SLinus Torvalds } 426*1da177e4SLinus Torvalds opl3->l_port = l_port; 427*1da177e4SLinus Torvalds opl3->r_port = r_port; 428*1da177e4SLinus Torvalds 429*1da177e4SLinus Torvalds switch (opl3->hardware) { 430*1da177e4SLinus Torvalds /* some hardware doesn't support timers */ 431*1da177e4SLinus Torvalds case OPL3_HW_OPL3_SV: 432*1da177e4SLinus Torvalds case OPL3_HW_OPL3_CS: 433*1da177e4SLinus Torvalds case OPL3_HW_OPL3_FM801: 434*1da177e4SLinus Torvalds opl3->command = &snd_opl3_command; 435*1da177e4SLinus Torvalds break; 436*1da177e4SLinus Torvalds default: 437*1da177e4SLinus Torvalds opl3->command = &snd_opl2_command; 438*1da177e4SLinus Torvalds if ((err = snd_opl3_detect(opl3)) < 0) { 439*1da177e4SLinus Torvalds snd_printd("OPL2/3 chip not detected at 0x%lx/0x%lx\n", 440*1da177e4SLinus Torvalds opl3->l_port, opl3->r_port); 441*1da177e4SLinus Torvalds snd_opl3_free(opl3); 442*1da177e4SLinus Torvalds return err; 443*1da177e4SLinus Torvalds } 444*1da177e4SLinus Torvalds /* detect routine returns correct hardware type */ 445*1da177e4SLinus Torvalds switch (opl3->hardware & OPL3_HW_MASK) { 446*1da177e4SLinus Torvalds case OPL3_HW_OPL3: 447*1da177e4SLinus Torvalds case OPL3_HW_OPL4: 448*1da177e4SLinus Torvalds opl3->command = &snd_opl3_command; 449*1da177e4SLinus Torvalds } 450*1da177e4SLinus Torvalds } 451*1da177e4SLinus Torvalds 452*1da177e4SLinus Torvalds snd_opl3_init(opl3); 453*1da177e4SLinus Torvalds 454*1da177e4SLinus Torvalds *ropl3 = opl3; 455*1da177e4SLinus Torvalds return 0; 456*1da177e4SLinus Torvalds } 457*1da177e4SLinus Torvalds 458*1da177e4SLinus Torvalds int snd_opl3_timer_new(opl3_t * opl3, int timer1_dev, int timer2_dev) 459*1da177e4SLinus Torvalds { 460*1da177e4SLinus Torvalds int err; 461*1da177e4SLinus Torvalds 462*1da177e4SLinus Torvalds if (timer1_dev >= 0) 463*1da177e4SLinus Torvalds if ((err = snd_opl3_timer1_init(opl3, timer1_dev)) < 0) 464*1da177e4SLinus Torvalds return err; 465*1da177e4SLinus Torvalds if (timer2_dev >= 0) { 466*1da177e4SLinus Torvalds if ((err = snd_opl3_timer2_init(opl3, timer2_dev)) < 0) { 467*1da177e4SLinus Torvalds snd_device_free(opl3->card, opl3->timer1); 468*1da177e4SLinus Torvalds opl3->timer1 = NULL; 469*1da177e4SLinus Torvalds return err; 470*1da177e4SLinus Torvalds } 471*1da177e4SLinus Torvalds } 472*1da177e4SLinus Torvalds return 0; 473*1da177e4SLinus Torvalds } 474*1da177e4SLinus Torvalds 475*1da177e4SLinus Torvalds int snd_opl3_hwdep_new(opl3_t * opl3, 476*1da177e4SLinus Torvalds int device, int seq_device, 477*1da177e4SLinus Torvalds snd_hwdep_t ** rhwdep) 478*1da177e4SLinus Torvalds { 479*1da177e4SLinus Torvalds snd_hwdep_t *hw; 480*1da177e4SLinus Torvalds snd_card_t *card = opl3->card; 481*1da177e4SLinus Torvalds int err; 482*1da177e4SLinus Torvalds 483*1da177e4SLinus Torvalds if (rhwdep) 484*1da177e4SLinus Torvalds *rhwdep = NULL; 485*1da177e4SLinus Torvalds 486*1da177e4SLinus Torvalds /* create hardware dependent device (direct FM) */ 487*1da177e4SLinus Torvalds 488*1da177e4SLinus Torvalds if ((err = snd_hwdep_new(card, "OPL2/OPL3", device, &hw)) < 0) { 489*1da177e4SLinus Torvalds snd_device_free(card, opl3); 490*1da177e4SLinus Torvalds return err; 491*1da177e4SLinus Torvalds } 492*1da177e4SLinus Torvalds hw->private_data = opl3; 493*1da177e4SLinus Torvalds #ifdef CONFIG_SND_OSSEMUL 494*1da177e4SLinus Torvalds if (device == 0) { 495*1da177e4SLinus Torvalds hw->oss_type = SNDRV_OSS_DEVICE_TYPE_DMFM; 496*1da177e4SLinus Torvalds sprintf(hw->oss_dev, "dmfm%i", card->number); 497*1da177e4SLinus Torvalds } 498*1da177e4SLinus Torvalds #endif 499*1da177e4SLinus Torvalds strcpy(hw->name, hw->id); 500*1da177e4SLinus Torvalds switch (opl3->hardware & OPL3_HW_MASK) { 501*1da177e4SLinus Torvalds case OPL3_HW_OPL2: 502*1da177e4SLinus Torvalds strcpy(hw->name, "OPL2 FM"); 503*1da177e4SLinus Torvalds hw->iface = SNDRV_HWDEP_IFACE_OPL2; 504*1da177e4SLinus Torvalds break; 505*1da177e4SLinus Torvalds case OPL3_HW_OPL3: 506*1da177e4SLinus Torvalds strcpy(hw->name, "OPL3 FM"); 507*1da177e4SLinus Torvalds hw->iface = SNDRV_HWDEP_IFACE_OPL3; 508*1da177e4SLinus Torvalds break; 509*1da177e4SLinus Torvalds case OPL3_HW_OPL4: 510*1da177e4SLinus Torvalds strcpy(hw->name, "OPL4 FM"); 511*1da177e4SLinus Torvalds hw->iface = SNDRV_HWDEP_IFACE_OPL4; 512*1da177e4SLinus Torvalds break; 513*1da177e4SLinus Torvalds } 514*1da177e4SLinus Torvalds 515*1da177e4SLinus Torvalds /* operators - only ioctl */ 516*1da177e4SLinus Torvalds hw->ops.open = snd_opl3_open; 517*1da177e4SLinus Torvalds hw->ops.ioctl = snd_opl3_ioctl; 518*1da177e4SLinus Torvalds hw->ops.release = snd_opl3_release; 519*1da177e4SLinus Torvalds 520*1da177e4SLinus Torvalds opl3->seq_dev_num = seq_device; 521*1da177e4SLinus Torvalds #if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE)) 522*1da177e4SLinus Torvalds if (snd_seq_device_new(card, seq_device, SNDRV_SEQ_DEV_ID_OPL3, 523*1da177e4SLinus Torvalds sizeof(opl3_t*), &opl3->seq_dev) >= 0) { 524*1da177e4SLinus Torvalds strcpy(opl3->seq_dev->name, hw->name); 525*1da177e4SLinus Torvalds *(opl3_t**)SNDRV_SEQ_DEVICE_ARGPTR(opl3->seq_dev) = opl3; 526*1da177e4SLinus Torvalds } 527*1da177e4SLinus Torvalds #endif 528*1da177e4SLinus Torvalds if (rhwdep) 529*1da177e4SLinus Torvalds *rhwdep = hw; 530*1da177e4SLinus Torvalds return 0; 531*1da177e4SLinus Torvalds } 532*1da177e4SLinus Torvalds 533*1da177e4SLinus Torvalds EXPORT_SYMBOL(snd_opl3_interrupt); 534*1da177e4SLinus Torvalds EXPORT_SYMBOL(snd_opl3_new); 535*1da177e4SLinus Torvalds EXPORT_SYMBOL(snd_opl3_init); 536*1da177e4SLinus Torvalds EXPORT_SYMBOL(snd_opl3_create); 537*1da177e4SLinus Torvalds EXPORT_SYMBOL(snd_opl3_timer_new); 538*1da177e4SLinus Torvalds EXPORT_SYMBOL(snd_opl3_hwdep_new); 539*1da177e4SLinus Torvalds 540*1da177e4SLinus Torvalds /* opl3_synth.c */ 541*1da177e4SLinus Torvalds EXPORT_SYMBOL(snd_opl3_regmap); 542*1da177e4SLinus Torvalds EXPORT_SYMBOL(snd_opl3_reset); 543*1da177e4SLinus Torvalds 544*1da177e4SLinus Torvalds /* 545*1da177e4SLinus Torvalds * INIT part 546*1da177e4SLinus Torvalds */ 547*1da177e4SLinus Torvalds 548*1da177e4SLinus Torvalds static int __init alsa_opl3_init(void) 549*1da177e4SLinus Torvalds { 550*1da177e4SLinus Torvalds return 0; 551*1da177e4SLinus Torvalds } 552*1da177e4SLinus Torvalds 553*1da177e4SLinus Torvalds static void __exit alsa_opl3_exit(void) 554*1da177e4SLinus Torvalds { 555*1da177e4SLinus Torvalds } 556*1da177e4SLinus Torvalds 557*1da177e4SLinus Torvalds module_init(alsa_opl3_init) 558*1da177e4SLinus Torvalds module_exit(alsa_opl3_exit) 559