1*1a59d1b8SThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 2d5b9ee7bSTanmay Inamdar/* 3d5b9ee7bSTanmay Inamdar * Device Tree for Klondike (APM8018X) board. 4d5b9ee7bSTanmay Inamdar * 5d5b9ee7bSTanmay Inamdar * Copyright (c) 2010, Applied Micro Circuits Corporation 6d5b9ee7bSTanmay Inamdar * Author: Tanmay Inamdar <tinamdar@apm.com> 7d5b9ee7bSTanmay Inamdar */ 8d5b9ee7bSTanmay Inamdar 9d5b9ee7bSTanmay Inamdar/dts-v1/; 10d5b9ee7bSTanmay Inamdar 11d5b9ee7bSTanmay Inamdar/ { 12d5b9ee7bSTanmay Inamdar #address-cells = <1>; 13d5b9ee7bSTanmay Inamdar #size-cells = <1>; 14d5b9ee7bSTanmay Inamdar model = "apm,klondike"; 15d5b9ee7bSTanmay Inamdar compatible = "apm,klondike"; 16d5b9ee7bSTanmay Inamdar dcr-parent = <&{/cpus/cpu@0}>; 17d5b9ee7bSTanmay Inamdar 18d5b9ee7bSTanmay Inamdar aliases { 19d5b9ee7bSTanmay Inamdar ethernet0 = &EMAC0; 20d5b9ee7bSTanmay Inamdar ethernet1 = &EMAC1; 21d5b9ee7bSTanmay Inamdar }; 22d5b9ee7bSTanmay Inamdar 23d5b9ee7bSTanmay Inamdar cpus { 24d5b9ee7bSTanmay Inamdar #address-cells = <1>; 25d5b9ee7bSTanmay Inamdar #size-cells = <0>; 26d5b9ee7bSTanmay Inamdar 27d5b9ee7bSTanmay Inamdar cpu@0 { 28d5b9ee7bSTanmay Inamdar device_type = "cpu"; 29d5b9ee7bSTanmay Inamdar model = "PowerPC,apm8018x"; 30d5b9ee7bSTanmay Inamdar reg = <0x00000000>; 31d5b9ee7bSTanmay Inamdar clock-frequency = <300000000>; /* Filled in by U-Boot */ 32d5b9ee7bSTanmay Inamdar timebase-frequency = <300000000>; /* Filled in by U-Boot */ 33d5b9ee7bSTanmay Inamdar i-cache-line-size = <32>; 34d5b9ee7bSTanmay Inamdar d-cache-line-size = <32>; 35d5b9ee7bSTanmay Inamdar i-cache-size = <16384>; /* 16 kB */ 36d5b9ee7bSTanmay Inamdar d-cache-size = <16384>; /* 16 kB */ 37d5b9ee7bSTanmay Inamdar dcr-controller; 38d5b9ee7bSTanmay Inamdar dcr-access-method = "native"; 39d5b9ee7bSTanmay Inamdar }; 40d5b9ee7bSTanmay Inamdar }; 41d5b9ee7bSTanmay Inamdar 42d5b9ee7bSTanmay Inamdar memory { 43d5b9ee7bSTanmay Inamdar device_type = "memory"; 44d5b9ee7bSTanmay Inamdar reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */ 45d5b9ee7bSTanmay Inamdar }; 46d5b9ee7bSTanmay Inamdar 47d5b9ee7bSTanmay Inamdar UIC0: interrupt-controller { 48d5b9ee7bSTanmay Inamdar compatible = "ibm,uic"; 49d5b9ee7bSTanmay Inamdar interrupt-controller; 50d5b9ee7bSTanmay Inamdar cell-index = <0>; 51d5b9ee7bSTanmay Inamdar dcr-reg = <0x0c0 0x010>; 52d5b9ee7bSTanmay Inamdar #address-cells = <0>; 53d5b9ee7bSTanmay Inamdar #size-cells = <0>; 54d5b9ee7bSTanmay Inamdar #interrupt-cells = <2>; 55d5b9ee7bSTanmay Inamdar }; 56d5b9ee7bSTanmay Inamdar 57d5b9ee7bSTanmay Inamdar UIC1: interrupt-controller1 { 58d5b9ee7bSTanmay Inamdar compatible = "ibm,uic"; 59d5b9ee7bSTanmay Inamdar interrupt-controller; 60d5b9ee7bSTanmay Inamdar cell-index = <1>; 61d5b9ee7bSTanmay Inamdar dcr-reg = <0x0d0 0x010>; 62d5b9ee7bSTanmay Inamdar #address-cells = <0>; 63d5b9ee7bSTanmay Inamdar #size-cells = <0>; 64d5b9ee7bSTanmay Inamdar #interrupt-cells = <2>; 65d5b9ee7bSTanmay Inamdar interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 66d5b9ee7bSTanmay Inamdar interrupt-parent = <&UIC0>; 67d5b9ee7bSTanmay Inamdar }; 68d5b9ee7bSTanmay Inamdar 69d5b9ee7bSTanmay Inamdar UIC2: interrupt-controller2 { 70d5b9ee7bSTanmay Inamdar compatible = "ibm,uic"; 71d5b9ee7bSTanmay Inamdar interrupt-controller; 72d5b9ee7bSTanmay Inamdar cell-index = <2>; 73d5b9ee7bSTanmay Inamdar dcr-reg = <0x0e0 0x010>; 74d5b9ee7bSTanmay Inamdar #address-cells = <0>; 75d5b9ee7bSTanmay Inamdar #size-cells = <0>; 76d5b9ee7bSTanmay Inamdar #interrupt-cells = <2>; 77d5b9ee7bSTanmay Inamdar interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */ 78d5b9ee7bSTanmay Inamdar interrupt-parent = <&UIC0>; 79d5b9ee7bSTanmay Inamdar }; 80d5b9ee7bSTanmay Inamdar 81d5b9ee7bSTanmay Inamdar UIC3: interrupt-controller3 { 82d5b9ee7bSTanmay Inamdar compatible = "ibm,uic"; 83d5b9ee7bSTanmay Inamdar interrupt-controller; 84d5b9ee7bSTanmay Inamdar cell-index = <3>; 85d5b9ee7bSTanmay Inamdar dcr-reg = <0x0f0 0x010>; 86d5b9ee7bSTanmay Inamdar #address-cells = <0>; 87d5b9ee7bSTanmay Inamdar #size-cells = <0>; 88d5b9ee7bSTanmay Inamdar #interrupt-cells = <2>; 89d5b9ee7bSTanmay Inamdar interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ 90d5b9ee7bSTanmay Inamdar interrupt-parent = <&UIC0>; 91d5b9ee7bSTanmay Inamdar }; 92d5b9ee7bSTanmay Inamdar 93d5b9ee7bSTanmay Inamdar plb { 94d5b9ee7bSTanmay Inamdar compatible = "ibm,plb4"; 95d5b9ee7bSTanmay Inamdar #address-cells = <1>; 96d5b9ee7bSTanmay Inamdar #size-cells = <1>; 97d5b9ee7bSTanmay Inamdar ranges; 98d5b9ee7bSTanmay Inamdar clock-frequency = <0>; /* Filled in by U-Boot */ 99d5b9ee7bSTanmay Inamdar 100d5b9ee7bSTanmay Inamdar SDRAM0: memory-controller { 101d5b9ee7bSTanmay Inamdar compatible = "ibm,sdram-apm8018x"; 102d5b9ee7bSTanmay Inamdar dcr-reg = <0x010 0x002>; 103d5b9ee7bSTanmay Inamdar }; 104d5b9ee7bSTanmay Inamdar 105d5b9ee7bSTanmay Inamdar MAL0: mcmal { 106d5b9ee7bSTanmay Inamdar compatible = "ibm,mcmal2"; 107d5b9ee7bSTanmay Inamdar dcr-reg = <0x180 0x062>; 108d5b9ee7bSTanmay Inamdar num-tx-chans = <2>; 109d5b9ee7bSTanmay Inamdar num-rx-chans = <16>; 110d5b9ee7bSTanmay Inamdar #address-cells = <0>; 111d5b9ee7bSTanmay Inamdar #size-cells = <0>; 112d5b9ee7bSTanmay Inamdar interrupt-parent = <&UIC1>; 113d5b9ee7bSTanmay Inamdar interrupts = </*TXEOB*/ 0x6 0x4 114d5b9ee7bSTanmay Inamdar /*RXEOB*/ 0x7 0x4 115d5b9ee7bSTanmay Inamdar /*SERR*/ 0x1 0x4 116d5b9ee7bSTanmay Inamdar /*TXDE*/ 0x2 0x4 117d5b9ee7bSTanmay Inamdar /*RXDE*/ 0x3 0x4>; 118d5b9ee7bSTanmay Inamdar }; 119d5b9ee7bSTanmay Inamdar 120d5b9ee7bSTanmay Inamdar POB0: opb { 121d5b9ee7bSTanmay Inamdar compatible = "ibm,opb"; 122d5b9ee7bSTanmay Inamdar #address-cells = <1>; 123d5b9ee7bSTanmay Inamdar #size-cells = <1>; 124d5b9ee7bSTanmay Inamdar ranges = <0x20000000 0x20000000 0x30000000 125d5b9ee7bSTanmay Inamdar 0x50000000 0x50000000 0x10000000 126d5b9ee7bSTanmay Inamdar 0x60000000 0x60000000 0x10000000 127d5b9ee7bSTanmay Inamdar 0xFE000000 0xFE000000 0x00010000>; 128d5b9ee7bSTanmay Inamdar dcr-reg = <0x100 0x020>; 129d5b9ee7bSTanmay Inamdar clock-frequency = <300000000>; /* Filled in by U-Boot */ 130d5b9ee7bSTanmay Inamdar 131d5b9ee7bSTanmay Inamdar RGMII0: emac-rgmii@400a2000 { 132d5b9ee7bSTanmay Inamdar compatible = "ibm,rgmii"; 133d5b9ee7bSTanmay Inamdar reg = <0x400a2000 0x00000010>; 134d5b9ee7bSTanmay Inamdar has-mdio; 135d5b9ee7bSTanmay Inamdar }; 136d5b9ee7bSTanmay Inamdar 137d5b9ee7bSTanmay Inamdar TAH0: emac-tah@400a3000 { 138d5b9ee7bSTanmay Inamdar compatible = "ibm,tah"; 139d5b9ee7bSTanmay Inamdar reg = <0x400a3000 0x100>; 140d5b9ee7bSTanmay Inamdar }; 141d5b9ee7bSTanmay Inamdar 142d5b9ee7bSTanmay Inamdar TAH1: emac-tah@400a4000 { 143d5b9ee7bSTanmay Inamdar compatible = "ibm,tah"; 144d5b9ee7bSTanmay Inamdar reg = <0x400a4000 0x100>; 145d5b9ee7bSTanmay Inamdar }; 146d5b9ee7bSTanmay Inamdar 147d5b9ee7bSTanmay Inamdar EMAC0: ethernet@400a0000 { 148d5b9ee7bSTanmay Inamdar compatible = "ibm,emac4", "ibm-emac4sync"; 149d5b9ee7bSTanmay Inamdar interrupt-parent = <&EMAC0>; 150d5b9ee7bSTanmay Inamdar interrupts = <0x0>; 151d5b9ee7bSTanmay Inamdar #interrupt-cells = <1>; 152d5b9ee7bSTanmay Inamdar #address-cells = <0>; 153d5b9ee7bSTanmay Inamdar #size-cells = <0>; 154d5b9ee7bSTanmay Inamdar interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>; 155d5b9ee7bSTanmay Inamdar reg = <0x400a0000 0x00000100>; 156d5b9ee7bSTanmay Inamdar local-mac-address = [000000000000]; /* Filled in by U-Boot */ 157d5b9ee7bSTanmay Inamdar mal-device = <&MAL0>; 158d5b9ee7bSTanmay Inamdar mal-tx-channel = <0x0>; 159d5b9ee7bSTanmay Inamdar mal-rx-channel = <0x0>; 160d5b9ee7bSTanmay Inamdar cell-index = <0>; 161d5b9ee7bSTanmay Inamdar max-frame-size = <9000>; 162d5b9ee7bSTanmay Inamdar rx-fifo-size = <4096>; 163d5b9ee7bSTanmay Inamdar tx-fifo-size = <2048>; 164d5b9ee7bSTanmay Inamdar phy-mode = "rgmii"; 165d5b9ee7bSTanmay Inamdar phy-address = <0x2>; 166d5b9ee7bSTanmay Inamdar turbo = "no"; 167d5b9ee7bSTanmay Inamdar phy-map = <0x00000000>; 168d5b9ee7bSTanmay Inamdar rgmii-device = <&RGMII0>; 169d5b9ee7bSTanmay Inamdar rgmii-channel = <0>; 170d5b9ee7bSTanmay Inamdar tah-device = <&TAH0>; 171d5b9ee7bSTanmay Inamdar tah-channel = <0>; 172d5b9ee7bSTanmay Inamdar has-inverted-stacr-oc; 173d5b9ee7bSTanmay Inamdar has-new-stacr-staopc; 174d5b9ee7bSTanmay Inamdar }; 175d5b9ee7bSTanmay Inamdar 176d5b9ee7bSTanmay Inamdar EMAC1: ethernet@400a1000 { 177d5b9ee7bSTanmay Inamdar compatible = "ibm,emac4", "ibm-emac4sync"; 178d5b9ee7bSTanmay Inamdar status = "disabled"; 179d5b9ee7bSTanmay Inamdar interrupt-parent = <&EMAC1>; 180d5b9ee7bSTanmay Inamdar interrupts = <0x0>; 181d5b9ee7bSTanmay Inamdar #interrupt-cells = <1>; 182d5b9ee7bSTanmay Inamdar #address-cells = <0>; 183d5b9ee7bSTanmay Inamdar #size-cells = <0>; 184d5b9ee7bSTanmay Inamdar interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>; 185d5b9ee7bSTanmay Inamdar reg = <0x400a1000 0x00000100>; 186d5b9ee7bSTanmay Inamdar local-mac-address = [000000000000]; /* Filled in by U-Boot */ 187d5b9ee7bSTanmay Inamdar mal-device = <&MAL0>; 188d5b9ee7bSTanmay Inamdar mal-tx-channel = <1>; 189d5b9ee7bSTanmay Inamdar mal-rx-channel = <8>; 190d5b9ee7bSTanmay Inamdar cell-index = <1>; 191d5b9ee7bSTanmay Inamdar max-frame-size = <9000>; 192d5b9ee7bSTanmay Inamdar rx-fifo-size = <4096>; 193d5b9ee7bSTanmay Inamdar tx-fifo-size = <2048>; 194d5b9ee7bSTanmay Inamdar phy-mode = "rgmii"; 195d5b9ee7bSTanmay Inamdar phy-address = <0x3>; 196d5b9ee7bSTanmay Inamdar turbo = "no"; 197d5b9ee7bSTanmay Inamdar phy-map = <0x00000000>; 198d5b9ee7bSTanmay Inamdar rgmii-device = <&RGMII0>; 199d5b9ee7bSTanmay Inamdar rgmii-channel = <1>; 200d5b9ee7bSTanmay Inamdar tah-device = <&TAH1>; 201d5b9ee7bSTanmay Inamdar tah-channel = <0>; 202d5b9ee7bSTanmay Inamdar has-inverted-stacr-oc; 203d5b9ee7bSTanmay Inamdar has-new-stacr-staopc; 204d5b9ee7bSTanmay Inamdar mdio-device = <&EMAC0>; 205d5b9ee7bSTanmay Inamdar }; 206d5b9ee7bSTanmay Inamdar }; 207d5b9ee7bSTanmay Inamdar }; 208d5b9ee7bSTanmay Inamdar 209d5b9ee7bSTanmay Inamdar chosen { 21078e5dfeaSRob Herring stdout-path = "/plb/opb/serial@50001000"; 211d5b9ee7bSTanmay Inamdar }; 212d5b9ee7bSTanmay Inamdar}; 213