1*667b504aSStefan Roese/* 2*667b504aSStefan Roese * a3m071 board Device Tree Source 3*667b504aSStefan Roese * 4*667b504aSStefan Roese * Copyright 2012 Stefan Roese <sr@denx.de> 5*667b504aSStefan Roese * 6*667b504aSStefan Roese * Copyright (C) 2011 DENX Software Engineering GmbH 7*667b504aSStefan Roese * Heiko Schocher <hs@denx.de> 8*667b504aSStefan Roese * 9*667b504aSStefan Roese * Copyright (C) 2007 Semihalf 10*667b504aSStefan Roese * Marian Balakowicz <m8@semihalf.com> 11*667b504aSStefan Roese * 12*667b504aSStefan Roese * This program is free software; you can redistribute it and/or modify it 13*667b504aSStefan Roese * under the terms of the GNU General Public License as published by the 14*667b504aSStefan Roese * Free Software Foundation; either version 2 of the License, or (at your 15*667b504aSStefan Roese * option) any later version. 16*667b504aSStefan Roese */ 17*667b504aSStefan Roese 18*667b504aSStefan Roese/include/ "mpc5200b.dtsi" 19*667b504aSStefan Roese 20*667b504aSStefan Roese/ { 21*667b504aSStefan Roese model = "anonymous,a3m071"; 22*667b504aSStefan Roese compatible = "anonymous,a3m071"; 23*667b504aSStefan Roese 24*667b504aSStefan Roese soc5200@f0000000 { 25*667b504aSStefan Roese #address-cells = <1>; 26*667b504aSStefan Roese #size-cells = <1>; 27*667b504aSStefan Roese compatible = "fsl,mpc5200b-immr"; 28*667b504aSStefan Roese ranges = <0 0xf0000000 0x0000c000>; 29*667b504aSStefan Roese reg = <0xf0000000 0x00000100>; 30*667b504aSStefan Roese bus-frequency = <0>; /* From boot loader */ 31*667b504aSStefan Roese system-frequency = <0>; /* From boot loader */ 32*667b504aSStefan Roese 33*667b504aSStefan Roese timer@600 { 34*667b504aSStefan Roese fsl,has-wdt; 35*667b504aSStefan Roese }; 36*667b504aSStefan Roese 37*667b504aSStefan Roese spi@f00 { 38*667b504aSStefan Roese status = "disabled"; 39*667b504aSStefan Roese }; 40*667b504aSStefan Roese 41*667b504aSStefan Roese usb: usb@1000 { 42*667b504aSStefan Roese status = "disabled"; 43*667b504aSStefan Roese }; 44*667b504aSStefan Roese 45*667b504aSStefan Roese psc@2000 { 46*667b504aSStefan Roese compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 47*667b504aSStefan Roese reg = <0x2000 0x100>; 48*667b504aSStefan Roese interrupts = <2 1 0>; 49*667b504aSStefan Roese }; 50*667b504aSStefan Roese 51*667b504aSStefan Roese psc@2200 { 52*667b504aSStefan Roese status = "disabled"; 53*667b504aSStefan Roese }; 54*667b504aSStefan Roese 55*667b504aSStefan Roese psc@2400 { 56*667b504aSStefan Roese status = "disabled"; 57*667b504aSStefan Roese }; 58*667b504aSStefan Roese 59*667b504aSStefan Roese psc@2600 { 60*667b504aSStefan Roese status = "disabled"; 61*667b504aSStefan Roese }; 62*667b504aSStefan Roese 63*667b504aSStefan Roese psc@2800 { 64*667b504aSStefan Roese status = "disabled"; 65*667b504aSStefan Roese }; 66*667b504aSStefan Roese 67*667b504aSStefan Roese psc@2c00 { // PSC6 68*667b504aSStefan Roese compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 69*667b504aSStefan Roese reg = <0x2c00 0x100>; 70*667b504aSStefan Roese interrupts = <2 4 0>; 71*667b504aSStefan Roese }; 72*667b504aSStefan Roese 73*667b504aSStefan Roese ethernet@3000 { 74*667b504aSStefan Roese phy-handle = <&phy0>; 75*667b504aSStefan Roese }; 76*667b504aSStefan Roese 77*667b504aSStefan Roese mdio@3000 { 78*667b504aSStefan Roese phy0: ethernet-phy@3 { 79*667b504aSStefan Roese reg = <0x03>; 80*667b504aSStefan Roese }; 81*667b504aSStefan Roese }; 82*667b504aSStefan Roese 83*667b504aSStefan Roese ata@3a00 { 84*667b504aSStefan Roese status = "disabled"; 85*667b504aSStefan Roese }; 86*667b504aSStefan Roese 87*667b504aSStefan Roese i2c@3d00 { 88*667b504aSStefan Roese status = "disabled"; 89*667b504aSStefan Roese }; 90*667b504aSStefan Roese 91*667b504aSStefan Roese i2c@3d40 { 92*667b504aSStefan Roese status = "disabled"; 93*667b504aSStefan Roese }; 94*667b504aSStefan Roese }; 95*667b504aSStefan Roese 96*667b504aSStefan Roese localbus { 97*667b504aSStefan Roese compatible = "fsl,mpc5200b-lpb","simple-bus"; 98*667b504aSStefan Roese #address-cells = <2>; 99*667b504aSStefan Roese #size-cells = <1>; 100*667b504aSStefan Roese ranges = <0 0 0xfc000000 0x02000000 101*667b504aSStefan Roese 3 0 0xe9000000 0x00080000 102*667b504aSStefan Roese 5 0 0xe8000000 0x00010000>; 103*667b504aSStefan Roese 104*667b504aSStefan Roese flash@0,0 { 105*667b504aSStefan Roese #address-cells = <1>; 106*667b504aSStefan Roese #size-cells = <1>; 107*667b504aSStefan Roese reg = <0 0x0 0x02000000>; 108*667b504aSStefan Roese compatible = "cfi-flash"; 109*667b504aSStefan Roese bank-width = <2>; 110*667b504aSStefan Roese partition@0x0 { 111*667b504aSStefan Roese label = "u-boot"; 112*667b504aSStefan Roese reg = <0x00000000 0x00040000>; 113*667b504aSStefan Roese read-only; 114*667b504aSStefan Roese }; 115*667b504aSStefan Roese partition@0x00040000 { 116*667b504aSStefan Roese label = "env"; 117*667b504aSStefan Roese reg = <0x00040000 0x00020000>; 118*667b504aSStefan Roese }; 119*667b504aSStefan Roese partition@0x00060000 { 120*667b504aSStefan Roese label = "dtb"; 121*667b504aSStefan Roese reg = <0x00060000 0x00020000>; 122*667b504aSStefan Roese }; 123*667b504aSStefan Roese partition@0x00080000 { 124*667b504aSStefan Roese label = "kernel"; 125*667b504aSStefan Roese reg = <0x00080000 0x00500000>; 126*667b504aSStefan Roese }; 127*667b504aSStefan Roese partition@0x00580000 { 128*667b504aSStefan Roese label = "root"; 129*667b504aSStefan Roese reg = <0x00580000 0x00A80000>; 130*667b504aSStefan Roese }; 131*667b504aSStefan Roese }; 132*667b504aSStefan Roese 133*667b504aSStefan Roese fpga@3,0 { 134*667b504aSStefan Roese compatible = "anonymous,a3m071-fpga"; 135*667b504aSStefan Roese reg = <3 0x0 0x00080000 136*667b504aSStefan Roese 5 0x0 0x00010000>; 137*667b504aSStefan Roese interrupts = <0 0 3>; /* level low */ 138*667b504aSStefan Roese }; 139*667b504aSStefan Roese }; 140*667b504aSStefan Roese 141*667b504aSStefan Roese pci@f0000d00 { 142*667b504aSStefan Roese status = "disabled"; 143*667b504aSStefan Roese }; 144*667b504aSStefan Roese}; 145