1*cb391265SFabrizio Castro /* SPDX-License-Identifier: GPL-2.0 2*cb391265SFabrizio Castro * 3*cb391265SFabrizio Castro * Copyright (C) 2018 Renesas Electronics Corp. 4*cb391265SFabrizio Castro */ 5*cb391265SFabrizio Castro #ifndef __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ 6*cb391265SFabrizio Castro #define __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ 7*cb391265SFabrizio Castro 8*cb391265SFabrizio Castro /* 9*cb391265SFabrizio Castro * These power domain indices match the numbers of the interrupt bits 10*cb391265SFabrizio Castro * representing the power areas in the various Interrupt Registers 11*cb391265SFabrizio Castro * (e.g. SYSCISR, Interrupt Status Register) 12*cb391265SFabrizio Castro */ 13*cb391265SFabrizio Castro 14*cb391265SFabrizio Castro #define R8A774C0_PD_CA53_CPU0 5 15*cb391265SFabrizio Castro #define R8A774C0_PD_CA53_CPU1 6 16*cb391265SFabrizio Castro #define R8A774C0_PD_A3VC 14 17*cb391265SFabrizio Castro #define R8A774C0_PD_3DG_A 17 18*cb391265SFabrizio Castro #define R8A774C0_PD_3DG_B 18 19*cb391265SFabrizio Castro #define R8A774C0_PD_CA53_SCU 21 20*cb391265SFabrizio Castro #define R8A774C0_PD_A2VC1 26 21*cb391265SFabrizio Castro 22*cb391265SFabrizio Castro /* Always-on power area */ 23*cb391265SFabrizio Castro #define R8A774C0_PD_ALWAYS_ON 32 24*cb391265SFabrizio Castro 25*cb391265SFabrizio Castro #endif /* __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ */ 26