1*ba6165bcSLukas Bulwahn /* SPDX-License-Identifier: GPL-2.0 */ 2*ba6165bcSLukas Bulwahn 3*ba6165bcSLukas Bulwahn /* This file defines field values used by the versaclock 6 family 4*ba6165bcSLukas Bulwahn * for defining output type 5*ba6165bcSLukas Bulwahn */ 6*ba6165bcSLukas Bulwahn 7*ba6165bcSLukas Bulwahn #define VC5_LVPECL 0 8*ba6165bcSLukas Bulwahn #define VC5_CMOS 1 9*ba6165bcSLukas Bulwahn #define VC5_HCSL33 2 10*ba6165bcSLukas Bulwahn #define VC5_LVDS 3 11*ba6165bcSLukas Bulwahn #define VC5_CMOS2 4 12*ba6165bcSLukas Bulwahn #define VC5_CMOSD 5 13*ba6165bcSLukas Bulwahn #define VC5_HCSL25 6 14