1*c942fddfSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 25e737617SMaxime Ripard /* 35e737617SMaxime Ripard * Copyright 2016 Maxime Ripard 45e737617SMaxime Ripard * 55e737617SMaxime Ripard * Maxime Ripard <maxime.ripard@free-electrons.com> 65e737617SMaxime Ripard */ 75e737617SMaxime Ripard 85e737617SMaxime Ripard #ifndef _DT_BINDINGS_CLK_SUN5I_H_ 95e737617SMaxime Ripard #define _DT_BINDINGS_CLK_SUN5I_H_ 105e737617SMaxime Ripard 115e737617SMaxime Ripard #define CLK_HOSC 1 125e737617SMaxime Ripard 130adad031SMaxime Ripard #define CLK_PLL_VIDEO0_2X 9 140adad031SMaxime Ripard 150adad031SMaxime Ripard #define CLK_PLL_VIDEO1_2X 16 165e737617SMaxime Ripard #define CLK_CPU 17 175e737617SMaxime Ripard 185e737617SMaxime Ripard #define CLK_AHB_OTG 23 195e737617SMaxime Ripard #define CLK_AHB_EHCI 24 205e737617SMaxime Ripard #define CLK_AHB_OHCI 25 215e737617SMaxime Ripard #define CLK_AHB_SS 26 225e737617SMaxime Ripard #define CLK_AHB_DMA 27 235e737617SMaxime Ripard #define CLK_AHB_BIST 28 245e737617SMaxime Ripard #define CLK_AHB_MMC0 29 255e737617SMaxime Ripard #define CLK_AHB_MMC1 30 265e737617SMaxime Ripard #define CLK_AHB_MMC2 31 275e737617SMaxime Ripard #define CLK_AHB_NAND 32 285e737617SMaxime Ripard #define CLK_AHB_SDRAM 33 295e737617SMaxime Ripard #define CLK_AHB_EMAC 34 305e737617SMaxime Ripard #define CLK_AHB_TS 35 315e737617SMaxime Ripard #define CLK_AHB_SPI0 36 325e737617SMaxime Ripard #define CLK_AHB_SPI1 37 335e737617SMaxime Ripard #define CLK_AHB_SPI2 38 345e737617SMaxime Ripard #define CLK_AHB_GPS 39 355e737617SMaxime Ripard #define CLK_AHB_HSTIMER 40 365e737617SMaxime Ripard #define CLK_AHB_VE 41 375e737617SMaxime Ripard #define CLK_AHB_TVE 42 385e737617SMaxime Ripard #define CLK_AHB_LCD 43 395e737617SMaxime Ripard #define CLK_AHB_CSI 44 405e737617SMaxime Ripard #define CLK_AHB_HDMI 45 415e737617SMaxime Ripard #define CLK_AHB_DE_BE 46 425e737617SMaxime Ripard #define CLK_AHB_DE_FE 47 435e737617SMaxime Ripard #define CLK_AHB_IEP 48 445e737617SMaxime Ripard #define CLK_AHB_GPU 49 455e737617SMaxime Ripard #define CLK_APB0_CODEC 50 465e737617SMaxime Ripard #define CLK_APB0_SPDIF 51 475e737617SMaxime Ripard #define CLK_APB0_I2S 52 485e737617SMaxime Ripard #define CLK_APB0_PIO 53 495e737617SMaxime Ripard #define CLK_APB0_IR 54 505e737617SMaxime Ripard #define CLK_APB0_KEYPAD 55 515e737617SMaxime Ripard #define CLK_APB1_I2C0 56 525e737617SMaxime Ripard #define CLK_APB1_I2C1 57 535e737617SMaxime Ripard #define CLK_APB1_I2C2 58 545e737617SMaxime Ripard #define CLK_APB1_UART0 59 555e737617SMaxime Ripard #define CLK_APB1_UART1 60 565e737617SMaxime Ripard #define CLK_APB1_UART2 61 575e737617SMaxime Ripard #define CLK_APB1_UART3 62 585e737617SMaxime Ripard #define CLK_NAND 63 595e737617SMaxime Ripard #define CLK_MMC0 64 605e737617SMaxime Ripard #define CLK_MMC1 65 615e737617SMaxime Ripard #define CLK_MMC2 66 625e737617SMaxime Ripard #define CLK_TS 67 635e737617SMaxime Ripard #define CLK_SS 68 645e737617SMaxime Ripard #define CLK_SPI0 69 655e737617SMaxime Ripard #define CLK_SPI1 70 665e737617SMaxime Ripard #define CLK_SPI2 71 675e737617SMaxime Ripard #define CLK_IR 72 685e737617SMaxime Ripard #define CLK_I2S 73 695e737617SMaxime Ripard #define CLK_SPDIF 74 705e737617SMaxime Ripard #define CLK_KEYPAD 75 715e737617SMaxime Ripard #define CLK_USB_OHCI 76 725e737617SMaxime Ripard #define CLK_USB_PHY0 77 735e737617SMaxime Ripard #define CLK_USB_PHY1 78 745e737617SMaxime Ripard #define CLK_GPS 79 755e737617SMaxime Ripard #define CLK_DRAM_VE 80 765e737617SMaxime Ripard #define CLK_DRAM_CSI 81 775e737617SMaxime Ripard #define CLK_DRAM_TS 82 785e737617SMaxime Ripard #define CLK_DRAM_TVE 83 795e737617SMaxime Ripard #define CLK_DRAM_DE_FE 84 805e737617SMaxime Ripard #define CLK_DRAM_DE_BE 85 815e737617SMaxime Ripard #define CLK_DRAM_ACE 86 825e737617SMaxime Ripard #define CLK_DRAM_IEP 87 835e737617SMaxime Ripard #define CLK_DE_BE 88 845e737617SMaxime Ripard #define CLK_DE_FE 89 855e737617SMaxime Ripard #define CLK_TCON_CH0 90 865e737617SMaxime Ripard 875e737617SMaxime Ripard #define CLK_TCON_CH1 92 885e737617SMaxime Ripard #define CLK_CSI 93 895e737617SMaxime Ripard #define CLK_VE 94 905e737617SMaxime Ripard #define CLK_CODEC 95 915e737617SMaxime Ripard #define CLK_AVS 96 925e737617SMaxime Ripard #define CLK_HDMI 97 935e737617SMaxime Ripard #define CLK_GPU 98 94c77cebacSMaxime Ripard #define CLK_MBUS 99 955e737617SMaxime Ripard #define CLK_IEP 100 965e737617SMaxime Ripard 975e737617SMaxime Ripard #endif /* _DT_BINDINGS_CLK_SUN5I_H_ */ 98