xref: /openbmc/linux/scripts/dtc/include-prefixes/dt-bindings/clock/r8a7791-clock.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*2874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
24d8864c9SLaurent Pinchart /*
34d8864c9SLaurent Pinchart  * Copyright 2013 Ideas On Board SPRL
44d8864c9SLaurent Pinchart  */
54d8864c9SLaurent Pinchart 
64d8864c9SLaurent Pinchart #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
74d8864c9SLaurent Pinchart #define __DT_BINDINGS_CLOCK_R8A7791_H__
84d8864c9SLaurent Pinchart 
94d8864c9SLaurent Pinchart /* CPG */
104d8864c9SLaurent Pinchart #define R8A7791_CLK_MAIN		0
114d8864c9SLaurent Pinchart #define R8A7791_CLK_PLL0		1
124d8864c9SLaurent Pinchart #define R8A7791_CLK_PLL1		2
134d8864c9SLaurent Pinchart #define R8A7791_CLK_PLL3		3
144d8864c9SLaurent Pinchart #define R8A7791_CLK_LB			4
154d8864c9SLaurent Pinchart #define R8A7791_CLK_QSPI		5
164d8864c9SLaurent Pinchart #define R8A7791_CLK_SDH			6
174d8864c9SLaurent Pinchart #define R8A7791_CLK_SD0			7
184d8864c9SLaurent Pinchart #define R8A7791_CLK_Z			8
19b324252cSSergei Shtylyov #define R8A7791_CLK_RCAN		9
20ae65a8aeSSergei Shtylyov #define R8A7791_CLK_ADSP		10
214d8864c9SLaurent Pinchart 
22cded80f8SLaurent Pinchart /* MSTP0 */
23cded80f8SLaurent Pinchart #define R8A7791_CLK_MSIOF0		0
24cded80f8SLaurent Pinchart 
254d8864c9SLaurent Pinchart /* MSTP1 */
2674d89d25SYoshifumi Hosoya #define R8A7791_CLK_VCP0		1
2774d89d25SYoshifumi Hosoya #define R8A7791_CLK_VPC0		3
28ed48b5d6SMikhail Ulyanov #define R8A7791_CLK_JPU			6
2974d89d25SYoshifumi Hosoya #define R8A7791_CLK_SSP1		9
304d8864c9SLaurent Pinchart #define R8A7791_CLK_TMU1		11
31e4d2fd9eSKouei Abe #define R8A7791_CLK_3DG			12
3274d89d25SYoshifumi Hosoya #define R8A7791_CLK_2DDMAC		15
3374d89d25SYoshifumi Hosoya #define R8A7791_CLK_FDP1_1		18
3474d89d25SYoshifumi Hosoya #define R8A7791_CLK_FDP1_0		19
354d8864c9SLaurent Pinchart #define R8A7791_CLK_TMU3		21
364d8864c9SLaurent Pinchart #define R8A7791_CLK_TMU2		22
374d8864c9SLaurent Pinchart #define R8A7791_CLK_CMT0		24
384d8864c9SLaurent Pinchart #define R8A7791_CLK_TMU0		25
394d8864c9SLaurent Pinchart #define R8A7791_CLK_VSP1_DU1		27
404d8864c9SLaurent Pinchart #define R8A7791_CLK_VSP1_DU0		28
4158ea1d53SLaurent Pinchart #define R8A7791_CLK_VSP1_S		31
424d8864c9SLaurent Pinchart 
434d8864c9SLaurent Pinchart /* MSTP2 */
444d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIFA2		2
454d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIFA1		3
464d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIFA0		4
47cded80f8SLaurent Pinchart #define R8A7791_CLK_MSIOF2		5
484d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIFB0		6
494d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIFB1		7
50cded80f8SLaurent Pinchart #define R8A7791_CLK_MSIOF1		8
514d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIFB2		16
52a505daa5SGeert Uytterhoeven #define R8A7791_CLK_SYS_DMAC1		18
53a505daa5SGeert Uytterhoeven #define R8A7791_CLK_SYS_DMAC0		19
544d8864c9SLaurent Pinchart 
554d8864c9SLaurent Pinchart /* MSTP3 */
564d8864c9SLaurent Pinchart #define R8A7791_CLK_TPU0		4
574d8864c9SLaurent Pinchart #define R8A7791_CLK_SDHI2		11
584d8864c9SLaurent Pinchart #define R8A7791_CLK_SDHI1		12
594d8864c9SLaurent Pinchart #define R8A7791_CLK_SDHI0		14
604d8864c9SLaurent Pinchart #define R8A7791_CLK_MMCIF0		15
61c6e8f325SWolfram Sang #define R8A7791_CLK_IIC0		18
624bfb3767SPhil Edworthy #define R8A7791_CLK_PCIEC		19
63c6e8f325SWolfram Sang #define R8A7791_CLK_IIC1		23
644d8864c9SLaurent Pinchart #define R8A7791_CLK_SSUSB		28
654d8864c9SLaurent Pinchart #define R8A7791_CLK_CMT1		29
664d8864c9SLaurent Pinchart #define R8A7791_CLK_USBDMAC0		30
674d8864c9SLaurent Pinchart #define R8A7791_CLK_USBDMAC1		31
684d8864c9SLaurent Pinchart 
6962d386c0SGeert Uytterhoeven /* MSTP4 */
7062d386c0SGeert Uytterhoeven #define R8A7791_CLK_IRQC		7
71c2f2e266SGeert Uytterhoeven #define R8A7791_CLK_INTC_SYS		8
7262d386c0SGeert Uytterhoeven 
734d8864c9SLaurent Pinchart /* MSTP5 */
748994fff6SKuninori Morimoto #define R8A7791_CLK_AUDIO_DMAC1		1
758994fff6SKuninori Morimoto #define R8A7791_CLK_AUDIO_DMAC0		2
76ae65a8aeSSergei Shtylyov #define R8A7791_CLK_ADSP_MOD		6
774d8864c9SLaurent Pinchart #define R8A7791_CLK_THERMAL		22
784d8864c9SLaurent Pinchart #define R8A7791_CLK_PWM			23
794d8864c9SLaurent Pinchart 
804d8864c9SLaurent Pinchart /* MSTP7 */
816225b99aSMagnus Damm #define R8A7791_CLK_EHCI		3
824d8864c9SLaurent Pinchart #define R8A7791_CLK_HSUSB		4
834d8864c9SLaurent Pinchart #define R8A7791_CLK_HSCIF2		13
844d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIF5		14
854d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIF4		15
864d8864c9SLaurent Pinchart #define R8A7791_CLK_HSCIF1		16
874d8864c9SLaurent Pinchart #define R8A7791_CLK_HSCIF0		17
884d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIF3		18
894d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIF2		19
904d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIF1		20
914d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIF0		21
924d8864c9SLaurent Pinchart #define R8A7791_CLK_DU1			23
934d8864c9SLaurent Pinchart #define R8A7791_CLK_DU0			24
944d8864c9SLaurent Pinchart #define R8A7791_CLK_LVDS0		26
954d8864c9SLaurent Pinchart 
964d8864c9SLaurent Pinchart /* MSTP8 */
97ce85ad47SRyo Kataoka #define R8A7791_CLK_IPMMU_SGX		0
987408d306SAndrey Gusakov #define R8A7791_CLK_MLB			2
994d8864c9SLaurent Pinchart #define R8A7791_CLK_VIN2		9
1004d8864c9SLaurent Pinchart #define R8A7791_CLK_VIN1		10
1014d8864c9SLaurent Pinchart #define R8A7791_CLK_VIN0		11
102eaa870b3SSergei Shtylyov #define R8A7791_CLK_ETHERAVB		12
1034d8864c9SLaurent Pinchart #define R8A7791_CLK_ETHER		13
1044d8864c9SLaurent Pinchart #define R8A7791_CLK_SATA1		14
1054d8864c9SLaurent Pinchart #define R8A7791_CLK_SATA0		15
1064d8864c9SLaurent Pinchart 
1074d8864c9SLaurent Pinchart /* MSTP9 */
108a56a2fe7SMarek Vasut #define R8A7791_CLK_GYROADC		1
1094d8864c9SLaurent Pinchart #define R8A7791_CLK_GPIO7		4
1104d8864c9SLaurent Pinchart #define R8A7791_CLK_GPIO6		5
1114d8864c9SLaurent Pinchart #define R8A7791_CLK_GPIO5		7
1124d8864c9SLaurent Pinchart #define R8A7791_CLK_GPIO4		8
1134d8864c9SLaurent Pinchart #define R8A7791_CLK_GPIO3		9
1144d8864c9SLaurent Pinchart #define R8A7791_CLK_GPIO2		10
1154d8864c9SLaurent Pinchart #define R8A7791_CLK_GPIO1		11
1164d8864c9SLaurent Pinchart #define R8A7791_CLK_GPIO0		12
1174d8864c9SLaurent Pinchart #define R8A7791_CLK_RCAN1		15
1184d8864c9SLaurent Pinchart #define R8A7791_CLK_RCAN0		16
119ec71f552SLaurent Pinchart #define R8A7791_CLK_QSPI_MOD		17
1204d8864c9SLaurent Pinchart #define R8A7791_CLK_I2C5		25
1214d8864c9SLaurent Pinchart #define R8A7791_CLK_IICDVFS		26
1224d8864c9SLaurent Pinchart #define R8A7791_CLK_I2C4		27
1234d8864c9SLaurent Pinchart #define R8A7791_CLK_I2C3		28
1244d8864c9SLaurent Pinchart #define R8A7791_CLK_I2C2		29
1254d8864c9SLaurent Pinchart #define R8A7791_CLK_I2C1		30
1264d8864c9SLaurent Pinchart #define R8A7791_CLK_I2C0		31
1274d8864c9SLaurent Pinchart 
128ee914152SKuninori Morimoto /* MSTP10 */
129ee914152SKuninori Morimoto #define R8A7791_CLK_SSI_ALL		5
130ee914152SKuninori Morimoto #define R8A7791_CLK_SSI9		6
131ee914152SKuninori Morimoto #define R8A7791_CLK_SSI8		7
132ee914152SKuninori Morimoto #define R8A7791_CLK_SSI7		8
133ee914152SKuninori Morimoto #define R8A7791_CLK_SSI6		9
134ee914152SKuninori Morimoto #define R8A7791_CLK_SSI5		10
135ee914152SKuninori Morimoto #define R8A7791_CLK_SSI4		11
136ee914152SKuninori Morimoto #define R8A7791_CLK_SSI3		12
137ee914152SKuninori Morimoto #define R8A7791_CLK_SSI2		13
138ee914152SKuninori Morimoto #define R8A7791_CLK_SSI1		14
139ee914152SKuninori Morimoto #define R8A7791_CLK_SSI0		15
140ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_ALL		17
141ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_DVC1		18
142ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_DVC0		19
14388401702SKuninori Morimoto #define R8A7791_CLK_SCU_CTU1_MIX1	20
14488401702SKuninori Morimoto #define R8A7791_CLK_SCU_CTU0_MIX0	21
145ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC9		22
146ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC8		23
147ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC7		24
148ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC6		25
149ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC5		26
150ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC4		27
151ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC3		28
152ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC2		29
153ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC1		30
154ee914152SKuninori Morimoto #define R8A7791_CLK_SCU_SRC0		31
155ee914152SKuninori Morimoto 
1564d8864c9SLaurent Pinchart /* MSTP11 */
1574d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIFA3		6
1584d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIFA4		7
1594d8864c9SLaurent Pinchart #define R8A7791_CLK_SCIFA5		8
1604d8864c9SLaurent Pinchart 
1614d8864c9SLaurent Pinchart #endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */
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