xref: /openbmc/linux/scripts/dtc/include-prefixes/dt-bindings/clock/qcom,gcc-msm8953.h (revision 762f99f4f3cb41a775b5157dd761217beba65873)
1*1b9de19eSVladimir Lypak /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*1b9de19eSVladimir Lypak 
3*1b9de19eSVladimir Lypak #ifndef _DT_BINDINGS_CLK_MSM_GCC_8953_H
4*1b9de19eSVladimir Lypak #define _DT_BINDINGS_CLK_MSM_GCC_8953_H
5*1b9de19eSVladimir Lypak 
6*1b9de19eSVladimir Lypak /* Clocks */
7*1b9de19eSVladimir Lypak #define APC0_DROOP_DETECTOR_CLK_SRC		0
8*1b9de19eSVladimir Lypak #define APC1_DROOP_DETECTOR_CLK_SRC		1
9*1b9de19eSVladimir Lypak #define APSS_AHB_CLK_SRC			2
10*1b9de19eSVladimir Lypak #define BLSP1_QUP1_I2C_APPS_CLK_SRC		3
11*1b9de19eSVladimir Lypak #define BLSP1_QUP1_SPI_APPS_CLK_SRC		4
12*1b9de19eSVladimir Lypak #define BLSP1_QUP2_I2C_APPS_CLK_SRC		5
13*1b9de19eSVladimir Lypak #define BLSP1_QUP2_SPI_APPS_CLK_SRC		6
14*1b9de19eSVladimir Lypak #define BLSP1_QUP3_I2C_APPS_CLK_SRC		7
15*1b9de19eSVladimir Lypak #define BLSP1_QUP3_SPI_APPS_CLK_SRC		8
16*1b9de19eSVladimir Lypak #define BLSP1_QUP4_I2C_APPS_CLK_SRC		9
17*1b9de19eSVladimir Lypak #define BLSP1_QUP4_SPI_APPS_CLK_SRC		10
18*1b9de19eSVladimir Lypak #define BLSP1_UART1_APPS_CLK_SRC		11
19*1b9de19eSVladimir Lypak #define BLSP1_UART2_APPS_CLK_SRC		12
20*1b9de19eSVladimir Lypak #define BLSP2_QUP1_I2C_APPS_CLK_SRC		13
21*1b9de19eSVladimir Lypak #define BLSP2_QUP1_SPI_APPS_CLK_SRC		14
22*1b9de19eSVladimir Lypak #define BLSP2_QUP2_I2C_APPS_CLK_SRC		15
23*1b9de19eSVladimir Lypak #define BLSP2_QUP2_SPI_APPS_CLK_SRC		16
24*1b9de19eSVladimir Lypak #define BLSP2_QUP3_I2C_APPS_CLK_SRC		17
25*1b9de19eSVladimir Lypak #define BLSP2_QUP3_SPI_APPS_CLK_SRC		18
26*1b9de19eSVladimir Lypak #define BLSP2_QUP4_I2C_APPS_CLK_SRC		19
27*1b9de19eSVladimir Lypak #define BLSP2_QUP4_SPI_APPS_CLK_SRC		20
28*1b9de19eSVladimir Lypak #define BLSP2_UART1_APPS_CLK_SRC		21
29*1b9de19eSVladimir Lypak #define BLSP2_UART2_APPS_CLK_SRC		22
30*1b9de19eSVladimir Lypak #define BYTE0_CLK_SRC				23
31*1b9de19eSVladimir Lypak #define BYTE1_CLK_SRC				24
32*1b9de19eSVladimir Lypak #define CAMSS_GP0_CLK_SRC			25
33*1b9de19eSVladimir Lypak #define CAMSS_GP1_CLK_SRC			26
34*1b9de19eSVladimir Lypak #define CAMSS_TOP_AHB_CLK_SRC			27
35*1b9de19eSVladimir Lypak #define CCI_CLK_SRC				28
36*1b9de19eSVladimir Lypak #define CPP_CLK_SRC				29
37*1b9de19eSVladimir Lypak #define CRYPTO_CLK_SRC				30
38*1b9de19eSVladimir Lypak #define CSI0PHYTIMER_CLK_SRC			31
39*1b9de19eSVladimir Lypak #define CSI0P_CLK_SRC				32
40*1b9de19eSVladimir Lypak #define CSI0_CLK_SRC				33
41*1b9de19eSVladimir Lypak #define CSI1PHYTIMER_CLK_SRC			34
42*1b9de19eSVladimir Lypak #define CSI1P_CLK_SRC				35
43*1b9de19eSVladimir Lypak #define CSI1_CLK_SRC				36
44*1b9de19eSVladimir Lypak #define CSI2PHYTIMER_CLK_SRC			37
45*1b9de19eSVladimir Lypak #define CSI2P_CLK_SRC				38
46*1b9de19eSVladimir Lypak #define CSI2_CLK_SRC				39
47*1b9de19eSVladimir Lypak #define ESC0_CLK_SRC				40
48*1b9de19eSVladimir Lypak #define ESC1_CLK_SRC				41
49*1b9de19eSVladimir Lypak #define GCC_APC0_DROOP_DETECTOR_GPLL0_CLK	42
50*1b9de19eSVladimir Lypak #define GCC_APC1_DROOP_DETECTOR_GPLL0_CLK	43
51*1b9de19eSVladimir Lypak #define GCC_APSS_AHB_CLK			44
52*1b9de19eSVladimir Lypak #define GCC_APSS_AXI_CLK			45
53*1b9de19eSVladimir Lypak #define GCC_APSS_TCU_ASYNC_CLK			46
54*1b9de19eSVladimir Lypak #define GCC_BIMC_GFX_CLK			47
55*1b9de19eSVladimir Lypak #define GCC_BIMC_GPU_CLK			48
56*1b9de19eSVladimir Lypak #define GCC_BLSP1_AHB_CLK			49
57*1b9de19eSVladimir Lypak #define GCC_BLSP1_QUP1_I2C_APPS_CLK		50
58*1b9de19eSVladimir Lypak #define GCC_BLSP1_QUP1_SPI_APPS_CLK		51
59*1b9de19eSVladimir Lypak #define GCC_BLSP1_QUP2_I2C_APPS_CLK		52
60*1b9de19eSVladimir Lypak #define GCC_BLSP1_QUP2_SPI_APPS_CLK		53
61*1b9de19eSVladimir Lypak #define GCC_BLSP1_QUP3_I2C_APPS_CLK		54
62*1b9de19eSVladimir Lypak #define GCC_BLSP1_QUP3_SPI_APPS_CLK		55
63*1b9de19eSVladimir Lypak #define GCC_BLSP1_QUP4_I2C_APPS_CLK		56
64*1b9de19eSVladimir Lypak #define GCC_BLSP1_QUP4_SPI_APPS_CLK		57
65*1b9de19eSVladimir Lypak #define GCC_BLSP1_UART1_APPS_CLK		58
66*1b9de19eSVladimir Lypak #define GCC_BLSP1_UART2_APPS_CLK		59
67*1b9de19eSVladimir Lypak #define GCC_BLSP2_AHB_CLK			60
68*1b9de19eSVladimir Lypak #define GCC_BLSP2_QUP1_I2C_APPS_CLK		61
69*1b9de19eSVladimir Lypak #define GCC_BLSP2_QUP1_SPI_APPS_CLK		62
70*1b9de19eSVladimir Lypak #define GCC_BLSP2_QUP2_I2C_APPS_CLK		63
71*1b9de19eSVladimir Lypak #define GCC_BLSP2_QUP2_SPI_APPS_CLK		64
72*1b9de19eSVladimir Lypak #define GCC_BLSP2_QUP3_I2C_APPS_CLK		65
73*1b9de19eSVladimir Lypak #define GCC_BLSP2_QUP3_SPI_APPS_CLK		66
74*1b9de19eSVladimir Lypak #define GCC_BLSP2_QUP4_I2C_APPS_CLK		67
75*1b9de19eSVladimir Lypak #define GCC_BLSP2_QUP4_SPI_APPS_CLK		68
76*1b9de19eSVladimir Lypak #define GCC_BLSP2_UART1_APPS_CLK		69
77*1b9de19eSVladimir Lypak #define GCC_BLSP2_UART2_APPS_CLK		70
78*1b9de19eSVladimir Lypak #define GCC_BOOT_ROM_AHB_CLK			71
79*1b9de19eSVladimir Lypak #define GCC_CAMSS_AHB_CLK			72
80*1b9de19eSVladimir Lypak #define GCC_CAMSS_CCI_AHB_CLK			73
81*1b9de19eSVladimir Lypak #define GCC_CAMSS_CCI_CLK			74
82*1b9de19eSVladimir Lypak #define GCC_CAMSS_CPP_AHB_CLK			75
83*1b9de19eSVladimir Lypak #define GCC_CAMSS_CPP_AXI_CLK			76
84*1b9de19eSVladimir Lypak #define GCC_CAMSS_CPP_CLK			77
85*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI0PHYTIMER_CLK		78
86*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI0PHY_CLK			79
87*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI0PIX_CLK			80
88*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI0RDI_CLK			81
89*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI0_AHB_CLK			82
90*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI0_CLK			83
91*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI0_CSIPHY_3P_CLK		84
92*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI1PHYTIMER_CLK		85
93*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI1PHY_CLK			86
94*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI1PIX_CLK			87
95*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI1RDI_CLK			88
96*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI1_AHB_CLK			89
97*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI1_CLK			90
98*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI1_CSIPHY_3P_CLK		91
99*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI2PHYTIMER_CLK		92
100*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI2PHY_CLK			93
101*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI2PIX_CLK			94
102*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI2RDI_CLK			95
103*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI2_AHB_CLK			96
104*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI2_CLK			97
105*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI2_CSIPHY_3P_CLK		98
106*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI_VFE0_CLK			99
107*1b9de19eSVladimir Lypak #define GCC_CAMSS_CSI_VFE1_CLK			100
108*1b9de19eSVladimir Lypak #define GCC_CAMSS_GP0_CLK			101
109*1b9de19eSVladimir Lypak #define GCC_CAMSS_GP1_CLK			102
110*1b9de19eSVladimir Lypak #define GCC_CAMSS_ISPIF_AHB_CLK			103
111*1b9de19eSVladimir Lypak #define GCC_CAMSS_JPEG0_CLK			104
112*1b9de19eSVladimir Lypak #define GCC_CAMSS_JPEG_AHB_CLK			105
113*1b9de19eSVladimir Lypak #define GCC_CAMSS_JPEG_AXI_CLK			106
114*1b9de19eSVladimir Lypak #define GCC_CAMSS_MCLK0_CLK			107
115*1b9de19eSVladimir Lypak #define GCC_CAMSS_MCLK1_CLK			108
116*1b9de19eSVladimir Lypak #define GCC_CAMSS_MCLK2_CLK			109
117*1b9de19eSVladimir Lypak #define GCC_CAMSS_MCLK3_CLK			110
118*1b9de19eSVladimir Lypak #define GCC_CAMSS_MICRO_AHB_CLK			111
119*1b9de19eSVladimir Lypak #define GCC_CAMSS_TOP_AHB_CLK			112
120*1b9de19eSVladimir Lypak #define GCC_CAMSS_VFE0_AHB_CLK			113
121*1b9de19eSVladimir Lypak #define GCC_CAMSS_VFE0_AXI_CLK			114
122*1b9de19eSVladimir Lypak #define GCC_CAMSS_VFE0_CLK			115
123*1b9de19eSVladimir Lypak #define GCC_CAMSS_VFE1_AHB_CLK			116
124*1b9de19eSVladimir Lypak #define GCC_CAMSS_VFE1_AXI_CLK			117
125*1b9de19eSVladimir Lypak #define GCC_CAMSS_VFE1_CLK			118
126*1b9de19eSVladimir Lypak #define GCC_CPP_TBU_CLK				119
127*1b9de19eSVladimir Lypak #define GCC_CRYPTO_AHB_CLK			120
128*1b9de19eSVladimir Lypak #define GCC_CRYPTO_AXI_CLK			121
129*1b9de19eSVladimir Lypak #define GCC_CRYPTO_CLK				122
130*1b9de19eSVladimir Lypak #define GCC_DCC_CLK				123
131*1b9de19eSVladimir Lypak #define GCC_GP1_CLK				124
132*1b9de19eSVladimir Lypak #define GCC_GP2_CLK				125
133*1b9de19eSVladimir Lypak #define GCC_GP3_CLK				126
134*1b9de19eSVladimir Lypak #define GCC_JPEG_TBU_CLK			127
135*1b9de19eSVladimir Lypak #define GCC_MDP_TBU_CLK				128
136*1b9de19eSVladimir Lypak #define GCC_MDSS_AHB_CLK			129
137*1b9de19eSVladimir Lypak #define GCC_MDSS_AXI_CLK			130
138*1b9de19eSVladimir Lypak #define GCC_MDSS_BYTE0_CLK			131
139*1b9de19eSVladimir Lypak #define GCC_MDSS_BYTE1_CLK			132
140*1b9de19eSVladimir Lypak #define GCC_MDSS_ESC0_CLK			133
141*1b9de19eSVladimir Lypak #define GCC_MDSS_ESC1_CLK			134
142*1b9de19eSVladimir Lypak #define GCC_MDSS_MDP_CLK			135
143*1b9de19eSVladimir Lypak #define GCC_MDSS_PCLK0_CLK			136
144*1b9de19eSVladimir Lypak #define GCC_MDSS_PCLK1_CLK			137
145*1b9de19eSVladimir Lypak #define GCC_MDSS_VSYNC_CLK			138
146*1b9de19eSVladimir Lypak #define GCC_MSS_CFG_AHB_CLK			139
147*1b9de19eSVladimir Lypak #define GCC_MSS_Q6_BIMC_AXI_CLK			140
148*1b9de19eSVladimir Lypak #define GCC_OXILI_AHB_CLK			141
149*1b9de19eSVladimir Lypak #define GCC_OXILI_AON_CLK			142
150*1b9de19eSVladimir Lypak #define GCC_OXILI_GFX3D_CLK			143
151*1b9de19eSVladimir Lypak #define GCC_OXILI_TIMER_CLK			144
152*1b9de19eSVladimir Lypak #define GCC_PCNOC_USB3_AXI_CLK			145
153*1b9de19eSVladimir Lypak #define GCC_PDM2_CLK				146
154*1b9de19eSVladimir Lypak #define GCC_PDM_AHB_CLK				147
155*1b9de19eSVladimir Lypak #define GCC_PRNG_AHB_CLK			148
156*1b9de19eSVladimir Lypak #define GCC_QDSS_DAP_CLK			149
157*1b9de19eSVladimir Lypak #define GCC_QUSB_REF_CLK			150
158*1b9de19eSVladimir Lypak #define GCC_RBCPR_GFX_CLK			151
159*1b9de19eSVladimir Lypak #define GCC_SDCC1_AHB_CLK			152
160*1b9de19eSVladimir Lypak #define GCC_SDCC1_APPS_CLK			153
161*1b9de19eSVladimir Lypak #define GCC_SDCC1_ICE_CORE_CLK			154
162*1b9de19eSVladimir Lypak #define GCC_SDCC2_AHB_CLK			155
163*1b9de19eSVladimir Lypak #define GCC_SDCC2_APPS_CLK			156
164*1b9de19eSVladimir Lypak #define GCC_SMMU_CFG_CLK			157
165*1b9de19eSVladimir Lypak #define GCC_USB30_MASTER_CLK			158
166*1b9de19eSVladimir Lypak #define GCC_USB30_MOCK_UTMI_CLK			159
167*1b9de19eSVladimir Lypak #define GCC_USB30_SLEEP_CLK			160
168*1b9de19eSVladimir Lypak #define GCC_USB3_AUX_CLK			161
169*1b9de19eSVladimir Lypak #define GCC_USB3_PIPE_CLK			162
170*1b9de19eSVladimir Lypak #define GCC_USB_PHY_CFG_AHB_CLK			163
171*1b9de19eSVladimir Lypak #define GCC_USB_SS_REF_CLK			164
172*1b9de19eSVladimir Lypak #define GCC_VENUS0_AHB_CLK			165
173*1b9de19eSVladimir Lypak #define GCC_VENUS0_AXI_CLK			166
174*1b9de19eSVladimir Lypak #define GCC_VENUS0_CORE0_VCODEC0_CLK		167
175*1b9de19eSVladimir Lypak #define GCC_VENUS0_VCODEC0_CLK			168
176*1b9de19eSVladimir Lypak #define GCC_VENUS_TBU_CLK			169
177*1b9de19eSVladimir Lypak #define GCC_VFE1_TBU_CLK			170
178*1b9de19eSVladimir Lypak #define GCC_VFE_TBU_CLK				171
179*1b9de19eSVladimir Lypak #define GFX3D_CLK_SRC				172
180*1b9de19eSVladimir Lypak #define GP1_CLK_SRC				173
181*1b9de19eSVladimir Lypak #define GP2_CLK_SRC				174
182*1b9de19eSVladimir Lypak #define GP3_CLK_SRC				175
183*1b9de19eSVladimir Lypak #define GPLL0					176
184*1b9de19eSVladimir Lypak #define GPLL0_EARLY				177
185*1b9de19eSVladimir Lypak #define GPLL2					178
186*1b9de19eSVladimir Lypak #define GPLL2_EARLY				179
187*1b9de19eSVladimir Lypak #define GPLL3					180
188*1b9de19eSVladimir Lypak #define GPLL3_EARLY				181
189*1b9de19eSVladimir Lypak #define GPLL4					182
190*1b9de19eSVladimir Lypak #define GPLL4_EARLY				183
191*1b9de19eSVladimir Lypak #define GPLL6					184
192*1b9de19eSVladimir Lypak #define GPLL6_EARLY				185
193*1b9de19eSVladimir Lypak #define JPEG0_CLK_SRC				186
194*1b9de19eSVladimir Lypak #define MCLK0_CLK_SRC				187
195*1b9de19eSVladimir Lypak #define MCLK1_CLK_SRC				188
196*1b9de19eSVladimir Lypak #define MCLK2_CLK_SRC				189
197*1b9de19eSVladimir Lypak #define MCLK3_CLK_SRC				190
198*1b9de19eSVladimir Lypak #define MDP_CLK_SRC				191
199*1b9de19eSVladimir Lypak #define PCLK0_CLK_SRC				192
200*1b9de19eSVladimir Lypak #define PCLK1_CLK_SRC				193
201*1b9de19eSVladimir Lypak #define PDM2_CLK_SRC				194
202*1b9de19eSVladimir Lypak #define RBCPR_GFX_CLK_SRC			195
203*1b9de19eSVladimir Lypak #define SDCC1_APPS_CLK_SRC			196
204*1b9de19eSVladimir Lypak #define SDCC1_ICE_CORE_CLK_SRC			197
205*1b9de19eSVladimir Lypak #define SDCC2_APPS_CLK_SRC			198
206*1b9de19eSVladimir Lypak #define USB30_MASTER_CLK_SRC			199
207*1b9de19eSVladimir Lypak #define USB30_MOCK_UTMI_CLK_SRC			200
208*1b9de19eSVladimir Lypak #define USB3_AUX_CLK_SRC			201
209*1b9de19eSVladimir Lypak #define VCODEC0_CLK_SRC				202
210*1b9de19eSVladimir Lypak #define VFE0_CLK_SRC				203
211*1b9de19eSVladimir Lypak #define VFE1_CLK_SRC				204
212*1b9de19eSVladimir Lypak #define VSYNC_CLK_SRC				205
213*1b9de19eSVladimir Lypak 
214*1b9de19eSVladimir Lypak /* GCC block resets */
215*1b9de19eSVladimir Lypak #define GCC_CAMSS_MICRO_BCR			0
216*1b9de19eSVladimir Lypak #define GCC_MSS_BCR				1
217*1b9de19eSVladimir Lypak #define GCC_QUSB2_PHY_BCR			2
218*1b9de19eSVladimir Lypak #define GCC_USB3PHY_PHY_BCR			3
219*1b9de19eSVladimir Lypak #define GCC_USB3_PHY_BCR			4
220*1b9de19eSVladimir Lypak #define GCC_USB_30_BCR				5
221*1b9de19eSVladimir Lypak 
222*1b9de19eSVladimir Lypak /* GDSCs */
223*1b9de19eSVladimir Lypak #define CPP_GDSC				0
224*1b9de19eSVladimir Lypak #define JPEG_GDSC				1
225*1b9de19eSVladimir Lypak #define MDSS_GDSC				2
226*1b9de19eSVladimir Lypak #define OXILI_CX_GDSC				3
227*1b9de19eSVladimir Lypak #define OXILI_GX_GDSC				4
228*1b9de19eSVladimir Lypak #define USB30_GDSC				5
229*1b9de19eSVladimir Lypak #define VENUS_CORE0_GDSC			6
230*1b9de19eSVladimir Lypak #define VENUS_GDSC				7
231*1b9de19eSVladimir Lypak #define VFE0_GDSC				8
232*1b9de19eSVladimir Lypak #define VFE1_GDSC				9
233*1b9de19eSVladimir Lypak 
234*1b9de19eSVladimir Lypak #endif
235