xref: /openbmc/linux/scripts/Makefile.build (revision 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2)
1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7.PHONY: __build
8__build:
9
10# Read .config if it exist, otherwise ignore
11-include .config
12
13include $(if $(wildcard $(obj)/Kbuild), $(obj)/Kbuild, $(obj)/Makefile)
14
15include scripts/Makefile.lib
16
17ifdef host-progs
18ifneq ($(hostprogs-y),$(host-progs))
19$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
20hostprogs-y += $(host-progs)
21endif
22endif
23
24# Do not include host rules unles needed
25ifneq ($(hostprogs-y)$(hostprogs-m),)
26include scripts/Makefile.host
27endif
28
29ifneq ($(KBUILD_SRC),)
30# Create output directory if not already present
31_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
32
33# Create directories for object files if directory does not exist
34# Needed when obj-y := dir/file.o syntax is used
35_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
36endif
37
38
39ifdef EXTRA_TARGETS
40$(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
41endif
42
43ifdef build-targets
44$(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
45endif
46
47ifdef export-objs
48$(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
49endif
50
51ifdef O_TARGET
52$(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
53endif
54
55ifdef L_TARGET
56$(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
57endif
58
59ifdef list-multi
60$(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
61endif
62
63ifndef obj
64$(warning kbuild: Makefile.build is included improperly)
65endif
66
67# ===========================================================================
68
69ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
70lib-target := $(obj)/lib.a
71endif
72
73ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
74builtin-target := $(obj)/built-in.o
75endif
76
77# We keep a list of all modules in $(MODVERDIR)
78
79__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
80	 $(if $(KBUILD_MODULES),$(obj-m)) \
81	 $(subdir-ym) $(always)
82	@:
83
84# Linus' kernel sanity checking tool
85ifneq ($(KBUILD_CHECKSRC),0)
86  ifeq ($(KBUILD_CHECKSRC),2)
87    quiet_cmd_force_checksrc = CHECK   $<
88          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
89  else
90      quiet_cmd_checksrc     = CHECK   $<
91            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
92  endif
93endif
94
95
96# Compile C sources (.c)
97# ---------------------------------------------------------------------------
98
99# Default is built-in, unless we know otherwise
100modkern_cflags := $(CFLAGS_KERNEL)
101quiet_modtag := $(empty)   $(empty)
102
103$(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
104$(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
105$(real-objs-m:.o=.s)  : modkern_cflags := $(CFLAGS_MODULE)
106$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
107
108$(real-objs-m)        : quiet_modtag := [M]
109$(real-objs-m:.o=.i)  : quiet_modtag := [M]
110$(real-objs-m:.o=.s)  : quiet_modtag := [M]
111$(real-objs-m:.o=.lst): quiet_modtag := [M]
112
113$(obj-m)              : quiet_modtag := [M]
114
115# Default for not multi-part modules
116modname = $(*F)
117
118$(multi-objs-m)         : modname = $(modname-multi)
119$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
120$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
121$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
122$(multi-objs-y)         : modname = $(modname-multi)
123$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
124$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
125$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
126
127quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
128cmd_cc_s_c       = $(CC) $(c_flags) -S -o $@ $<
129
130%.s: %.c FORCE
131	$(call if_changed_dep,cc_s_c)
132
133quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
134cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
135
136%.i: %.c FORCE
137	$(call if_changed_dep,cc_i_c)
138
139# C (.c) files
140# The C file is compiled and updated dependency information is generated.
141# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
142
143quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
144
145ifndef CONFIG_MODVERSIONS
146cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
147
148else
149# When module versioning is enabled the following steps are executed:
150# o compile a .tmp_<file>.o from <file>.c
151# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
152#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
153#   are done.
154# o otherwise, we calculate symbol versions using the good old
155#   genksyms on the preprocessed source and postprocess them in a way
156#   that they are usable as a linker script
157# o generate <file>.o from .tmp_<file>.o using the linker to
158#   replace the unresolved symbols __crc_exported_symbol with
159#   the actual value of the checksum generated by genksyms
160
161cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
162cmd_modversions =							\
163	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then	\
164		$(CPP) -D__GENKSYMS__ $(c_flags) $<			\
165		| $(GENKSYMS)						\
166		> $(@D)/.tmp_$(@F:.o=.ver);				\
167									\
168		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 		\
169			-T $(@D)/.tmp_$(@F:.o=.ver);			\
170		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);	\
171	else								\
172		mv $(@D)/.tmp_$(@F) $@;					\
173	fi;
174endif
175
176define rule_cc_o_c
177	$(if $($(quiet)cmd_checksrc),echo '  $($(quiet)cmd_checksrc)';)   \
178	$(cmd_checksrc)							  \
179	$(if $($(quiet)cmd_cc_o_c),echo '  $($(quiet)cmd_cc_o_c)';)	  \
180	$(cmd_cc_o_c);							  \
181	$(cmd_modversions)						  \
182	scripts/basic/fixdep $(depfile) $@ '$(cmd_cc_o_c)' > $(@D)/.$(@F).tmp;  \
183	rm -f $(depfile);						  \
184	mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
185endef
186
187# Built-in and composite module parts
188
189%.o: %.c FORCE
190	$(call cmd,force_checksrc)
191	$(call if_changed_rule,cc_o_c)
192
193# Single-part modules are special since we need to mark them in $(MODVERDIR)
194
195$(single-used-m): %.o: %.c FORCE
196	$(call cmd,force_checksrc)
197	$(call if_changed_rule,cc_o_c)
198	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
199
200quiet_cmd_cc_lst_c = MKLST   $@
201      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
202		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
203				     System.map $(OBJDUMP) > $@
204
205%.lst: %.c FORCE
206	$(call if_changed_dep,cc_lst_c)
207
208# Compile assembler sources (.S)
209# ---------------------------------------------------------------------------
210
211modkern_aflags := $(AFLAGS_KERNEL)
212
213$(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
214$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
215
216quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
217cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
218
219%.s: %.S FORCE
220	$(call if_changed_dep,as_s_S)
221
222quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
223cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
224
225%.o: %.S FORCE
226	$(call if_changed_dep,as_o_S)
227
228targets += $(real-objs-y) $(real-objs-m) $(lib-y)
229targets += $(extra-y) $(MAKECMDGOALS) $(always)
230
231# Linker scripts preprocessor (.lds.S -> .lds)
232# ---------------------------------------------------------------------------
233quiet_cmd_cpp_lds_S = LDS     $@
234      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
235
236%.lds: %.lds.S FORCE
237	$(call if_changed_dep,cpp_lds_S)
238
239# Build the compiled-in targets
240# ---------------------------------------------------------------------------
241
242# To build objects in subdirs, we need to descend into the directories
243$(sort $(subdir-obj-y)): $(subdir-ym) ;
244
245#
246# Rule to compile a set of .o files into one .o file
247#
248ifdef builtin-target
249quiet_cmd_link_o_target = LD      $@
250# If the list of objects to link is empty, just create an empty built-in.o
251cmd_link_o_target = $(if $(strip $(obj-y)),\
252		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
253		      rm -f $@; $(AR) rcs $@)
254
255$(builtin-target): $(obj-y) FORCE
256	$(call if_changed,link_o_target)
257
258targets += $(builtin-target)
259endif # builtin-target
260
261#
262# Rule to compile a set of .o files into one .a file
263#
264ifdef lib-target
265quiet_cmd_link_l_target = AR      $@
266cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
267
268$(lib-target): $(lib-y) FORCE
269	$(call if_changed,link_l_target)
270
271targets += $(lib-target)
272endif
273
274#
275# Rule to link composite objects
276#
277#  Composite objects are specified in kbuild makefile as follows:
278#    <composite-object>-objs := <list of .o files>
279#  or
280#    <composite-object>-y    := <list of .o files>
281link_multi_deps =                     \
282$(filter $(addprefix $(obj)/,         \
283$($(subst $(obj)/,,$(@:.o=-objs)))    \
284$($(subst $(obj)/,,$(@:.o=-y)))), $^)
285
286quiet_cmd_link_multi-y = LD      $@
287cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
288
289quiet_cmd_link_multi-m = LD [M]  $@
290cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
291
292# We would rather have a list of rules like
293# 	foo.o: $(foo-objs)
294# but that's not so easy, so we rather make all composite objects depend
295# on the set of all their parts
296$(multi-used-y) : %.o: $(multi-objs-y) FORCE
297	$(call if_changed,link_multi-y)
298
299$(multi-used-m) : %.o: $(multi-objs-m) FORCE
300	$(call if_changed,link_multi-m)
301	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
302
303targets += $(multi-used-y) $(multi-used-m)
304
305
306# Descending
307# ---------------------------------------------------------------------------
308
309.PHONY: $(subdir-ym)
310$(subdir-ym):
311	$(Q)$(MAKE) $(build)=$@
312
313# Add FORCE to the prequisites of a target to force it to be always rebuilt.
314# ---------------------------------------------------------------------------
315
316.PHONY: FORCE
317
318FORCE:
319
320# Read all saved command lines and dependencies for the $(targets) we
321# may be building above, using $(if_changed{,_dep}). As an
322# optimization, we don't need to read them if the target does not
323# exist, we will rebuild anyway in that case.
324
325targets := $(wildcard $(sort $(targets)))
326cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
327
328ifneq ($(cmd_files),)
329  include $(cmd_files)
330endif
331