1*dd165a65SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2a8e026c7SNeilBrown /* ----------------------------------------------------------------------- * 3a8e026c7SNeilBrown * 4a8e026c7SNeilBrown * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved 5a8e026c7SNeilBrown * 6a8e026c7SNeilBrown * ----------------------------------------------------------------------- */ 7a8e026c7SNeilBrown 8a8e026c7SNeilBrown /* 9a8e026c7SNeilBrown * raid6/x86.h 10a8e026c7SNeilBrown * 11a8e026c7SNeilBrown * Definitions common to x86 and x86-64 RAID-6 code only 12a8e026c7SNeilBrown */ 13a8e026c7SNeilBrown 14a8e026c7SNeilBrown #ifndef LINUX_RAID_RAID6X86_H 15a8e026c7SNeilBrown #define LINUX_RAID_RAID6X86_H 16a8e026c7SNeilBrown 17a8e026c7SNeilBrown #if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__) 18a8e026c7SNeilBrown 19a8e026c7SNeilBrown #ifdef __KERNEL__ /* Real code */ 20a8e026c7SNeilBrown 21df6b35f4SIngo Molnar #include <asm/fpu/api.h> 22a8e026c7SNeilBrown 23a8e026c7SNeilBrown #else /* Dummy code for user space testing */ 24a8e026c7SNeilBrown kernel_fpu_begin(void)25a8e026c7SNeilBrownstatic inline void kernel_fpu_begin(void) 26a8e026c7SNeilBrown { 27a8e026c7SNeilBrown } 28a8e026c7SNeilBrown kernel_fpu_end(void)29a8e026c7SNeilBrownstatic inline void kernel_fpu_end(void) 30a8e026c7SNeilBrown { 31a8e026c7SNeilBrown } 32a8e026c7SNeilBrown 332dbf7084SJim Kukunas #define __aligned(x) __attribute__((aligned(x))) 342dbf7084SJim Kukunas 35a8e026c7SNeilBrown #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ 36a8e026c7SNeilBrown #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions 37a8e026c7SNeilBrown * (fast save and restore) */ 38a8e026c7SNeilBrown #define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */ 39a8e026c7SNeilBrown #define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */ 402dbf7084SJim Kukunas #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ 412dbf7084SJim Kukunas #define X86_FEATURE_SSSE3 (4*32+ 9) /* Supplemental SSE-3 */ 422dbf7084SJim Kukunas #define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */ 437056741fSJim Kukunas #define X86_FEATURE_AVX2 (9*32+ 5) /* AVX2 instructions */ 44e0a491c1SGayatri Kammela #define X86_FEATURE_AVX512F (9*32+16) /* AVX-512 Foundation */ 45e0a491c1SGayatri Kammela #define X86_FEATURE_AVX512DQ (9*32+17) /* AVX-512 DQ (Double/Quad granular) 46e0a491c1SGayatri Kammela * Instructions 47e0a491c1SGayatri Kammela */ 48e0a491c1SGayatri Kammela #define X86_FEATURE_AVX512BW (9*32+30) /* AVX-512 BW (Byte/Word granular) 49e0a491c1SGayatri Kammela * Instructions 50e0a491c1SGayatri Kammela */ 51e0a491c1SGayatri Kammela #define X86_FEATURE_AVX512VL (9*32+31) /* AVX-512 VL (128/256 Vector Length) 52e0a491c1SGayatri Kammela * Extensions 53e0a491c1SGayatri Kammela */ 54a8e026c7SNeilBrown #define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */ 55a8e026c7SNeilBrown 56a8e026c7SNeilBrown /* Should work well enough on modern CPUs for testing */ boot_cpu_has(int flag)57a8e026c7SNeilBrownstatic inline int boot_cpu_has(int flag) 58a8e026c7SNeilBrown { 597056741fSJim Kukunas u32 eax, ebx, ecx, edx; 607056741fSJim Kukunas 617056741fSJim Kukunas eax = (flag & 0x100) ? 7 : 627056741fSJim Kukunas (flag & 0x20) ? 0x80000001 : 1; 637056741fSJim Kukunas ecx = 0; 64a8e026c7SNeilBrown 65a8e026c7SNeilBrown asm volatile("cpuid" 667056741fSJim Kukunas : "+a" (eax), "=b" (ebx), "=d" (edx), "+c" (ecx)); 67a8e026c7SNeilBrown 687056741fSJim Kukunas return ((flag & 0x100 ? ebx : 697056741fSJim Kukunas (flag & 0x80) ? ecx : edx) >> (flag & 31)) & 1; 70a8e026c7SNeilBrown } 71a8e026c7SNeilBrown 72a8e026c7SNeilBrown #endif /* ndef __KERNEL__ */ 73a8e026c7SNeilBrown 74a8e026c7SNeilBrown #endif 75a8e026c7SNeilBrown #endif 76