1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * arch-independent dma-mapping routines 4 * 5 * Copyright (c) 2006 SUSE Linux Products GmbH 6 * Copyright (c) 2006 Tejun Heo <teheo@suse.de> 7 */ 8 #include <linux/memblock.h> /* for max_pfn */ 9 #include <linux/acpi.h> 10 #include <linux/dma-noncoherent.h> 11 #include <linux/export.h> 12 #include <linux/gfp.h> 13 #include <linux/of_device.h> 14 #include <linux/slab.h> 15 #include <linux/vmalloc.h> 16 17 /* 18 * Managed DMA API 19 */ 20 struct dma_devres { 21 size_t size; 22 void *vaddr; 23 dma_addr_t dma_handle; 24 unsigned long attrs; 25 }; 26 27 static void dmam_release(struct device *dev, void *res) 28 { 29 struct dma_devres *this = res; 30 31 dma_free_attrs(dev, this->size, this->vaddr, this->dma_handle, 32 this->attrs); 33 } 34 35 static int dmam_match(struct device *dev, void *res, void *match_data) 36 { 37 struct dma_devres *this = res, *match = match_data; 38 39 if (this->vaddr == match->vaddr) { 40 WARN_ON(this->size != match->size || 41 this->dma_handle != match->dma_handle); 42 return 1; 43 } 44 return 0; 45 } 46 47 /** 48 * dmam_alloc_coherent - Managed dma_alloc_coherent() 49 * @dev: Device to allocate coherent memory for 50 * @size: Size of allocation 51 * @dma_handle: Out argument for allocated DMA handle 52 * @gfp: Allocation flags 53 * 54 * Managed dma_alloc_coherent(). Memory allocated using this function 55 * will be automatically released on driver detach. 56 * 57 * RETURNS: 58 * Pointer to allocated memory on success, NULL on failure. 59 */ 60 void *dmam_alloc_coherent(struct device *dev, size_t size, 61 dma_addr_t *dma_handle, gfp_t gfp) 62 { 63 struct dma_devres *dr; 64 void *vaddr; 65 66 dr = devres_alloc(dmam_release, sizeof(*dr), gfp); 67 if (!dr) 68 return NULL; 69 70 vaddr = dma_alloc_coherent(dev, size, dma_handle, gfp); 71 if (!vaddr) { 72 devres_free(dr); 73 return NULL; 74 } 75 76 dr->vaddr = vaddr; 77 dr->dma_handle = *dma_handle; 78 dr->size = size; 79 80 devres_add(dev, dr); 81 82 return vaddr; 83 } 84 EXPORT_SYMBOL(dmam_alloc_coherent); 85 86 /** 87 * dmam_free_coherent - Managed dma_free_coherent() 88 * @dev: Device to free coherent memory for 89 * @size: Size of allocation 90 * @vaddr: Virtual address of the memory to free 91 * @dma_handle: DMA handle of the memory to free 92 * 93 * Managed dma_free_coherent(). 94 */ 95 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 96 dma_addr_t dma_handle) 97 { 98 struct dma_devres match_data = { size, vaddr, dma_handle }; 99 100 dma_free_coherent(dev, size, vaddr, dma_handle); 101 WARN_ON(devres_destroy(dev, dmam_release, dmam_match, &match_data)); 102 } 103 EXPORT_SYMBOL(dmam_free_coherent); 104 105 /** 106 * dmam_alloc_attrs - Managed dma_alloc_attrs() 107 * @dev: Device to allocate non_coherent memory for 108 * @size: Size of allocation 109 * @dma_handle: Out argument for allocated DMA handle 110 * @gfp: Allocation flags 111 * @attrs: Flags in the DMA_ATTR_* namespace. 112 * 113 * Managed dma_alloc_attrs(). Memory allocated using this function will be 114 * automatically released on driver detach. 115 * 116 * RETURNS: 117 * Pointer to allocated memory on success, NULL on failure. 118 */ 119 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 120 gfp_t gfp, unsigned long attrs) 121 { 122 struct dma_devres *dr; 123 void *vaddr; 124 125 dr = devres_alloc(dmam_release, sizeof(*dr), gfp); 126 if (!dr) 127 return NULL; 128 129 vaddr = dma_alloc_attrs(dev, size, dma_handle, gfp, attrs); 130 if (!vaddr) { 131 devres_free(dr); 132 return NULL; 133 } 134 135 dr->vaddr = vaddr; 136 dr->dma_handle = *dma_handle; 137 dr->size = size; 138 dr->attrs = attrs; 139 140 devres_add(dev, dr); 141 142 return vaddr; 143 } 144 EXPORT_SYMBOL(dmam_alloc_attrs); 145 146 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT 147 148 static void dmam_coherent_decl_release(struct device *dev, void *res) 149 { 150 dma_release_declared_memory(dev); 151 } 152 153 /** 154 * dmam_declare_coherent_memory - Managed dma_declare_coherent_memory() 155 * @dev: Device to declare coherent memory for 156 * @phys_addr: Physical address of coherent memory to be declared 157 * @device_addr: Device address of coherent memory to be declared 158 * @size: Size of coherent memory to be declared 159 * @flags: Flags 160 * 161 * Managed dma_declare_coherent_memory(). 162 * 163 * RETURNS: 164 * 0 on success, -errno on failure. 165 */ 166 int dmam_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, 167 dma_addr_t device_addr, size_t size, int flags) 168 { 169 void *res; 170 int rc; 171 172 res = devres_alloc(dmam_coherent_decl_release, 0, GFP_KERNEL); 173 if (!res) 174 return -ENOMEM; 175 176 rc = dma_declare_coherent_memory(dev, phys_addr, device_addr, size, 177 flags); 178 if (!rc) 179 devres_add(dev, res); 180 else 181 devres_free(res); 182 183 return rc; 184 } 185 EXPORT_SYMBOL(dmam_declare_coherent_memory); 186 187 /** 188 * dmam_release_declared_memory - Managed dma_release_declared_memory(). 189 * @dev: Device to release declared coherent memory for 190 * 191 * Managed dmam_release_declared_memory(). 192 */ 193 void dmam_release_declared_memory(struct device *dev) 194 { 195 WARN_ON(devres_destroy(dev, dmam_coherent_decl_release, NULL, NULL)); 196 } 197 EXPORT_SYMBOL(dmam_release_declared_memory); 198 199 #endif 200 201 /* 202 * Create scatter-list for the already allocated DMA buffer. 203 */ 204 int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, 205 void *cpu_addr, dma_addr_t dma_addr, size_t size, 206 unsigned long attrs) 207 { 208 struct page *page; 209 int ret; 210 211 if (!dev_is_dma_coherent(dev)) { 212 if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN)) 213 return -ENXIO; 214 215 page = pfn_to_page(arch_dma_coherent_to_pfn(dev, cpu_addr, 216 dma_addr)); 217 } else { 218 page = virt_to_page(cpu_addr); 219 } 220 221 ret = sg_alloc_table(sgt, 1, GFP_KERNEL); 222 if (!ret) 223 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0); 224 return ret; 225 } 226 227 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, 228 void *cpu_addr, dma_addr_t dma_addr, size_t size, 229 unsigned long attrs) 230 { 231 const struct dma_map_ops *ops = get_dma_ops(dev); 232 BUG_ON(!ops); 233 if (ops->get_sgtable) 234 return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, 235 attrs); 236 return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size, 237 attrs); 238 } 239 EXPORT_SYMBOL(dma_get_sgtable_attrs); 240 241 /* 242 * Create userspace mapping for the DMA-coherent memory. 243 */ 244 int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, 245 void *cpu_addr, dma_addr_t dma_addr, size_t size, 246 unsigned long attrs) 247 { 248 #ifndef CONFIG_ARCH_NO_COHERENT_DMA_MMAP 249 unsigned long user_count = vma_pages(vma); 250 unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT; 251 unsigned long off = vma->vm_pgoff; 252 unsigned long pfn; 253 int ret = -ENXIO; 254 255 vma->vm_page_prot = arch_dma_mmap_pgprot(dev, vma->vm_page_prot, attrs); 256 257 if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret)) 258 return ret; 259 260 if (off >= count || user_count > count - off) 261 return -ENXIO; 262 263 if (!dev_is_dma_coherent(dev)) { 264 if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN)) 265 return -ENXIO; 266 pfn = arch_dma_coherent_to_pfn(dev, cpu_addr, dma_addr); 267 } else { 268 pfn = page_to_pfn(virt_to_page(cpu_addr)); 269 } 270 271 return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff, 272 user_count << PAGE_SHIFT, vma->vm_page_prot); 273 #else 274 return -ENXIO; 275 #endif /* !CONFIG_ARCH_NO_COHERENT_DMA_MMAP */ 276 } 277 278 /** 279 * dma_mmap_attrs - map a coherent DMA allocation into user space 280 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices 281 * @vma: vm_area_struct describing requested user mapping 282 * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs 283 * @dma_addr: device-view address returned from dma_alloc_attrs 284 * @size: size of memory originally requested in dma_alloc_attrs 285 * @attrs: attributes of mapping properties requested in dma_alloc_attrs 286 * 287 * Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user 288 * space. The coherent DMA buffer must not be freed by the driver until the 289 * user space mapping has been released. 290 */ 291 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 292 void *cpu_addr, dma_addr_t dma_addr, size_t size, 293 unsigned long attrs) 294 { 295 const struct dma_map_ops *ops = get_dma_ops(dev); 296 BUG_ON(!ops); 297 if (ops->mmap) 298 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); 299 return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs); 300 } 301 EXPORT_SYMBOL(dma_mmap_attrs); 302 303 #ifndef ARCH_HAS_DMA_GET_REQUIRED_MASK 304 static u64 dma_default_get_required_mask(struct device *dev) 305 { 306 u32 low_totalram = ((max_pfn - 1) << PAGE_SHIFT); 307 u32 high_totalram = ((max_pfn - 1) >> (32 - PAGE_SHIFT)); 308 u64 mask; 309 310 if (!high_totalram) { 311 /* convert to mask just covering totalram */ 312 low_totalram = (1 << (fls(low_totalram) - 1)); 313 low_totalram += low_totalram - 1; 314 mask = low_totalram; 315 } else { 316 high_totalram = (1 << (fls(high_totalram) - 1)); 317 high_totalram += high_totalram - 1; 318 mask = (((u64)high_totalram) << 32) + 0xffffffff; 319 } 320 return mask; 321 } 322 323 u64 dma_get_required_mask(struct device *dev) 324 { 325 const struct dma_map_ops *ops = get_dma_ops(dev); 326 327 if (ops->get_required_mask) 328 return ops->get_required_mask(dev); 329 return dma_default_get_required_mask(dev); 330 } 331 EXPORT_SYMBOL_GPL(dma_get_required_mask); 332 #endif 333 334 #ifndef arch_dma_alloc_attrs 335 #define arch_dma_alloc_attrs(dev) (true) 336 #endif 337 338 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 339 gfp_t flag, unsigned long attrs) 340 { 341 const struct dma_map_ops *ops = get_dma_ops(dev); 342 void *cpu_addr; 343 344 BUG_ON(!ops); 345 WARN_ON_ONCE(dev && !dev->coherent_dma_mask); 346 347 if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr)) 348 return cpu_addr; 349 350 /* let the implementation decide on the zone to allocate from: */ 351 flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); 352 353 if (!arch_dma_alloc_attrs(&dev)) 354 return NULL; 355 if (!ops->alloc) 356 return NULL; 357 358 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); 359 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); 360 return cpu_addr; 361 } 362 EXPORT_SYMBOL(dma_alloc_attrs); 363 364 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 365 dma_addr_t dma_handle, unsigned long attrs) 366 { 367 const struct dma_map_ops *ops = get_dma_ops(dev); 368 369 BUG_ON(!ops); 370 371 if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr)) 372 return; 373 /* 374 * On non-coherent platforms which implement DMA-coherent buffers via 375 * non-cacheable remaps, ops->free() may call vunmap(). Thus getting 376 * this far in IRQ context is a) at risk of a BUG_ON() or trying to 377 * sleep on some machines, and b) an indication that the driver is 378 * probably misusing the coherent API anyway. 379 */ 380 WARN_ON(irqs_disabled()); 381 382 if (!ops->free || !cpu_addr) 383 return; 384 385 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); 386 ops->free(dev, size, cpu_addr, dma_handle, attrs); 387 } 388 EXPORT_SYMBOL(dma_free_attrs); 389 390 static inline void dma_check_mask(struct device *dev, u64 mask) 391 { 392 if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1))) 393 dev_warn(dev, "SME is active, device will require DMA bounce buffers\n"); 394 } 395 396 int dma_supported(struct device *dev, u64 mask) 397 { 398 const struct dma_map_ops *ops = get_dma_ops(dev); 399 400 if (!ops) 401 return 0; 402 if (!ops->dma_supported) 403 return 1; 404 return ops->dma_supported(dev, mask); 405 } 406 EXPORT_SYMBOL(dma_supported); 407 408 #ifndef HAVE_ARCH_DMA_SET_MASK 409 int dma_set_mask(struct device *dev, u64 mask) 410 { 411 if (!dev->dma_mask || !dma_supported(dev, mask)) 412 return -EIO; 413 414 dma_check_mask(dev, mask); 415 *dev->dma_mask = mask; 416 return 0; 417 } 418 EXPORT_SYMBOL(dma_set_mask); 419 #endif 420 421 #ifndef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK 422 int dma_set_coherent_mask(struct device *dev, u64 mask) 423 { 424 if (!dma_supported(dev, mask)) 425 return -EIO; 426 427 dma_check_mask(dev, mask); 428 dev->coherent_dma_mask = mask; 429 return 0; 430 } 431 EXPORT_SYMBOL(dma_set_coherent_mask); 432 #endif 433