xref: /openbmc/linux/include/uapi/linux/dma-buf.h (revision 51f52547df700819db0d0e2b17b677cb209212b4)
1e2be04c7SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2c11e391dSDaniel Vetter /*
3c11e391dSDaniel Vetter  * Framework for buffer objects that can be shared across devices/subsystems.
4c11e391dSDaniel Vetter  *
5c11e391dSDaniel Vetter  * Copyright(C) 2015 Intel Ltd
6c11e391dSDaniel Vetter  *
7c11e391dSDaniel Vetter  * This program is free software; you can redistribute it and/or modify it
8c11e391dSDaniel Vetter  * under the terms of the GNU General Public License version 2 as published by
9c11e391dSDaniel Vetter  * the Free Software Foundation.
10c11e391dSDaniel Vetter  *
11c11e391dSDaniel Vetter  * This program is distributed in the hope that it will be useful, but WITHOUT
12c11e391dSDaniel Vetter  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13c11e391dSDaniel Vetter  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14c11e391dSDaniel Vetter  * more details.
15c11e391dSDaniel Vetter  *
16c11e391dSDaniel Vetter  * You should have received a copy of the GNU General Public License along with
17c11e391dSDaniel Vetter  * this program.  If not, see <http://www.gnu.org/licenses/>.
18c11e391dSDaniel Vetter  */
19c11e391dSDaniel Vetter 
20c11e391dSDaniel Vetter #ifndef _DMA_BUF_UAPI_H_
21c11e391dSDaniel Vetter #define _DMA_BUF_UAPI_H_
22c11e391dSDaniel Vetter 
23c11e391dSDaniel Vetter #include <linux/types.h>
24c11e391dSDaniel Vetter 
25*51f52547SJason Ekstrand /**
26*51f52547SJason Ekstrand  * struct dma_buf_sync - Synchronize with CPU access.
27*51f52547SJason Ekstrand  *
28*51f52547SJason Ekstrand  * When a DMA buffer is accessed from the CPU via mmap, it is not always
29*51f52547SJason Ekstrand  * possible to guarantee coherency between the CPU-visible map and underlying
30*51f52547SJason Ekstrand  * memory.  To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
31*51f52547SJason Ekstrand  * any CPU access to give the kernel the chance to shuffle memory around if
32*51f52547SJason Ekstrand  * needed.
33*51f52547SJason Ekstrand  *
34*51f52547SJason Ekstrand  * Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
35*51f52547SJason Ekstrand  * with DMA_BUF_SYNC_START and the appropriate read/write flags.  Once the
36*51f52547SJason Ekstrand  * access is complete, the client should call DMA_BUF_IOCTL_SYNC with
37*51f52547SJason Ekstrand  * DMA_BUF_SYNC_END and the same read/write flags.
38*51f52547SJason Ekstrand  *
39*51f52547SJason Ekstrand  * The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
40*51f52547SJason Ekstrand  * coherency.  It does not prevent other processes or devices from
41*51f52547SJason Ekstrand  * accessing the memory at the same time.  If synchronization with a GPU or
42*51f52547SJason Ekstrand  * other device driver is required, it is the client's responsibility to
43*51f52547SJason Ekstrand  * wait for buffer to be ready for reading or writing before calling this
44*51f52547SJason Ekstrand  * ioctl with DMA_BUF_SYNC_START.  Likewise, the client must ensure that
45*51f52547SJason Ekstrand  * follow-up work is not submitted to GPU or other device driver until
46*51f52547SJason Ekstrand  * after this ioctl has been called with DMA_BUF_SYNC_END?
47*51f52547SJason Ekstrand  *
48*51f52547SJason Ekstrand  * If the driver or API with which the client is interacting uses implicit
49*51f52547SJason Ekstrand  * synchronization, waiting for prior work to complete can be done via
50*51f52547SJason Ekstrand  * poll() on the DMA buffer file descriptor.  If the driver or API requires
51*51f52547SJason Ekstrand  * explicit synchronization, the client may have to wait on a sync_file or
52*51f52547SJason Ekstrand  * other synchronization primitive outside the scope of the DMA buffer API.
53*51f52547SJason Ekstrand  */
54c11e391dSDaniel Vetter struct dma_buf_sync {
55*51f52547SJason Ekstrand 	/**
56*51f52547SJason Ekstrand 	 * @flags: Set of access flags
57*51f52547SJason Ekstrand 	 *
58*51f52547SJason Ekstrand 	 * DMA_BUF_SYNC_START:
59*51f52547SJason Ekstrand 	 *     Indicates the start of a map access session.
60*51f52547SJason Ekstrand 	 *
61*51f52547SJason Ekstrand 	 * DMA_BUF_SYNC_END:
62*51f52547SJason Ekstrand 	 *     Indicates the end of a map access session.
63*51f52547SJason Ekstrand 	 *
64*51f52547SJason Ekstrand 	 * DMA_BUF_SYNC_READ:
65*51f52547SJason Ekstrand 	 *     Indicates that the mapped DMA buffer will be read by the
66*51f52547SJason Ekstrand 	 *     client via the CPU map.
67*51f52547SJason Ekstrand 	 *
68*51f52547SJason Ekstrand 	 * DMA_BUF_SYNC_WRITE:
69*51f52547SJason Ekstrand 	 *     Indicates that the mapped DMA buffer will be written by the
70*51f52547SJason Ekstrand 	 *     client via the CPU map.
71*51f52547SJason Ekstrand 	 *
72*51f52547SJason Ekstrand 	 * DMA_BUF_SYNC_RW:
73*51f52547SJason Ekstrand 	 *     An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
74*51f52547SJason Ekstrand 	 */
75c11e391dSDaniel Vetter 	__u64 flags;
76c11e391dSDaniel Vetter };
77c11e391dSDaniel Vetter 
78c11e391dSDaniel Vetter #define DMA_BUF_SYNC_READ      (1 << 0)
79c11e391dSDaniel Vetter #define DMA_BUF_SYNC_WRITE     (2 << 0)
80c11e391dSDaniel Vetter #define DMA_BUF_SYNC_RW        (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
81c11e391dSDaniel Vetter #define DMA_BUF_SYNC_START     (0 << 2)
82c11e391dSDaniel Vetter #define DMA_BUF_SYNC_END       (1 << 2)
83c11e391dSDaniel Vetter #define DMA_BUF_SYNC_VALID_FLAGS_MASK \
84c11e391dSDaniel Vetter 	(DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
85c11e391dSDaniel Vetter 
86bb2bb903SGreg Hackmann #define DMA_BUF_NAME_LEN	32
87bb2bb903SGreg Hackmann 
88c11e391dSDaniel Vetter #define DMA_BUF_BASE		'b'
89c11e391dSDaniel Vetter #define DMA_BUF_IOCTL_SYNC	_IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
90a5bff92eSDaniel Vetter 
91a5bff92eSDaniel Vetter /* 32/64bitness of this uapi was botched in android, there's no difference
92a5bff92eSDaniel Vetter  * between them in actual uapi, they're just different numbers.
93a5bff92eSDaniel Vetter  */
94bb2bb903SGreg Hackmann #define DMA_BUF_SET_NAME	_IOW(DMA_BUF_BASE, 1, const char *)
95a5bff92eSDaniel Vetter #define DMA_BUF_SET_NAME_A	_IOW(DMA_BUF_BASE, 1, u32)
96a5bff92eSDaniel Vetter #define DMA_BUF_SET_NAME_B	_IOW(DMA_BUF_BASE, 1, u64)
97c11e391dSDaniel Vetter 
98c11e391dSDaniel Vetter #endif
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