xref: /openbmc/linux/include/sound/wss.h (revision 7779f75f072784d3fccf721b8ec43107f93619a0)
1*7779f75fSKrzysztof Helt #ifndef __SOUND_WSS_H
2*7779f75fSKrzysztof Helt #define __SOUND_WSS_H
361ef19d7SKrzysztof Helt 
461ef19d7SKrzysztof Helt /*
561ef19d7SKrzysztof Helt  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
661ef19d7SKrzysztof Helt  *  Definitions for CS4231 & InterWave chips & compatible chips
761ef19d7SKrzysztof Helt  *
861ef19d7SKrzysztof Helt  *
961ef19d7SKrzysztof Helt  *   This program is free software; you can redistribute it and/or modify
1061ef19d7SKrzysztof Helt  *   it under the terms of the GNU General Public License as published by
1161ef19d7SKrzysztof Helt  *   the Free Software Foundation; either version 2 of the License, or
1261ef19d7SKrzysztof Helt  *   (at your option) any later version.
1361ef19d7SKrzysztof Helt  *
1461ef19d7SKrzysztof Helt  *   This program is distributed in the hope that it will be useful,
1561ef19d7SKrzysztof Helt  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
1661ef19d7SKrzysztof Helt  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1761ef19d7SKrzysztof Helt  *   GNU General Public License for more details.
1861ef19d7SKrzysztof Helt  *
1961ef19d7SKrzysztof Helt  *   You should have received a copy of the GNU General Public License
2061ef19d7SKrzysztof Helt  *   along with this program; if not, write to the Free Software
2161ef19d7SKrzysztof Helt  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
2261ef19d7SKrzysztof Helt  *
2361ef19d7SKrzysztof Helt  */
2461ef19d7SKrzysztof Helt 
2561ef19d7SKrzysztof Helt #include "control.h"
2661ef19d7SKrzysztof Helt #include "pcm.h"
2761ef19d7SKrzysztof Helt #include "timer.h"
2861ef19d7SKrzysztof Helt 
2961ef19d7SKrzysztof Helt #include "cs4231-regs.h"
3061ef19d7SKrzysztof Helt 
3161ef19d7SKrzysztof Helt /* defines for codec.mode */
3261ef19d7SKrzysztof Helt 
33*7779f75fSKrzysztof Helt #define WSS_MODE_NONE	0x0000
34*7779f75fSKrzysztof Helt #define WSS_MODE_PLAY	0x0001
35*7779f75fSKrzysztof Helt #define WSS_MODE_RECORD	0x0002
36*7779f75fSKrzysztof Helt #define WSS_MODE_TIMER	0x0004
37*7779f75fSKrzysztof Helt #define WSS_MODE_OPEN	(WSS_MODE_PLAY|WSS_MODE_RECORD|WSS_MODE_TIMER)
3861ef19d7SKrzysztof Helt 
3961ef19d7SKrzysztof Helt /* defines for codec.hardware */
4061ef19d7SKrzysztof Helt 
41*7779f75fSKrzysztof Helt #define WSS_HW_DETECT        0x0000	/* let CS4231 driver detect chip */
42*7779f75fSKrzysztof Helt #define WSS_HW_DETECT3	0x0001	/* allow mode 3 */
43*7779f75fSKrzysztof Helt #define WSS_HW_TYPE_MASK	0xff00	/* type mask */
44*7779f75fSKrzysztof Helt #define WSS_HW_CS4231_MASK   0x0100	/* CS4231 serie */
45*7779f75fSKrzysztof Helt #define WSS_HW_CS4231        0x0100	/* CS4231 chip */
46*7779f75fSKrzysztof Helt #define WSS_HW_CS4231A       0x0101	/* CS4231A chip */
47*7779f75fSKrzysztof Helt #define WSS_HW_AD1845	0x0102	/* AD1845 chip */
48*7779f75fSKrzysztof Helt #define WSS_HW_CS4232_MASK   0x0200	/* CS4232 serie (has control ports) */
49*7779f75fSKrzysztof Helt #define WSS_HW_CS4232        0x0200	/* CS4232 */
50*7779f75fSKrzysztof Helt #define WSS_HW_CS4232A       0x0201	/* CS4232A */
51*7779f75fSKrzysztof Helt #define WSS_HW_CS4236	0x0202	/* CS4236 */
52*7779f75fSKrzysztof Helt #define WSS_HW_CS4236B_MASK	0x0400	/* CS4236B serie (has extended control regs) */
53*7779f75fSKrzysztof Helt #define WSS_HW_CS4235	0x0400	/* CS4235 - Crystal Clear (tm) stereo enhancement */
54*7779f75fSKrzysztof Helt #define WSS_HW_CS4236B       0x0401	/* CS4236B */
55*7779f75fSKrzysztof Helt #define WSS_HW_CS4237B       0x0402	/* CS4237B - SRS 3D */
56*7779f75fSKrzysztof Helt #define WSS_HW_CS4238B	0x0403	/* CS4238B - QSOUND 3D */
57*7779f75fSKrzysztof Helt #define WSS_HW_CS4239	0x0404	/* CS4239 - Crystal Clear (tm) stereo enhancement */
5861ef19d7SKrzysztof Helt /* compatible, but clones */
59*7779f75fSKrzysztof Helt #define WSS_HW_INTERWAVE     0x1000	/* InterWave chip */
60*7779f75fSKrzysztof Helt #define WSS_HW_OPL3SA2       0x1101	/* OPL3-SA2 chip, similar to cs4231 */
61*7779f75fSKrzysztof Helt #define WSS_HW_OPTI93X 	0x1102	/* Opti 930/931/933 */
6261ef19d7SKrzysztof Helt 
6361ef19d7SKrzysztof Helt /* defines for codec.hwshare */
64*7779f75fSKrzysztof Helt #define WSS_HWSHARE_IRQ	(1<<0)
65*7779f75fSKrzysztof Helt #define WSS_HWSHARE_DMA1	(1<<1)
66*7779f75fSKrzysztof Helt #define WSS_HWSHARE_DMA2	(1<<2)
6761ef19d7SKrzysztof Helt 
68*7779f75fSKrzysztof Helt struct snd_wss {
6961ef19d7SKrzysztof Helt 	unsigned long port;		/* base i/o port */
7061ef19d7SKrzysztof Helt 	struct resource *res_port;
7161ef19d7SKrzysztof Helt 	unsigned long cport;		/* control base i/o port (CS4236) */
7261ef19d7SKrzysztof Helt 	struct resource *res_cport;
7361ef19d7SKrzysztof Helt 	int irq;			/* IRQ line */
7461ef19d7SKrzysztof Helt 	int dma1;			/* playback DMA */
7561ef19d7SKrzysztof Helt 	int dma2;			/* record DMA */
7661ef19d7SKrzysztof Helt 	unsigned short version;		/* version of CODEC chip */
77*7779f75fSKrzysztof Helt 	unsigned short mode;		/* see to WSS_MODE_XXXX */
78*7779f75fSKrzysztof Helt 	unsigned short hardware;	/* see to WSS_HW_XXXX */
7961ef19d7SKrzysztof Helt 	unsigned short hwshare;		/* shared resources */
8061ef19d7SKrzysztof Helt 	unsigned short single_dma:1,	/* forced single DMA mode (GUS 16-bit daughter board) or dma1 == dma2 */
8161ef19d7SKrzysztof Helt 		       ebus_flag:1;	/* SPARC: EBUS present */
8261ef19d7SKrzysztof Helt 
8361ef19d7SKrzysztof Helt 	struct snd_card *card;
8461ef19d7SKrzysztof Helt 	struct snd_pcm *pcm;
8561ef19d7SKrzysztof Helt 	struct snd_pcm_substream *playback_substream;
8661ef19d7SKrzysztof Helt 	struct snd_pcm_substream *capture_substream;
8761ef19d7SKrzysztof Helt 	struct snd_timer *timer;
8861ef19d7SKrzysztof Helt 
8961ef19d7SKrzysztof Helt 	unsigned char image[32];	/* registers image */
9061ef19d7SKrzysztof Helt 	unsigned char eimage[32];	/* extended registers image */
9161ef19d7SKrzysztof Helt 	unsigned char cimage[16];	/* control registers image */
9261ef19d7SKrzysztof Helt 	int mce_bit;
9361ef19d7SKrzysztof Helt 	int calibrate_mute;
9461ef19d7SKrzysztof Helt 	int sw_3d_bit;
9561ef19d7SKrzysztof Helt 	unsigned int p_dma_size;
9661ef19d7SKrzysztof Helt 	unsigned int c_dma_size;
9761ef19d7SKrzysztof Helt 
9861ef19d7SKrzysztof Helt 	spinlock_t reg_lock;
9961ef19d7SKrzysztof Helt 	struct mutex mce_mutex;
10061ef19d7SKrzysztof Helt 	struct mutex open_mutex;
10161ef19d7SKrzysztof Helt 
10261ef19d7SKrzysztof Helt 	int (*rate_constraint) (struct snd_pcm_runtime *runtime);
103*7779f75fSKrzysztof Helt 	void (*set_playback_format) (struct snd_wss *chip,
104*7779f75fSKrzysztof Helt 				     struct snd_pcm_hw_params *hw_params,
105*7779f75fSKrzysztof Helt 				     unsigned char pdfr);
106*7779f75fSKrzysztof Helt 	void (*set_capture_format) (struct snd_wss *chip,
107*7779f75fSKrzysztof Helt 				    struct snd_pcm_hw_params *hw_params,
108*7779f75fSKrzysztof Helt 				    unsigned char cdfr);
109*7779f75fSKrzysztof Helt 	void (*trigger) (struct snd_wss *chip, unsigned int what, int start);
11061ef19d7SKrzysztof Helt #ifdef CONFIG_PM
111*7779f75fSKrzysztof Helt 	void (*suspend) (struct snd_wss *chip);
112*7779f75fSKrzysztof Helt 	void (*resume) (struct snd_wss *chip);
11361ef19d7SKrzysztof Helt #endif
11461ef19d7SKrzysztof Helt 	void *dma_private_data;
115*7779f75fSKrzysztof Helt 	int (*claim_dma) (struct snd_wss *chip,
116*7779f75fSKrzysztof Helt 			  void *dma_private_data, int dma);
117*7779f75fSKrzysztof Helt 	int (*release_dma) (struct snd_wss *chip,
118*7779f75fSKrzysztof Helt 			    void *dma_private_data, int dma);
11961ef19d7SKrzysztof Helt };
12061ef19d7SKrzysztof Helt 
12161ef19d7SKrzysztof Helt /* exported functions */
12261ef19d7SKrzysztof Helt 
123*7779f75fSKrzysztof Helt void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char val);
124*7779f75fSKrzysztof Helt unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg);
125*7779f75fSKrzysztof Helt void snd_cs4236_ext_out(struct snd_wss *chip,
126*7779f75fSKrzysztof Helt 			unsigned char reg, unsigned char val);
127*7779f75fSKrzysztof Helt unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg);
128*7779f75fSKrzysztof Helt void snd_wss_mce_up(struct snd_wss *chip);
129*7779f75fSKrzysztof Helt void snd_wss_mce_down(struct snd_wss *chip);
13061ef19d7SKrzysztof Helt 
131*7779f75fSKrzysztof Helt void snd_wss_overrange(struct snd_wss *chip);
13261ef19d7SKrzysztof Helt 
133*7779f75fSKrzysztof Helt irqreturn_t snd_wss_interrupt(int irq, void *dev_id);
13461ef19d7SKrzysztof Helt 
135*7779f75fSKrzysztof Helt const char *snd_wss_chip_id(struct snd_wss *chip);
13661ef19d7SKrzysztof Helt 
137*7779f75fSKrzysztof Helt int snd_wss_create(struct snd_card *card,
13861ef19d7SKrzysztof Helt 		      unsigned long port,
13961ef19d7SKrzysztof Helt 		      unsigned long cport,
14061ef19d7SKrzysztof Helt 		      int irq, int dma1, int dma2,
14161ef19d7SKrzysztof Helt 		      unsigned short hardware,
14261ef19d7SKrzysztof Helt 		      unsigned short hwshare,
143*7779f75fSKrzysztof Helt 		      struct snd_wss **rchip);
144*7779f75fSKrzysztof Helt int snd_wss_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
145*7779f75fSKrzysztof Helt int snd_wss_timer(struct snd_wss *chip, int device, struct snd_timer **rtimer);
146*7779f75fSKrzysztof Helt int snd_wss_mixer(struct snd_wss *chip);
14761ef19d7SKrzysztof Helt 
14861ef19d7SKrzysztof Helt int snd_cs4236_create(struct snd_card *card,
14961ef19d7SKrzysztof Helt 		      unsigned long port,
15061ef19d7SKrzysztof Helt 		      unsigned long cport,
15161ef19d7SKrzysztof Helt 		      int irq, int dma1, int dma2,
15261ef19d7SKrzysztof Helt 		      unsigned short hardware,
15361ef19d7SKrzysztof Helt 		      unsigned short hwshare,
154*7779f75fSKrzysztof Helt 		      struct snd_wss **rchip);
155*7779f75fSKrzysztof Helt int snd_cs4236_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
156*7779f75fSKrzysztof Helt int snd_cs4236_mixer(struct snd_wss *chip);
15761ef19d7SKrzysztof Helt 
15861ef19d7SKrzysztof Helt /*
15961ef19d7SKrzysztof Helt  *  mixer library
16061ef19d7SKrzysztof Helt  */
16161ef19d7SKrzysztof Helt 
162*7779f75fSKrzysztof Helt #define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \
163*7779f75fSKrzysztof Helt { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
164*7779f75fSKrzysztof Helt   .name = xname, \
165*7779f75fSKrzysztof Helt   .index = xindex, \
166*7779f75fSKrzysztof Helt   .info = snd_wss_info_single, \
167*7779f75fSKrzysztof Helt   .get = snd_wss_get_single, \
168*7779f75fSKrzysztof Helt   .put = snd_wss_put_single, \
16961ef19d7SKrzysztof Helt   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
17061ef19d7SKrzysztof Helt 
171*7779f75fSKrzysztof Helt int snd_wss_info_single(struct snd_kcontrol *kcontrol,
172*7779f75fSKrzysztof Helt 			struct snd_ctl_elem_info *uinfo);
173*7779f75fSKrzysztof Helt int snd_wss_get_single(struct snd_kcontrol *kcontrol,
174*7779f75fSKrzysztof Helt 			struct snd_ctl_elem_value *ucontrol);
175*7779f75fSKrzysztof Helt int snd_wss_put_single(struct snd_kcontrol *kcontrol,
176*7779f75fSKrzysztof Helt 			struct snd_ctl_elem_value *ucontrol);
17761ef19d7SKrzysztof Helt 
178*7779f75fSKrzysztof Helt #define WSS_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
179*7779f75fSKrzysztof Helt { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
180*7779f75fSKrzysztof Helt   .name = xname, \
181*7779f75fSKrzysztof Helt   .index = xindex, \
182*7779f75fSKrzysztof Helt   .info = snd_wss_info_double, \
183*7779f75fSKrzysztof Helt   .get = snd_wss_get_double, \
184*7779f75fSKrzysztof Helt   .put = snd_wss_put_double, \
185*7779f75fSKrzysztof Helt   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
186*7779f75fSKrzysztof Helt 		   (shift_right << 19) | (mask << 24) | (invert << 22) }
18761ef19d7SKrzysztof Helt 
188*7779f75fSKrzysztof Helt int snd_wss_info_double(struct snd_kcontrol *kcontrol,
189*7779f75fSKrzysztof Helt 			struct snd_ctl_elem_info *uinfo);
190*7779f75fSKrzysztof Helt int snd_wss_get_double(struct snd_kcontrol *kcontrol,
191*7779f75fSKrzysztof Helt 			struct snd_ctl_elem_value *ucontrol);
192*7779f75fSKrzysztof Helt int snd_wss_put_double(struct snd_kcontrol *kcontrol,
193*7779f75fSKrzysztof Helt 			struct snd_ctl_elem_value *ucontrol);
19461ef19d7SKrzysztof Helt 
195*7779f75fSKrzysztof Helt #endif /* __SOUND_WSS_H */
196