xref: /openbmc/linux/include/sound/wss.h (revision 61ef19d7e771ce021edb0dff0da134b6d688d4aa)
1*61ef19d7SKrzysztof Helt #ifndef __SOUND_CS4231_H
2*61ef19d7SKrzysztof Helt #define __SOUND_CS4231_H
3*61ef19d7SKrzysztof Helt 
4*61ef19d7SKrzysztof Helt /*
5*61ef19d7SKrzysztof Helt  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
6*61ef19d7SKrzysztof Helt  *  Definitions for CS4231 & InterWave chips & compatible chips
7*61ef19d7SKrzysztof Helt  *
8*61ef19d7SKrzysztof Helt  *
9*61ef19d7SKrzysztof Helt  *   This program is free software; you can redistribute it and/or modify
10*61ef19d7SKrzysztof Helt  *   it under the terms of the GNU General Public License as published by
11*61ef19d7SKrzysztof Helt  *   the Free Software Foundation; either version 2 of the License, or
12*61ef19d7SKrzysztof Helt  *   (at your option) any later version.
13*61ef19d7SKrzysztof Helt  *
14*61ef19d7SKrzysztof Helt  *   This program is distributed in the hope that it will be useful,
15*61ef19d7SKrzysztof Helt  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
16*61ef19d7SKrzysztof Helt  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*61ef19d7SKrzysztof Helt  *   GNU General Public License for more details.
18*61ef19d7SKrzysztof Helt  *
19*61ef19d7SKrzysztof Helt  *   You should have received a copy of the GNU General Public License
20*61ef19d7SKrzysztof Helt  *   along with this program; if not, write to the Free Software
21*61ef19d7SKrzysztof Helt  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
22*61ef19d7SKrzysztof Helt  *
23*61ef19d7SKrzysztof Helt  */
24*61ef19d7SKrzysztof Helt 
25*61ef19d7SKrzysztof Helt #include "control.h"
26*61ef19d7SKrzysztof Helt #include "pcm.h"
27*61ef19d7SKrzysztof Helt #include "timer.h"
28*61ef19d7SKrzysztof Helt 
29*61ef19d7SKrzysztof Helt #include "cs4231-regs.h"
30*61ef19d7SKrzysztof Helt 
31*61ef19d7SKrzysztof Helt /* defines for codec.mode */
32*61ef19d7SKrzysztof Helt 
33*61ef19d7SKrzysztof Helt #define CS4231_MODE_NONE	0x0000
34*61ef19d7SKrzysztof Helt #define CS4231_MODE_PLAY	0x0001
35*61ef19d7SKrzysztof Helt #define CS4231_MODE_RECORD	0x0002
36*61ef19d7SKrzysztof Helt #define CS4231_MODE_TIMER	0x0004
37*61ef19d7SKrzysztof Helt #define CS4231_MODE_OPEN	(CS4231_MODE_PLAY|CS4231_MODE_RECORD|CS4231_MODE_TIMER)
38*61ef19d7SKrzysztof Helt 
39*61ef19d7SKrzysztof Helt /* defines for codec.hardware */
40*61ef19d7SKrzysztof Helt 
41*61ef19d7SKrzysztof Helt #define CS4231_HW_DETECT        0x0000	/* let CS4231 driver detect chip */
42*61ef19d7SKrzysztof Helt #define CS4231_HW_DETECT3	0x0001	/* allow mode 3 */
43*61ef19d7SKrzysztof Helt #define CS4231_HW_TYPE_MASK	0xff00	/* type mask */
44*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4231_MASK   0x0100	/* CS4231 serie */
45*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4231        0x0100	/* CS4231 chip */
46*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4231A       0x0101	/* CS4231A chip */
47*61ef19d7SKrzysztof Helt #define CS4231_HW_AD1845	0x0102	/* AD1845 chip */
48*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4232_MASK   0x0200	/* CS4232 serie (has control ports) */
49*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4232        0x0200	/* CS4232 */
50*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4232A       0x0201	/* CS4232A */
51*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4236	0x0202	/* CS4236 */
52*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4236B_MASK	0x0400	/* CS4236B serie (has extended control regs) */
53*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4235	0x0400	/* CS4235 - Crystal Clear (tm) stereo enhancement */
54*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4236B       0x0401	/* CS4236B */
55*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4237B       0x0402	/* CS4237B - SRS 3D */
56*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4238B	0x0403	/* CS4238B - QSOUND 3D */
57*61ef19d7SKrzysztof Helt #define CS4231_HW_CS4239	0x0404	/* CS4239 - Crystal Clear (tm) stereo enhancement */
58*61ef19d7SKrzysztof Helt /* compatible, but clones */
59*61ef19d7SKrzysztof Helt #define CS4231_HW_INTERWAVE     0x1000	/* InterWave chip */
60*61ef19d7SKrzysztof Helt #define CS4231_HW_OPL3SA2       0x1101	/* OPL3-SA2 chip, similar to cs4231 */
61*61ef19d7SKrzysztof Helt #define CS4231_HW_OPTI93X 	0x1102	/* Opti 930/931/933 */
62*61ef19d7SKrzysztof Helt 
63*61ef19d7SKrzysztof Helt /* defines for codec.hwshare */
64*61ef19d7SKrzysztof Helt #define CS4231_HWSHARE_IRQ	(1<<0)
65*61ef19d7SKrzysztof Helt #define CS4231_HWSHARE_DMA1	(1<<1)
66*61ef19d7SKrzysztof Helt #define CS4231_HWSHARE_DMA2	(1<<2)
67*61ef19d7SKrzysztof Helt 
68*61ef19d7SKrzysztof Helt struct snd_cs4231 {
69*61ef19d7SKrzysztof Helt 	unsigned long port;		/* base i/o port */
70*61ef19d7SKrzysztof Helt 	struct resource *res_port;
71*61ef19d7SKrzysztof Helt 	unsigned long cport;		/* control base i/o port (CS4236) */
72*61ef19d7SKrzysztof Helt 	struct resource *res_cport;
73*61ef19d7SKrzysztof Helt 	int irq;			/* IRQ line */
74*61ef19d7SKrzysztof Helt 	int dma1;			/* playback DMA */
75*61ef19d7SKrzysztof Helt 	int dma2;			/* record DMA */
76*61ef19d7SKrzysztof Helt 	unsigned short version;		/* version of CODEC chip */
77*61ef19d7SKrzysztof Helt 	unsigned short mode;		/* see to CS4231_MODE_XXXX */
78*61ef19d7SKrzysztof Helt 	unsigned short hardware;	/* see to CS4231_HW_XXXX */
79*61ef19d7SKrzysztof Helt 	unsigned short hwshare;		/* shared resources */
80*61ef19d7SKrzysztof Helt 	unsigned short single_dma:1,	/* forced single DMA mode (GUS 16-bit daughter board) or dma1 == dma2 */
81*61ef19d7SKrzysztof Helt 		       ebus_flag:1;	/* SPARC: EBUS present */
82*61ef19d7SKrzysztof Helt 
83*61ef19d7SKrzysztof Helt 	struct snd_card *card;
84*61ef19d7SKrzysztof Helt 	struct snd_pcm *pcm;
85*61ef19d7SKrzysztof Helt 	struct snd_pcm_substream *playback_substream;
86*61ef19d7SKrzysztof Helt 	struct snd_pcm_substream *capture_substream;
87*61ef19d7SKrzysztof Helt 	struct snd_timer *timer;
88*61ef19d7SKrzysztof Helt 
89*61ef19d7SKrzysztof Helt 	unsigned char image[32];	/* registers image */
90*61ef19d7SKrzysztof Helt 	unsigned char eimage[32];	/* extended registers image */
91*61ef19d7SKrzysztof Helt 	unsigned char cimage[16];	/* control registers image */
92*61ef19d7SKrzysztof Helt 	int mce_bit;
93*61ef19d7SKrzysztof Helt 	int calibrate_mute;
94*61ef19d7SKrzysztof Helt 	int sw_3d_bit;
95*61ef19d7SKrzysztof Helt 	unsigned int p_dma_size;
96*61ef19d7SKrzysztof Helt 	unsigned int c_dma_size;
97*61ef19d7SKrzysztof Helt 
98*61ef19d7SKrzysztof Helt 	spinlock_t reg_lock;
99*61ef19d7SKrzysztof Helt 	struct mutex mce_mutex;
100*61ef19d7SKrzysztof Helt 	struct mutex open_mutex;
101*61ef19d7SKrzysztof Helt 
102*61ef19d7SKrzysztof Helt 	int (*rate_constraint) (struct snd_pcm_runtime *runtime);
103*61ef19d7SKrzysztof Helt 	void (*set_playback_format) (struct snd_cs4231 *chip, struct snd_pcm_hw_params *hw_params, unsigned char pdfr);
104*61ef19d7SKrzysztof Helt 	void (*set_capture_format) (struct snd_cs4231 *chip, struct snd_pcm_hw_params *hw_params, unsigned char cdfr);
105*61ef19d7SKrzysztof Helt 	void (*trigger) (struct snd_cs4231 *chip, unsigned int what, int start);
106*61ef19d7SKrzysztof Helt #ifdef CONFIG_PM
107*61ef19d7SKrzysztof Helt 	void (*suspend) (struct snd_cs4231 *chip);
108*61ef19d7SKrzysztof Helt 	void (*resume) (struct snd_cs4231 *chip);
109*61ef19d7SKrzysztof Helt #endif
110*61ef19d7SKrzysztof Helt 	void *dma_private_data;
111*61ef19d7SKrzysztof Helt 	int (*claim_dma) (struct snd_cs4231 *chip, void *dma_private_data, int dma);
112*61ef19d7SKrzysztof Helt 	int (*release_dma) (struct snd_cs4231 *chip, void *dma_private_data, int dma);
113*61ef19d7SKrzysztof Helt };
114*61ef19d7SKrzysztof Helt 
115*61ef19d7SKrzysztof Helt /* exported functions */
116*61ef19d7SKrzysztof Helt 
117*61ef19d7SKrzysztof Helt void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char val);
118*61ef19d7SKrzysztof Helt unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg);
119*61ef19d7SKrzysztof Helt void snd_cs4236_ext_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char val);
120*61ef19d7SKrzysztof Helt unsigned char snd_cs4236_ext_in(struct snd_cs4231 *chip, unsigned char reg);
121*61ef19d7SKrzysztof Helt void snd_cs4231_mce_up(struct snd_cs4231 *chip);
122*61ef19d7SKrzysztof Helt void snd_cs4231_mce_down(struct snd_cs4231 *chip);
123*61ef19d7SKrzysztof Helt 
124*61ef19d7SKrzysztof Helt void snd_cs4231_overrange(struct snd_cs4231 *chip);
125*61ef19d7SKrzysztof Helt 
126*61ef19d7SKrzysztof Helt irqreturn_t snd_cs4231_interrupt(int irq, void *dev_id);
127*61ef19d7SKrzysztof Helt 
128*61ef19d7SKrzysztof Helt const char *snd_cs4231_chip_id(struct snd_cs4231 *chip);
129*61ef19d7SKrzysztof Helt 
130*61ef19d7SKrzysztof Helt int snd_cs4231_create(struct snd_card *card,
131*61ef19d7SKrzysztof Helt 		      unsigned long port,
132*61ef19d7SKrzysztof Helt 		      unsigned long cport,
133*61ef19d7SKrzysztof Helt 		      int irq, int dma1, int dma2,
134*61ef19d7SKrzysztof Helt 		      unsigned short hardware,
135*61ef19d7SKrzysztof Helt 		      unsigned short hwshare,
136*61ef19d7SKrzysztof Helt 		      struct snd_cs4231 ** rchip);
137*61ef19d7SKrzysztof Helt int snd_cs4231_pcm(struct snd_cs4231 * chip, int device, struct snd_pcm **rpcm);
138*61ef19d7SKrzysztof Helt int snd_cs4231_timer(struct snd_cs4231 * chip, int device, struct snd_timer **rtimer);
139*61ef19d7SKrzysztof Helt int snd_cs4231_mixer(struct snd_cs4231 * chip);
140*61ef19d7SKrzysztof Helt 
141*61ef19d7SKrzysztof Helt int snd_cs4236_create(struct snd_card *card,
142*61ef19d7SKrzysztof Helt 		      unsigned long port,
143*61ef19d7SKrzysztof Helt 		      unsigned long cport,
144*61ef19d7SKrzysztof Helt 		      int irq, int dma1, int dma2,
145*61ef19d7SKrzysztof Helt 		      unsigned short hardware,
146*61ef19d7SKrzysztof Helt 		      unsigned short hwshare,
147*61ef19d7SKrzysztof Helt 		      struct snd_cs4231 ** rchip);
148*61ef19d7SKrzysztof Helt int snd_cs4236_pcm(struct snd_cs4231 * chip, int device, struct snd_pcm **rpcm);
149*61ef19d7SKrzysztof Helt int snd_cs4236_mixer(struct snd_cs4231 * chip);
150*61ef19d7SKrzysztof Helt 
151*61ef19d7SKrzysztof Helt /*
152*61ef19d7SKrzysztof Helt  *  mixer library
153*61ef19d7SKrzysztof Helt  */
154*61ef19d7SKrzysztof Helt 
155*61ef19d7SKrzysztof Helt #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
156*61ef19d7SKrzysztof Helt { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
157*61ef19d7SKrzysztof Helt   .info = snd_cs4231_info_single, \
158*61ef19d7SKrzysztof Helt   .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
159*61ef19d7SKrzysztof Helt   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
160*61ef19d7SKrzysztof Helt 
161*61ef19d7SKrzysztof Helt int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo);
162*61ef19d7SKrzysztof Helt int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol);
163*61ef19d7SKrzysztof Helt int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol);
164*61ef19d7SKrzysztof Helt 
165*61ef19d7SKrzysztof Helt #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
166*61ef19d7SKrzysztof Helt { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
167*61ef19d7SKrzysztof Helt   .info = snd_cs4231_info_double, \
168*61ef19d7SKrzysztof Helt   .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
169*61ef19d7SKrzysztof Helt   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
170*61ef19d7SKrzysztof Helt 
171*61ef19d7SKrzysztof Helt int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo);
172*61ef19d7SKrzysztof Helt int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol);
173*61ef19d7SKrzysztof Helt int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol);
174*61ef19d7SKrzysztof Helt 
175*61ef19d7SKrzysztof Helt #endif /* __SOUND_CS4231_H */
176