xref: /openbmc/linux/include/sound/wm8904.h (revision cdce4e9ba7ff86a5f43b971a9af88b25a3f6c9a4)
1 /*
2  * Platform data for WM8904
3  *
4  * Copyright 2009 Wolfson Microelectronics PLC.
5  *
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  *
8  *  This program is free software; you can redistribute  it and/or modify it
9  *  under  the terms of  the GNU General  Public License as published by the
10  *  Free Software Foundation;  either version 2 of the  License, or (at your
11  *  option) any later version.
12  *
13  */
14 
15 #ifndef __MFD_WM8994_PDATA_H__
16 #define __MFD_WM8994_PDATA_H__
17 
18 /* Used to enable configuration of a GPIO to all zeros */
19 #define WM8904_GPIO_NO_CONFIG 0x8000
20 
21 /*
22  * R121 (0x79) - GPIO Control 1
23  */
24 #define WM8904_GPIO1_PU                         0x0020  /* GPIO1_PU */
25 #define WM8904_GPIO1_PU_MASK                    0x0020  /* GPIO1_PU */
26 #define WM8904_GPIO1_PU_SHIFT                        5  /* GPIO1_PU */
27 #define WM8904_GPIO1_PU_WIDTH                        1  /* GPIO1_PU */
28 #define WM8904_GPIO1_PD                         0x0010  /* GPIO1_PD */
29 #define WM8904_GPIO1_PD_MASK                    0x0010  /* GPIO1_PD */
30 #define WM8904_GPIO1_PD_SHIFT                        4  /* GPIO1_PD */
31 #define WM8904_GPIO1_PD_WIDTH                        1  /* GPIO1_PD */
32 #define WM8904_GPIO1_SEL_MASK                   0x000F  /* GPIO1_SEL - [3:0] */
33 #define WM8904_GPIO1_SEL_SHIFT                       0  /* GPIO1_SEL - [3:0] */
34 #define WM8904_GPIO1_SEL_WIDTH                       4  /* GPIO1_SEL - [3:0] */
35 
36 /*
37  * R122 (0x7A) - GPIO Control 2
38  */
39 #define WM8904_GPIO2_PU                         0x0020  /* GPIO2_PU */
40 #define WM8904_GPIO2_PU_MASK                    0x0020  /* GPIO2_PU */
41 #define WM8904_GPIO2_PU_SHIFT                        5  /* GPIO2_PU */
42 #define WM8904_GPIO2_PU_WIDTH                        1  /* GPIO2_PU */
43 #define WM8904_GPIO2_PD                         0x0010  /* GPIO2_PD */
44 #define WM8904_GPIO2_PD_MASK                    0x0010  /* GPIO2_PD */
45 #define WM8904_GPIO2_PD_SHIFT                        4  /* GPIO2_PD */
46 #define WM8904_GPIO2_PD_WIDTH                        1  /* GPIO2_PD */
47 #define WM8904_GPIO2_SEL_MASK                   0x000F  /* GPIO2_SEL - [3:0] */
48 #define WM8904_GPIO2_SEL_SHIFT                       0  /* GPIO2_SEL - [3:0] */
49 #define WM8904_GPIO2_SEL_WIDTH                       4  /* GPIO2_SEL - [3:0] */
50 
51 /*
52  * R123 (0x7B) - GPIO Control 3
53  */
54 #define WM8904_GPIO3_PU                         0x0020  /* GPIO3_PU */
55 #define WM8904_GPIO3_PU_MASK                    0x0020  /* GPIO3_PU */
56 #define WM8904_GPIO3_PU_SHIFT                        5  /* GPIO3_PU */
57 #define WM8904_GPIO3_PU_WIDTH                        1  /* GPIO3_PU */
58 #define WM8904_GPIO3_PD                         0x0010  /* GPIO3_PD */
59 #define WM8904_GPIO3_PD_MASK                    0x0010  /* GPIO3_PD */
60 #define WM8904_GPIO3_PD_SHIFT                        4  /* GPIO3_PD */
61 #define WM8904_GPIO3_PD_WIDTH                        1  /* GPIO3_PD */
62 #define WM8904_GPIO3_SEL_MASK                   0x000F  /* GPIO3_SEL - [3:0] */
63 #define WM8904_GPIO3_SEL_SHIFT                       0  /* GPIO3_SEL - [3:0] */
64 #define WM8904_GPIO3_SEL_WIDTH                       4  /* GPIO3_SEL - [3:0] */
65 
66 /*
67  * R124 (0x7C) - GPIO Control 4
68  */
69 #define WM8904_GPI7_ENA                         0x0200  /* GPI7_ENA */
70 #define WM8904_GPI7_ENA_MASK                    0x0200  /* GPI7_ENA */
71 #define WM8904_GPI7_ENA_SHIFT                        9  /* GPI7_ENA */
72 #define WM8904_GPI7_ENA_WIDTH                        1  /* GPI7_ENA */
73 #define WM8904_GPI8_ENA                         0x0100  /* GPI8_ENA */
74 #define WM8904_GPI8_ENA_MASK                    0x0100  /* GPI8_ENA */
75 #define WM8904_GPI8_ENA_SHIFT                        8  /* GPI8_ENA */
76 #define WM8904_GPI8_ENA_WIDTH                        1  /* GPI8_ENA */
77 #define WM8904_GPIO_BCLK_MODE_ENA               0x0080  /* GPIO_BCLK_MODE_ENA */
78 #define WM8904_GPIO_BCLK_MODE_ENA_MASK          0x0080  /* GPIO_BCLK_MODE_ENA */
79 #define WM8904_GPIO_BCLK_MODE_ENA_SHIFT              7  /* GPIO_BCLK_MODE_ENA */
80 #define WM8904_GPIO_BCLK_MODE_ENA_WIDTH              1  /* GPIO_BCLK_MODE_ENA */
81 #define WM8904_GPIO_BCLK_SEL_MASK               0x000F  /* GPIO_BCLK_SEL - [3:0] */
82 #define WM8904_GPIO_BCLK_SEL_SHIFT                   0  /* GPIO_BCLK_SEL - [3:0] */
83 #define WM8904_GPIO_BCLK_SEL_WIDTH                   4  /* GPIO_BCLK_SEL - [3:0] */
84 
85 #define WM8904_GPIO_REGS 4
86 #define WM8904_DRC_REGS  4
87 #define WM8904_EQ_REGS   25
88 
89 /**
90  * DRC configurations are specified with a label and a set of register
91  * values to write (the enable bits will be ignored).  At runtime an
92  * enumerated control will be presented for each DRC block allowing
93  * the user to choose the configration to use.
94  *
95  * Configurations may be generated by hand or by using the DRC control
96  * panel provided by the WISCE - see  http://www.wolfsonmicro.com/wisce/
97  * for details.
98  */
99 struct wm8904_drc_cfg {
100 	const char *name;
101 	u16 regs[WM8904_DRC_REGS];
102 };
103 
104 /**
105  * ReTune Mobile configurations are specified with a label, sample
106  * rate and set of values to write (the enable bits will be ignored).
107  *
108  * Configurations are expected to be generated using the ReTune Mobile
109  * control panel in WISCE - see http://www.wolfsonmicro.com/wisce/
110  */
111 struct wm8904_retune_mobile_cfg {
112 	const char *name;
113 	unsigned int rate;
114 	u16 regs[WM8904_EQ_REGS];
115 };
116 
117 struct wm8904_pdata {
118 	int num_drc_cfgs;
119 	struct wm8904_drc_cfg *drc_cfgs;
120 
121 	int num_retune_mobile_cfgs;
122 	struct wm8904_retune_mobile_cfg *retune_mobile_cfgs;
123 
124 	u32 gpio_cfg[WM8904_GPIO_REGS];
125 };
126 
127 #endif
128