1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2d5315a23SMark Brown /* 3d5315a23SMark Brown * linux/sound/wm2200.h -- Platform data for WM2200 4d5315a23SMark Brown * 5d5315a23SMark Brown * Copyright 2012 Wolfson Microelectronics. PLC. 6d5315a23SMark Brown */ 7d5315a23SMark Brown 8d5315a23SMark Brown #ifndef __LINUX_SND_WM2200_H 9d5315a23SMark Brown #define __LINUX_SND_WM2200_H 10d5315a23SMark Brown 11d5315a23SMark Brown #define WM2200_GPIO_SET 0x10000 121a786243SChris Rattray #define WM2200_MAX_MICBIAS 2 13d5315a23SMark Brown 14d5315a23SMark Brown enum wm2200_in_mode { 15d5315a23SMark Brown WM2200_IN_SE = 0, 16d5315a23SMark Brown WM2200_IN_DIFF = 1, 17d5315a23SMark Brown WM2200_IN_DMIC = 2, 18d5315a23SMark Brown }; 19d5315a23SMark Brown 20d5315a23SMark Brown enum wm2200_dmic_sup { 21d5315a23SMark Brown WM2200_DMIC_SUP_MICVDD = 0, 22d5315a23SMark Brown WM2200_DMIC_SUP_MICBIAS1 = 1, 23d5315a23SMark Brown WM2200_DMIC_SUP_MICBIAS2 = 2, 24d5315a23SMark Brown }; 25d5315a23SMark Brown 261a786243SChris Rattray enum wm2200_mbias_lvl { 271a786243SChris Rattray WM2200_MBIAS_LVL_1V5 = 1, 281a786243SChris Rattray WM2200_MBIAS_LVL_1V8 = 2, 291a786243SChris Rattray WM2200_MBIAS_LVL_1V9 = 3, 301a786243SChris Rattray WM2200_MBIAS_LVL_2V0 = 4, 311a786243SChris Rattray WM2200_MBIAS_LVL_2V2 = 5, 321a786243SChris Rattray WM2200_MBIAS_LVL_2V4 = 6, 331a786243SChris Rattray WM2200_MBIAS_LVL_2V5 = 7, 341a786243SChris Rattray WM2200_MBIAS_LVL_2V6 = 8, 351a786243SChris Rattray }; 361a786243SChris Rattray 371a786243SChris Rattray struct wm2200_micbias { 381a786243SChris Rattray enum wm2200_mbias_lvl mb_lvl; /** Regulated voltage */ 391a786243SChris Rattray unsigned int discharge:1; /** Actively discharge */ 401a786243SChris Rattray unsigned int fast_start:1; /** Enable aggressive startup ramp rate */ 411a786243SChris Rattray unsigned int bypass:1; /** Use bypass mode */ 421a786243SChris Rattray }; 431a786243SChris Rattray 44d5315a23SMark Brown struct wm2200_pdata { 45d5315a23SMark Brown int reset; /** GPIO controlling /RESET, if any */ 46d5315a23SMark Brown int ldo_ena; /** GPIO controlling LODENA, if any */ 47d5315a23SMark Brown int irq_flags; 48d5315a23SMark Brown 49d5315a23SMark Brown int gpio_defaults[4]; 50d5315a23SMark Brown 51d5315a23SMark Brown enum wm2200_in_mode in_mode[3]; 52d5315a23SMark Brown enum wm2200_dmic_sup dmic_sup[3]; 53d5315a23SMark Brown 541a786243SChris Rattray /** MICBIAS configurations */ 551a786243SChris Rattray struct wm2200_micbias micbias[WM2200_MAX_MICBIAS]; 56d5315a23SMark Brown }; 57d5315a23SMark Brown 58d5315a23SMark Brown #endif 59