1e149ca29SPierre-Louis Bossart /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 253e0c72dSLiam Girdwood /* 353e0c72dSLiam Girdwood * This file is provided under a dual BSD/GPLv2 license. When using or 453e0c72dSLiam Girdwood * redistributing this file, you may do so under either license. 553e0c72dSLiam Girdwood * 653e0c72dSLiam Girdwood * Copyright(c) 2018 Intel Corporation. All rights reserved. 753e0c72dSLiam Girdwood */ 853e0c72dSLiam Girdwood 953e0c72dSLiam Girdwood #ifndef __INCLUDE_SOUND_SOF_DAI_H__ 1053e0c72dSLiam Girdwood #define __INCLUDE_SOUND_SOF_DAI_H__ 1153e0c72dSLiam Girdwood 1253e0c72dSLiam Girdwood #include <sound/sof/header.h> 1353e0c72dSLiam Girdwood #include <sound/sof/dai-intel.h> 14b4be4276SDaniel Baluta #include <sound/sof/dai-imx.h> 15efb931cdSAjit Kumar Pandey #include <sound/sof/dai-amd.h> 16b72bfcffSYC Hung #include <sound/sof/dai-mediatek.h> 1753e0c72dSLiam Girdwood 1853e0c72dSLiam Girdwood /* 1953e0c72dSLiam Girdwood * DAI Configuration. 2053e0c72dSLiam Girdwood * 2153e0c72dSLiam Girdwood * Each different DAI type will have it's own structure and IPC cmd. 2253e0c72dSLiam Girdwood */ 2353e0c72dSLiam Girdwood 2453e0c72dSLiam Girdwood #define SOF_DAI_FMT_I2S 1 /**< I2S mode */ 2553e0c72dSLiam Girdwood #define SOF_DAI_FMT_RIGHT_J 2 /**< Right Justified mode */ 2653e0c72dSLiam Girdwood #define SOF_DAI_FMT_LEFT_J 3 /**< Left Justified mode */ 2753e0c72dSLiam Girdwood #define SOF_DAI_FMT_DSP_A 4 /**< L data MSB after FRM LRC */ 2853e0c72dSLiam Girdwood #define SOF_DAI_FMT_DSP_B 5 /**< L data MSB during FRM LRC */ 2953e0c72dSLiam Girdwood #define SOF_DAI_FMT_PDM 6 /**< Pulse density modulation */ 3053e0c72dSLiam Girdwood 3153e0c72dSLiam Girdwood #define SOF_DAI_FMT_CONT (1 << 4) /**< continuous clock */ 3253e0c72dSLiam Girdwood #define SOF_DAI_FMT_GATED (0 << 4) /**< clock is gated */ 3353e0c72dSLiam Girdwood 3453e0c72dSLiam Girdwood #define SOF_DAI_FMT_NB_NF (0 << 8) /**< normal bit clock + frame */ 3553e0c72dSLiam Girdwood #define SOF_DAI_FMT_NB_IF (2 << 8) /**< normal BCLK + inv FRM */ 3653e0c72dSLiam Girdwood #define SOF_DAI_FMT_IB_NF (3 << 8) /**< invert BCLK + nor FRM */ 3753e0c72dSLiam Girdwood #define SOF_DAI_FMT_IB_IF (4 << 8) /**< invert BCLK + FRM */ 3853e0c72dSLiam Girdwood 39df132fa9SPierre-Louis Bossart #define SOF_DAI_FMT_CBP_CFP (0 << 12) /**< codec bclk provider & frame provider */ 40df132fa9SPierre-Louis Bossart #define SOF_DAI_FMT_CBC_CFP (2 << 12) /**< codec bclk consumer & frame provider */ 41df132fa9SPierre-Louis Bossart #define SOF_DAI_FMT_CBP_CFC (3 << 12) /**< codec bclk provider & frame consumer */ 42df132fa9SPierre-Louis Bossart #define SOF_DAI_FMT_CBC_CFC (4 << 12) /**< codec bclk consumer & frame consumer */ 43df132fa9SPierre-Louis Bossart 44df132fa9SPierre-Louis Bossart /* keep old definitions for backwards compatibility */ 45df132fa9SPierre-Louis Bossart #define SOF_DAI_FMT_CBM_CFM SOF_DAI_FMT_CBP_CFP 46df132fa9SPierre-Louis Bossart #define SOF_DAI_FMT_CBS_CFM SOF_DAI_FMT_CBC_CFP 47df132fa9SPierre-Louis Bossart #define SOF_DAI_FMT_CBM_CFS SOF_DAI_FMT_CBP_CFC 48df132fa9SPierre-Louis Bossart #define SOF_DAI_FMT_CBS_CFS SOF_DAI_FMT_CBC_CFC 4953e0c72dSLiam Girdwood 5053e0c72dSLiam Girdwood #define SOF_DAI_FMT_FORMAT_MASK 0x000f 5153e0c72dSLiam Girdwood #define SOF_DAI_FMT_CLOCK_MASK 0x00f0 5253e0c72dSLiam Girdwood #define SOF_DAI_FMT_INV_MASK 0x0f00 53df132fa9SPierre-Louis Bossart #define SOF_DAI_FMT_CLOCK_PROVIDER_MASK 0xf000 5453e0c72dSLiam Girdwood 55a0f84dfbSRanjani Sridharan /* 56a0f84dfbSRanjani Sridharan * DAI_CONFIG flags. The 4 LSB bits are used for the commands, HW_PARAMS, HW_FREE and PAUSE 57a0f84dfbSRanjani Sridharan * representing when the IPC is sent. The 4 MSB bits are used to add quirks along with the above 58a0f84dfbSRanjani Sridharan * commands. 59a0f84dfbSRanjani Sridharan */ 60a0f84dfbSRanjani Sridharan #define SOF_DAI_CONFIG_FLAGS_CMD_MASK 0xF 61a0f84dfbSRanjani Sridharan #define SOF_DAI_CONFIG_FLAGS_NONE 0 /**< DAI_CONFIG sent without stage information */ 62a0f84dfbSRanjani Sridharan #define SOF_DAI_CONFIG_FLAGS_HW_PARAMS BIT(0) /**< DAI_CONFIG sent during hw_params stage */ 63a0f84dfbSRanjani Sridharan #define SOF_DAI_CONFIG_FLAGS_HW_FREE BIT(1) /**< DAI_CONFIG sent during hw_free stage */ 64a0f84dfbSRanjani Sridharan /**< DAI_CONFIG sent during pause trigger. Only available ABI 3.20 onwards */ 65a0f84dfbSRanjani Sridharan #define SOF_DAI_CONFIG_FLAGS_PAUSE BIT(2) 66a0f84dfbSRanjani Sridharan #define SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT 4 67a0f84dfbSRanjani Sridharan #define SOF_DAI_CONFIG_FLAGS_QUIRK_MASK (0xF << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT) 68a0f84dfbSRanjani Sridharan /* 69a0f84dfbSRanjani Sridharan * This should be used along with the SOF_DAI_CONFIG_FLAGS_HW_PARAMS to indicate that pipeline 70a0f84dfbSRanjani Sridharan * stop/pause and DAI DMA stop/pause should happen in two steps. This change is only available 71a0f84dfbSRanjani Sridharan * ABI 3.20 onwards. 72a0f84dfbSRanjani Sridharan */ 73a0f84dfbSRanjani Sridharan #define SOF_DAI_CONFIG_FLAGS_2_STEP_STOP BIT(0) 7421c51692SPierre-Louis Bossart 7553e0c72dSLiam Girdwood /** \brief Types of DAI */ 7653e0c72dSLiam Girdwood enum sof_ipc_dai_type { 7753e0c72dSLiam Girdwood SOF_DAI_INTEL_NONE = 0, /**< None */ 7853e0c72dSLiam Girdwood SOF_DAI_INTEL_SSP, /**< Intel SSP */ 7953e0c72dSLiam Girdwood SOF_DAI_INTEL_DMIC, /**< Intel DMIC */ 8053e0c72dSLiam Girdwood SOF_DAI_INTEL_HDA, /**< Intel HD/A */ 818207a1c4SBard liao SOF_DAI_INTEL_ALH, /**< Intel ALH */ 82f59b16efSDaniel Baluta SOF_DAI_IMX_SAI, /**< i.MX SAI */ 83f59b16efSDaniel Baluta SOF_DAI_IMX_ESAI, /**< i.MX ESAI */ 84efb931cdSAjit Kumar Pandey SOF_DAI_AMD_BT, /**< AMD ACP BT*/ 85efb931cdSAjit Kumar Pandey SOF_DAI_AMD_SP, /**< AMD ACP SP */ 86efb931cdSAjit Kumar Pandey SOF_DAI_AMD_DMIC, /**< AMD ACP DMIC */ 87b72bfcffSYC Hung SOF_DAI_MEDIATEK_AFE, /**< Mediatek AFE */ 88f5f8ad3fSPierre-Louis Bossart SOF_DAI_AMD_HS, /**< Amd HS */ 89*75af4199SV sujith kumar Reddy SOF_DAI_AMD_SP_VIRTUAL, /**< AMD ACP SP VIRTUAL */ 90*75af4199SV sujith kumar Reddy SOF_DAI_AMD_HS_VIRTUAL, /**< AMD ACP HS VIRTUAL */ 9153e0c72dSLiam Girdwood }; 9253e0c72dSLiam Girdwood 9353e0c72dSLiam Girdwood /* general purpose DAI configuration */ 9453e0c72dSLiam Girdwood struct sof_ipc_dai_config { 9553e0c72dSLiam Girdwood struct sof_ipc_cmd_hdr hdr; 9653e0c72dSLiam Girdwood uint32_t type; /**< DAI type - enum sof_ipc_dai_type */ 9753e0c72dSLiam Girdwood uint32_t dai_index; /**< index of this type dai */ 9853e0c72dSLiam Girdwood 9953e0c72dSLiam Girdwood /* physical protocol and clocking */ 10053e0c72dSLiam Girdwood uint16_t format; /**< SOF_DAI_FMT_ */ 10166374230SPierre-Louis Bossart uint8_t group_id; /**< group ID, 0 means no group (ABI 3.17) */ 10221c51692SPierre-Louis Bossart uint8_t flags; /**< SOF_DAI_CONFIG_FLAGS_ (ABI 3.19) */ 10353e0c72dSLiam Girdwood 10453e0c72dSLiam Girdwood /* reserved for future use */ 10553e0c72dSLiam Girdwood uint32_t reserved[8]; 10653e0c72dSLiam Girdwood 10753e0c72dSLiam Girdwood /* HW specific data */ 10853e0c72dSLiam Girdwood union { 10953e0c72dSLiam Girdwood struct sof_ipc_dai_ssp_params ssp; 11053e0c72dSLiam Girdwood struct sof_ipc_dai_dmic_params dmic; 11153e0c72dSLiam Girdwood struct sof_ipc_dai_hda_params hda; 1123a9477a0SPierre-Louis Bossart struct sof_ipc_dai_alh_params alh; 113b4be4276SDaniel Baluta struct sof_ipc_dai_esai_params esai; 1149c1d4cf6SGuido Roncarolo struct sof_ipc_dai_sai_params sai; 115efb931cdSAjit Kumar Pandey struct sof_ipc_dai_acp_params acpbt; 116efb931cdSAjit Kumar Pandey struct sof_ipc_dai_acp_params acpsp; 117689614ceSAjit Kumar Pandey struct sof_ipc_dai_acpdmic_params acpdmic; 118ed2562c6SV sujith kumar Reddy struct sof_ipc_dai_acp_params acphs; 119b72bfcffSYC Hung struct sof_ipc_dai_mtk_afe_params afe; 12053e0c72dSLiam Girdwood }; 12153e0c72dSLiam Girdwood } __packed; 12253e0c72dSLiam Girdwood 123839e484fSRanjani Sridharan struct sof_dai_private_data { 124839e484fSRanjani Sridharan struct sof_ipc_comp_dai *comp_dai; 125839e484fSRanjani Sridharan struct sof_ipc_dai_config *dai_config; 126839e484fSRanjani Sridharan }; 127839e484fSRanjani Sridharan 12853e0c72dSLiam Girdwood #endif 129