1*e149ca29SPierre-Louis Bossart /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2b4be4276SDaniel Baluta /* 3b4be4276SDaniel Baluta * Copyright 2019 NXP 4b4be4276SDaniel Baluta * 5b4be4276SDaniel Baluta * Author: Daniel Baluta <daniel.baluta@nxp.com> 6b4be4276SDaniel Baluta */ 7b4be4276SDaniel Baluta 8b4be4276SDaniel Baluta #ifndef __INCLUDE_SOUND_SOF_DAI_IMX_H__ 9b4be4276SDaniel Baluta #define __INCLUDE_SOUND_SOF_DAI_IMX_H__ 10b4be4276SDaniel Baluta 11b4be4276SDaniel Baluta #include <sound/sof/header.h> 12b4be4276SDaniel Baluta 13b4be4276SDaniel Baluta /* ESAI Configuration Request - SOF_IPC_DAI_ESAI_CONFIG */ 14b4be4276SDaniel Baluta struct sof_ipc_dai_esai_params { 15b4be4276SDaniel Baluta struct sof_ipc_hdr hdr; 16b4be4276SDaniel Baluta 17b4be4276SDaniel Baluta /* MCLK */ 18b4be4276SDaniel Baluta uint16_t reserved1; 19b4be4276SDaniel Baluta uint16_t mclk_id; 20b4be4276SDaniel Baluta uint32_t mclk_direction; 21b4be4276SDaniel Baluta 22b4be4276SDaniel Baluta uint32_t mclk_rate; /* MCLK frequency in Hz */ 23b4be4276SDaniel Baluta uint32_t fsync_rate; /* FSYNC frequency in Hz */ 24b4be4276SDaniel Baluta uint32_t bclk_rate; /* BCLK frequency in Hz */ 25b4be4276SDaniel Baluta 26b4be4276SDaniel Baluta /* TDM */ 27b4be4276SDaniel Baluta uint32_t tdm_slots; 28b4be4276SDaniel Baluta uint32_t rx_slots; 29b4be4276SDaniel Baluta uint32_t tx_slots; 30b4be4276SDaniel Baluta uint16_t tdm_slot_width; 31b4be4276SDaniel Baluta uint16_t reserved2; /* alignment */ 32b4be4276SDaniel Baluta } __packed; 33b4be4276SDaniel Baluta 349c1d4cf6SGuido Roncarolo /* SAI Configuration Request - SOF_IPC_DAI_SAI_CONFIG */ 359c1d4cf6SGuido Roncarolo struct sof_ipc_dai_sai_params { 369c1d4cf6SGuido Roncarolo struct sof_ipc_hdr hdr; 379c1d4cf6SGuido Roncarolo 389c1d4cf6SGuido Roncarolo /* MCLK */ 399c1d4cf6SGuido Roncarolo uint16_t reserved1; 409c1d4cf6SGuido Roncarolo uint16_t mclk_id; 419c1d4cf6SGuido Roncarolo uint32_t mclk_direction; 429c1d4cf6SGuido Roncarolo 439c1d4cf6SGuido Roncarolo uint32_t mclk_rate; /* MCLK frequency in Hz */ 449c1d4cf6SGuido Roncarolo uint32_t fsync_rate; /* FSYNC frequency in Hz */ 459c1d4cf6SGuido Roncarolo uint32_t bclk_rate; /* BCLK frequency in Hz */ 469c1d4cf6SGuido Roncarolo 479c1d4cf6SGuido Roncarolo /* TDM */ 489c1d4cf6SGuido Roncarolo uint32_t tdm_slots; 499c1d4cf6SGuido Roncarolo uint32_t rx_slots; 509c1d4cf6SGuido Roncarolo uint32_t tx_slots; 519c1d4cf6SGuido Roncarolo uint16_t tdm_slot_width; 529c1d4cf6SGuido Roncarolo uint16_t reserved2; /* alignment */ 539c1d4cf6SGuido Roncarolo } __packed; 54b4be4276SDaniel Baluta #endif 55