1*3a9cf8efSRajeev Kumar /* 2*3a9cf8efSRajeev Kumar * Copyright (ST) 2012 Rajeev Kumar (rajeev-dlh.kumar@st.com) 3*3a9cf8efSRajeev Kumar * 4*3a9cf8efSRajeev Kumar * This program is free software; you can redistribute it and/or modify 5*3a9cf8efSRajeev Kumar * it under the terms of the GNU General Public License as published by 6*3a9cf8efSRajeev Kumar * the Free Software Foundation; either version 2 of the License, or 7*3a9cf8efSRajeev Kumar * (at your option) any later version. 8*3a9cf8efSRajeev Kumar * 9*3a9cf8efSRajeev Kumar * This program is distributed in the hope that it will be useful, 10*3a9cf8efSRajeev Kumar * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*3a9cf8efSRajeev Kumar * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*3a9cf8efSRajeev Kumar * GNU General Public License for more details. 13*3a9cf8efSRajeev Kumar * 14*3a9cf8efSRajeev Kumar * You should have received a copy of the GNU General Public License 15*3a9cf8efSRajeev Kumar * along with this program; if not, write to the Free Software 16*3a9cf8efSRajeev Kumar * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17*3a9cf8efSRajeev Kumar * 18*3a9cf8efSRajeev Kumar */ 19*3a9cf8efSRajeev Kumar 20*3a9cf8efSRajeev Kumar #ifndef __SOUND_DESIGNWARE_I2S_H 21*3a9cf8efSRajeev Kumar #define __SOUND_DESIGNWARE_I2S_H 22*3a9cf8efSRajeev Kumar 23*3a9cf8efSRajeev Kumar #include <linux/dmaengine.h> 24*3a9cf8efSRajeev Kumar #include <linux/types.h> 25*3a9cf8efSRajeev Kumar 26*3a9cf8efSRajeev Kumar /* 27*3a9cf8efSRajeev Kumar * struct i2s_clk_config_data - represent i2s clk configuration data 28*3a9cf8efSRajeev Kumar * @chan_nr: number of channel 29*3a9cf8efSRajeev Kumar * @data_width: number of bits per sample (8/16/24/32 bit) 30*3a9cf8efSRajeev Kumar * @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz) 31*3a9cf8efSRajeev Kumar */ 32*3a9cf8efSRajeev Kumar struct i2s_clk_config_data { 33*3a9cf8efSRajeev Kumar int chan_nr; 34*3a9cf8efSRajeev Kumar u32 data_width; 35*3a9cf8efSRajeev Kumar u32 sample_rate; 36*3a9cf8efSRajeev Kumar }; 37*3a9cf8efSRajeev Kumar 38*3a9cf8efSRajeev Kumar struct i2s_platform_data { 39*3a9cf8efSRajeev Kumar #define DWC_I2S_PLAY (1 << 0) 40*3a9cf8efSRajeev Kumar #define DWC_I2S_RECORD (1 << 1) 41*3a9cf8efSRajeev Kumar unsigned int cap; 42*3a9cf8efSRajeev Kumar int channel; 43*3a9cf8efSRajeev Kumar u32 snd_fmts; 44*3a9cf8efSRajeev Kumar u32 snd_rates; 45*3a9cf8efSRajeev Kumar 46*3a9cf8efSRajeev Kumar void *play_dma_data; 47*3a9cf8efSRajeev Kumar void *capture_dma_data; 48*3a9cf8efSRajeev Kumar bool (*filter)(struct dma_chan *chan, void *slave); 49*3a9cf8efSRajeev Kumar int (*i2s_clk_cfg)(struct i2s_clk_config_data *config); 50*3a9cf8efSRajeev Kumar }; 51*3a9cf8efSRajeev Kumar 52*3a9cf8efSRajeev Kumar struct i2s_dma_data { 53*3a9cf8efSRajeev Kumar void *data; 54*3a9cf8efSRajeev Kumar dma_addr_t addr; 55*3a9cf8efSRajeev Kumar u32 max_burst; 56*3a9cf8efSRajeev Kumar enum dma_slave_buswidth addr_width; 57*3a9cf8efSRajeev Kumar bool (*filter)(struct dma_chan *chan, void *slave); 58*3a9cf8efSRajeev Kumar }; 59*3a9cf8efSRajeev Kumar 60*3a9cf8efSRajeev Kumar /* I2S DMA registers */ 61*3a9cf8efSRajeev Kumar #define I2S_RXDMA 0x01C0 62*3a9cf8efSRajeev Kumar #define I2S_TXDMA 0x01C8 63*3a9cf8efSRajeev Kumar 64*3a9cf8efSRajeev Kumar #define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */ 65*3a9cf8efSRajeev Kumar #define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */ 66*3a9cf8efSRajeev Kumar #define SIX_CHANNEL_SUPPORT 6 /* up to 5.1 */ 67*3a9cf8efSRajeev Kumar #define EIGHT_CHANNEL_SUPPORT 8 /* up to 7.1 */ 68*3a9cf8efSRajeev Kumar 69*3a9cf8efSRajeev Kumar #endif /* __SOUND_DESIGNWARE_I2S_H */ 70