xref: /openbmc/linux/include/sound/cs4271.h (revision fd23fb9f6bfd43a6e62b2646d18d5ca3edc3ebe3)
167b22517SAlexander Sverdlin /*
267b22517SAlexander Sverdlin  * Definitions for CS4271 ASoC codec driver
367b22517SAlexander Sverdlin  *
467b22517SAlexander Sverdlin  * Copyright (c) 2010 Alexander Sverdlin <subaparts@yandex.ru>
567b22517SAlexander Sverdlin  *
667b22517SAlexander Sverdlin  * This program is free software; you can redistribute it and/or
767b22517SAlexander Sverdlin  * modify it under the terms of the GNU General Public License
867b22517SAlexander Sverdlin  * as published by the Free Software Foundation; either version 2
967b22517SAlexander Sverdlin  * of the License, or (at your option) any later version.
1067b22517SAlexander Sverdlin  *
1167b22517SAlexander Sverdlin  * This program is distributed in the hope that it will be useful,
1267b22517SAlexander Sverdlin  * but WITHOUT ANY WARRANTY; without even the implied warranty of
1367b22517SAlexander Sverdlin  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1467b22517SAlexander Sverdlin  * GNU General Public License for more details.
1567b22517SAlexander Sverdlin  */
1667b22517SAlexander Sverdlin 
1767b22517SAlexander Sverdlin #ifndef __CS4271_H
1867b22517SAlexander Sverdlin #define __CS4271_H
1967b22517SAlexander Sverdlin 
2067b22517SAlexander Sverdlin struct cs4271_platform_data {
2167b22517SAlexander Sverdlin 	int gpio_nreset;	/* GPIO driving Reset pin, if any */
2226047e2dSDaniel Mack 	bool amutec_eq_bmutec;	/* flag to enable AMUTEC=BMUTEC */
23*fd23fb9fSDaniel Mack 
24*fd23fb9fSDaniel Mack 	/*
25*fd23fb9fSDaniel Mack 	 * The CS4271 requires its LRCLK and MCLK to be stable before its RESET
26*fd23fb9fSDaniel Mack 	 * line is de-asserted. That also means that clocks cannot be changed
27*fd23fb9fSDaniel Mack 	 * without putting the chip back into hardware reset, which also requires
28*fd23fb9fSDaniel Mack 	 * a complete re-initialization of all registers.
29*fd23fb9fSDaniel Mack 	 *
30*fd23fb9fSDaniel Mack 	 * One (undocumented) workaround is to assert and de-assert the PDN bit
31*fd23fb9fSDaniel Mack 	 * in the MODE2 register. This workaround can be enabled with the
32*fd23fb9fSDaniel Mack 	 * following flag.
33*fd23fb9fSDaniel Mack 	 *
34*fd23fb9fSDaniel Mack 	 * Note that this is not needed in case the clocks are stable
35*fd23fb9fSDaniel Mack 	 * throughout the entire runtime of the codec.
36*fd23fb9fSDaniel Mack 	 */
37*fd23fb9fSDaniel Mack 	bool enable_soft_reset;
3867b22517SAlexander Sverdlin };
3967b22517SAlexander Sverdlin 
4067b22517SAlexander Sverdlin #endif /* __CS4271_H */
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