19aeba629SKrzysztof Helt #ifndef _ACI_H_ 29aeba629SKrzysztof Helt #define _ACI_H_ 39aeba629SKrzysztof Helt 49aeba629SKrzysztof Helt #define ACI_REG_COMMAND 0 /* write register offset */ 59aeba629SKrzysztof Helt #define ACI_REG_STATUS 1 /* read register offset */ 69aeba629SKrzysztof Helt #define ACI_REG_BUSY 2 /* busy register offset */ 79aeba629SKrzysztof Helt #define ACI_REG_RDS 2 /* PCM20: RDS register offset */ 89aeba629SKrzysztof Helt #define ACI_MINTIME 500 /* ACI time out limit */ 99aeba629SKrzysztof Helt 109aeba629SKrzysztof Helt #define ACI_SET_MUTE 0x0d 119aeba629SKrzysztof Helt #define ACI_SET_POWERAMP 0x0f 129aeba629SKrzysztof Helt #define ACI_SET_TUNERMUTE 0xa3 139aeba629SKrzysztof Helt #define ACI_SET_TUNERMONO 0xa4 149aeba629SKrzysztof Helt #define ACI_SET_IDE 0xd0 159aeba629SKrzysztof Helt #define ACI_SET_WSS 0xd1 169aeba629SKrzysztof Helt #define ACI_SET_SOLOMODE 0xd2 179aeba629SKrzysztof Helt #define ACI_SET_PREAMP 0x03 189aeba629SKrzysztof Helt #define ACI_GET_PREAMP 0x21 199aeba629SKrzysztof Helt #define ACI_WRITE_TUNE 0xa7 209aeba629SKrzysztof Helt #define ACI_READ_TUNERSTEREO 0xa8 219aeba629SKrzysztof Helt #define ACI_READ_TUNERSTATION 0xa9 229aeba629SKrzysztof Helt #define ACI_READ_VERSION 0xf1 239aeba629SKrzysztof Helt #define ACI_READ_IDCODE 0xf2 249aeba629SKrzysztof Helt #define ACI_INIT 0xff 259aeba629SKrzysztof Helt #define ACI_STATUS 0xf0 269aeba629SKrzysztof Helt #define ACI_S_GENERAL 0x00 279aeba629SKrzysztof Helt #define ACI_ERROR_OP 0xdf 289aeba629SKrzysztof Helt 299aeba629SKrzysztof Helt /* ACI Mixer */ 309aeba629SKrzysztof Helt 319aeba629SKrzysztof Helt /* These are the values for the right channel GET registers. 329aeba629SKrzysztof Helt Add an offset of 0x01 for the left channel register. 339aeba629SKrzysztof Helt (left=right+0x01) */ 349aeba629SKrzysztof Helt 359aeba629SKrzysztof Helt #define ACI_GET_MASTER 0x03 369aeba629SKrzysztof Helt #define ACI_GET_MIC 0x05 379aeba629SKrzysztof Helt #define ACI_GET_LINE 0x07 389aeba629SKrzysztof Helt #define ACI_GET_CD 0x09 399aeba629SKrzysztof Helt #define ACI_GET_SYNTH 0x0b 409aeba629SKrzysztof Helt #define ACI_GET_PCM 0x0d 419aeba629SKrzysztof Helt #define ACI_GET_LINE1 0x10 /* Radio on PCM20 */ 429aeba629SKrzysztof Helt #define ACI_GET_LINE2 0x12 439aeba629SKrzysztof Helt 449aeba629SKrzysztof Helt #define ACI_GET_EQ1 0x22 /* from Bass ... */ 459aeba629SKrzysztof Helt #define ACI_GET_EQ2 0x24 469aeba629SKrzysztof Helt #define ACI_GET_EQ3 0x26 479aeba629SKrzysztof Helt #define ACI_GET_EQ4 0x28 489aeba629SKrzysztof Helt #define ACI_GET_EQ5 0x2a 499aeba629SKrzysztof Helt #define ACI_GET_EQ6 0x2c 509aeba629SKrzysztof Helt #define ACI_GET_EQ7 0x2e /* ... to Treble */ 519aeba629SKrzysztof Helt 529aeba629SKrzysztof Helt /* And these are the values for the right channel SET registers. 539aeba629SKrzysztof Helt For left channel access you have to add an offset of 0x08. 549aeba629SKrzysztof Helt MASTER is an exception, which needs an offset of 0x01 */ 559aeba629SKrzysztof Helt 569aeba629SKrzysztof Helt #define ACI_SET_MASTER 0x00 579aeba629SKrzysztof Helt #define ACI_SET_MIC 0x30 589aeba629SKrzysztof Helt #define ACI_SET_LINE 0x31 599aeba629SKrzysztof Helt #define ACI_SET_CD 0x34 609aeba629SKrzysztof Helt #define ACI_SET_SYNTH 0x33 619aeba629SKrzysztof Helt #define ACI_SET_PCM 0x32 629aeba629SKrzysztof Helt #define ACI_SET_LINE1 0x35 /* Radio on PCM20 */ 639aeba629SKrzysztof Helt #define ACI_SET_LINE2 0x36 649aeba629SKrzysztof Helt 659aeba629SKrzysztof Helt #define ACI_SET_EQ1 0x40 /* from Bass ... */ 669aeba629SKrzysztof Helt #define ACI_SET_EQ2 0x41 679aeba629SKrzysztof Helt #define ACI_SET_EQ3 0x42 689aeba629SKrzysztof Helt #define ACI_SET_EQ4 0x43 699aeba629SKrzysztof Helt #define ACI_SET_EQ5 0x44 709aeba629SKrzysztof Helt #define ACI_SET_EQ6 0x45 719aeba629SKrzysztof Helt #define ACI_SET_EQ7 0x46 /* ... to Treble */ 729aeba629SKrzysztof Helt 73*9dc9120cSKrzysztof Helt struct snd_miro_aci { 74*9dc9120cSKrzysztof Helt unsigned long aci_port; 75*9dc9120cSKrzysztof Helt int aci_vendor; 76*9dc9120cSKrzysztof Helt int aci_product; 77*9dc9120cSKrzysztof Helt int aci_version; 78*9dc9120cSKrzysztof Helt int aci_amp; 79*9dc9120cSKrzysztof Helt int aci_preamp; 80*9dc9120cSKrzysztof Helt int aci_solomode; 81*9dc9120cSKrzysztof Helt 82*9dc9120cSKrzysztof Helt struct mutex aci_mutex; 83*9dc9120cSKrzysztof Helt }; 84*9dc9120cSKrzysztof Helt 85*9dc9120cSKrzysztof Helt int snd_aci_cmd(struct snd_miro_aci *aci, int write1, int write2, int write3); 86*9dc9120cSKrzysztof Helt 87*9dc9120cSKrzysztof Helt struct snd_miro_aci *snd_aci_get_aci(void); 88*9dc9120cSKrzysztof Helt 899aeba629SKrzysztof Helt #endif /* _ACI_H_ */ 90*9dc9120cSKrzysztof Helt 91