1 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc. 2 * 3 * Redistribution and use in source and binary forms, with or without 4 * modification, are permitted provided that the following conditions are met: 5 * * Redistributions of source code must retain the above copyright 6 * notice, this list of conditions and the following disclaimer. 7 * * Redistributions in binary form must reproduce the above copyright 8 * notice, this list of conditions and the following disclaimer in the 9 * documentation and/or other materials provided with the distribution. 10 * * Neither the name of Freescale Semiconductor nor the 11 * names of its contributors may be used to endorse or promote products 12 * derived from this software without specific prior written permission. 13 * 14 * ALTERNATIVELY, this software may be distributed under the terms of the 15 * GNU General Public License ("GPL") as published by the Free Software 16 * Foundation, either version 2 of that License or (at your option) any 17 * later version. 18 * 19 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 20 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __FSL_QMAN_H 32 #define __FSL_QMAN_H 33 34 #include <linux/bitops.h> 35 36 /* Hardware constants */ 37 #define QM_CHANNEL_SWPORTAL0 0 38 #define QMAN_CHANNEL_POOL1 0x21 39 #define QMAN_CHANNEL_POOL1_REV3 0x401 40 extern u16 qm_channel_pool1; 41 42 /* Portal processing (interrupt) sources */ 43 #define QM_PIRQ_CSCI 0x00100000 /* Congestion State Change */ 44 #define QM_PIRQ_EQCI 0x00080000 /* Enqueue Command Committed */ 45 #define QM_PIRQ_EQRI 0x00040000 /* EQCR Ring (below threshold) */ 46 #define QM_PIRQ_DQRI 0x00020000 /* DQRR Ring (non-empty) */ 47 #define QM_PIRQ_MRI 0x00010000 /* MR Ring (non-empty) */ 48 /* 49 * This mask contains all the interrupt sources that need handling except DQRI, 50 * ie. that if present should trigger slow-path processing. 51 */ 52 #define QM_PIRQ_SLOW (QM_PIRQ_CSCI | QM_PIRQ_EQCI | QM_PIRQ_EQRI | \ 53 QM_PIRQ_MRI) 54 55 /* For qman_static_dequeue_*** APIs */ 56 #define QM_SDQCR_CHANNELS_POOL_MASK 0x00007fff 57 /* for n in [1,15] */ 58 #define QM_SDQCR_CHANNELS_POOL(n) (0x00008000 >> (n)) 59 /* for conversion from n of qm_channel */ 60 static inline u32 QM_SDQCR_CHANNELS_POOL_CONV(u16 channel) 61 { 62 return QM_SDQCR_CHANNELS_POOL(channel + 1 - qm_channel_pool1); 63 } 64 65 /* --- QMan data structures (and associated constants) --- */ 66 67 /* "Frame Descriptor (FD)" */ 68 struct qm_fd { 69 union { 70 struct { 71 u8 cfg8b_w1; 72 u8 bpid; /* Buffer Pool ID */ 73 u8 cfg8b_w3; 74 u8 addr_hi; /* high 8-bits of 40-bit address */ 75 __be32 addr_lo; /* low 32-bits of 40-bit address */ 76 } __packed; 77 __be64 data; 78 }; 79 __be32 cfg; /* format, offset, length / congestion */ 80 union { 81 __be32 cmd; 82 __be32 status; 83 }; 84 } __aligned(8); 85 86 #define QM_FD_FORMAT_SG BIT(31) 87 #define QM_FD_FORMAT_LONG BIT(30) 88 #define QM_FD_FORMAT_COMPOUND BIT(29) 89 #define QM_FD_FORMAT_MASK GENMASK(31, 29) 90 #define QM_FD_OFF_SHIFT 20 91 #define QM_FD_OFF_MASK GENMASK(28, 20) 92 #define QM_FD_LEN_MASK GENMASK(19, 0) 93 #define QM_FD_LEN_BIG_MASK GENMASK(28, 0) 94 95 enum qm_fd_format { 96 /* 97 * 'contig' implies a contiguous buffer, whereas 'sg' implies a 98 * scatter-gather table. 'big' implies a 29-bit length with no offset 99 * field, otherwise length is 20-bit and offset is 9-bit. 'compound' 100 * implies a s/g-like table, where each entry itself represents a frame 101 * (contiguous or scatter-gather) and the 29-bit "length" is 102 * interpreted purely for congestion calculations, ie. a "congestion 103 * weight". 104 */ 105 qm_fd_contig = 0, 106 qm_fd_contig_big = QM_FD_FORMAT_LONG, 107 qm_fd_sg = QM_FD_FORMAT_SG, 108 qm_fd_sg_big = QM_FD_FORMAT_SG | QM_FD_FORMAT_LONG, 109 qm_fd_compound = QM_FD_FORMAT_COMPOUND 110 }; 111 112 static inline dma_addr_t qm_fd_addr(const struct qm_fd *fd) 113 { 114 return be64_to_cpu(fd->data) & 0xffffffffffLLU; 115 } 116 117 static inline u64 qm_fd_addr_get64(const struct qm_fd *fd) 118 { 119 return be64_to_cpu(fd->data) & 0xffffffffffLLU; 120 } 121 122 static inline void qm_fd_addr_set64(struct qm_fd *fd, u64 addr) 123 { 124 fd->addr_hi = upper_32_bits(addr); 125 fd->addr_lo = cpu_to_be32(lower_32_bits(addr)); 126 } 127 128 /* 129 * The 'format' field indicates the interpretation of the remaining 130 * 29 bits of the 32-bit word. 131 * If 'format' is _contig or _sg, 20b length and 9b offset. 132 * If 'format' is _contig_big or _sg_big, 29b length. 133 * If 'format' is _compound, 29b "congestion weight". 134 */ 135 static inline enum qm_fd_format qm_fd_get_format(const struct qm_fd *fd) 136 { 137 return be32_to_cpu(fd->cfg) & QM_FD_FORMAT_MASK; 138 } 139 140 static inline int qm_fd_get_offset(const struct qm_fd *fd) 141 { 142 return (be32_to_cpu(fd->cfg) & QM_FD_OFF_MASK) >> QM_FD_OFF_SHIFT; 143 } 144 145 static inline int qm_fd_get_length(const struct qm_fd *fd) 146 { 147 return be32_to_cpu(fd->cfg) & QM_FD_LEN_MASK; 148 } 149 150 static inline int qm_fd_get_len_big(const struct qm_fd *fd) 151 { 152 return be32_to_cpu(fd->cfg) & QM_FD_LEN_BIG_MASK; 153 } 154 155 static inline void qm_fd_set_param(struct qm_fd *fd, enum qm_fd_format fmt, 156 int off, int len) 157 { 158 fd->cfg = cpu_to_be32(fmt | (len & QM_FD_LEN_BIG_MASK) | 159 ((off << QM_FD_OFF_SHIFT) & QM_FD_OFF_MASK)); 160 } 161 162 #define qm_fd_set_contig(fd, off, len) \ 163 qm_fd_set_param(fd, qm_fd_contig, off, len) 164 #define qm_fd_set_sg(fd, off, len) qm_fd_set_param(fd, qm_fd_sg, off, len) 165 #define qm_fd_set_contig_big(fd, len) \ 166 qm_fd_set_param(fd, qm_fd_contig_big, 0, len) 167 #define qm_fd_set_sg_big(fd, len) qm_fd_set_param(fd, qm_fd_sg_big, 0, len) 168 169 static inline void qm_fd_clear_fd(struct qm_fd *fd) 170 { 171 fd->data = 0; 172 fd->cfg = 0; 173 fd->cmd = 0; 174 } 175 176 /* Scatter/Gather table entry */ 177 struct qm_sg_entry { 178 union { 179 struct { 180 u8 __reserved1[3]; 181 u8 addr_hi; /* high 8-bits of 40-bit address */ 182 __be32 addr_lo; /* low 32-bits of 40-bit address */ 183 }; 184 __be64 data; 185 }; 186 __be32 cfg; /* E bit, F bit, length */ 187 u8 __reserved2; 188 u8 bpid; 189 __be16 offset; /* 13-bit, _res[13-15]*/ 190 } __packed; 191 192 #define QM_SG_LEN_MASK GENMASK(29, 0) 193 #define QM_SG_OFF_MASK GENMASK(12, 0) 194 #define QM_SG_FIN BIT(30) 195 #define QM_SG_EXT BIT(31) 196 197 static inline dma_addr_t qm_sg_addr(const struct qm_sg_entry *sg) 198 { 199 return be64_to_cpu(sg->data) & 0xffffffffffLLU; 200 } 201 202 static inline u64 qm_sg_entry_get64(const struct qm_sg_entry *sg) 203 { 204 return be64_to_cpu(sg->data) & 0xffffffffffLLU; 205 } 206 207 static inline void qm_sg_entry_set64(struct qm_sg_entry *sg, u64 addr) 208 { 209 sg->addr_hi = upper_32_bits(addr); 210 sg->addr_lo = cpu_to_be32(lower_32_bits(addr)); 211 } 212 213 static inline bool qm_sg_entry_is_final(const struct qm_sg_entry *sg) 214 { 215 return be32_to_cpu(sg->cfg) & QM_SG_FIN; 216 } 217 218 static inline bool qm_sg_entry_is_ext(const struct qm_sg_entry *sg) 219 { 220 return be32_to_cpu(sg->cfg) & QM_SG_EXT; 221 } 222 223 static inline int qm_sg_entry_get_len(const struct qm_sg_entry *sg) 224 { 225 return be32_to_cpu(sg->cfg) & QM_SG_LEN_MASK; 226 } 227 228 static inline void qm_sg_entry_set_len(struct qm_sg_entry *sg, int len) 229 { 230 sg->cfg = cpu_to_be32(len & QM_SG_LEN_MASK); 231 } 232 233 static inline void qm_sg_entry_set_f(struct qm_sg_entry *sg, int len) 234 { 235 sg->cfg = cpu_to_be32(QM_SG_FIN | (len & QM_SG_LEN_MASK)); 236 } 237 238 static inline int qm_sg_entry_get_off(const struct qm_sg_entry *sg) 239 { 240 return be32_to_cpu(sg->offset) & QM_SG_OFF_MASK; 241 } 242 243 /* "Frame Dequeue Response" */ 244 struct qm_dqrr_entry { 245 u8 verb; 246 u8 stat; 247 u16 seqnum; /* 15-bit */ 248 u8 tok; 249 u8 __reserved2[3]; 250 u32 fqid; /* 24-bit */ 251 u32 contextB; 252 struct qm_fd fd; 253 u8 __reserved4[32]; 254 } __packed; 255 #define QM_DQRR_VERB_VBIT 0x80 256 #define QM_DQRR_VERB_MASK 0x7f /* where the verb contains; */ 257 #define QM_DQRR_VERB_FRAME_DEQUEUE 0x60 /* "this format" */ 258 #define QM_DQRR_STAT_FQ_EMPTY 0x80 /* FQ empty */ 259 #define QM_DQRR_STAT_FQ_HELDACTIVE 0x40 /* FQ held active */ 260 #define QM_DQRR_STAT_FQ_FORCEELIGIBLE 0x20 /* FQ was force-eligible'd */ 261 #define QM_DQRR_STAT_FD_VALID 0x10 /* has a non-NULL FD */ 262 #define QM_DQRR_STAT_UNSCHEDULED 0x02 /* Unscheduled dequeue */ 263 #define QM_DQRR_STAT_DQCR_EXPIRED 0x01 /* VDQCR or PDQCR expired*/ 264 265 /* "ERN Message Response" */ 266 /* "FQ State Change Notification" */ 267 union qm_mr_entry { 268 struct { 269 u8 verb; 270 u8 __reserved[63]; 271 }; 272 struct { 273 u8 verb; 274 u8 dca; 275 u16 seqnum; 276 u8 rc; /* Rej Code: 8-bit */ 277 u8 orp_hi; /* ORP: 24-bit */ 278 u16 orp_lo; 279 u32 fqid; /* 24-bit */ 280 u32 tag; 281 struct qm_fd fd; 282 u8 __reserved1[32]; 283 } __packed ern; 284 struct { 285 u8 verb; 286 u8 fqs; /* Frame Queue Status */ 287 u8 __reserved1[6]; 288 u32 fqid; /* 24-bit */ 289 u32 contextB; 290 u8 __reserved2[48]; 291 } __packed fq; /* FQRN/FQRNI/FQRL/FQPN */ 292 }; 293 #define QM_MR_VERB_VBIT 0x80 294 /* 295 * ERNs originating from direct-connect portals ("dcern") use 0x20 as a verb 296 * which would be invalid as a s/w enqueue verb. A s/w ERN can be distinguished 297 * from the other MR types by noting if the 0x20 bit is unset. 298 */ 299 #define QM_MR_VERB_TYPE_MASK 0x27 300 #define QM_MR_VERB_DC_ERN 0x20 301 #define QM_MR_VERB_FQRN 0x21 302 #define QM_MR_VERB_FQRNI 0x22 303 #define QM_MR_VERB_FQRL 0x23 304 #define QM_MR_VERB_FQPN 0x24 305 #define QM_MR_RC_MASK 0xf0 /* contains one of; */ 306 #define QM_MR_RC_CGR_TAILDROP 0x00 307 #define QM_MR_RC_WRED 0x10 308 #define QM_MR_RC_ERROR 0x20 309 #define QM_MR_RC_ORPWINDOW_EARLY 0x30 310 #define QM_MR_RC_ORPWINDOW_LATE 0x40 311 #define QM_MR_RC_FQ_TAILDROP 0x50 312 #define QM_MR_RC_ORPWINDOW_RETIRED 0x60 313 #define QM_MR_RC_ORP_ZERO 0x70 314 #define QM_MR_FQS_ORLPRESENT 0x02 /* ORL fragments to come */ 315 #define QM_MR_FQS_NOTEMPTY 0x01 /* FQ has enqueued frames */ 316 317 /* 318 * An identical structure of FQD fields is present in the "Init FQ" command and 319 * the "Query FQ" result, it's suctioned out into the "struct qm_fqd" type. 320 * Within that, the 'stashing' and 'taildrop' pieces are also factored out, the 321 * latter has two inlines to assist with converting to/from the mant+exp 322 * representation. 323 */ 324 struct qm_fqd_stashing { 325 /* See QM_STASHING_EXCL_<...> */ 326 u8 exclusive; 327 /* Numbers of cachelines */ 328 u8 cl; /* _res[6-7], as[4-5], ds[2-3], cs[0-1] */ 329 }; 330 331 struct qm_fqd_oac { 332 /* "Overhead Accounting Control", see QM_OAC_<...> */ 333 u8 oac; /* oac[6-7], _res[0-5] */ 334 /* Two's-complement value (-128 to +127) */ 335 s8 oal; /* "Overhead Accounting Length" */ 336 }; 337 338 struct qm_fqd { 339 /* _res[6-7], orprws[3-5], oa[2], olws[0-1] */ 340 u8 orpc; 341 u8 cgid; 342 __be16 fq_ctrl; /* See QM_FQCTRL_<...> */ 343 __be16 dest_wq; /* channel[3-15], wq[0-2] */ 344 __be16 ics_cred; /* 15-bit */ 345 /* 346 * For "Initialize Frame Queue" commands, the write-enable mask 347 * determines whether 'td' or 'oac_init' is observed. For query 348 * commands, this field is always 'td', and 'oac_query' (below) reflects 349 * the Overhead ACcounting values. 350 */ 351 union { 352 __be16 td; /* "Taildrop": _res[13-15], mant[5-12], exp[0-4] */ 353 struct qm_fqd_oac oac_init; 354 }; 355 __be32 context_b; 356 union { 357 /* Treat it as 64-bit opaque */ 358 __be64 opaque; 359 struct { 360 __be32 hi; 361 __be32 lo; 362 }; 363 /* Treat it as s/w portal stashing config */ 364 /* see "FQD Context_A field used for [...]" */ 365 struct { 366 struct qm_fqd_stashing stashing; 367 /* 368 * 48-bit address of FQ context to 369 * stash, must be cacheline-aligned 370 */ 371 __be16 context_hi; 372 __be32 context_lo; 373 } __packed; 374 } context_a; 375 struct qm_fqd_oac oac_query; 376 } __packed; 377 378 #define QM_FQD_CHAN_OFF 3 379 #define QM_FQD_WQ_MASK GENMASK(2, 0) 380 #define QM_FQD_TD_EXP_MASK GENMASK(4, 0) 381 #define QM_FQD_TD_MANT_OFF 5 382 #define QM_FQD_TD_MANT_MASK GENMASK(12, 5) 383 #define QM_FQD_TD_MAX 0xe0000000 384 #define QM_FQD_TD_MANT_MAX 0xff 385 #define QM_FQD_OAC_OFF 6 386 #define QM_FQD_AS_OFF 4 387 #define QM_FQD_DS_OFF 2 388 #define QM_FQD_XS_MASK 0x3 389 390 /* 64-bit converters for context_hi/lo */ 391 static inline u64 qm_fqd_stashing_get64(const struct qm_fqd *fqd) 392 { 393 return be64_to_cpu(fqd->context_a.opaque) & 0xffffffffffffULL; 394 } 395 396 static inline dma_addr_t qm_fqd_stashing_addr(const struct qm_fqd *fqd) 397 { 398 return be64_to_cpu(fqd->context_a.opaque) & 0xffffffffffffULL; 399 } 400 401 static inline u64 qm_fqd_context_a_get64(const struct qm_fqd *fqd) 402 { 403 return qm_fqd_stashing_get64(fqd); 404 } 405 406 static inline void qm_fqd_stashing_set64(struct qm_fqd *fqd, u64 addr) 407 { 408 fqd->context_a.context_hi = upper_32_bits(addr); 409 fqd->context_a.context_lo = lower_32_bits(addr); 410 } 411 412 static inline void qm_fqd_context_a_set64(struct qm_fqd *fqd, u64 addr) 413 { 414 fqd->context_a.hi = cpu_to_be16(upper_32_bits(addr)); 415 fqd->context_a.lo = cpu_to_be32(lower_32_bits(addr)); 416 } 417 418 /* convert a threshold value into mant+exp representation */ 419 static inline int qm_fqd_set_taildrop(struct qm_fqd *fqd, u32 val, 420 int roundup) 421 { 422 u32 e = 0; 423 int td, oddbit = 0; 424 425 if (val > QM_FQD_TD_MAX) 426 return -ERANGE; 427 428 while (val > QM_FQD_TD_MANT_MAX) { 429 oddbit = val & 1; 430 val >>= 1; 431 e++; 432 if (roundup && oddbit) 433 val++; 434 } 435 436 td = (val << QM_FQD_TD_MANT_OFF) & QM_FQD_TD_MANT_MASK; 437 td |= (e & QM_FQD_TD_EXP_MASK); 438 fqd->td = cpu_to_be16(td); 439 return 0; 440 } 441 /* and the other direction */ 442 static inline int qm_fqd_get_taildrop(const struct qm_fqd *fqd) 443 { 444 int td = be16_to_cpu(fqd->td); 445 446 return ((td & QM_FQD_TD_MANT_MASK) >> QM_FQD_TD_MANT_OFF) 447 << (td & QM_FQD_TD_EXP_MASK); 448 } 449 450 static inline void qm_fqd_set_stashing(struct qm_fqd *fqd, u8 as, u8 ds, u8 cs) 451 { 452 struct qm_fqd_stashing *st = &fqd->context_a.stashing; 453 454 st->cl = ((as & QM_FQD_XS_MASK) << QM_FQD_AS_OFF) | 455 ((ds & QM_FQD_XS_MASK) << QM_FQD_DS_OFF) | 456 (cs & QM_FQD_XS_MASK); 457 } 458 459 static inline u8 qm_fqd_get_stashing(const struct qm_fqd *fqd) 460 { 461 return fqd->context_a.stashing.cl; 462 } 463 464 static inline void qm_fqd_set_oac(struct qm_fqd *fqd, u8 val) 465 { 466 fqd->oac_init.oac = val << QM_FQD_OAC_OFF; 467 } 468 469 static inline void qm_fqd_set_oal(struct qm_fqd *fqd, s8 val) 470 { 471 fqd->oac_init.oal = val; 472 } 473 474 static inline void qm_fqd_set_destwq(struct qm_fqd *fqd, int ch, int wq) 475 { 476 fqd->dest_wq = cpu_to_be16((ch << QM_FQD_CHAN_OFF) | 477 (wq & QM_FQD_WQ_MASK)); 478 } 479 480 static inline int qm_fqd_get_chan(const struct qm_fqd *fqd) 481 { 482 return be16_to_cpu(fqd->dest_wq) >> QM_FQD_CHAN_OFF; 483 } 484 485 static inline int qm_fqd_get_wq(const struct qm_fqd *fqd) 486 { 487 return be16_to_cpu(fqd->dest_wq) & QM_FQD_WQ_MASK; 488 } 489 490 /* See "Frame Queue Descriptor (FQD)" */ 491 /* Frame Queue Descriptor (FQD) field 'fq_ctrl' uses these constants */ 492 #define QM_FQCTRL_MASK 0x07ff /* 'fq_ctrl' flags; */ 493 #define QM_FQCTRL_CGE 0x0400 /* Congestion Group Enable */ 494 #define QM_FQCTRL_TDE 0x0200 /* Tail-Drop Enable */ 495 #define QM_FQCTRL_CTXASTASHING 0x0080 /* Context-A stashing */ 496 #define QM_FQCTRL_CPCSTASH 0x0040 /* CPC Stash Enable */ 497 #define QM_FQCTRL_FORCESFDR 0x0008 /* High-priority SFDRs */ 498 #define QM_FQCTRL_AVOIDBLOCK 0x0004 /* Don't block active */ 499 #define QM_FQCTRL_HOLDACTIVE 0x0002 /* Hold active in portal */ 500 #define QM_FQCTRL_PREFERINCACHE 0x0001 /* Aggressively cache FQD */ 501 #define QM_FQCTRL_LOCKINCACHE QM_FQCTRL_PREFERINCACHE /* older naming */ 502 503 /* See "FQD Context_A field used for [...] */ 504 /* Frame Queue Descriptor (FQD) field 'CONTEXT_A' uses these constants */ 505 #define QM_STASHING_EXCL_ANNOTATION 0x04 506 #define QM_STASHING_EXCL_DATA 0x02 507 #define QM_STASHING_EXCL_CTX 0x01 508 509 /* See "Intra Class Scheduling" */ 510 /* FQD field 'OAC' (Overhead ACcounting) uses these constants */ 511 #define QM_OAC_ICS 0x2 /* Accounting for Intra-Class Scheduling */ 512 #define QM_OAC_CG 0x1 /* Accounting for Congestion Groups */ 513 514 /* 515 * This struct represents the 32-bit "WR_PARM_[GYR]" parameters in CGR fields 516 * and associated commands/responses. The WRED parameters are calculated from 517 * these fields as follows; 518 * MaxTH = MA * (2 ^ Mn) 519 * Slope = SA / (2 ^ Sn) 520 * MaxP = 4 * (Pn + 1) 521 */ 522 struct qm_cgr_wr_parm { 523 /* MA[24-31], Mn[19-23], SA[12-18], Sn[6-11], Pn[0-5] */ 524 u32 word; 525 }; 526 /* 527 * This struct represents the 13-bit "CS_THRES" CGR field. In the corresponding 528 * management commands, this is padded to a 16-bit structure field, so that's 529 * how we represent it here. The congestion state threshold is calculated from 530 * these fields as follows; 531 * CS threshold = TA * (2 ^ Tn) 532 */ 533 struct qm_cgr_cs_thres { 534 /* _res[13-15], TA[5-12], Tn[0-4] */ 535 u16 word; 536 }; 537 /* 538 * This identical structure of CGR fields is present in the "Init/Modify CGR" 539 * commands and the "Query CGR" result. It's suctioned out here into its own 540 * struct. 541 */ 542 struct __qm_mc_cgr { 543 struct qm_cgr_wr_parm wr_parm_g; 544 struct qm_cgr_wr_parm wr_parm_y; 545 struct qm_cgr_wr_parm wr_parm_r; 546 u8 wr_en_g; /* boolean, use QM_CGR_EN */ 547 u8 wr_en_y; /* boolean, use QM_CGR_EN */ 548 u8 wr_en_r; /* boolean, use QM_CGR_EN */ 549 u8 cscn_en; /* boolean, use QM_CGR_EN */ 550 union { 551 struct { 552 u16 cscn_targ_upd_ctrl; /* use QM_CSCN_TARG_UDP_ */ 553 u16 cscn_targ_dcp_low; /* CSCN_TARG_DCP low-16bits */ 554 }; 555 u32 cscn_targ; /* use QM_CGR_TARG_* */ 556 }; 557 u8 cstd_en; /* boolean, use QM_CGR_EN */ 558 u8 cs; /* boolean, only used in query response */ 559 struct qm_cgr_cs_thres cs_thres; /* use qm_cgr_cs_thres_set64() */ 560 u8 mode; /* QMAN_CGR_MODE_FRAME not supported in rev1.0 */ 561 } __packed; 562 #define QM_CGR_EN 0x01 /* For wr_en_*, cscn_en, cstd_en */ 563 #define QM_CGR_TARG_UDP_CTRL_WRITE_BIT 0x8000 /* value written to portal bit*/ 564 #define QM_CGR_TARG_UDP_CTRL_DCP 0x4000 /* 0: SWP, 1: DCP */ 565 #define QM_CGR_TARG_PORTAL(n) (0x80000000 >> (n)) /* s/w portal, 0-9 */ 566 #define QM_CGR_TARG_FMAN0 0x00200000 /* direct-connect portal: fman0 */ 567 #define QM_CGR_TARG_FMAN1 0x00100000 /* : fman1 */ 568 /* Convert CGR thresholds to/from "cs_thres" format */ 569 static inline u64 qm_cgr_cs_thres_get64(const struct qm_cgr_cs_thres *th) 570 { 571 return ((th->word >> 5) & 0xff) << (th->word & 0x1f); 572 } 573 574 static inline int qm_cgr_cs_thres_set64(struct qm_cgr_cs_thres *th, u64 val, 575 int roundup) 576 { 577 u32 e = 0; 578 int oddbit = 0; 579 580 while (val > 0xff) { 581 oddbit = val & 1; 582 val >>= 1; 583 e++; 584 if (roundup && oddbit) 585 val++; 586 } 587 th->word = ((val & 0xff) << 5) | (e & 0x1f); 588 return 0; 589 } 590 591 /* "Initialize FQ" */ 592 struct qm_mcc_initfq { 593 u8 __reserved1[2]; 594 u16 we_mask; /* Write Enable Mask */ 595 u32 fqid; /* 24-bit */ 596 u16 count; /* Initialises 'count+1' FQDs */ 597 struct qm_fqd fqd; /* the FQD fields go here */ 598 u8 __reserved2[30]; 599 } __packed; 600 /* "Initialize/Modify CGR" */ 601 struct qm_mcc_initcgr { 602 u8 __reserve1[2]; 603 u16 we_mask; /* Write Enable Mask */ 604 struct __qm_mc_cgr cgr; /* CGR fields */ 605 u8 __reserved2[2]; 606 u8 cgid; 607 u8 __reserved3[32]; 608 } __packed; 609 610 /* INITFQ-specific flags */ 611 #define QM_INITFQ_WE_MASK 0x01ff /* 'Write Enable' flags; */ 612 #define QM_INITFQ_WE_OAC 0x0100 613 #define QM_INITFQ_WE_ORPC 0x0080 614 #define QM_INITFQ_WE_CGID 0x0040 615 #define QM_INITFQ_WE_FQCTRL 0x0020 616 #define QM_INITFQ_WE_DESTWQ 0x0010 617 #define QM_INITFQ_WE_ICSCRED 0x0008 618 #define QM_INITFQ_WE_TDTHRESH 0x0004 619 #define QM_INITFQ_WE_CONTEXTB 0x0002 620 #define QM_INITFQ_WE_CONTEXTA 0x0001 621 /* INITCGR/MODIFYCGR-specific flags */ 622 #define QM_CGR_WE_MASK 0x07ff /* 'Write Enable Mask'; */ 623 #define QM_CGR_WE_WR_PARM_G 0x0400 624 #define QM_CGR_WE_WR_PARM_Y 0x0200 625 #define QM_CGR_WE_WR_PARM_R 0x0100 626 #define QM_CGR_WE_WR_EN_G 0x0080 627 #define QM_CGR_WE_WR_EN_Y 0x0040 628 #define QM_CGR_WE_WR_EN_R 0x0020 629 #define QM_CGR_WE_CSCN_EN 0x0010 630 #define QM_CGR_WE_CSCN_TARG 0x0008 631 #define QM_CGR_WE_CSTD_EN 0x0004 632 #define QM_CGR_WE_CS_THRES 0x0002 633 #define QM_CGR_WE_MODE 0x0001 634 635 #define QMAN_CGR_FLAG_USE_INIT 0x00000001 636 637 /* Portal and Frame Queues */ 638 /* Represents a managed portal */ 639 struct qman_portal; 640 641 /* 642 * This object type represents QMan frame queue descriptors (FQD), it is 643 * cacheline-aligned, and initialised by qman_create_fq(). The structure is 644 * defined further down. 645 */ 646 struct qman_fq; 647 648 /* 649 * This object type represents a QMan congestion group, it is defined further 650 * down. 651 */ 652 struct qman_cgr; 653 654 /* 655 * This enum, and the callback type that returns it, are used when handling 656 * dequeued frames via DQRR. Note that for "null" callbacks registered with the 657 * portal object (for handling dequeues that do not demux because contextB is 658 * NULL), the return value *MUST* be qman_cb_dqrr_consume. 659 */ 660 enum qman_cb_dqrr_result { 661 /* DQRR entry can be consumed */ 662 qman_cb_dqrr_consume, 663 /* Like _consume, but requests parking - FQ must be held-active */ 664 qman_cb_dqrr_park, 665 /* Does not consume, for DCA mode only. */ 666 qman_cb_dqrr_defer, 667 /* 668 * Stop processing without consuming this ring entry. Exits the current 669 * qman_p_poll_dqrr() or interrupt-handling, as appropriate. If within 670 * an interrupt handler, the callback would typically call 671 * qman_irqsource_remove(QM_PIRQ_DQRI) before returning this value, 672 * otherwise the interrupt will reassert immediately. 673 */ 674 qman_cb_dqrr_stop, 675 /* Like qman_cb_dqrr_stop, but consumes the current entry. */ 676 qman_cb_dqrr_consume_stop 677 }; 678 typedef enum qman_cb_dqrr_result (*qman_cb_dqrr)(struct qman_portal *qm, 679 struct qman_fq *fq, 680 const struct qm_dqrr_entry *dqrr); 681 682 /* 683 * This callback type is used when handling ERNs, FQRNs and FQRLs via MR. They 684 * are always consumed after the callback returns. 685 */ 686 typedef void (*qman_cb_mr)(struct qman_portal *qm, struct qman_fq *fq, 687 const union qm_mr_entry *msg); 688 689 /* 690 * s/w-visible states. Ie. tentatively scheduled + truly scheduled + active + 691 * held-active + held-suspended are just "sched". Things like "retired" will not 692 * be assumed until it is complete (ie. QMAN_FQ_STATE_CHANGING is set until 693 * then, to indicate it's completing and to gate attempts to retry the retire 694 * command). Note, park commands do not set QMAN_FQ_STATE_CHANGING because it's 695 * technically impossible in the case of enqueue DCAs (which refer to DQRR ring 696 * index rather than the FQ that ring entry corresponds to), so repeated park 697 * commands are allowed (if you're silly enough to try) but won't change FQ 698 * state, and the resulting park notifications move FQs from "sched" to 699 * "parked". 700 */ 701 enum qman_fq_state { 702 qman_fq_state_oos, 703 qman_fq_state_parked, 704 qman_fq_state_sched, 705 qman_fq_state_retired 706 }; 707 708 #define QMAN_FQ_STATE_CHANGING 0x80000000 /* 'state' is changing */ 709 #define QMAN_FQ_STATE_NE 0x40000000 /* retired FQ isn't empty */ 710 #define QMAN_FQ_STATE_ORL 0x20000000 /* retired FQ has ORL */ 711 #define QMAN_FQ_STATE_BLOCKOOS 0xe0000000 /* if any are set, no OOS */ 712 #define QMAN_FQ_STATE_CGR_EN 0x10000000 /* CGR enabled */ 713 #define QMAN_FQ_STATE_VDQCR 0x08000000 /* being volatile dequeued */ 714 715 /* 716 * Frame queue objects (struct qman_fq) are stored within memory passed to 717 * qman_create_fq(), as this allows stashing of caller-provided demux callback 718 * pointers at no extra cost to stashing of (driver-internal) FQ state. If the 719 * caller wishes to add per-FQ state and have it benefit from dequeue-stashing, 720 * they should; 721 * 722 * (a) extend the qman_fq structure with their state; eg. 723 * 724 * // myfq is allocated and driver_fq callbacks filled in; 725 * struct my_fq { 726 * struct qman_fq base; 727 * int an_extra_field; 728 * [ ... add other fields to be associated with each FQ ...] 729 * } *myfq = some_my_fq_allocator(); 730 * struct qman_fq *fq = qman_create_fq(fqid, flags, &myfq->base); 731 * 732 * // in a dequeue callback, access extra fields from 'fq' via a cast; 733 * struct my_fq *myfq = (struct my_fq *)fq; 734 * do_something_with(myfq->an_extra_field); 735 * [...] 736 * 737 * (b) when and if configuring the FQ for context stashing, specify how ever 738 * many cachelines are required to stash 'struct my_fq', to accelerate not 739 * only the QMan driver but the callback as well. 740 */ 741 742 struct qman_fq_cb { 743 qman_cb_dqrr dqrr; /* for dequeued frames */ 744 qman_cb_mr ern; /* for s/w ERNs */ 745 qman_cb_mr fqs; /* frame-queue state changes*/ 746 }; 747 748 struct qman_fq { 749 /* Caller of qman_create_fq() provides these demux callbacks */ 750 struct qman_fq_cb cb; 751 /* 752 * These are internal to the driver, don't touch. In particular, they 753 * may change, be removed, or extended (so you shouldn't rely on 754 * sizeof(qman_fq) being a constant). 755 */ 756 u32 fqid, idx; 757 unsigned long flags; 758 enum qman_fq_state state; 759 int cgr_groupid; 760 }; 761 762 /* 763 * This callback type is used when handling congestion group entry/exit. 764 * 'congested' is non-zero on congestion-entry, and zero on congestion-exit. 765 */ 766 typedef void (*qman_cb_cgr)(struct qman_portal *qm, 767 struct qman_cgr *cgr, int congested); 768 769 struct qman_cgr { 770 /* Set these prior to qman_create_cgr() */ 771 u32 cgrid; /* 0..255, but u32 to allow specials like -1, 256, etc.*/ 772 qman_cb_cgr cb; 773 /* These are private to the driver */ 774 u16 chan; /* portal channel this object is created on */ 775 struct list_head node; 776 }; 777 778 /* Flags to qman_create_fq() */ 779 #define QMAN_FQ_FLAG_NO_ENQUEUE 0x00000001 /* can't enqueue */ 780 #define QMAN_FQ_FLAG_NO_MODIFY 0x00000002 /* can only enqueue */ 781 #define QMAN_FQ_FLAG_TO_DCPORTAL 0x00000004 /* consumed by CAAM/PME/Fman */ 782 #define QMAN_FQ_FLAG_DYNAMIC_FQID 0x00000020 /* (de)allocate fqid */ 783 784 /* Flags to qman_init_fq() */ 785 #define QMAN_INITFQ_FLAG_SCHED 0x00000001 /* schedule rather than park */ 786 #define QMAN_INITFQ_FLAG_LOCAL 0x00000004 /* set dest portal */ 787 788 /* Portal Management */ 789 /** 790 * qman_p_irqsource_add - add processing sources to be interrupt-driven 791 * @bits: bitmask of QM_PIRQ_**I processing sources 792 * 793 * Adds processing sources that should be interrupt-driven (rather than 794 * processed via qman_poll_***() functions). 795 */ 796 void qman_p_irqsource_add(struct qman_portal *p, u32 bits); 797 798 /** 799 * qman_p_irqsource_remove - remove processing sources from being int-driven 800 * @bits: bitmask of QM_PIRQ_**I processing sources 801 * 802 * Removes processing sources from being interrupt-driven, so that they will 803 * instead be processed via qman_poll_***() functions. 804 */ 805 void qman_p_irqsource_remove(struct qman_portal *p, u32 bits); 806 807 /** 808 * qman_affine_cpus - return a mask of cpus that have affine portals 809 */ 810 const cpumask_t *qman_affine_cpus(void); 811 812 /** 813 * qman_affine_channel - return the channel ID of an portal 814 * @cpu: the cpu whose affine portal is the subject of the query 815 * 816 * If @cpu is -1, the affine portal for the current CPU will be used. It is a 817 * bug to call this function for any value of @cpu (other than -1) that is not a 818 * member of the mask returned from qman_affine_cpus(). 819 */ 820 u16 qman_affine_channel(int cpu); 821 822 /** 823 * qman_get_affine_portal - return the portal pointer affine to cpu 824 * @cpu: the cpu whose affine portal is the subject of the query 825 */ 826 struct qman_portal *qman_get_affine_portal(int cpu); 827 828 /** 829 * qman_p_poll_dqrr - process DQRR (fast-path) entries 830 * @limit: the maximum number of DQRR entries to process 831 * 832 * Use of this function requires that DQRR processing not be interrupt-driven. 833 * The return value represents the number of DQRR entries processed. 834 */ 835 int qman_p_poll_dqrr(struct qman_portal *p, unsigned int limit); 836 837 /** 838 * qman_p_static_dequeue_add - Add pool channels to the portal SDQCR 839 * @pools: bit-mask of pool channels, using QM_SDQCR_CHANNELS_POOL(n) 840 * 841 * Adds a set of pool channels to the portal's static dequeue command register 842 * (SDQCR). The requested pools are limited to those the portal has dequeue 843 * access to. 844 */ 845 void qman_p_static_dequeue_add(struct qman_portal *p, u32 pools); 846 847 /* FQ management */ 848 /** 849 * qman_create_fq - Allocates a FQ 850 * @fqid: the index of the FQD to encapsulate, must be "Out of Service" 851 * @flags: bit-mask of QMAN_FQ_FLAG_*** options 852 * @fq: memory for storing the 'fq', with callbacks filled in 853 * 854 * Creates a frame queue object for the given @fqid, unless the 855 * QMAN_FQ_FLAG_DYNAMIC_FQID flag is set in @flags, in which case a FQID is 856 * dynamically allocated (or the function fails if none are available). Once 857 * created, the caller should not touch the memory at 'fq' except as extended to 858 * adjacent memory for user-defined fields (see the definition of "struct 859 * qman_fq" for more info). NO_MODIFY is only intended for enqueuing to 860 * pre-existing frame-queues that aren't to be otherwise interfered with, it 861 * prevents all other modifications to the frame queue. The TO_DCPORTAL flag 862 * causes the driver to honour any contextB modifications requested in the 863 * qm_init_fq() API, as this indicates the frame queue will be consumed by a 864 * direct-connect portal (PME, CAAM, or Fman). When frame queues are consumed by 865 * software portals, the contextB field is controlled by the driver and can't be 866 * modified by the caller. 867 */ 868 int qman_create_fq(u32 fqid, u32 flags, struct qman_fq *fq); 869 870 /** 871 * qman_destroy_fq - Deallocates a FQ 872 * @fq: the frame queue object to release 873 * 874 * The memory for this frame queue object ('fq' provided in qman_create_fq()) is 875 * not deallocated but the caller regains ownership, to do with as desired. The 876 * FQ must be in the 'out-of-service' or in the 'parked' state. 877 */ 878 void qman_destroy_fq(struct qman_fq *fq); 879 880 /** 881 * qman_fq_fqid - Queries the frame queue ID of a FQ object 882 * @fq: the frame queue object to query 883 */ 884 u32 qman_fq_fqid(struct qman_fq *fq); 885 886 /** 887 * qman_init_fq - Initialises FQ fields, leaves the FQ "parked" or "scheduled" 888 * @fq: the frame queue object to modify, must be 'parked' or new. 889 * @flags: bit-mask of QMAN_INITFQ_FLAG_*** options 890 * @opts: the FQ-modification settings, as defined in the low-level API 891 * 892 * The @opts parameter comes from the low-level portal API. Select 893 * QMAN_INITFQ_FLAG_SCHED in @flags to cause the frame queue to be scheduled 894 * rather than parked. NB, @opts can be NULL. 895 * 896 * Note that some fields and options within @opts may be ignored or overwritten 897 * by the driver; 898 * 1. the 'count' and 'fqid' fields are always ignored (this operation only 899 * affects one frame queue: @fq). 900 * 2. the QM_INITFQ_WE_CONTEXTB option of the 'we_mask' field and the associated 901 * 'fqd' structure's 'context_b' field are sometimes overwritten; 902 * - if @fq was not created with QMAN_FQ_FLAG_TO_DCPORTAL, then context_b is 903 * initialised to a value used by the driver for demux. 904 * - if context_b is initialised for demux, so is context_a in case stashing 905 * is requested (see item 4). 906 * (So caller control of context_b is only possible for TO_DCPORTAL frame queue 907 * objects.) 908 * 3. if @flags contains QMAN_INITFQ_FLAG_LOCAL, the 'fqd' structure's 909 * 'dest::channel' field will be overwritten to match the portal used to issue 910 * the command. If the WE_DESTWQ write-enable bit had already been set by the 911 * caller, the channel workqueue will be left as-is, otherwise the write-enable 912 * bit is set and the workqueue is set to a default of 4. If the "LOCAL" flag 913 * isn't set, the destination channel/workqueue fields and the write-enable bit 914 * are left as-is. 915 * 4. if the driver overwrites context_a/b for demux, then if 916 * QM_INITFQ_WE_CONTEXTA is set, the driver will only overwrite 917 * context_a.address fields and will leave the stashing fields provided by the 918 * user alone, otherwise it will zero out the context_a.stashing fields. 919 */ 920 int qman_init_fq(struct qman_fq *fq, u32 flags, struct qm_mcc_initfq *opts); 921 922 /** 923 * qman_schedule_fq - Schedules a FQ 924 * @fq: the frame queue object to schedule, must be 'parked' 925 * 926 * Schedules the frame queue, which must be Parked, which takes it to 927 * Tentatively-Scheduled or Truly-Scheduled depending on its fill-level. 928 */ 929 int qman_schedule_fq(struct qman_fq *fq); 930 931 /** 932 * qman_retire_fq - Retires a FQ 933 * @fq: the frame queue object to retire 934 * @flags: FQ flags (QMAN_FQ_STATE*) if retirement completes immediately 935 * 936 * Retires the frame queue. This returns zero if it succeeds immediately, +1 if 937 * the retirement was started asynchronously, otherwise it returns negative for 938 * failure. When this function returns zero, @flags is set to indicate whether 939 * the retired FQ is empty and/or whether it has any ORL fragments (to show up 940 * as ERNs). Otherwise the corresponding flags will be known when a subsequent 941 * FQRN message shows up on the portal's message ring. 942 * 943 * NB, if the retirement is asynchronous (the FQ was in the Truly Scheduled or 944 * Active state), the completion will be via the message ring as a FQRN - but 945 * the corresponding callback may occur before this function returns!! Ie. the 946 * caller should be prepared to accept the callback as the function is called, 947 * not only once it has returned. 948 */ 949 int qman_retire_fq(struct qman_fq *fq, u32 *flags); 950 951 /** 952 * qman_oos_fq - Puts a FQ "out of service" 953 * @fq: the frame queue object to be put out-of-service, must be 'retired' 954 * 955 * The frame queue must be retired and empty, and if any order restoration list 956 * was released as ERNs at the time of retirement, they must all be consumed. 957 */ 958 int qman_oos_fq(struct qman_fq *fq); 959 960 /** 961 * qman_enqueue - Enqueue a frame to a frame queue 962 * @fq: the frame queue object to enqueue to 963 * @fd: a descriptor of the frame to be enqueued 964 * 965 * Fills an entry in the EQCR of portal @qm to enqueue the frame described by 966 * @fd. The descriptor details are copied from @fd to the EQCR entry, the 'pid' 967 * field is ignored. The return value is non-zero on error, such as ring full. 968 */ 969 int qman_enqueue(struct qman_fq *fq, const struct qm_fd *fd); 970 971 /** 972 * qman_alloc_fqid_range - Allocate a contiguous range of FQIDs 973 * @result: is set by the API to the base FQID of the allocated range 974 * @count: the number of FQIDs required 975 * 976 * Returns 0 on success, or a negative error code. 977 */ 978 int qman_alloc_fqid_range(u32 *result, u32 count); 979 #define qman_alloc_fqid(result) qman_alloc_fqid_range(result, 1) 980 981 /** 982 * qman_release_fqid - Release the specified frame queue ID 983 * @fqid: the FQID to be released back to the resource pool 984 * 985 * This function can also be used to seed the allocator with 986 * FQID ranges that it can subsequently allocate from. 987 * Returns 0 on success, or a negative error code. 988 */ 989 int qman_release_fqid(u32 fqid); 990 991 /* Pool-channel management */ 992 /** 993 * qman_alloc_pool_range - Allocate a contiguous range of pool-channel IDs 994 * @result: is set by the API to the base pool-channel ID of the allocated range 995 * @count: the number of pool-channel IDs required 996 * 997 * Returns 0 on success, or a negative error code. 998 */ 999 int qman_alloc_pool_range(u32 *result, u32 count); 1000 #define qman_alloc_pool(result) qman_alloc_pool_range(result, 1) 1001 1002 /** 1003 * qman_release_pool - Release the specified pool-channel ID 1004 * @id: the pool-chan ID to be released back to the resource pool 1005 * 1006 * This function can also be used to seed the allocator with 1007 * pool-channel ID ranges that it can subsequently allocate from. 1008 * Returns 0 on success, or a negative error code. 1009 */ 1010 int qman_release_pool(u32 id); 1011 1012 /* CGR management */ 1013 /** 1014 * qman_create_cgr - Register a congestion group object 1015 * @cgr: the 'cgr' object, with fields filled in 1016 * @flags: QMAN_CGR_FLAG_* values 1017 * @opts: optional state of CGR settings 1018 * 1019 * Registers this object to receiving congestion entry/exit callbacks on the 1020 * portal affine to the cpu portal on which this API is executed. If opts is 1021 * NULL then only the callback (cgr->cb) function is registered. If @flags 1022 * contains QMAN_CGR_FLAG_USE_INIT, then an init hw command (which will reset 1023 * any unspecified parameters) will be used rather than a modify hw hardware 1024 * (which only modifies the specified parameters). 1025 */ 1026 int qman_create_cgr(struct qman_cgr *cgr, u32 flags, 1027 struct qm_mcc_initcgr *opts); 1028 1029 /** 1030 * qman_delete_cgr - Deregisters a congestion group object 1031 * @cgr: the 'cgr' object to deregister 1032 * 1033 * "Unplugs" this CGR object from the portal affine to the cpu on which this API 1034 * is executed. This must be excuted on the same affine portal on which it was 1035 * created. 1036 */ 1037 int qman_delete_cgr(struct qman_cgr *cgr); 1038 1039 /** 1040 * qman_delete_cgr_safe - Deregisters a congestion group object from any CPU 1041 * @cgr: the 'cgr' object to deregister 1042 * 1043 * This will select the proper CPU and run there qman_delete_cgr(). 1044 */ 1045 void qman_delete_cgr_safe(struct qman_cgr *cgr); 1046 1047 /** 1048 * qman_query_cgr_congested - Queries CGR's congestion status 1049 * @cgr: the 'cgr' object to query 1050 * @result: returns 'cgr's congestion status, 1 (true) if congested 1051 */ 1052 int qman_query_cgr_congested(struct qman_cgr *cgr, bool *result); 1053 1054 /** 1055 * qman_alloc_cgrid_range - Allocate a contiguous range of CGR IDs 1056 * @result: is set by the API to the base CGR ID of the allocated range 1057 * @count: the number of CGR IDs required 1058 * 1059 * Returns 0 on success, or a negative error code. 1060 */ 1061 int qman_alloc_cgrid_range(u32 *result, u32 count); 1062 #define qman_alloc_cgrid(result) qman_alloc_cgrid_range(result, 1) 1063 1064 /** 1065 * qman_release_cgrid - Release the specified CGR ID 1066 * @id: the CGR ID to be released back to the resource pool 1067 * 1068 * This function can also be used to seed the allocator with 1069 * CGR ID ranges that it can subsequently allocate from. 1070 * Returns 0 on success, or a negative error code. 1071 */ 1072 int qman_release_cgrid(u32 id); 1073 1074 #endif /* __FSL_QMAN_H */ 1075