xref: /openbmc/linux/include/soc/fsl/qe/ucc_fast.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
27aa1aa6eSZhao Qiang /*
37aa1aa6eSZhao Qiang  * Internal header file for UCC FAST unit routines.
47aa1aa6eSZhao Qiang  *
57aa1aa6eSZhao Qiang  * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.
67aa1aa6eSZhao Qiang  *
77aa1aa6eSZhao Qiang  * Authors: 	Shlomi Gridish <gridish@freescale.com>
87aa1aa6eSZhao Qiang  * 		Li Yang <leoli@freescale.com>
97aa1aa6eSZhao Qiang  */
107aa1aa6eSZhao Qiang #ifndef __UCC_FAST_H__
117aa1aa6eSZhao Qiang #define __UCC_FAST_H__
127aa1aa6eSZhao Qiang 
13*988f0a90SAndy Shevchenko #include <linux/types.h>
147aa1aa6eSZhao Qiang 
157aa1aa6eSZhao Qiang #include <soc/fsl/qe/immap_qe.h>
167aa1aa6eSZhao Qiang #include <soc/fsl/qe/qe.h>
177aa1aa6eSZhao Qiang 
187aa1aa6eSZhao Qiang #include <soc/fsl/qe/ucc.h>
197aa1aa6eSZhao Qiang 
20c19b6d24SZhao Qiang /* Receive BD's status and length*/
217aa1aa6eSZhao Qiang #define R_E	0x80000000	/* buffer empty */
227aa1aa6eSZhao Qiang #define R_W	0x20000000	/* wrap bit */
237aa1aa6eSZhao Qiang #define R_I	0x10000000	/* interrupt on reception */
247aa1aa6eSZhao Qiang #define R_L	0x08000000	/* last */
257aa1aa6eSZhao Qiang #define R_F	0x04000000	/* first */
267aa1aa6eSZhao Qiang 
27c19b6d24SZhao Qiang /* transmit BD's status and length*/
287aa1aa6eSZhao Qiang #define T_R	0x80000000	/* ready bit */
297aa1aa6eSZhao Qiang #define T_W	0x20000000	/* wrap bit */
307aa1aa6eSZhao Qiang #define T_I	0x10000000	/* interrupt on completion */
317aa1aa6eSZhao Qiang #define T_L	0x08000000	/* last */
327aa1aa6eSZhao Qiang 
33c19b6d24SZhao Qiang /* Receive BD's status */
34c19b6d24SZhao Qiang #define R_E_S	0x8000	/* buffer empty */
35c19b6d24SZhao Qiang #define R_W_S	0x2000	/* wrap bit */
36c19b6d24SZhao Qiang #define R_I_S	0x1000	/* interrupt on reception */
37c19b6d24SZhao Qiang #define R_L_S	0x0800	/* last */
38c19b6d24SZhao Qiang #define R_F_S	0x0400	/* first */
39c19b6d24SZhao Qiang #define R_CM_S	0x0200	/* continuous mode */
40ba59d570SMathias Thore #define R_LG_S  0x0020  /* frame length */
41ba59d570SMathias Thore #define R_NO_S  0x0010  /* nonoctet */
42ba59d570SMathias Thore #define R_AB_S  0x0008  /* abort */
43c19b6d24SZhao Qiang #define R_CR_S	0x0004	/* crc */
44ba59d570SMathias Thore #define R_OV_S	0x0002	/* overrun */
45ba59d570SMathias Thore #define R_CD_S  0x0001  /* carrier detect */
46c19b6d24SZhao Qiang 
47c19b6d24SZhao Qiang /* transmit BD's status */
48c19b6d24SZhao Qiang #define T_R_S	0x8000	/* ready bit */
49c19b6d24SZhao Qiang #define T_W_S	0x2000	/* wrap bit */
50c19b6d24SZhao Qiang #define T_I_S	0x1000	/* interrupt on completion */
51c19b6d24SZhao Qiang #define T_L_S	0x0800	/* last */
52c19b6d24SZhao Qiang #define T_TC_S	0x0400	/* crc */
53c19b6d24SZhao Qiang #define T_TM_S	0x0200	/* continuous mode */
54ba59d570SMathias Thore #define T_UN_S  0x0002  /* hdlc underrun */
55ba59d570SMathias Thore #define T_CT_S  0x0001  /* hdlc carrier lost */
56c19b6d24SZhao Qiang 
577aa1aa6eSZhao Qiang /* Rx Data buffer must be 4 bytes aligned in most cases */
587aa1aa6eSZhao Qiang #define UCC_FAST_RX_ALIGN			4
597aa1aa6eSZhao Qiang #define UCC_FAST_MRBLR_ALIGNMENT		4
607aa1aa6eSZhao Qiang #define UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT	8
617aa1aa6eSZhao Qiang 
627aa1aa6eSZhao Qiang /* Sizes */
637aa1aa6eSZhao Qiang #define UCC_FAST_URFS_MIN_VAL				0x88
647aa1aa6eSZhao Qiang #define UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR	8
657aa1aa6eSZhao Qiang 
667aa1aa6eSZhao Qiang /* ucc_fast_channel_protocol_mode - UCC FAST mode */
677aa1aa6eSZhao Qiang enum ucc_fast_channel_protocol_mode {
687aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_HDLC = 0x00000000,
697aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED01 = 0x00000001,
707aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED_QMC = 0x00000002,
717aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED02 = 0x00000003,
727aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED_UART = 0x00000004,
737aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED03 = 0x00000005,
747aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_1 = 0x00000006,
757aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_2 = 0x00000007,
767aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED_BISYNC = 0x00000008,
777aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED04 = 0x00000009,
787aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_ATM = 0x0000000A,
797aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED05 = 0x0000000B,
807aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_ETHERNET = 0x0000000C,
817aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED06 = 0x0000000D,
827aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_POS = 0x0000000E,
837aa1aa6eSZhao Qiang 	UCC_FAST_PROTOCOL_MODE_RESERVED07 = 0x0000000F
847aa1aa6eSZhao Qiang };
857aa1aa6eSZhao Qiang 
867aa1aa6eSZhao Qiang /* ucc_fast_transparent_txrx - UCC Fast Transparent TX & RX */
877aa1aa6eSZhao Qiang enum ucc_fast_transparent_txrx {
887aa1aa6eSZhao Qiang 	UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_NORMAL = 0x00000000,
897aa1aa6eSZhao Qiang 	UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_TRANSPARENT = 0x18000000
907aa1aa6eSZhao Qiang };
917aa1aa6eSZhao Qiang 
927aa1aa6eSZhao Qiang /* UCC fast diagnostic mode */
937aa1aa6eSZhao Qiang enum ucc_fast_diag_mode {
947aa1aa6eSZhao Qiang 	UCC_FAST_DIAGNOSTIC_NORMAL = 0x0,
957aa1aa6eSZhao Qiang 	UCC_FAST_DIAGNOSTIC_LOCAL_LOOP_BACK = 0x40000000,
967aa1aa6eSZhao Qiang 	UCC_FAST_DIAGNOSTIC_AUTO_ECHO = 0x80000000,
977aa1aa6eSZhao Qiang 	UCC_FAST_DIAGNOSTIC_LOOP_BACK_AND_ECHO = 0xC0000000
987aa1aa6eSZhao Qiang };
997aa1aa6eSZhao Qiang 
1007aa1aa6eSZhao Qiang /* UCC fast Sync length (transparent mode only) */
1017aa1aa6eSZhao Qiang enum ucc_fast_sync_len {
1027aa1aa6eSZhao Qiang 	UCC_FAST_SYNC_LEN_NOT_USED = 0x0,
1037aa1aa6eSZhao Qiang 	UCC_FAST_SYNC_LEN_AUTOMATIC = 0x00004000,
1047aa1aa6eSZhao Qiang 	UCC_FAST_SYNC_LEN_8_BIT = 0x00008000,
1057aa1aa6eSZhao Qiang 	UCC_FAST_SYNC_LEN_16_BIT = 0x0000C000
1067aa1aa6eSZhao Qiang };
1077aa1aa6eSZhao Qiang 
1087aa1aa6eSZhao Qiang /* UCC fast RTS mode */
1097aa1aa6eSZhao Qiang enum ucc_fast_ready_to_send {
1107aa1aa6eSZhao Qiang 	UCC_FAST_SEND_IDLES_BETWEEN_FRAMES = 0x00000000,
1117aa1aa6eSZhao Qiang 	UCC_FAST_SEND_FLAGS_BETWEEN_FRAMES = 0x00002000
1127aa1aa6eSZhao Qiang };
1137aa1aa6eSZhao Qiang 
1147aa1aa6eSZhao Qiang /* UCC fast receiver decoding mode */
1157aa1aa6eSZhao Qiang enum ucc_fast_rx_decoding_method {
1167aa1aa6eSZhao Qiang 	UCC_FAST_RX_ENCODING_NRZ = 0x00000000,
1177aa1aa6eSZhao Qiang 	UCC_FAST_RX_ENCODING_NRZI = 0x00000800,
1187aa1aa6eSZhao Qiang 	UCC_FAST_RX_ENCODING_RESERVED0 = 0x00001000,
1197aa1aa6eSZhao Qiang 	UCC_FAST_RX_ENCODING_RESERVED1 = 0x00001800
1207aa1aa6eSZhao Qiang };
1217aa1aa6eSZhao Qiang 
1227aa1aa6eSZhao Qiang /* UCC fast transmitter encoding mode */
1237aa1aa6eSZhao Qiang enum ucc_fast_tx_encoding_method {
1247aa1aa6eSZhao Qiang 	UCC_FAST_TX_ENCODING_NRZ = 0x00000000,
1257aa1aa6eSZhao Qiang 	UCC_FAST_TX_ENCODING_NRZI = 0x00000100,
1267aa1aa6eSZhao Qiang 	UCC_FAST_TX_ENCODING_RESERVED0 = 0x00000200,
1277aa1aa6eSZhao Qiang 	UCC_FAST_TX_ENCODING_RESERVED1 = 0x00000300
1287aa1aa6eSZhao Qiang };
1297aa1aa6eSZhao Qiang 
1307aa1aa6eSZhao Qiang /* UCC fast CRC length */
1317aa1aa6eSZhao Qiang enum ucc_fast_transparent_tcrc {
1327aa1aa6eSZhao Qiang 	UCC_FAST_16_BIT_CRC = 0x00000000,
1337aa1aa6eSZhao Qiang 	UCC_FAST_CRC_RESERVED0 = 0x00000040,
1347aa1aa6eSZhao Qiang 	UCC_FAST_32_BIT_CRC = 0x00000080,
1357aa1aa6eSZhao Qiang 	UCC_FAST_CRC_RESERVED1 = 0x000000C0
1367aa1aa6eSZhao Qiang };
1377aa1aa6eSZhao Qiang 
1387aa1aa6eSZhao Qiang /* Fast UCC initialization structure */
1397aa1aa6eSZhao Qiang struct ucc_fast_info {
1407aa1aa6eSZhao Qiang 	int ucc_num;
141bb8b2062SZhao Qiang 	int tdm_num;
1427aa1aa6eSZhao Qiang 	enum qe_clock rx_clock;
1437aa1aa6eSZhao Qiang 	enum qe_clock tx_clock;
14468f047e3SZhao Qiang 	enum qe_clock rx_sync;
14568f047e3SZhao Qiang 	enum qe_clock tx_sync;
14619163ac3SZhao Qiang 	resource_size_t regs;
1477aa1aa6eSZhao Qiang 	int irq;
1487aa1aa6eSZhao Qiang 	u32 uccm_mask;
1497aa1aa6eSZhao Qiang 	int brkpt_support;
1507aa1aa6eSZhao Qiang 	int grant_support;
1517aa1aa6eSZhao Qiang 	int tsa;
1527aa1aa6eSZhao Qiang 	int cdp;
1537aa1aa6eSZhao Qiang 	int cds;
1547aa1aa6eSZhao Qiang 	int ctsp;
1557aa1aa6eSZhao Qiang 	int ctss;
1567aa1aa6eSZhao Qiang 	int tci;
1577aa1aa6eSZhao Qiang 	int txsy;
1587aa1aa6eSZhao Qiang 	int rtsm;
1597aa1aa6eSZhao Qiang 	int revd;
1607aa1aa6eSZhao Qiang 	int rsyn;
1617aa1aa6eSZhao Qiang 	u16 max_rx_buf_length;
1627aa1aa6eSZhao Qiang 	u16 urfs;
1637aa1aa6eSZhao Qiang 	u16 urfet;
1647aa1aa6eSZhao Qiang 	u16 urfset;
1657aa1aa6eSZhao Qiang 	u16 utfs;
1667aa1aa6eSZhao Qiang 	u16 utfet;
1677aa1aa6eSZhao Qiang 	u16 utftt;
1687aa1aa6eSZhao Qiang 	u16 ufpt;
1697aa1aa6eSZhao Qiang 	enum ucc_fast_channel_protocol_mode mode;
1707aa1aa6eSZhao Qiang 	enum ucc_fast_transparent_txrx ttx_trx;
1717aa1aa6eSZhao Qiang 	enum ucc_fast_tx_encoding_method tenc;
1727aa1aa6eSZhao Qiang 	enum ucc_fast_rx_decoding_method renc;
1737aa1aa6eSZhao Qiang 	enum ucc_fast_transparent_tcrc tcrc;
1747aa1aa6eSZhao Qiang 	enum ucc_fast_sync_len synl;
1757aa1aa6eSZhao Qiang };
1767aa1aa6eSZhao Qiang 
1777aa1aa6eSZhao Qiang struct ucc_fast_private {
1787aa1aa6eSZhao Qiang 	struct ucc_fast_info *uf_info;
1797aa1aa6eSZhao Qiang 	struct ucc_fast __iomem *uf_regs; /* a pointer to the UCC regs. */
180b1be4a22SLi Yang 	__be32 __iomem *p_ucce;	/* a pointer to the event register in memory. */
181b1be4a22SLi Yang 	__be32 __iomem *p_uccm;	/* a pointer to the mask register in memory. */
1827aa1aa6eSZhao Qiang #ifdef CONFIG_UGETH_TX_ON_DEMAND
183b1be4a22SLi Yang 	__be16 __iomem *p_utodr;/* pointer to the transmit on demand register */
1847aa1aa6eSZhao Qiang #endif
1857aa1aa6eSZhao Qiang 	int enabled_tx;		/* Whether channel is enabled for Tx (ENT) */
1867aa1aa6eSZhao Qiang 	int enabled_rx;		/* Whether channel is enabled for Rx (ENR) */
1877aa1aa6eSZhao Qiang 	int stopped_tx;		/* Whether channel has been stopped for Tx
1887aa1aa6eSZhao Qiang 				   (STOP_TX, etc.) */
1897aa1aa6eSZhao Qiang 	int stopped_rx;		/* Whether channel has been stopped for Rx */
190c93c159aSRasmus Villemoes 	s32 ucc_fast_tx_virtual_fifo_base_offset;/* pointer to base of Tx
1917aa1aa6eSZhao Qiang 						    virtual fifo */
192c93c159aSRasmus Villemoes 	s32 ucc_fast_rx_virtual_fifo_base_offset;/* pointer to base of Rx
1937aa1aa6eSZhao Qiang 						    virtual fifo */
1947aa1aa6eSZhao Qiang #ifdef STATISTICS
1957aa1aa6eSZhao Qiang 	u32 tx_frames;		/* Transmitted frames counter. */
1967aa1aa6eSZhao Qiang 	u32 rx_frames;		/* Received frames counter (only frames
1977aa1aa6eSZhao Qiang 				   passed to application). */
1987aa1aa6eSZhao Qiang 	u32 tx_discarded;	/* Discarded tx frames counter (frames that
1997aa1aa6eSZhao Qiang 				   were discarded by the driver due to errors).
2007aa1aa6eSZhao Qiang 				   */
2017aa1aa6eSZhao Qiang 	u32 rx_discarded;	/* Discarded rx frames counter (frames that
2027aa1aa6eSZhao Qiang 				   were discarded by the driver due to errors).
2037aa1aa6eSZhao Qiang 				   */
2047aa1aa6eSZhao Qiang #endif				/* STATISTICS */
2057aa1aa6eSZhao Qiang 	u16 mrblr;		/* maximum receive buffer length */
2067aa1aa6eSZhao Qiang };
2077aa1aa6eSZhao Qiang 
2087aa1aa6eSZhao Qiang /* ucc_fast_init
2097aa1aa6eSZhao Qiang  * Initializes Fast UCC according to user provided parameters.
2107aa1aa6eSZhao Qiang  *
2117aa1aa6eSZhao Qiang  * uf_info  - (In) pointer to the fast UCC info structure.
2127aa1aa6eSZhao Qiang  * uccf_ret - (Out) pointer to the fast UCC structure.
2137aa1aa6eSZhao Qiang  */
2147aa1aa6eSZhao Qiang int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret);
2157aa1aa6eSZhao Qiang 
2167aa1aa6eSZhao Qiang /* ucc_fast_free
2177aa1aa6eSZhao Qiang  * Frees all resources for fast UCC.
2187aa1aa6eSZhao Qiang  *
2197aa1aa6eSZhao Qiang  * uccf - (In) pointer to the fast UCC structure.
2207aa1aa6eSZhao Qiang  */
2217aa1aa6eSZhao Qiang void ucc_fast_free(struct ucc_fast_private * uccf);
2227aa1aa6eSZhao Qiang 
2237aa1aa6eSZhao Qiang /* ucc_fast_enable
2247aa1aa6eSZhao Qiang  * Enables a fast UCC port.
2257aa1aa6eSZhao Qiang  * This routine enables Tx and/or Rx through the General UCC Mode Register.
2267aa1aa6eSZhao Qiang  *
2277aa1aa6eSZhao Qiang  * uccf - (In) pointer to the fast UCC structure.
2287aa1aa6eSZhao Qiang  * mode - (In) TX, RX, or both.
2297aa1aa6eSZhao Qiang  */
2307aa1aa6eSZhao Qiang void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode);
2317aa1aa6eSZhao Qiang 
2327aa1aa6eSZhao Qiang /* ucc_fast_disable
2337aa1aa6eSZhao Qiang  * Disables a fast UCC port.
2347aa1aa6eSZhao Qiang  * This routine disables Tx and/or Rx through the General UCC Mode Register.
2357aa1aa6eSZhao Qiang  *
2367aa1aa6eSZhao Qiang  * uccf - (In) pointer to the fast UCC structure.
2377aa1aa6eSZhao Qiang  * mode - (In) TX, RX, or both.
2387aa1aa6eSZhao Qiang  */
2397aa1aa6eSZhao Qiang void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode);
2407aa1aa6eSZhao Qiang 
2417aa1aa6eSZhao Qiang /* ucc_fast_irq
2427aa1aa6eSZhao Qiang  * Handles interrupts on fast UCC.
2437aa1aa6eSZhao Qiang  * Called from the general interrupt routine to handle interrupts on fast UCC.
2447aa1aa6eSZhao Qiang  *
2457aa1aa6eSZhao Qiang  * uccf - (In) pointer to the fast UCC structure.
2467aa1aa6eSZhao Qiang  */
2477aa1aa6eSZhao Qiang void ucc_fast_irq(struct ucc_fast_private * uccf);
2487aa1aa6eSZhao Qiang 
2497aa1aa6eSZhao Qiang /* ucc_fast_transmit_on_demand
2507aa1aa6eSZhao Qiang  * Immediately forces a poll of the transmitter for data to be sent.
2517aa1aa6eSZhao Qiang  * Typically, the hardware performs a periodic poll for data that the
2527aa1aa6eSZhao Qiang  * transmit routine has set up to be transmitted. In cases where
2537aa1aa6eSZhao Qiang  * this polling cycle is not soon enough, this optional routine can
2547aa1aa6eSZhao Qiang  * be invoked to force a poll right away, instead. Proper use for
2557aa1aa6eSZhao Qiang  * each transmission for which this functionality is desired is to
2567aa1aa6eSZhao Qiang  * call the transmit routine and then this routine right after.
2577aa1aa6eSZhao Qiang  *
2587aa1aa6eSZhao Qiang  * uccf - (In) pointer to the fast UCC structure.
2597aa1aa6eSZhao Qiang  */
2607aa1aa6eSZhao Qiang void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf);
2617aa1aa6eSZhao Qiang 
2627aa1aa6eSZhao Qiang u32 ucc_fast_get_qe_cr_subblock(int uccf_num);
2637aa1aa6eSZhao Qiang 
2647aa1aa6eSZhao Qiang void ucc_fast_dump_regs(struct ucc_fast_private * uccf);
2657aa1aa6eSZhao Qiang 
2667aa1aa6eSZhao Qiang #endif				/* __UCC_FAST_H__ */
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