1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/netlink.h> 19 #include <linux/mdio.h> 20 #include <linux/mii.h> 21 #include <linux/mii_timestamper.h> 22 #include <linux/module.h> 23 #include <linux/timer.h> 24 #include <linux/workqueue.h> 25 #include <linux/mod_devicetable.h> 26 #include <linux/u64_stats_sync.h> 27 #include <linux/irqreturn.h> 28 #include <linux/iopoll.h> 29 #include <linux/refcount.h> 30 31 #include <linux/atomic.h> 32 33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 54 55 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 56 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 57 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 58 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 59 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 60 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 61 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 62 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 63 64 extern const int phy_basic_ports_array[3]; 65 extern const int phy_fibre_port_array[1]; 66 extern const int phy_all_ports_features_array[7]; 67 extern const int phy_10_100_features_array[4]; 68 extern const int phy_basic_t1_features_array[3]; 69 extern const int phy_gbit_features_array[2]; 70 extern const int phy_10gbit_features_array[1]; 71 72 /* 73 * Set phydev->irq to PHY_POLL if interrupts are not supported, 74 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 75 * the attached MAC driver handles the interrupt 76 */ 77 #define PHY_POLL -1 78 #define PHY_MAC_INTERRUPT -2 79 80 #define PHY_IS_INTERNAL 0x00000001 81 #define PHY_RST_AFTER_CLK_EN 0x00000002 82 #define PHY_POLL_CABLE_TEST 0x00000004 83 #define MDIO_DEVICE_IS_PHY 0x80000000 84 85 /** 86 * enum phy_interface_t - Interface Mode definitions 87 * 88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 90 * @PHY_INTERFACE_MODE_MII: Media-independent interface 91 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 96 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 97 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 98 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 99 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 100 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 101 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 102 * @PHY_INTERFACE_MODE_SMII: Serial MII 103 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 104 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 106 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 107 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 108 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 109 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 110 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 111 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 112 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 113 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 114 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 115 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 116 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 117 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 118 * @PHY_INTERFACE_MODE_MAX: Book keeping 119 * 120 * Describes the interface between the MAC and PHY. 121 */ 122 typedef enum { 123 PHY_INTERFACE_MODE_NA, 124 PHY_INTERFACE_MODE_INTERNAL, 125 PHY_INTERFACE_MODE_MII, 126 PHY_INTERFACE_MODE_GMII, 127 PHY_INTERFACE_MODE_SGMII, 128 PHY_INTERFACE_MODE_TBI, 129 PHY_INTERFACE_MODE_REVMII, 130 PHY_INTERFACE_MODE_RMII, 131 PHY_INTERFACE_MODE_REVRMII, 132 PHY_INTERFACE_MODE_RGMII, 133 PHY_INTERFACE_MODE_RGMII_ID, 134 PHY_INTERFACE_MODE_RGMII_RXID, 135 PHY_INTERFACE_MODE_RGMII_TXID, 136 PHY_INTERFACE_MODE_RTBI, 137 PHY_INTERFACE_MODE_SMII, 138 PHY_INTERFACE_MODE_XGMII, 139 PHY_INTERFACE_MODE_XLGMII, 140 PHY_INTERFACE_MODE_MOCA, 141 PHY_INTERFACE_MODE_QSGMII, 142 PHY_INTERFACE_MODE_TRGMII, 143 PHY_INTERFACE_MODE_100BASEX, 144 PHY_INTERFACE_MODE_1000BASEX, 145 PHY_INTERFACE_MODE_2500BASEX, 146 PHY_INTERFACE_MODE_5GBASER, 147 PHY_INTERFACE_MODE_RXAUI, 148 PHY_INTERFACE_MODE_XAUI, 149 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 150 PHY_INTERFACE_MODE_10GBASER, 151 PHY_INTERFACE_MODE_25GBASER, 152 PHY_INTERFACE_MODE_USXGMII, 153 /* 10GBASE-KR - with Clause 73 AN */ 154 PHY_INTERFACE_MODE_10GKR, 155 PHY_INTERFACE_MODE_MAX, 156 } phy_interface_t; 157 158 /* PHY interface mode bitmap handling */ 159 #define DECLARE_PHY_INTERFACE_MASK(name) \ 160 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 161 162 static inline void phy_interface_zero(unsigned long *intf) 163 { 164 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 165 } 166 167 static inline bool phy_interface_empty(const unsigned long *intf) 168 { 169 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 170 } 171 172 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 173 const unsigned long *b) 174 { 175 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 176 } 177 178 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 179 const unsigned long *b) 180 { 181 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 182 } 183 184 static inline void phy_interface_set_rgmii(unsigned long *intf) 185 { 186 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 187 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 188 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 189 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 190 } 191 192 /* 193 * phy_supported_speeds - return all speeds currently supported by a PHY device 194 */ 195 unsigned int phy_supported_speeds(struct phy_device *phy, 196 unsigned int *speeds, 197 unsigned int size); 198 199 /** 200 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 201 * @interface: enum phy_interface_t value 202 * 203 * Description: maps enum &phy_interface_t defined in this file 204 * into the device tree binding of 'phy-mode', so that Ethernet 205 * device driver can get PHY interface from device tree. 206 */ 207 static inline const char *phy_modes(phy_interface_t interface) 208 { 209 switch (interface) { 210 case PHY_INTERFACE_MODE_NA: 211 return ""; 212 case PHY_INTERFACE_MODE_INTERNAL: 213 return "internal"; 214 case PHY_INTERFACE_MODE_MII: 215 return "mii"; 216 case PHY_INTERFACE_MODE_GMII: 217 return "gmii"; 218 case PHY_INTERFACE_MODE_SGMII: 219 return "sgmii"; 220 case PHY_INTERFACE_MODE_TBI: 221 return "tbi"; 222 case PHY_INTERFACE_MODE_REVMII: 223 return "rev-mii"; 224 case PHY_INTERFACE_MODE_RMII: 225 return "rmii"; 226 case PHY_INTERFACE_MODE_REVRMII: 227 return "rev-rmii"; 228 case PHY_INTERFACE_MODE_RGMII: 229 return "rgmii"; 230 case PHY_INTERFACE_MODE_RGMII_ID: 231 return "rgmii-id"; 232 case PHY_INTERFACE_MODE_RGMII_RXID: 233 return "rgmii-rxid"; 234 case PHY_INTERFACE_MODE_RGMII_TXID: 235 return "rgmii-txid"; 236 case PHY_INTERFACE_MODE_RTBI: 237 return "rtbi"; 238 case PHY_INTERFACE_MODE_SMII: 239 return "smii"; 240 case PHY_INTERFACE_MODE_XGMII: 241 return "xgmii"; 242 case PHY_INTERFACE_MODE_XLGMII: 243 return "xlgmii"; 244 case PHY_INTERFACE_MODE_MOCA: 245 return "moca"; 246 case PHY_INTERFACE_MODE_QSGMII: 247 return "qsgmii"; 248 case PHY_INTERFACE_MODE_TRGMII: 249 return "trgmii"; 250 case PHY_INTERFACE_MODE_1000BASEX: 251 return "1000base-x"; 252 case PHY_INTERFACE_MODE_2500BASEX: 253 return "2500base-x"; 254 case PHY_INTERFACE_MODE_5GBASER: 255 return "5gbase-r"; 256 case PHY_INTERFACE_MODE_RXAUI: 257 return "rxaui"; 258 case PHY_INTERFACE_MODE_XAUI: 259 return "xaui"; 260 case PHY_INTERFACE_MODE_10GBASER: 261 return "10gbase-r"; 262 case PHY_INTERFACE_MODE_25GBASER: 263 return "25gbase-r"; 264 case PHY_INTERFACE_MODE_USXGMII: 265 return "usxgmii"; 266 case PHY_INTERFACE_MODE_10GKR: 267 return "10gbase-kr"; 268 case PHY_INTERFACE_MODE_100BASEX: 269 return "100base-x"; 270 default: 271 return "unknown"; 272 } 273 } 274 275 276 #define PHY_INIT_TIMEOUT 100000 277 #define PHY_FORCE_TIMEOUT 10 278 279 #define PHY_MAX_ADDR 32 280 281 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 282 #define PHY_ID_FMT "%s:%02x" 283 284 #define MII_BUS_ID_SIZE 61 285 286 struct device; 287 struct phylink; 288 struct sfp_bus; 289 struct sfp_upstream_ops; 290 struct sk_buff; 291 292 /** 293 * struct mdio_bus_stats - Statistics counters for MDIO busses 294 * @transfers: Total number of transfers, i.e. @writes + @reads 295 * @errors: Number of MDIO transfers that returned an error 296 * @writes: Number of write transfers 297 * @reads: Number of read transfers 298 * @syncp: Synchronisation for incrementing statistics 299 */ 300 struct mdio_bus_stats { 301 u64_stats_t transfers; 302 u64_stats_t errors; 303 u64_stats_t writes; 304 u64_stats_t reads; 305 /* Must be last, add new statistics above */ 306 struct u64_stats_sync syncp; 307 }; 308 309 /** 310 * struct phy_package_shared - Shared information in PHY packages 311 * @addr: Common PHY address used to combine PHYs in one package 312 * @refcnt: Number of PHYs connected to this shared data 313 * @flags: Initialization of PHY package 314 * @priv_size: Size of the shared private data @priv 315 * @priv: Driver private data shared across a PHY package 316 * 317 * Represents a shared structure between different phydev's in the same 318 * package, for example a quad PHY. See phy_package_join() and 319 * phy_package_leave(). 320 */ 321 struct phy_package_shared { 322 int addr; 323 refcount_t refcnt; 324 unsigned long flags; 325 size_t priv_size; 326 327 /* private data pointer */ 328 /* note that this pointer is shared between different phydevs and 329 * the user has to take care of appropriate locking. It is allocated 330 * and freed automatically by phy_package_join() and 331 * phy_package_leave(). 332 */ 333 void *priv; 334 }; 335 336 /* used as bit number in atomic bitops */ 337 #define PHY_SHARED_F_INIT_DONE 0 338 #define PHY_SHARED_F_PROBE_DONE 1 339 340 /** 341 * struct mii_bus - Represents an MDIO bus 342 * 343 * @owner: Who owns this device 344 * @name: User friendly name for this MDIO device, or driver name 345 * @id: Unique identifier for this bus, typical from bus hierarchy 346 * @priv: Driver private data 347 * 348 * The Bus class for PHYs. Devices which provide access to 349 * PHYs should register using this structure 350 */ 351 struct mii_bus { 352 struct module *owner; 353 const char *name; 354 char id[MII_BUS_ID_SIZE]; 355 void *priv; 356 /** @read: Perform a read transfer on the bus */ 357 int (*read)(struct mii_bus *bus, int addr, int regnum); 358 /** @write: Perform a write transfer on the bus */ 359 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 360 /** @reset: Perform a reset of the bus */ 361 int (*reset)(struct mii_bus *bus); 362 363 /** @stats: Statistic counters per device on the bus */ 364 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 365 366 /** 367 * @mdio_lock: A lock to ensure that only one thing can read/write 368 * the MDIO bus at a time 369 */ 370 struct mutex mdio_lock; 371 372 /** @parent: Parent device of this bus */ 373 struct device *parent; 374 /** @state: State of bus structure */ 375 enum { 376 MDIOBUS_ALLOCATED = 1, 377 MDIOBUS_REGISTERED, 378 MDIOBUS_UNREGISTERED, 379 MDIOBUS_RELEASED, 380 } state; 381 382 /** @dev: Kernel device representation */ 383 struct device dev; 384 385 /** @mdio_map: list of all MDIO devices on bus */ 386 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 387 388 /** @phy_mask: PHY addresses to be ignored when probing */ 389 u32 phy_mask; 390 391 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 392 u32 phy_ignore_ta_mask; 393 394 /** 395 * @irq: An array of interrupts, each PHY's interrupt at the index 396 * matching its address 397 */ 398 int irq[PHY_MAX_ADDR]; 399 400 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 401 int reset_delay_us; 402 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 403 int reset_post_delay_us; 404 /** @reset_gpiod: Reset GPIO descriptor pointer */ 405 struct gpio_desc *reset_gpiod; 406 407 /** @probe_capabilities: bus capabilities, used for probing */ 408 enum { 409 MDIOBUS_NO_CAP = 0, 410 MDIOBUS_C22, 411 MDIOBUS_C45, 412 MDIOBUS_C22_C45, 413 } probe_capabilities; 414 415 /** @shared_lock: protect access to the shared element */ 416 struct mutex shared_lock; 417 418 /** @shared: shared state across different PHYs */ 419 struct phy_package_shared *shared[PHY_MAX_ADDR]; 420 }; 421 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 422 423 struct mii_bus *mdiobus_alloc_size(size_t size); 424 425 /** 426 * mdiobus_alloc - Allocate an MDIO bus structure 427 * 428 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 429 * for the driver to register the bus. 430 */ 431 static inline struct mii_bus *mdiobus_alloc(void) 432 { 433 return mdiobus_alloc_size(0); 434 } 435 436 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 437 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 438 struct module *owner); 439 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 440 #define devm_mdiobus_register(dev, bus) \ 441 __devm_mdiobus_register(dev, bus, THIS_MODULE) 442 443 void mdiobus_unregister(struct mii_bus *bus); 444 void mdiobus_free(struct mii_bus *bus); 445 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 446 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 447 { 448 return devm_mdiobus_alloc_size(dev, 0); 449 } 450 451 struct mii_bus *mdio_find_bus(const char *mdio_name); 452 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 453 454 #define PHY_INTERRUPT_DISABLED false 455 #define PHY_INTERRUPT_ENABLED true 456 457 /** 458 * enum phy_state - PHY state machine states: 459 * 460 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 461 * should be called if and only if the PHY is in this state, 462 * given that the PHY device exists. 463 * - PHY driver probe function will set the state to @PHY_READY 464 * 465 * @PHY_READY: PHY is ready to send and receive packets, but the 466 * controller is not. By default, PHYs which do not implement 467 * probe will be set to this state by phy_probe(). 468 * - start will set the state to UP 469 * 470 * @PHY_UP: The PHY and attached device are ready to do work. 471 * Interrupts should be started here. 472 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 473 * 474 * @PHY_NOLINK: PHY is up, but not currently plugged in. 475 * - irq or timer will set @PHY_RUNNING if link comes back 476 * - phy_stop moves to @PHY_HALTED 477 * 478 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 479 * and/or receiving packets 480 * - irq or timer will set @PHY_NOLINK if link goes down 481 * - phy_stop moves to @PHY_HALTED 482 * 483 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 484 * is not expected to work, carrier will be indicated as down. PHY will be 485 * poll once per second, or on interrupt for it current state. 486 * Once complete, move to UP to restart the PHY. 487 * - phy_stop aborts the running test and moves to @PHY_HALTED 488 * 489 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 490 * PHY is in an error state. 491 * - phy_start moves to @PHY_UP 492 */ 493 enum phy_state { 494 PHY_DOWN = 0, 495 PHY_READY, 496 PHY_HALTED, 497 PHY_UP, 498 PHY_RUNNING, 499 PHY_NOLINK, 500 PHY_CABLETEST, 501 }; 502 503 #define MDIO_MMD_NUM 32 504 505 /** 506 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 507 * @devices_in_package: IEEE 802.3 devices in package register value. 508 * @mmds_present: bit vector of MMDs present. 509 * @device_ids: The device identifer for each present device. 510 */ 511 struct phy_c45_device_ids { 512 u32 devices_in_package; 513 u32 mmds_present; 514 u32 device_ids[MDIO_MMD_NUM]; 515 }; 516 517 struct macsec_context; 518 struct macsec_ops; 519 520 /** 521 * struct phy_device - An instance of a PHY 522 * 523 * @mdio: MDIO bus this PHY is on 524 * @drv: Pointer to the driver for this PHY instance 525 * @phy_id: UID for this device found during discovery 526 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 527 * @is_c45: Set to true if this PHY uses clause 45 addressing. 528 * @is_internal: Set to true if this PHY is internal to a MAC. 529 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 530 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 531 * @has_fixups: Set to true if this PHY has fixups/quirks. 532 * @suspended: Set to true if this PHY has been suspended successfully. 533 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 534 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 535 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 536 * @downshifted_rate: Set true if link speed has been downshifted. 537 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 538 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 539 * @state: State of the PHY for management purposes 540 * @dev_flags: Device-specific flags used by the PHY driver. 541 * 542 * - Bits [15:0] are free to use by the PHY driver to communicate 543 * driver specific behavior. 544 * - Bits [23:16] are currently reserved for future use. 545 * - Bits [31:24] are reserved for defining generic 546 * PHY driver behavior. 547 * @irq: IRQ number of the PHY's interrupt (-1 if none) 548 * @phy_timer: The timer for handling the state machine 549 * @phylink: Pointer to phylink instance for this PHY 550 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 551 * @sfp_bus: SFP bus attached to this PHY's fiber port 552 * @attached_dev: The attached enet driver's device instance ptr 553 * @adjust_link: Callback for the enet controller to respond to changes: in the 554 * link state. 555 * @phy_link_change: Callback for phylink for notification of link change 556 * @macsec_ops: MACsec offloading ops. 557 * 558 * @speed: Current link speed 559 * @duplex: Current duplex 560 * @port: Current port 561 * @pause: Current pause 562 * @asym_pause: Current asymmetric pause 563 * @supported: Combined MAC/PHY supported linkmodes 564 * @advertising: Currently advertised linkmodes 565 * @adv_old: Saved advertised while power saving for WoL 566 * @lp_advertising: Current link partner advertised linkmodes 567 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 568 * @autoneg: Flag autoneg being used 569 * @link: Current link state 570 * @autoneg_complete: Flag auto negotiation of the link has completed 571 * @mdix: Current crossover 572 * @mdix_ctrl: User setting of crossover 573 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 574 * @interrupts: Flag interrupts have been enabled 575 * @interface: enum phy_interface_t value 576 * @skb: Netlink message for cable diagnostics 577 * @nest: Netlink nest used for cable diagnostics 578 * @ehdr: nNtlink header for cable diagnostics 579 * @phy_led_triggers: Array of LED triggers 580 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 581 * @led_link_trigger: LED trigger for link up/down 582 * @last_triggered: last LED trigger for link speed 583 * @master_slave_set: User requested master/slave configuration 584 * @master_slave_get: Current master/slave advertisement 585 * @master_slave_state: Current master/slave configuration 586 * @mii_ts: Pointer to time stamper callbacks 587 * @lock: Mutex for serialization access to PHY 588 * @state_queue: Work queue for state machine 589 * @shared: Pointer to private data shared by phys in one package 590 * @priv: Pointer to driver private data 591 * 592 * interrupts currently only supports enabled or disabled, 593 * but could be changed in the future to support enabling 594 * and disabling specific interrupts 595 * 596 * Contains some infrastructure for polling and interrupt 597 * handling, as well as handling shifts in PHY hardware state 598 */ 599 struct phy_device { 600 struct mdio_device mdio; 601 602 /* Information about the PHY type */ 603 /* And management functions */ 604 struct phy_driver *drv; 605 606 u32 phy_id; 607 608 struct phy_c45_device_ids c45_ids; 609 unsigned is_c45:1; 610 unsigned is_internal:1; 611 unsigned is_pseudo_fixed_link:1; 612 unsigned is_gigabit_capable:1; 613 unsigned has_fixups:1; 614 unsigned suspended:1; 615 unsigned suspended_by_mdio_bus:1; 616 unsigned sysfs_links:1; 617 unsigned loopback_enabled:1; 618 unsigned downshifted_rate:1; 619 unsigned is_on_sfp_module:1; 620 unsigned mac_managed_pm:1; 621 622 unsigned autoneg:1; 623 /* The most recently read link state */ 624 unsigned link:1; 625 unsigned autoneg_complete:1; 626 627 /* Interrupts are enabled */ 628 unsigned interrupts:1; 629 630 enum phy_state state; 631 632 u32 dev_flags; 633 634 phy_interface_t interface; 635 636 /* 637 * forced speed & duplex (no autoneg) 638 * partner speed & duplex & pause (autoneg) 639 */ 640 int speed; 641 int duplex; 642 int port; 643 int pause; 644 int asym_pause; 645 u8 master_slave_get; 646 u8 master_slave_set; 647 u8 master_slave_state; 648 649 /* Union of PHY and Attached devices' supported link modes */ 650 /* See ethtool.h for more info */ 651 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 652 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 653 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 654 /* used with phy_speed_down */ 655 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 656 657 /* Energy efficient ethernet modes which should be prohibited */ 658 u32 eee_broken_modes; 659 660 #ifdef CONFIG_LED_TRIGGER_PHY 661 struct phy_led_trigger *phy_led_triggers; 662 unsigned int phy_num_led_triggers; 663 struct phy_led_trigger *last_triggered; 664 665 struct phy_led_trigger *led_link_trigger; 666 #endif 667 668 /* 669 * Interrupt number for this PHY 670 * -1 means no interrupt 671 */ 672 int irq; 673 674 /* private data pointer */ 675 /* For use by PHYs to maintain extra state */ 676 void *priv; 677 678 /* shared data pointer */ 679 /* For use by PHYs inside the same package that need a shared state. */ 680 struct phy_package_shared *shared; 681 682 /* Reporting cable test results */ 683 struct sk_buff *skb; 684 void *ehdr; 685 struct nlattr *nest; 686 687 /* Interrupt and Polling infrastructure */ 688 struct delayed_work state_queue; 689 690 struct mutex lock; 691 692 /* This may be modified under the rtnl lock */ 693 bool sfp_bus_attached; 694 struct sfp_bus *sfp_bus; 695 struct phylink *phylink; 696 struct net_device *attached_dev; 697 struct mii_timestamper *mii_ts; 698 699 u8 mdix; 700 u8 mdix_ctrl; 701 702 int pma_extable; 703 704 void (*phy_link_change)(struct phy_device *phydev, bool up); 705 void (*adjust_link)(struct net_device *dev); 706 707 #if IS_ENABLED(CONFIG_MACSEC) 708 /* MACsec management functions */ 709 const struct macsec_ops *macsec_ops; 710 #endif 711 }; 712 713 static inline struct phy_device *to_phy_device(const struct device *dev) 714 { 715 return container_of(to_mdio_device(dev), struct phy_device, mdio); 716 } 717 718 /** 719 * struct phy_tdr_config - Configuration of a TDR raw test 720 * 721 * @first: Distance for first data collection point 722 * @last: Distance for last data collection point 723 * @step: Step between data collection points 724 * @pair: Bitmap of cable pairs to collect data for 725 * 726 * A structure containing possible configuration parameters 727 * for a TDR cable test. The driver does not need to implement 728 * all the parameters, but should report what is actually used. 729 * All distances are in centimeters. 730 */ 731 struct phy_tdr_config { 732 u32 first; 733 u32 last; 734 u32 step; 735 s8 pair; 736 }; 737 #define PHY_PAIR_ALL -1 738 739 /** 740 * struct phy_driver - Driver structure for a particular PHY type 741 * 742 * @mdiodrv: Data common to all MDIO devices 743 * @phy_id: The result of reading the UID registers of this PHY 744 * type, and ANDing them with the phy_id_mask. This driver 745 * only works for PHYs with IDs which match this field 746 * @name: The friendly name of this PHY type 747 * @phy_id_mask: Defines the important bits of the phy_id 748 * @features: A mandatory list of features (speed, duplex, etc) 749 * supported by this PHY 750 * @flags: A bitfield defining certain other features this PHY 751 * supports (like interrupts) 752 * @driver_data: Static driver data 753 * 754 * All functions are optional. If config_aneg or read_status 755 * are not implemented, the phy core uses the genphy versions. 756 * Note that none of these functions should be called from 757 * interrupt time. The goal is for the bus read/write functions 758 * to be able to block when the bus transaction is happening, 759 * and be freed up by an interrupt (The MPC85xx has this ability, 760 * though it is not currently supported in the driver). 761 */ 762 struct phy_driver { 763 struct mdio_driver_common mdiodrv; 764 u32 phy_id; 765 char *name; 766 u32 phy_id_mask; 767 const unsigned long * const features; 768 u32 flags; 769 const void *driver_data; 770 771 /** 772 * @soft_reset: Called to issue a PHY software reset 773 */ 774 int (*soft_reset)(struct phy_device *phydev); 775 776 /** 777 * @config_init: Called to initialize the PHY, 778 * including after a reset 779 */ 780 int (*config_init)(struct phy_device *phydev); 781 782 /** 783 * @probe: Called during discovery. Used to set 784 * up device-specific structures, if any 785 */ 786 int (*probe)(struct phy_device *phydev); 787 788 /** 789 * @get_features: Probe the hardware to determine what 790 * abilities it has. Should only set phydev->supported. 791 */ 792 int (*get_features)(struct phy_device *phydev); 793 794 /* PHY Power Management */ 795 /** @suspend: Suspend the hardware, saving state if needed */ 796 int (*suspend)(struct phy_device *phydev); 797 /** @resume: Resume the hardware, restoring state if needed */ 798 int (*resume)(struct phy_device *phydev); 799 800 /** 801 * @config_aneg: Configures the advertisement and resets 802 * autonegotiation if phydev->autoneg is on, 803 * forces the speed to the current settings in phydev 804 * if phydev->autoneg is off 805 */ 806 int (*config_aneg)(struct phy_device *phydev); 807 808 /** @aneg_done: Determines the auto negotiation result */ 809 int (*aneg_done)(struct phy_device *phydev); 810 811 /** @read_status: Determines the negotiated speed and duplex */ 812 int (*read_status)(struct phy_device *phydev); 813 814 /** 815 * @config_intr: Enables or disables interrupts. 816 * It should also clear any pending interrupts prior to enabling the 817 * IRQs and after disabling them. 818 */ 819 int (*config_intr)(struct phy_device *phydev); 820 821 /** @handle_interrupt: Override default interrupt handling */ 822 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 823 824 /** @remove: Clears up any memory if needed */ 825 void (*remove)(struct phy_device *phydev); 826 827 /** 828 * @match_phy_device: Returns true if this is a suitable 829 * driver for the given phydev. If NULL, matching is based on 830 * phy_id and phy_id_mask. 831 */ 832 int (*match_phy_device)(struct phy_device *phydev); 833 834 /** 835 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 836 * register changes to enable Wake on LAN, so set_wol is 837 * provided to be called in the ethernet driver's set_wol 838 * function. 839 */ 840 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 841 842 /** 843 * @get_wol: See set_wol, but for checking whether Wake on LAN 844 * is enabled. 845 */ 846 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 847 848 /** 849 * @link_change_notify: Called to inform a PHY device driver 850 * when the core is about to change the link state. This 851 * callback is supposed to be used as fixup hook for drivers 852 * that need to take action when the link state 853 * changes. Drivers are by no means allowed to mess with the 854 * PHY device structure in their implementations. 855 */ 856 void (*link_change_notify)(struct phy_device *dev); 857 858 /** 859 * @read_mmd: PHY specific driver override for reading a MMD 860 * register. This function is optional for PHY specific 861 * drivers. When not provided, the default MMD read function 862 * will be used by phy_read_mmd(), which will use either a 863 * direct read for Clause 45 PHYs or an indirect read for 864 * Clause 22 PHYs. devnum is the MMD device number within the 865 * PHY device, regnum is the register within the selected MMD 866 * device. 867 */ 868 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 869 870 /** 871 * @write_mmd: PHY specific driver override for writing a MMD 872 * register. This function is optional for PHY specific 873 * drivers. When not provided, the default MMD write function 874 * will be used by phy_write_mmd(), which will use either a 875 * direct write for Clause 45 PHYs, or an indirect write for 876 * Clause 22 PHYs. devnum is the MMD device number within the 877 * PHY device, regnum is the register within the selected MMD 878 * device. val is the value to be written. 879 */ 880 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 881 u16 val); 882 883 /** @read_page: Return the current PHY register page number */ 884 int (*read_page)(struct phy_device *dev); 885 /** @write_page: Set the current PHY register page number */ 886 int (*write_page)(struct phy_device *dev, int page); 887 888 /** 889 * @module_info: Get the size and type of the eeprom contained 890 * within a plug-in module 891 */ 892 int (*module_info)(struct phy_device *dev, 893 struct ethtool_modinfo *modinfo); 894 895 /** 896 * @module_eeprom: Get the eeprom information from the plug-in 897 * module 898 */ 899 int (*module_eeprom)(struct phy_device *dev, 900 struct ethtool_eeprom *ee, u8 *data); 901 902 /** @cable_test_start: Start a cable test */ 903 int (*cable_test_start)(struct phy_device *dev); 904 905 /** @cable_test_tdr_start: Start a raw TDR cable test */ 906 int (*cable_test_tdr_start)(struct phy_device *dev, 907 const struct phy_tdr_config *config); 908 909 /** 910 * @cable_test_get_status: Once per second, or on interrupt, 911 * request the status of the test. 912 */ 913 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 914 915 /* Get statistics from the PHY using ethtool */ 916 /** @get_sset_count: Number of statistic counters */ 917 int (*get_sset_count)(struct phy_device *dev); 918 /** @get_strings: Names of the statistic counters */ 919 void (*get_strings)(struct phy_device *dev, u8 *data); 920 /** @get_stats: Return the statistic counter values */ 921 void (*get_stats)(struct phy_device *dev, 922 struct ethtool_stats *stats, u64 *data); 923 924 /* Get and Set PHY tunables */ 925 /** @get_tunable: Return the value of a tunable */ 926 int (*get_tunable)(struct phy_device *dev, 927 struct ethtool_tunable *tuna, void *data); 928 /** @set_tunable: Set the value of a tunable */ 929 int (*set_tunable)(struct phy_device *dev, 930 struct ethtool_tunable *tuna, 931 const void *data); 932 /** @set_loopback: Set the loopback mood of the PHY */ 933 int (*set_loopback)(struct phy_device *dev, bool enable); 934 /** @get_sqi: Get the signal quality indication */ 935 int (*get_sqi)(struct phy_device *dev); 936 /** @get_sqi_max: Get the maximum signal quality indication */ 937 int (*get_sqi_max)(struct phy_device *dev); 938 }; 939 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 940 struct phy_driver, mdiodrv) 941 942 #define PHY_ANY_ID "MATCH ANY PHY" 943 #define PHY_ANY_UID 0xffffffff 944 945 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 946 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 947 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 948 949 /* A Structure for boards to register fixups with the PHY Lib */ 950 struct phy_fixup { 951 struct list_head list; 952 char bus_id[MII_BUS_ID_SIZE + 3]; 953 u32 phy_uid; 954 u32 phy_uid_mask; 955 int (*run)(struct phy_device *phydev); 956 }; 957 958 const char *phy_speed_to_str(int speed); 959 const char *phy_duplex_to_str(unsigned int duplex); 960 961 /* A structure for mapping a particular speed and duplex 962 * combination to a particular SUPPORTED and ADVERTISED value 963 */ 964 struct phy_setting { 965 u32 speed; 966 u8 duplex; 967 u8 bit; 968 }; 969 970 const struct phy_setting * 971 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 972 bool exact); 973 size_t phy_speeds(unsigned int *speeds, size_t size, 974 unsigned long *mask); 975 void of_set_phy_supported(struct phy_device *phydev); 976 void of_set_phy_eee_broken(struct phy_device *phydev); 977 int phy_speed_down_core(struct phy_device *phydev); 978 979 /** 980 * phy_is_started - Convenience function to check whether PHY is started 981 * @phydev: The phy_device struct 982 */ 983 static inline bool phy_is_started(struct phy_device *phydev) 984 { 985 return phydev->state >= PHY_UP; 986 } 987 988 void phy_resolve_aneg_pause(struct phy_device *phydev); 989 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 990 void phy_check_downshift(struct phy_device *phydev); 991 992 /** 993 * phy_read - Convenience function for reading a given PHY register 994 * @phydev: the phy_device struct 995 * @regnum: register number to read 996 * 997 * NOTE: MUST NOT be called from interrupt context, 998 * because the bus read/write functions may wait for an interrupt 999 * to conclude the operation. 1000 */ 1001 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1002 { 1003 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1004 } 1005 1006 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1007 timeout_us, sleep_before_read) \ 1008 ({ \ 1009 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 1010 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1011 if (val < 0) \ 1012 __ret = val; \ 1013 if (__ret) \ 1014 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1015 __ret; \ 1016 }) 1017 1018 1019 /** 1020 * __phy_read - convenience function for reading a given PHY register 1021 * @phydev: the phy_device struct 1022 * @regnum: register number to read 1023 * 1024 * The caller must have taken the MDIO bus lock. 1025 */ 1026 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1027 { 1028 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1029 } 1030 1031 /** 1032 * phy_write - Convenience function for writing a given PHY register 1033 * @phydev: the phy_device struct 1034 * @regnum: register number to write 1035 * @val: value to write to @regnum 1036 * 1037 * NOTE: MUST NOT be called from interrupt context, 1038 * because the bus read/write functions may wait for an interrupt 1039 * to conclude the operation. 1040 */ 1041 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1042 { 1043 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1044 } 1045 1046 /** 1047 * __phy_write - Convenience function for writing a given PHY register 1048 * @phydev: the phy_device struct 1049 * @regnum: register number to write 1050 * @val: value to write to @regnum 1051 * 1052 * The caller must have taken the MDIO bus lock. 1053 */ 1054 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1055 { 1056 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1057 val); 1058 } 1059 1060 /** 1061 * __phy_modify_changed() - Convenience function for modifying a PHY register 1062 * @phydev: a pointer to a &struct phy_device 1063 * @regnum: register number 1064 * @mask: bit mask of bits to clear 1065 * @set: bit mask of bits to set 1066 * 1067 * Unlocked helper function which allows a PHY register to be modified as 1068 * new register value = (old register value & ~mask) | set 1069 * 1070 * Returns negative errno, 0 if there was no change, and 1 in case of change 1071 */ 1072 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1073 u16 mask, u16 set) 1074 { 1075 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1076 regnum, mask, set); 1077 } 1078 1079 /* 1080 * phy_read_mmd - Convenience function for reading a register 1081 * from an MMD on a given PHY. 1082 */ 1083 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1084 1085 /** 1086 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1087 * condition is met or a timeout occurs 1088 * 1089 * @phydev: The phy_device struct 1090 * @devaddr: The MMD to read from 1091 * @regnum: The register on the MMD to read 1092 * @val: Variable to read the register into 1093 * @cond: Break condition (usually involving @val) 1094 * @sleep_us: Maximum time to sleep between reads in us (0 1095 * tight-loops). Should be less than ~20ms since usleep_range 1096 * is used (see Documentation/timers/timers-howto.rst). 1097 * @timeout_us: Timeout in us, 0 means never timeout 1098 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1099 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1100 * case, the last read value at @args is stored in @val. Must not 1101 * be called from atomic context if sleep_us or timeout_us are used. 1102 */ 1103 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1104 sleep_us, timeout_us, sleep_before_read) \ 1105 ({ \ 1106 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1107 sleep_us, timeout_us, sleep_before_read, \ 1108 phydev, devaddr, regnum); \ 1109 if (val < 0) \ 1110 __ret = val; \ 1111 if (__ret) \ 1112 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1113 __ret; \ 1114 }) 1115 1116 /* 1117 * __phy_read_mmd - Convenience function for reading a register 1118 * from an MMD on a given PHY. 1119 */ 1120 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1121 1122 /* 1123 * phy_write_mmd - Convenience function for writing a register 1124 * on an MMD on a given PHY. 1125 */ 1126 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1127 1128 /* 1129 * __phy_write_mmd - Convenience function for writing a register 1130 * on an MMD on a given PHY. 1131 */ 1132 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1133 1134 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1135 u16 set); 1136 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1137 u16 set); 1138 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1139 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1140 1141 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1142 u16 mask, u16 set); 1143 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1144 u16 mask, u16 set); 1145 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1146 u16 mask, u16 set); 1147 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1148 u16 mask, u16 set); 1149 1150 /** 1151 * __phy_set_bits - Convenience function for setting bits in a PHY register 1152 * @phydev: the phy_device struct 1153 * @regnum: register number to write 1154 * @val: bits to set 1155 * 1156 * The caller must have taken the MDIO bus lock. 1157 */ 1158 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1159 { 1160 return __phy_modify(phydev, regnum, 0, val); 1161 } 1162 1163 /** 1164 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1165 * @phydev: the phy_device struct 1166 * @regnum: register number to write 1167 * @val: bits to clear 1168 * 1169 * The caller must have taken the MDIO bus lock. 1170 */ 1171 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1172 u16 val) 1173 { 1174 return __phy_modify(phydev, regnum, val, 0); 1175 } 1176 1177 /** 1178 * phy_set_bits - Convenience function for setting bits in a PHY register 1179 * @phydev: the phy_device struct 1180 * @regnum: register number to write 1181 * @val: bits to set 1182 */ 1183 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1184 { 1185 return phy_modify(phydev, regnum, 0, val); 1186 } 1187 1188 /** 1189 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1190 * @phydev: the phy_device struct 1191 * @regnum: register number to write 1192 * @val: bits to clear 1193 */ 1194 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1195 { 1196 return phy_modify(phydev, regnum, val, 0); 1197 } 1198 1199 /** 1200 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1201 * on MMD 1202 * @phydev: the phy_device struct 1203 * @devad: the MMD containing register to modify 1204 * @regnum: register number to modify 1205 * @val: bits to set 1206 * 1207 * The caller must have taken the MDIO bus lock. 1208 */ 1209 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1210 u32 regnum, u16 val) 1211 { 1212 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1213 } 1214 1215 /** 1216 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1217 * on MMD 1218 * @phydev: the phy_device struct 1219 * @devad: the MMD containing register to modify 1220 * @regnum: register number to modify 1221 * @val: bits to clear 1222 * 1223 * The caller must have taken the MDIO bus lock. 1224 */ 1225 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1226 u32 regnum, u16 val) 1227 { 1228 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1229 } 1230 1231 /** 1232 * phy_set_bits_mmd - Convenience function for setting bits in a register 1233 * on MMD 1234 * @phydev: the phy_device struct 1235 * @devad: the MMD containing register to modify 1236 * @regnum: register number to modify 1237 * @val: bits to set 1238 */ 1239 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1240 u32 regnum, u16 val) 1241 { 1242 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1243 } 1244 1245 /** 1246 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1247 * on MMD 1248 * @phydev: the phy_device struct 1249 * @devad: the MMD containing register to modify 1250 * @regnum: register number to modify 1251 * @val: bits to clear 1252 */ 1253 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1254 u32 regnum, u16 val) 1255 { 1256 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1257 } 1258 1259 /** 1260 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1261 * @phydev: the phy_device struct 1262 * 1263 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1264 * PHY_MAC_INTERRUPT 1265 */ 1266 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1267 { 1268 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1269 } 1270 1271 /** 1272 * phy_polling_mode - Convenience function for testing whether polling is 1273 * used to detect PHY status changes 1274 * @phydev: the phy_device struct 1275 */ 1276 static inline bool phy_polling_mode(struct phy_device *phydev) 1277 { 1278 if (phydev->state == PHY_CABLETEST) 1279 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1280 return true; 1281 1282 return phydev->irq == PHY_POLL; 1283 } 1284 1285 /** 1286 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1287 * @phydev: the phy_device struct 1288 */ 1289 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1290 { 1291 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1292 } 1293 1294 /** 1295 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1296 * @phydev: the phy_device struct 1297 */ 1298 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1299 { 1300 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1301 } 1302 1303 /** 1304 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1305 * PTP hardware clock capabilities. 1306 * @phydev: the phy_device struct 1307 */ 1308 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1309 { 1310 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1311 } 1312 1313 /** 1314 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1315 * @phydev: the phy_device struct 1316 */ 1317 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1318 { 1319 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1320 } 1321 1322 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1323 { 1324 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1325 } 1326 1327 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1328 int type) 1329 { 1330 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1331 } 1332 1333 static inline int phy_ts_info(struct phy_device *phydev, 1334 struct ethtool_ts_info *tsinfo) 1335 { 1336 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1337 } 1338 1339 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1340 int type) 1341 { 1342 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1343 } 1344 1345 /** 1346 * phy_is_internal - Convenience function for testing if a PHY is internal 1347 * @phydev: the phy_device struct 1348 */ 1349 static inline bool phy_is_internal(struct phy_device *phydev) 1350 { 1351 return phydev->is_internal; 1352 } 1353 1354 /** 1355 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1356 * @phydev: the phy_device struct 1357 */ 1358 static inline bool phy_on_sfp(struct phy_device *phydev) 1359 { 1360 return phydev->is_on_sfp_module; 1361 } 1362 1363 /** 1364 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1365 * PHY interface mode is RGMII (all variants) 1366 * @mode: the &phy_interface_t enum 1367 */ 1368 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1369 { 1370 return mode >= PHY_INTERFACE_MODE_RGMII && 1371 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1372 }; 1373 1374 /** 1375 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1376 * negotiation 1377 * @mode: one of &enum phy_interface_t 1378 * 1379 * Returns true if the PHY interface mode uses the 16-bit negotiation 1380 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1381 */ 1382 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1383 { 1384 return mode == PHY_INTERFACE_MODE_1000BASEX || 1385 mode == PHY_INTERFACE_MODE_2500BASEX; 1386 } 1387 1388 /** 1389 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1390 * is RGMII (all variants) 1391 * @phydev: the phy_device struct 1392 */ 1393 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1394 { 1395 return phy_interface_mode_is_rgmii(phydev->interface); 1396 }; 1397 1398 /** 1399 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1400 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1401 * @phydev: the phy_device struct 1402 */ 1403 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1404 { 1405 return phydev->is_pseudo_fixed_link; 1406 } 1407 1408 int phy_save_page(struct phy_device *phydev); 1409 int phy_select_page(struct phy_device *phydev, int page); 1410 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1411 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1412 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1413 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1414 u16 mask, u16 set); 1415 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1416 u16 mask, u16 set); 1417 1418 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1419 bool is_c45, 1420 struct phy_c45_device_ids *c45_ids); 1421 #if IS_ENABLED(CONFIG_PHYLIB) 1422 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1423 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1424 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1425 struct phy_device *device_phy_find_device(struct device *dev); 1426 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); 1427 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1428 int phy_device_register(struct phy_device *phy); 1429 void phy_device_free(struct phy_device *phydev); 1430 #else 1431 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1432 { 1433 return 0; 1434 } 1435 static inline 1436 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1437 { 1438 return 0; 1439 } 1440 1441 static inline 1442 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1443 { 1444 return NULL; 1445 } 1446 1447 static inline struct phy_device *device_phy_find_device(struct device *dev) 1448 { 1449 return NULL; 1450 } 1451 1452 static inline 1453 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1454 { 1455 return NULL; 1456 } 1457 1458 static inline 1459 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1460 { 1461 return NULL; 1462 } 1463 1464 static inline int phy_device_register(struct phy_device *phy) 1465 { 1466 return 0; 1467 } 1468 1469 static inline void phy_device_free(struct phy_device *phydev) { } 1470 #endif /* CONFIG_PHYLIB */ 1471 void phy_device_remove(struct phy_device *phydev); 1472 int phy_get_c45_ids(struct phy_device *phydev); 1473 int phy_init_hw(struct phy_device *phydev); 1474 int phy_suspend(struct phy_device *phydev); 1475 int phy_resume(struct phy_device *phydev); 1476 int __phy_resume(struct phy_device *phydev); 1477 int phy_loopback(struct phy_device *phydev, bool enable); 1478 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1479 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1480 int phy_sfp_probe(struct phy_device *phydev, 1481 const struct sfp_upstream_ops *ops); 1482 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1483 phy_interface_t interface); 1484 struct phy_device *phy_find_first(struct mii_bus *bus); 1485 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1486 u32 flags, phy_interface_t interface); 1487 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1488 void (*handler)(struct net_device *), 1489 phy_interface_t interface); 1490 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1491 void (*handler)(struct net_device *), 1492 phy_interface_t interface); 1493 void phy_disconnect(struct phy_device *phydev); 1494 void phy_detach(struct phy_device *phydev); 1495 void phy_start(struct phy_device *phydev); 1496 void phy_stop(struct phy_device *phydev); 1497 int phy_config_aneg(struct phy_device *phydev); 1498 int phy_start_aneg(struct phy_device *phydev); 1499 int phy_aneg_done(struct phy_device *phydev); 1500 int phy_speed_down(struct phy_device *phydev, bool sync); 1501 int phy_speed_up(struct phy_device *phydev); 1502 1503 int phy_restart_aneg(struct phy_device *phydev); 1504 int phy_reset_after_clk_enable(struct phy_device *phydev); 1505 1506 #if IS_ENABLED(CONFIG_PHYLIB) 1507 int phy_start_cable_test(struct phy_device *phydev, 1508 struct netlink_ext_ack *extack); 1509 int phy_start_cable_test_tdr(struct phy_device *phydev, 1510 struct netlink_ext_ack *extack, 1511 const struct phy_tdr_config *config); 1512 #else 1513 static inline 1514 int phy_start_cable_test(struct phy_device *phydev, 1515 struct netlink_ext_ack *extack) 1516 { 1517 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1518 return -EOPNOTSUPP; 1519 } 1520 static inline 1521 int phy_start_cable_test_tdr(struct phy_device *phydev, 1522 struct netlink_ext_ack *extack, 1523 const struct phy_tdr_config *config) 1524 { 1525 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1526 return -EOPNOTSUPP; 1527 } 1528 #endif 1529 1530 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1531 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1532 u16 cm); 1533 1534 static inline void phy_device_reset(struct phy_device *phydev, int value) 1535 { 1536 mdio_device_reset(&phydev->mdio, value); 1537 } 1538 1539 #define phydev_err(_phydev, format, args...) \ 1540 dev_err(&_phydev->mdio.dev, format, ##args) 1541 1542 #define phydev_info(_phydev, format, args...) \ 1543 dev_info(&_phydev->mdio.dev, format, ##args) 1544 1545 #define phydev_warn(_phydev, format, args...) \ 1546 dev_warn(&_phydev->mdio.dev, format, ##args) 1547 1548 #define phydev_dbg(_phydev, format, args...) \ 1549 dev_dbg(&_phydev->mdio.dev, format, ##args) 1550 1551 static inline const char *phydev_name(const struct phy_device *phydev) 1552 { 1553 return dev_name(&phydev->mdio.dev); 1554 } 1555 1556 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1557 { 1558 mutex_lock(&phydev->mdio.bus->mdio_lock); 1559 } 1560 1561 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1562 { 1563 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1564 } 1565 1566 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1567 __printf(2, 3); 1568 char *phy_attached_info_irq(struct phy_device *phydev) 1569 __malloc; 1570 void phy_attached_info(struct phy_device *phydev); 1571 1572 /* Clause 22 PHY */ 1573 int genphy_read_abilities(struct phy_device *phydev); 1574 int genphy_setup_forced(struct phy_device *phydev); 1575 int genphy_restart_aneg(struct phy_device *phydev); 1576 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1577 int genphy_config_eee_advert(struct phy_device *phydev); 1578 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1579 int genphy_aneg_done(struct phy_device *phydev); 1580 int genphy_update_link(struct phy_device *phydev); 1581 int genphy_read_lpa(struct phy_device *phydev); 1582 int genphy_read_status_fixed(struct phy_device *phydev); 1583 int genphy_read_status(struct phy_device *phydev); 1584 int genphy_read_master_slave(struct phy_device *phydev); 1585 int genphy_suspend(struct phy_device *phydev); 1586 int genphy_resume(struct phy_device *phydev); 1587 int genphy_loopback(struct phy_device *phydev, bool enable); 1588 int genphy_soft_reset(struct phy_device *phydev); 1589 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1590 1591 static inline int genphy_config_aneg(struct phy_device *phydev) 1592 { 1593 return __genphy_config_aneg(phydev, false); 1594 } 1595 1596 static inline int genphy_no_config_intr(struct phy_device *phydev) 1597 { 1598 return 0; 1599 } 1600 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1601 u16 regnum); 1602 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1603 u16 regnum, u16 val); 1604 1605 /* Clause 37 */ 1606 int genphy_c37_config_aneg(struct phy_device *phydev); 1607 int genphy_c37_read_status(struct phy_device *phydev); 1608 1609 /* Clause 45 PHY */ 1610 int genphy_c45_restart_aneg(struct phy_device *phydev); 1611 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1612 int genphy_c45_aneg_done(struct phy_device *phydev); 1613 int genphy_c45_read_link(struct phy_device *phydev); 1614 int genphy_c45_read_lpa(struct phy_device *phydev); 1615 int genphy_c45_read_pma(struct phy_device *phydev); 1616 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1617 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1618 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1619 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1620 int genphy_c45_read_mdix(struct phy_device *phydev); 1621 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1622 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1623 int genphy_c45_read_status(struct phy_device *phydev); 1624 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1625 int genphy_c45_config_aneg(struct phy_device *phydev); 1626 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1627 int genphy_c45_pma_resume(struct phy_device *phydev); 1628 int genphy_c45_pma_suspend(struct phy_device *phydev); 1629 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1630 1631 /* Generic C45 PHY driver */ 1632 extern struct phy_driver genphy_c45_driver; 1633 1634 /* The gen10g_* functions are the old Clause 45 stub */ 1635 int gen10g_config_aneg(struct phy_device *phydev); 1636 1637 static inline int phy_read_status(struct phy_device *phydev) 1638 { 1639 if (!phydev->drv) 1640 return -EIO; 1641 1642 if (phydev->drv->read_status) 1643 return phydev->drv->read_status(phydev); 1644 else 1645 return genphy_read_status(phydev); 1646 } 1647 1648 void phy_driver_unregister(struct phy_driver *drv); 1649 void phy_drivers_unregister(struct phy_driver *drv, int n); 1650 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1651 int phy_drivers_register(struct phy_driver *new_driver, int n, 1652 struct module *owner); 1653 void phy_error(struct phy_device *phydev); 1654 void phy_state_machine(struct work_struct *work); 1655 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1656 void phy_trigger_machine(struct phy_device *phydev); 1657 void phy_mac_interrupt(struct phy_device *phydev); 1658 void phy_start_machine(struct phy_device *phydev); 1659 void phy_stop_machine(struct phy_device *phydev); 1660 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1661 struct ethtool_link_ksettings *cmd); 1662 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1663 const struct ethtool_link_ksettings *cmd); 1664 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1665 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1666 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1667 int phy_disable_interrupts(struct phy_device *phydev); 1668 void phy_request_interrupt(struct phy_device *phydev); 1669 void phy_free_interrupt(struct phy_device *phydev); 1670 void phy_print_status(struct phy_device *phydev); 1671 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1672 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1673 void phy_advertise_supported(struct phy_device *phydev); 1674 void phy_support_sym_pause(struct phy_device *phydev); 1675 void phy_support_asym_pause(struct phy_device *phydev); 1676 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1677 bool autoneg); 1678 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1679 bool phy_validate_pause(struct phy_device *phydev, 1680 struct ethtool_pauseparam *pp); 1681 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1682 1683 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1684 const int *delay_values, int size, bool is_rx); 1685 1686 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1687 bool *tx_pause, bool *rx_pause); 1688 1689 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1690 int (*run)(struct phy_device *)); 1691 int phy_register_fixup_for_id(const char *bus_id, 1692 int (*run)(struct phy_device *)); 1693 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1694 int (*run)(struct phy_device *)); 1695 1696 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1697 int phy_unregister_fixup_for_id(const char *bus_id); 1698 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1699 1700 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1701 int phy_get_eee_err(struct phy_device *phydev); 1702 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1703 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1704 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1705 void phy_ethtool_get_wol(struct phy_device *phydev, 1706 struct ethtool_wolinfo *wol); 1707 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1708 struct ethtool_link_ksettings *cmd); 1709 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1710 const struct ethtool_link_ksettings *cmd); 1711 int phy_ethtool_nway_reset(struct net_device *ndev); 1712 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1713 void phy_package_leave(struct phy_device *phydev); 1714 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1715 int addr, size_t priv_size); 1716 1717 #if IS_ENABLED(CONFIG_PHYLIB) 1718 int __init mdio_bus_init(void); 1719 void mdio_bus_exit(void); 1720 #endif 1721 1722 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1723 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1724 int phy_ethtool_get_stats(struct phy_device *phydev, 1725 struct ethtool_stats *stats, u64 *data); 1726 1727 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1728 { 1729 struct phy_package_shared *shared = phydev->shared; 1730 1731 if (!shared) 1732 return -EIO; 1733 1734 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1735 } 1736 1737 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1738 { 1739 struct phy_package_shared *shared = phydev->shared; 1740 1741 if (!shared) 1742 return -EIO; 1743 1744 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1745 } 1746 1747 static inline int phy_package_write(struct phy_device *phydev, 1748 u32 regnum, u16 val) 1749 { 1750 struct phy_package_shared *shared = phydev->shared; 1751 1752 if (!shared) 1753 return -EIO; 1754 1755 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1756 } 1757 1758 static inline int __phy_package_write(struct phy_device *phydev, 1759 u32 regnum, u16 val) 1760 { 1761 struct phy_package_shared *shared = phydev->shared; 1762 1763 if (!shared) 1764 return -EIO; 1765 1766 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1767 } 1768 1769 static inline bool __phy_package_set_once(struct phy_device *phydev, 1770 unsigned int b) 1771 { 1772 struct phy_package_shared *shared = phydev->shared; 1773 1774 if (!shared) 1775 return false; 1776 1777 return !test_and_set_bit(b, &shared->flags); 1778 } 1779 1780 static inline bool phy_package_init_once(struct phy_device *phydev) 1781 { 1782 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1783 } 1784 1785 static inline bool phy_package_probe_once(struct phy_device *phydev) 1786 { 1787 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1788 } 1789 1790 extern struct bus_type mdio_bus_type; 1791 1792 struct mdio_board_info { 1793 const char *bus_id; 1794 char modalias[MDIO_NAME_SIZE]; 1795 int mdio_addr; 1796 const void *platform_data; 1797 }; 1798 1799 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1800 int mdiobus_register_board_info(const struct mdio_board_info *info, 1801 unsigned int n); 1802 #else 1803 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1804 unsigned int n) 1805 { 1806 return 0; 1807 } 1808 #endif 1809 1810 1811 /** 1812 * phy_module_driver() - Helper macro for registering PHY drivers 1813 * @__phy_drivers: array of PHY drivers to register 1814 * @__count: Numbers of members in array 1815 * 1816 * Helper macro for PHY drivers which do not do anything special in module 1817 * init/exit. Each module may only use this macro once, and calling it 1818 * replaces module_init() and module_exit(). 1819 */ 1820 #define phy_module_driver(__phy_drivers, __count) \ 1821 static int __init phy_module_init(void) \ 1822 { \ 1823 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1824 } \ 1825 module_init(phy_module_init); \ 1826 static void __exit phy_module_exit(void) \ 1827 { \ 1828 phy_drivers_unregister(__phy_drivers, __count); \ 1829 } \ 1830 module_exit(phy_module_exit) 1831 1832 #define module_phy_driver(__phy_drivers) \ 1833 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1834 1835 bool phy_driver_is_genphy(struct phy_device *phydev); 1836 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1837 1838 #endif /* __PHY_H */ 1839