1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/netlink.h> 19 #include <linux/mdio.h> 20 #include <linux/mii.h> 21 #include <linux/mii_timestamper.h> 22 #include <linux/module.h> 23 #include <linux/timer.h> 24 #include <linux/workqueue.h> 25 #include <linux/mod_devicetable.h> 26 #include <linux/u64_stats_sync.h> 27 #include <linux/irqreturn.h> 28 #include <linux/iopoll.h> 29 #include <linux/refcount.h> 30 31 #include <linux/atomic.h> 32 33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 54 55 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 56 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 57 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 58 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 59 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 60 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 61 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 62 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 63 64 extern const int phy_basic_ports_array[3]; 65 extern const int phy_fibre_port_array[1]; 66 extern const int phy_all_ports_features_array[7]; 67 extern const int phy_10_100_features_array[4]; 68 extern const int phy_basic_t1_features_array[2]; 69 extern const int phy_gbit_features_array[2]; 70 extern const int phy_10gbit_features_array[1]; 71 72 /* 73 * Set phydev->irq to PHY_POLL if interrupts are not supported, 74 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 75 * the attached MAC driver handles the interrupt 76 */ 77 #define PHY_POLL -1 78 #define PHY_MAC_INTERRUPT -2 79 80 #define PHY_IS_INTERNAL 0x00000001 81 #define PHY_RST_AFTER_CLK_EN 0x00000002 82 #define PHY_POLL_CABLE_TEST 0x00000004 83 #define MDIO_DEVICE_IS_PHY 0x80000000 84 85 /** 86 * enum phy_interface_t - Interface Mode definitions 87 * 88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 90 * @PHY_INTERFACE_MODE_MII: Median-independent interface 91 * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface 92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 96 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 97 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 98 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 99 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 100 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 101 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 102 * @PHY_INTERFACE_MODE_SMII: Serial MII 103 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 104 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 106 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 107 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 108 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 109 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 110 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 111 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 112 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 113 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 114 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 115 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 116 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 117 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 118 * @PHY_INTERFACE_MODE_MAX: Book keeping 119 * 120 * Describes the interface between the MAC and PHY. 121 */ 122 typedef enum { 123 PHY_INTERFACE_MODE_NA, 124 PHY_INTERFACE_MODE_INTERNAL, 125 PHY_INTERFACE_MODE_MII, 126 PHY_INTERFACE_MODE_GMII, 127 PHY_INTERFACE_MODE_SGMII, 128 PHY_INTERFACE_MODE_TBI, 129 PHY_INTERFACE_MODE_REVMII, 130 PHY_INTERFACE_MODE_RMII, 131 PHY_INTERFACE_MODE_REVRMII, 132 PHY_INTERFACE_MODE_RGMII, 133 PHY_INTERFACE_MODE_RGMII_ID, 134 PHY_INTERFACE_MODE_RGMII_RXID, 135 PHY_INTERFACE_MODE_RGMII_TXID, 136 PHY_INTERFACE_MODE_RTBI, 137 PHY_INTERFACE_MODE_SMII, 138 PHY_INTERFACE_MODE_XGMII, 139 PHY_INTERFACE_MODE_XLGMII, 140 PHY_INTERFACE_MODE_MOCA, 141 PHY_INTERFACE_MODE_QSGMII, 142 PHY_INTERFACE_MODE_TRGMII, 143 PHY_INTERFACE_MODE_100BASEX, 144 PHY_INTERFACE_MODE_1000BASEX, 145 PHY_INTERFACE_MODE_2500BASEX, 146 PHY_INTERFACE_MODE_5GBASER, 147 PHY_INTERFACE_MODE_RXAUI, 148 PHY_INTERFACE_MODE_XAUI, 149 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 150 PHY_INTERFACE_MODE_10GBASER, 151 PHY_INTERFACE_MODE_25GBASER, 152 PHY_INTERFACE_MODE_USXGMII, 153 /* 10GBASE-KR - with Clause 73 AN */ 154 PHY_INTERFACE_MODE_10GKR, 155 PHY_INTERFACE_MODE_MAX, 156 } phy_interface_t; 157 158 /* PHY interface mode bitmap handling */ 159 #define DECLARE_PHY_INTERFACE_MASK(name) \ 160 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 161 162 static inline void phy_interface_zero(unsigned long *intf) 163 { 164 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 165 } 166 167 static inline bool phy_interface_empty(const unsigned long *intf) 168 { 169 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 170 } 171 172 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 173 const unsigned long *b) 174 { 175 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 176 } 177 178 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 179 const unsigned long *b) 180 { 181 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 182 } 183 184 static inline void phy_interface_set_rgmii(unsigned long *intf) 185 { 186 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 187 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 188 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 189 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 190 } 191 192 /* 193 * phy_supported_speeds - return all speeds currently supported by a PHY device 194 */ 195 unsigned int phy_supported_speeds(struct phy_device *phy, 196 unsigned int *speeds, 197 unsigned int size); 198 199 /** 200 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 201 * @interface: enum phy_interface_t value 202 * 203 * Description: maps enum &phy_interface_t defined in this file 204 * into the device tree binding of 'phy-mode', so that Ethernet 205 * device driver can get PHY interface from device tree. 206 */ 207 static inline const char *phy_modes(phy_interface_t interface) 208 { 209 switch (interface) { 210 case PHY_INTERFACE_MODE_NA: 211 return ""; 212 case PHY_INTERFACE_MODE_INTERNAL: 213 return "internal"; 214 case PHY_INTERFACE_MODE_MII: 215 return "mii"; 216 case PHY_INTERFACE_MODE_GMII: 217 return "gmii"; 218 case PHY_INTERFACE_MODE_SGMII: 219 return "sgmii"; 220 case PHY_INTERFACE_MODE_TBI: 221 return "tbi"; 222 case PHY_INTERFACE_MODE_REVMII: 223 return "rev-mii"; 224 case PHY_INTERFACE_MODE_RMII: 225 return "rmii"; 226 case PHY_INTERFACE_MODE_REVRMII: 227 return "rev-rmii"; 228 case PHY_INTERFACE_MODE_RGMII: 229 return "rgmii"; 230 case PHY_INTERFACE_MODE_RGMII_ID: 231 return "rgmii-id"; 232 case PHY_INTERFACE_MODE_RGMII_RXID: 233 return "rgmii-rxid"; 234 case PHY_INTERFACE_MODE_RGMII_TXID: 235 return "rgmii-txid"; 236 case PHY_INTERFACE_MODE_RTBI: 237 return "rtbi"; 238 case PHY_INTERFACE_MODE_SMII: 239 return "smii"; 240 case PHY_INTERFACE_MODE_XGMII: 241 return "xgmii"; 242 case PHY_INTERFACE_MODE_XLGMII: 243 return "xlgmii"; 244 case PHY_INTERFACE_MODE_MOCA: 245 return "moca"; 246 case PHY_INTERFACE_MODE_QSGMII: 247 return "qsgmii"; 248 case PHY_INTERFACE_MODE_TRGMII: 249 return "trgmii"; 250 case PHY_INTERFACE_MODE_1000BASEX: 251 return "1000base-x"; 252 case PHY_INTERFACE_MODE_2500BASEX: 253 return "2500base-x"; 254 case PHY_INTERFACE_MODE_5GBASER: 255 return "5gbase-r"; 256 case PHY_INTERFACE_MODE_RXAUI: 257 return "rxaui"; 258 case PHY_INTERFACE_MODE_XAUI: 259 return "xaui"; 260 case PHY_INTERFACE_MODE_10GBASER: 261 return "10gbase-r"; 262 case PHY_INTERFACE_MODE_25GBASER: 263 return "25gbase-r"; 264 case PHY_INTERFACE_MODE_USXGMII: 265 return "usxgmii"; 266 case PHY_INTERFACE_MODE_10GKR: 267 return "10gbase-kr"; 268 case PHY_INTERFACE_MODE_100BASEX: 269 return "100base-x"; 270 default: 271 return "unknown"; 272 } 273 } 274 275 276 #define PHY_INIT_TIMEOUT 100000 277 #define PHY_FORCE_TIMEOUT 10 278 279 #define PHY_MAX_ADDR 32 280 281 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 282 #define PHY_ID_FMT "%s:%02x" 283 284 #define MII_BUS_ID_SIZE 61 285 286 struct device; 287 struct phylink; 288 struct sfp_bus; 289 struct sfp_upstream_ops; 290 struct sk_buff; 291 292 /** 293 * struct mdio_bus_stats - Statistics counters for MDIO busses 294 * @transfers: Total number of transfers, i.e. @writes + @reads 295 * @errors: Number of MDIO transfers that returned an error 296 * @writes: Number of write transfers 297 * @reads: Number of read transfers 298 * @syncp: Synchronisation for incrementing statistics 299 */ 300 struct mdio_bus_stats { 301 u64_stats_t transfers; 302 u64_stats_t errors; 303 u64_stats_t writes; 304 u64_stats_t reads; 305 /* Must be last, add new statistics above */ 306 struct u64_stats_sync syncp; 307 }; 308 309 /** 310 * struct phy_package_shared - Shared information in PHY packages 311 * @addr: Common PHY address used to combine PHYs in one package 312 * @refcnt: Number of PHYs connected to this shared data 313 * @flags: Initialization of PHY package 314 * @priv_size: Size of the shared private data @priv 315 * @priv: Driver private data shared across a PHY package 316 * 317 * Represents a shared structure between different phydev's in the same 318 * package, for example a quad PHY. See phy_package_join() and 319 * phy_package_leave(). 320 */ 321 struct phy_package_shared { 322 int addr; 323 refcount_t refcnt; 324 unsigned long flags; 325 size_t priv_size; 326 327 /* private data pointer */ 328 /* note that this pointer is shared between different phydevs and 329 * the user has to take care of appropriate locking. It is allocated 330 * and freed automatically by phy_package_join() and 331 * phy_package_leave(). 332 */ 333 void *priv; 334 }; 335 336 /* used as bit number in atomic bitops */ 337 #define PHY_SHARED_F_INIT_DONE 0 338 #define PHY_SHARED_F_PROBE_DONE 1 339 340 /** 341 * struct mii_bus - Represents an MDIO bus 342 * 343 * @owner: Who owns this device 344 * @name: User friendly name for this MDIO device, or driver name 345 * @id: Unique identifier for this bus, typical from bus hierarchy 346 * @priv: Driver private data 347 * 348 * The Bus class for PHYs. Devices which provide access to 349 * PHYs should register using this structure 350 */ 351 struct mii_bus { 352 struct module *owner; 353 const char *name; 354 char id[MII_BUS_ID_SIZE]; 355 void *priv; 356 /** @read: Perform a read transfer on the bus */ 357 int (*read)(struct mii_bus *bus, int addr, int regnum); 358 /** @write: Perform a write transfer on the bus */ 359 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 360 /** @reset: Perform a reset of the bus */ 361 int (*reset)(struct mii_bus *bus); 362 363 /** @stats: Statistic counters per device on the bus */ 364 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 365 366 /** 367 * @mdio_lock: A lock to ensure that only one thing can read/write 368 * the MDIO bus at a time 369 */ 370 struct mutex mdio_lock; 371 372 /** @parent: Parent device of this bus */ 373 struct device *parent; 374 /** @state: State of bus structure */ 375 enum { 376 MDIOBUS_ALLOCATED = 1, 377 MDIOBUS_REGISTERED, 378 MDIOBUS_UNREGISTERED, 379 MDIOBUS_RELEASED, 380 } state; 381 382 /** @dev: Kernel device representation */ 383 struct device dev; 384 385 /** @mdio_map: list of all MDIO devices on bus */ 386 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 387 388 /** @phy_mask: PHY addresses to be ignored when probing */ 389 u32 phy_mask; 390 391 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 392 u32 phy_ignore_ta_mask; 393 394 /** 395 * @irq: An array of interrupts, each PHY's interrupt at the index 396 * matching its address 397 */ 398 int irq[PHY_MAX_ADDR]; 399 400 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 401 int reset_delay_us; 402 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 403 int reset_post_delay_us; 404 /** @reset_gpiod: Reset GPIO descriptor pointer */ 405 struct gpio_desc *reset_gpiod; 406 407 /** @probe_capabilities: bus capabilities, used for probing */ 408 enum { 409 MDIOBUS_NO_CAP = 0, 410 MDIOBUS_C22, 411 MDIOBUS_C45, 412 MDIOBUS_C22_C45, 413 } probe_capabilities; 414 415 /** @shared_lock: protect access to the shared element */ 416 struct mutex shared_lock; 417 418 /** @shared: shared state across different PHYs */ 419 struct phy_package_shared *shared[PHY_MAX_ADDR]; 420 }; 421 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 422 423 struct mii_bus *mdiobus_alloc_size(size_t size); 424 425 /** 426 * mdiobus_alloc - Allocate an MDIO bus structure 427 * 428 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 429 * for the driver to register the bus. 430 */ 431 static inline struct mii_bus *mdiobus_alloc(void) 432 { 433 return mdiobus_alloc_size(0); 434 } 435 436 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 437 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 438 struct module *owner); 439 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 440 #define devm_mdiobus_register(dev, bus) \ 441 __devm_mdiobus_register(dev, bus, THIS_MODULE) 442 443 void mdiobus_unregister(struct mii_bus *bus); 444 void mdiobus_free(struct mii_bus *bus); 445 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 446 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 447 { 448 return devm_mdiobus_alloc_size(dev, 0); 449 } 450 451 struct mii_bus *mdio_find_bus(const char *mdio_name); 452 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 453 454 #define PHY_INTERRUPT_DISABLED false 455 #define PHY_INTERRUPT_ENABLED true 456 457 /** 458 * enum phy_state - PHY state machine states: 459 * 460 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 461 * should be called if and only if the PHY is in this state, 462 * given that the PHY device exists. 463 * - PHY driver probe function will set the state to @PHY_READY 464 * 465 * @PHY_READY: PHY is ready to send and receive packets, but the 466 * controller is not. By default, PHYs which do not implement 467 * probe will be set to this state by phy_probe(). 468 * - start will set the state to UP 469 * 470 * @PHY_UP: The PHY and attached device are ready to do work. 471 * Interrupts should be started here. 472 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 473 * 474 * @PHY_NOLINK: PHY is up, but not currently plugged in. 475 * - irq or timer will set @PHY_RUNNING if link comes back 476 * - phy_stop moves to @PHY_HALTED 477 * 478 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 479 * and/or receiving packets 480 * - irq or timer will set @PHY_NOLINK if link goes down 481 * - phy_stop moves to @PHY_HALTED 482 * 483 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 484 * is not expected to work, carrier will be indicated as down. PHY will be 485 * poll once per second, or on interrupt for it current state. 486 * Once complete, move to UP to restart the PHY. 487 * - phy_stop aborts the running test and moves to @PHY_HALTED 488 * 489 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 490 * PHY is in an error state. 491 * - phy_start moves to @PHY_UP 492 */ 493 enum phy_state { 494 PHY_DOWN = 0, 495 PHY_READY, 496 PHY_HALTED, 497 PHY_UP, 498 PHY_RUNNING, 499 PHY_NOLINK, 500 PHY_CABLETEST, 501 }; 502 503 #define MDIO_MMD_NUM 32 504 505 /** 506 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 507 * @devices_in_package: IEEE 802.3 devices in package register value. 508 * @mmds_present: bit vector of MMDs present. 509 * @device_ids: The device identifer for each present device. 510 */ 511 struct phy_c45_device_ids { 512 u32 devices_in_package; 513 u32 mmds_present; 514 u32 device_ids[MDIO_MMD_NUM]; 515 }; 516 517 struct macsec_context; 518 struct macsec_ops; 519 520 /** 521 * struct phy_device - An instance of a PHY 522 * 523 * @mdio: MDIO bus this PHY is on 524 * @drv: Pointer to the driver for this PHY instance 525 * @phy_id: UID for this device found during discovery 526 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 527 * @is_c45: Set to true if this PHY uses clause 45 addressing. 528 * @is_internal: Set to true if this PHY is internal to a MAC. 529 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 530 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 531 * @has_fixups: Set to true if this PHY has fixups/quirks. 532 * @suspended: Set to true if this PHY has been suspended successfully. 533 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 534 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 535 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 536 * @downshifted_rate: Set true if link speed has been downshifted. 537 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 538 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 539 * @state: State of the PHY for management purposes 540 * @dev_flags: Device-specific flags used by the PHY driver. 541 * 542 * - Bits [15:0] are free to use by the PHY driver to communicate 543 * driver specific behavior. 544 * - Bits [23:16] are currently reserved for future use. 545 * - Bits [31:24] are reserved for defining generic 546 * PHY driver behavior. 547 * @irq: IRQ number of the PHY's interrupt (-1 if none) 548 * @phy_timer: The timer for handling the state machine 549 * @phylink: Pointer to phylink instance for this PHY 550 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 551 * @sfp_bus: SFP bus attached to this PHY's fiber port 552 * @attached_dev: The attached enet driver's device instance ptr 553 * @adjust_link: Callback for the enet controller to respond to changes: in the 554 * link state. 555 * @phy_link_change: Callback for phylink for notification of link change 556 * @macsec_ops: MACsec offloading ops. 557 * 558 * @speed: Current link speed 559 * @duplex: Current duplex 560 * @port: Current port 561 * @pause: Current pause 562 * @asym_pause: Current asymmetric pause 563 * @supported: Combined MAC/PHY supported linkmodes 564 * @advertising: Currently advertised linkmodes 565 * @adv_old: Saved advertised while power saving for WoL 566 * @lp_advertising: Current link partner advertised linkmodes 567 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 568 * @autoneg: Flag autoneg being used 569 * @link: Current link state 570 * @autoneg_complete: Flag auto negotiation of the link has completed 571 * @mdix: Current crossover 572 * @mdix_ctrl: User setting of crossover 573 * @interrupts: Flag interrupts have been enabled 574 * @interface: enum phy_interface_t value 575 * @skb: Netlink message for cable diagnostics 576 * @nest: Netlink nest used for cable diagnostics 577 * @ehdr: nNtlink header for cable diagnostics 578 * @phy_led_triggers: Array of LED triggers 579 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 580 * @led_link_trigger: LED trigger for link up/down 581 * @last_triggered: last LED trigger for link speed 582 * @master_slave_set: User requested master/slave configuration 583 * @master_slave_get: Current master/slave advertisement 584 * @master_slave_state: Current master/slave configuration 585 * @mii_ts: Pointer to time stamper callbacks 586 * @lock: Mutex for serialization access to PHY 587 * @state_queue: Work queue for state machine 588 * @shared: Pointer to private data shared by phys in one package 589 * @priv: Pointer to driver private data 590 * 591 * interrupts currently only supports enabled or disabled, 592 * but could be changed in the future to support enabling 593 * and disabling specific interrupts 594 * 595 * Contains some infrastructure for polling and interrupt 596 * handling, as well as handling shifts in PHY hardware state 597 */ 598 struct phy_device { 599 struct mdio_device mdio; 600 601 /* Information about the PHY type */ 602 /* And management functions */ 603 struct phy_driver *drv; 604 605 u32 phy_id; 606 607 struct phy_c45_device_ids c45_ids; 608 unsigned is_c45:1; 609 unsigned is_internal:1; 610 unsigned is_pseudo_fixed_link:1; 611 unsigned is_gigabit_capable:1; 612 unsigned has_fixups:1; 613 unsigned suspended:1; 614 unsigned suspended_by_mdio_bus:1; 615 unsigned sysfs_links:1; 616 unsigned loopback_enabled:1; 617 unsigned downshifted_rate:1; 618 unsigned is_on_sfp_module:1; 619 unsigned mac_managed_pm:1; 620 621 unsigned autoneg:1; 622 /* The most recently read link state */ 623 unsigned link:1; 624 unsigned autoneg_complete:1; 625 626 /* Interrupts are enabled */ 627 unsigned interrupts:1; 628 629 enum phy_state state; 630 631 u32 dev_flags; 632 633 phy_interface_t interface; 634 635 /* 636 * forced speed & duplex (no autoneg) 637 * partner speed & duplex & pause (autoneg) 638 */ 639 int speed; 640 int duplex; 641 int port; 642 int pause; 643 int asym_pause; 644 u8 master_slave_get; 645 u8 master_slave_set; 646 u8 master_slave_state; 647 648 /* Union of PHY and Attached devices' supported link modes */ 649 /* See ethtool.h for more info */ 650 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 651 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 652 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 653 /* used with phy_speed_down */ 654 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 655 656 /* Energy efficient ethernet modes which should be prohibited */ 657 u32 eee_broken_modes; 658 659 #ifdef CONFIG_LED_TRIGGER_PHY 660 struct phy_led_trigger *phy_led_triggers; 661 unsigned int phy_num_led_triggers; 662 struct phy_led_trigger *last_triggered; 663 664 struct phy_led_trigger *led_link_trigger; 665 #endif 666 667 /* 668 * Interrupt number for this PHY 669 * -1 means no interrupt 670 */ 671 int irq; 672 673 /* private data pointer */ 674 /* For use by PHYs to maintain extra state */ 675 void *priv; 676 677 /* shared data pointer */ 678 /* For use by PHYs inside the same package that need a shared state. */ 679 struct phy_package_shared *shared; 680 681 /* Reporting cable test results */ 682 struct sk_buff *skb; 683 void *ehdr; 684 struct nlattr *nest; 685 686 /* Interrupt and Polling infrastructure */ 687 struct delayed_work state_queue; 688 689 struct mutex lock; 690 691 /* This may be modified under the rtnl lock */ 692 bool sfp_bus_attached; 693 struct sfp_bus *sfp_bus; 694 struct phylink *phylink; 695 struct net_device *attached_dev; 696 struct mii_timestamper *mii_ts; 697 698 u8 mdix; 699 u8 mdix_ctrl; 700 701 void (*phy_link_change)(struct phy_device *phydev, bool up); 702 void (*adjust_link)(struct net_device *dev); 703 704 #if IS_ENABLED(CONFIG_MACSEC) 705 /* MACsec management functions */ 706 const struct macsec_ops *macsec_ops; 707 #endif 708 }; 709 710 static inline struct phy_device *to_phy_device(const struct device *dev) 711 { 712 return container_of(to_mdio_device(dev), struct phy_device, mdio); 713 } 714 715 /** 716 * struct phy_tdr_config - Configuration of a TDR raw test 717 * 718 * @first: Distance for first data collection point 719 * @last: Distance for last data collection point 720 * @step: Step between data collection points 721 * @pair: Bitmap of cable pairs to collect data for 722 * 723 * A structure containing possible configuration parameters 724 * for a TDR cable test. The driver does not need to implement 725 * all the parameters, but should report what is actually used. 726 * All distances are in centimeters. 727 */ 728 struct phy_tdr_config { 729 u32 first; 730 u32 last; 731 u32 step; 732 s8 pair; 733 }; 734 #define PHY_PAIR_ALL -1 735 736 /** 737 * struct phy_driver - Driver structure for a particular PHY type 738 * 739 * @mdiodrv: Data common to all MDIO devices 740 * @phy_id: The result of reading the UID registers of this PHY 741 * type, and ANDing them with the phy_id_mask. This driver 742 * only works for PHYs with IDs which match this field 743 * @name: The friendly name of this PHY type 744 * @phy_id_mask: Defines the important bits of the phy_id 745 * @features: A mandatory list of features (speed, duplex, etc) 746 * supported by this PHY 747 * @flags: A bitfield defining certain other features this PHY 748 * supports (like interrupts) 749 * @driver_data: Static driver data 750 * 751 * All functions are optional. If config_aneg or read_status 752 * are not implemented, the phy core uses the genphy versions. 753 * Note that none of these functions should be called from 754 * interrupt time. The goal is for the bus read/write functions 755 * to be able to block when the bus transaction is happening, 756 * and be freed up by an interrupt (The MPC85xx has this ability, 757 * though it is not currently supported in the driver). 758 */ 759 struct phy_driver { 760 struct mdio_driver_common mdiodrv; 761 u32 phy_id; 762 char *name; 763 u32 phy_id_mask; 764 const unsigned long * const features; 765 u32 flags; 766 const void *driver_data; 767 768 /** 769 * @soft_reset: Called to issue a PHY software reset 770 */ 771 int (*soft_reset)(struct phy_device *phydev); 772 773 /** 774 * @config_init: Called to initialize the PHY, 775 * including after a reset 776 */ 777 int (*config_init)(struct phy_device *phydev); 778 779 /** 780 * @probe: Called during discovery. Used to set 781 * up device-specific structures, if any 782 */ 783 int (*probe)(struct phy_device *phydev); 784 785 /** 786 * @get_features: Probe the hardware to determine what 787 * abilities it has. Should only set phydev->supported. 788 */ 789 int (*get_features)(struct phy_device *phydev); 790 791 /* PHY Power Management */ 792 /** @suspend: Suspend the hardware, saving state if needed */ 793 int (*suspend)(struct phy_device *phydev); 794 /** @resume: Resume the hardware, restoring state if needed */ 795 int (*resume)(struct phy_device *phydev); 796 797 /** 798 * @config_aneg: Configures the advertisement and resets 799 * autonegotiation if phydev->autoneg is on, 800 * forces the speed to the current settings in phydev 801 * if phydev->autoneg is off 802 */ 803 int (*config_aneg)(struct phy_device *phydev); 804 805 /** @aneg_done: Determines the auto negotiation result */ 806 int (*aneg_done)(struct phy_device *phydev); 807 808 /** @read_status: Determines the negotiated speed and duplex */ 809 int (*read_status)(struct phy_device *phydev); 810 811 /** 812 * @config_intr: Enables or disables interrupts. 813 * It should also clear any pending interrupts prior to enabling the 814 * IRQs and after disabling them. 815 */ 816 int (*config_intr)(struct phy_device *phydev); 817 818 /** @handle_interrupt: Override default interrupt handling */ 819 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 820 821 /** @remove: Clears up any memory if needed */ 822 void (*remove)(struct phy_device *phydev); 823 824 /** 825 * @match_phy_device: Returns true if this is a suitable 826 * driver for the given phydev. If NULL, matching is based on 827 * phy_id and phy_id_mask. 828 */ 829 int (*match_phy_device)(struct phy_device *phydev); 830 831 /** 832 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 833 * register changes to enable Wake on LAN, so set_wol is 834 * provided to be called in the ethernet driver's set_wol 835 * function. 836 */ 837 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 838 839 /** 840 * @get_wol: See set_wol, but for checking whether Wake on LAN 841 * is enabled. 842 */ 843 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 844 845 /** 846 * @link_change_notify: Called to inform a PHY device driver 847 * when the core is about to change the link state. This 848 * callback is supposed to be used as fixup hook for drivers 849 * that need to take action when the link state 850 * changes. Drivers are by no means allowed to mess with the 851 * PHY device structure in their implementations. 852 */ 853 void (*link_change_notify)(struct phy_device *dev); 854 855 /** 856 * @read_mmd: PHY specific driver override for reading a MMD 857 * register. This function is optional for PHY specific 858 * drivers. When not provided, the default MMD read function 859 * will be used by phy_read_mmd(), which will use either a 860 * direct read for Clause 45 PHYs or an indirect read for 861 * Clause 22 PHYs. devnum is the MMD device number within the 862 * PHY device, regnum is the register within the selected MMD 863 * device. 864 */ 865 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 866 867 /** 868 * @write_mmd: PHY specific driver override for writing a MMD 869 * register. This function is optional for PHY specific 870 * drivers. When not provided, the default MMD write function 871 * will be used by phy_write_mmd(), which will use either a 872 * direct write for Clause 45 PHYs, or an indirect write for 873 * Clause 22 PHYs. devnum is the MMD device number within the 874 * PHY device, regnum is the register within the selected MMD 875 * device. val is the value to be written. 876 */ 877 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 878 u16 val); 879 880 /** @read_page: Return the current PHY register page number */ 881 int (*read_page)(struct phy_device *dev); 882 /** @write_page: Set the current PHY register page number */ 883 int (*write_page)(struct phy_device *dev, int page); 884 885 /** 886 * @module_info: Get the size and type of the eeprom contained 887 * within a plug-in module 888 */ 889 int (*module_info)(struct phy_device *dev, 890 struct ethtool_modinfo *modinfo); 891 892 /** 893 * @module_eeprom: Get the eeprom information from the plug-in 894 * module 895 */ 896 int (*module_eeprom)(struct phy_device *dev, 897 struct ethtool_eeprom *ee, u8 *data); 898 899 /** @cable_test_start: Start a cable test */ 900 int (*cable_test_start)(struct phy_device *dev); 901 902 /** @cable_test_tdr_start: Start a raw TDR cable test */ 903 int (*cable_test_tdr_start)(struct phy_device *dev, 904 const struct phy_tdr_config *config); 905 906 /** 907 * @cable_test_get_status: Once per second, or on interrupt, 908 * request the status of the test. 909 */ 910 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 911 912 /* Get statistics from the PHY using ethtool */ 913 /** @get_sset_count: Number of statistic counters */ 914 int (*get_sset_count)(struct phy_device *dev); 915 /** @get_strings: Names of the statistic counters */ 916 void (*get_strings)(struct phy_device *dev, u8 *data); 917 /** @get_stats: Return the statistic counter values */ 918 void (*get_stats)(struct phy_device *dev, 919 struct ethtool_stats *stats, u64 *data); 920 921 /* Get and Set PHY tunables */ 922 /** @get_tunable: Return the value of a tunable */ 923 int (*get_tunable)(struct phy_device *dev, 924 struct ethtool_tunable *tuna, void *data); 925 /** @set_tunable: Set the value of a tunable */ 926 int (*set_tunable)(struct phy_device *dev, 927 struct ethtool_tunable *tuna, 928 const void *data); 929 /** @set_loopback: Set the loopback mood of the PHY */ 930 int (*set_loopback)(struct phy_device *dev, bool enable); 931 /** @get_sqi: Get the signal quality indication */ 932 int (*get_sqi)(struct phy_device *dev); 933 /** @get_sqi_max: Get the maximum signal quality indication */ 934 int (*get_sqi_max)(struct phy_device *dev); 935 }; 936 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 937 struct phy_driver, mdiodrv) 938 939 #define PHY_ANY_ID "MATCH ANY PHY" 940 #define PHY_ANY_UID 0xffffffff 941 942 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 943 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 944 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 945 946 /* A Structure for boards to register fixups with the PHY Lib */ 947 struct phy_fixup { 948 struct list_head list; 949 char bus_id[MII_BUS_ID_SIZE + 3]; 950 u32 phy_uid; 951 u32 phy_uid_mask; 952 int (*run)(struct phy_device *phydev); 953 }; 954 955 const char *phy_speed_to_str(int speed); 956 const char *phy_duplex_to_str(unsigned int duplex); 957 958 /* A structure for mapping a particular speed and duplex 959 * combination to a particular SUPPORTED and ADVERTISED value 960 */ 961 struct phy_setting { 962 u32 speed; 963 u8 duplex; 964 u8 bit; 965 }; 966 967 const struct phy_setting * 968 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 969 bool exact); 970 size_t phy_speeds(unsigned int *speeds, size_t size, 971 unsigned long *mask); 972 void of_set_phy_supported(struct phy_device *phydev); 973 void of_set_phy_eee_broken(struct phy_device *phydev); 974 int phy_speed_down_core(struct phy_device *phydev); 975 976 /** 977 * phy_is_started - Convenience function to check whether PHY is started 978 * @phydev: The phy_device struct 979 */ 980 static inline bool phy_is_started(struct phy_device *phydev) 981 { 982 return phydev->state >= PHY_UP; 983 } 984 985 void phy_resolve_aneg_pause(struct phy_device *phydev); 986 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 987 void phy_check_downshift(struct phy_device *phydev); 988 989 /** 990 * phy_read - Convenience function for reading a given PHY register 991 * @phydev: the phy_device struct 992 * @regnum: register number to read 993 * 994 * NOTE: MUST NOT be called from interrupt context, 995 * because the bus read/write functions may wait for an interrupt 996 * to conclude the operation. 997 */ 998 static inline int phy_read(struct phy_device *phydev, u32 regnum) 999 { 1000 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1001 } 1002 1003 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1004 timeout_us, sleep_before_read) \ 1005 ({ \ 1006 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 1007 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1008 if (val < 0) \ 1009 __ret = val; \ 1010 if (__ret) \ 1011 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1012 __ret; \ 1013 }) 1014 1015 1016 /** 1017 * __phy_read - convenience function for reading a given PHY register 1018 * @phydev: the phy_device struct 1019 * @regnum: register number to read 1020 * 1021 * The caller must have taken the MDIO bus lock. 1022 */ 1023 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1024 { 1025 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1026 } 1027 1028 /** 1029 * phy_write - Convenience function for writing a given PHY register 1030 * @phydev: the phy_device struct 1031 * @regnum: register number to write 1032 * @val: value to write to @regnum 1033 * 1034 * NOTE: MUST NOT be called from interrupt context, 1035 * because the bus read/write functions may wait for an interrupt 1036 * to conclude the operation. 1037 */ 1038 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1039 { 1040 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1041 } 1042 1043 /** 1044 * __phy_write - Convenience function for writing a given PHY register 1045 * @phydev: the phy_device struct 1046 * @regnum: register number to write 1047 * @val: value to write to @regnum 1048 * 1049 * The caller must have taken the MDIO bus lock. 1050 */ 1051 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1052 { 1053 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1054 val); 1055 } 1056 1057 /** 1058 * __phy_modify_changed() - Convenience function for modifying a PHY register 1059 * @phydev: a pointer to a &struct phy_device 1060 * @regnum: register number 1061 * @mask: bit mask of bits to clear 1062 * @set: bit mask of bits to set 1063 * 1064 * Unlocked helper function which allows a PHY register to be modified as 1065 * new register value = (old register value & ~mask) | set 1066 * 1067 * Returns negative errno, 0 if there was no change, and 1 in case of change 1068 */ 1069 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1070 u16 mask, u16 set) 1071 { 1072 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1073 regnum, mask, set); 1074 } 1075 1076 /* 1077 * phy_read_mmd - Convenience function for reading a register 1078 * from an MMD on a given PHY. 1079 */ 1080 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1081 1082 /** 1083 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1084 * condition is met or a timeout occurs 1085 * 1086 * @phydev: The phy_device struct 1087 * @devaddr: The MMD to read from 1088 * @regnum: The register on the MMD to read 1089 * @val: Variable to read the register into 1090 * @cond: Break condition (usually involving @val) 1091 * @sleep_us: Maximum time to sleep between reads in us (0 1092 * tight-loops). Should be less than ~20ms since usleep_range 1093 * is used (see Documentation/timers/timers-howto.rst). 1094 * @timeout_us: Timeout in us, 0 means never timeout 1095 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1096 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1097 * case, the last read value at @args is stored in @val. Must not 1098 * be called from atomic context if sleep_us or timeout_us are used. 1099 */ 1100 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1101 sleep_us, timeout_us, sleep_before_read) \ 1102 ({ \ 1103 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1104 sleep_us, timeout_us, sleep_before_read, \ 1105 phydev, devaddr, regnum); \ 1106 if (val < 0) \ 1107 __ret = val; \ 1108 if (__ret) \ 1109 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1110 __ret; \ 1111 }) 1112 1113 /* 1114 * __phy_read_mmd - Convenience function for reading a register 1115 * from an MMD on a given PHY. 1116 */ 1117 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1118 1119 /* 1120 * phy_write_mmd - Convenience function for writing a register 1121 * on an MMD on a given PHY. 1122 */ 1123 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1124 1125 /* 1126 * __phy_write_mmd - Convenience function for writing a register 1127 * on an MMD on a given PHY. 1128 */ 1129 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1130 1131 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1132 u16 set); 1133 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1134 u16 set); 1135 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1136 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1137 1138 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1139 u16 mask, u16 set); 1140 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1141 u16 mask, u16 set); 1142 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1143 u16 mask, u16 set); 1144 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1145 u16 mask, u16 set); 1146 1147 /** 1148 * __phy_set_bits - Convenience function for setting bits in a PHY register 1149 * @phydev: the phy_device struct 1150 * @regnum: register number to write 1151 * @val: bits to set 1152 * 1153 * The caller must have taken the MDIO bus lock. 1154 */ 1155 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1156 { 1157 return __phy_modify(phydev, regnum, 0, val); 1158 } 1159 1160 /** 1161 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1162 * @phydev: the phy_device struct 1163 * @regnum: register number to write 1164 * @val: bits to clear 1165 * 1166 * The caller must have taken the MDIO bus lock. 1167 */ 1168 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1169 u16 val) 1170 { 1171 return __phy_modify(phydev, regnum, val, 0); 1172 } 1173 1174 /** 1175 * phy_set_bits - Convenience function for setting bits in a PHY register 1176 * @phydev: the phy_device struct 1177 * @regnum: register number to write 1178 * @val: bits to set 1179 */ 1180 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1181 { 1182 return phy_modify(phydev, regnum, 0, val); 1183 } 1184 1185 /** 1186 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1187 * @phydev: the phy_device struct 1188 * @regnum: register number to write 1189 * @val: bits to clear 1190 */ 1191 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1192 { 1193 return phy_modify(phydev, regnum, val, 0); 1194 } 1195 1196 /** 1197 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1198 * on MMD 1199 * @phydev: the phy_device struct 1200 * @devad: the MMD containing register to modify 1201 * @regnum: register number to modify 1202 * @val: bits to set 1203 * 1204 * The caller must have taken the MDIO bus lock. 1205 */ 1206 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1207 u32 regnum, u16 val) 1208 { 1209 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1210 } 1211 1212 /** 1213 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1214 * on MMD 1215 * @phydev: the phy_device struct 1216 * @devad: the MMD containing register to modify 1217 * @regnum: register number to modify 1218 * @val: bits to clear 1219 * 1220 * The caller must have taken the MDIO bus lock. 1221 */ 1222 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1223 u32 regnum, u16 val) 1224 { 1225 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1226 } 1227 1228 /** 1229 * phy_set_bits_mmd - Convenience function for setting bits in a register 1230 * on MMD 1231 * @phydev: the phy_device struct 1232 * @devad: the MMD containing register to modify 1233 * @regnum: register number to modify 1234 * @val: bits to set 1235 */ 1236 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1237 u32 regnum, u16 val) 1238 { 1239 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1240 } 1241 1242 /** 1243 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1244 * on MMD 1245 * @phydev: the phy_device struct 1246 * @devad: the MMD containing register to modify 1247 * @regnum: register number to modify 1248 * @val: bits to clear 1249 */ 1250 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1251 u32 regnum, u16 val) 1252 { 1253 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1254 } 1255 1256 /** 1257 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1258 * @phydev: the phy_device struct 1259 * 1260 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1261 * PHY_MAC_INTERRUPT 1262 */ 1263 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1264 { 1265 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1266 } 1267 1268 /** 1269 * phy_polling_mode - Convenience function for testing whether polling is 1270 * used to detect PHY status changes 1271 * @phydev: the phy_device struct 1272 */ 1273 static inline bool phy_polling_mode(struct phy_device *phydev) 1274 { 1275 if (phydev->state == PHY_CABLETEST) 1276 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1277 return true; 1278 1279 return phydev->irq == PHY_POLL; 1280 } 1281 1282 /** 1283 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1284 * @phydev: the phy_device struct 1285 */ 1286 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1287 { 1288 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1289 } 1290 1291 /** 1292 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1293 * @phydev: the phy_device struct 1294 */ 1295 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1296 { 1297 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1298 } 1299 1300 /** 1301 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1302 * PTP hardware clock capabilities. 1303 * @phydev: the phy_device struct 1304 */ 1305 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1306 { 1307 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1308 } 1309 1310 /** 1311 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1312 * @phydev: the phy_device struct 1313 */ 1314 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1315 { 1316 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1317 } 1318 1319 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1320 { 1321 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1322 } 1323 1324 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1325 int type) 1326 { 1327 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1328 } 1329 1330 static inline int phy_ts_info(struct phy_device *phydev, 1331 struct ethtool_ts_info *tsinfo) 1332 { 1333 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1334 } 1335 1336 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1337 int type) 1338 { 1339 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1340 } 1341 1342 /** 1343 * phy_is_internal - Convenience function for testing if a PHY is internal 1344 * @phydev: the phy_device struct 1345 */ 1346 static inline bool phy_is_internal(struct phy_device *phydev) 1347 { 1348 return phydev->is_internal; 1349 } 1350 1351 /** 1352 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1353 * @phydev: the phy_device struct 1354 */ 1355 static inline bool phy_on_sfp(struct phy_device *phydev) 1356 { 1357 return phydev->is_on_sfp_module; 1358 } 1359 1360 /** 1361 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1362 * PHY interface mode is RGMII (all variants) 1363 * @mode: the &phy_interface_t enum 1364 */ 1365 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1366 { 1367 return mode >= PHY_INTERFACE_MODE_RGMII && 1368 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1369 }; 1370 1371 /** 1372 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1373 * negotiation 1374 * @mode: one of &enum phy_interface_t 1375 * 1376 * Returns true if the PHY interface mode uses the 16-bit negotiation 1377 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1378 */ 1379 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1380 { 1381 return mode == PHY_INTERFACE_MODE_1000BASEX || 1382 mode == PHY_INTERFACE_MODE_2500BASEX; 1383 } 1384 1385 /** 1386 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1387 * is RGMII (all variants) 1388 * @phydev: the phy_device struct 1389 */ 1390 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1391 { 1392 return phy_interface_mode_is_rgmii(phydev->interface); 1393 }; 1394 1395 /** 1396 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1397 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1398 * @phydev: the phy_device struct 1399 */ 1400 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1401 { 1402 return phydev->is_pseudo_fixed_link; 1403 } 1404 1405 int phy_save_page(struct phy_device *phydev); 1406 int phy_select_page(struct phy_device *phydev, int page); 1407 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1408 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1409 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1410 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1411 u16 mask, u16 set); 1412 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1413 u16 mask, u16 set); 1414 1415 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1416 bool is_c45, 1417 struct phy_c45_device_ids *c45_ids); 1418 #if IS_ENABLED(CONFIG_PHYLIB) 1419 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1420 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1421 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1422 struct phy_device *device_phy_find_device(struct device *dev); 1423 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); 1424 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1425 int phy_device_register(struct phy_device *phy); 1426 void phy_device_free(struct phy_device *phydev); 1427 #else 1428 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1429 { 1430 return 0; 1431 } 1432 static inline 1433 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1434 { 1435 return 0; 1436 } 1437 1438 static inline 1439 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1440 { 1441 return NULL; 1442 } 1443 1444 static inline struct phy_device *device_phy_find_device(struct device *dev) 1445 { 1446 return NULL; 1447 } 1448 1449 static inline 1450 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1451 { 1452 return NULL; 1453 } 1454 1455 static inline 1456 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1457 { 1458 return NULL; 1459 } 1460 1461 static inline int phy_device_register(struct phy_device *phy) 1462 { 1463 return 0; 1464 } 1465 1466 static inline void phy_device_free(struct phy_device *phydev) { } 1467 #endif /* CONFIG_PHYLIB */ 1468 void phy_device_remove(struct phy_device *phydev); 1469 int phy_get_c45_ids(struct phy_device *phydev); 1470 int phy_init_hw(struct phy_device *phydev); 1471 int phy_suspend(struct phy_device *phydev); 1472 int phy_resume(struct phy_device *phydev); 1473 int __phy_resume(struct phy_device *phydev); 1474 int phy_loopback(struct phy_device *phydev, bool enable); 1475 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1476 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1477 int phy_sfp_probe(struct phy_device *phydev, 1478 const struct sfp_upstream_ops *ops); 1479 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1480 phy_interface_t interface); 1481 struct phy_device *phy_find_first(struct mii_bus *bus); 1482 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1483 u32 flags, phy_interface_t interface); 1484 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1485 void (*handler)(struct net_device *), 1486 phy_interface_t interface); 1487 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1488 void (*handler)(struct net_device *), 1489 phy_interface_t interface); 1490 void phy_disconnect(struct phy_device *phydev); 1491 void phy_detach(struct phy_device *phydev); 1492 void phy_start(struct phy_device *phydev); 1493 void phy_stop(struct phy_device *phydev); 1494 int phy_config_aneg(struct phy_device *phydev); 1495 int phy_start_aneg(struct phy_device *phydev); 1496 int phy_aneg_done(struct phy_device *phydev); 1497 int phy_speed_down(struct phy_device *phydev, bool sync); 1498 int phy_speed_up(struct phy_device *phydev); 1499 1500 int phy_restart_aneg(struct phy_device *phydev); 1501 int phy_reset_after_clk_enable(struct phy_device *phydev); 1502 1503 #if IS_ENABLED(CONFIG_PHYLIB) 1504 int phy_start_cable_test(struct phy_device *phydev, 1505 struct netlink_ext_ack *extack); 1506 int phy_start_cable_test_tdr(struct phy_device *phydev, 1507 struct netlink_ext_ack *extack, 1508 const struct phy_tdr_config *config); 1509 #else 1510 static inline 1511 int phy_start_cable_test(struct phy_device *phydev, 1512 struct netlink_ext_ack *extack) 1513 { 1514 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1515 return -EOPNOTSUPP; 1516 } 1517 static inline 1518 int phy_start_cable_test_tdr(struct phy_device *phydev, 1519 struct netlink_ext_ack *extack, 1520 const struct phy_tdr_config *config) 1521 { 1522 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1523 return -EOPNOTSUPP; 1524 } 1525 #endif 1526 1527 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1528 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1529 u16 cm); 1530 1531 static inline void phy_device_reset(struct phy_device *phydev, int value) 1532 { 1533 mdio_device_reset(&phydev->mdio, value); 1534 } 1535 1536 #define phydev_err(_phydev, format, args...) \ 1537 dev_err(&_phydev->mdio.dev, format, ##args) 1538 1539 #define phydev_info(_phydev, format, args...) \ 1540 dev_info(&_phydev->mdio.dev, format, ##args) 1541 1542 #define phydev_warn(_phydev, format, args...) \ 1543 dev_warn(&_phydev->mdio.dev, format, ##args) 1544 1545 #define phydev_dbg(_phydev, format, args...) \ 1546 dev_dbg(&_phydev->mdio.dev, format, ##args) 1547 1548 static inline const char *phydev_name(const struct phy_device *phydev) 1549 { 1550 return dev_name(&phydev->mdio.dev); 1551 } 1552 1553 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1554 { 1555 mutex_lock(&phydev->mdio.bus->mdio_lock); 1556 } 1557 1558 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1559 { 1560 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1561 } 1562 1563 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1564 __printf(2, 3); 1565 char *phy_attached_info_irq(struct phy_device *phydev) 1566 __malloc; 1567 void phy_attached_info(struct phy_device *phydev); 1568 1569 /* Clause 22 PHY */ 1570 int genphy_read_abilities(struct phy_device *phydev); 1571 int genphy_setup_forced(struct phy_device *phydev); 1572 int genphy_restart_aneg(struct phy_device *phydev); 1573 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1574 int genphy_config_eee_advert(struct phy_device *phydev); 1575 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1576 int genphy_aneg_done(struct phy_device *phydev); 1577 int genphy_update_link(struct phy_device *phydev); 1578 int genphy_read_lpa(struct phy_device *phydev); 1579 int genphy_read_status_fixed(struct phy_device *phydev); 1580 int genphy_read_status(struct phy_device *phydev); 1581 int genphy_suspend(struct phy_device *phydev); 1582 int genphy_resume(struct phy_device *phydev); 1583 int genphy_loopback(struct phy_device *phydev, bool enable); 1584 int genphy_soft_reset(struct phy_device *phydev); 1585 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1586 1587 static inline int genphy_config_aneg(struct phy_device *phydev) 1588 { 1589 return __genphy_config_aneg(phydev, false); 1590 } 1591 1592 static inline int genphy_no_config_intr(struct phy_device *phydev) 1593 { 1594 return 0; 1595 } 1596 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1597 u16 regnum); 1598 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1599 u16 regnum, u16 val); 1600 1601 /* Clause 37 */ 1602 int genphy_c37_config_aneg(struct phy_device *phydev); 1603 int genphy_c37_read_status(struct phy_device *phydev); 1604 1605 /* Clause 45 PHY */ 1606 int genphy_c45_restart_aneg(struct phy_device *phydev); 1607 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1608 int genphy_c45_aneg_done(struct phy_device *phydev); 1609 int genphy_c45_read_link(struct phy_device *phydev); 1610 int genphy_c45_read_lpa(struct phy_device *phydev); 1611 int genphy_c45_read_pma(struct phy_device *phydev); 1612 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1613 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1614 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1615 int genphy_c45_read_mdix(struct phy_device *phydev); 1616 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1617 int genphy_c45_read_status(struct phy_device *phydev); 1618 int genphy_c45_config_aneg(struct phy_device *phydev); 1619 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1620 int genphy_c45_pma_resume(struct phy_device *phydev); 1621 int genphy_c45_pma_suspend(struct phy_device *phydev); 1622 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1623 1624 /* Generic C45 PHY driver */ 1625 extern struct phy_driver genphy_c45_driver; 1626 1627 /* The gen10g_* functions are the old Clause 45 stub */ 1628 int gen10g_config_aneg(struct phy_device *phydev); 1629 1630 static inline int phy_read_status(struct phy_device *phydev) 1631 { 1632 if (!phydev->drv) 1633 return -EIO; 1634 1635 if (phydev->drv->read_status) 1636 return phydev->drv->read_status(phydev); 1637 else 1638 return genphy_read_status(phydev); 1639 } 1640 1641 void phy_driver_unregister(struct phy_driver *drv); 1642 void phy_drivers_unregister(struct phy_driver *drv, int n); 1643 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1644 int phy_drivers_register(struct phy_driver *new_driver, int n, 1645 struct module *owner); 1646 void phy_error(struct phy_device *phydev); 1647 void phy_state_machine(struct work_struct *work); 1648 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1649 void phy_trigger_machine(struct phy_device *phydev); 1650 void phy_mac_interrupt(struct phy_device *phydev); 1651 void phy_start_machine(struct phy_device *phydev); 1652 void phy_stop_machine(struct phy_device *phydev); 1653 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1654 struct ethtool_link_ksettings *cmd); 1655 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1656 const struct ethtool_link_ksettings *cmd); 1657 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1658 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1659 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1660 int phy_disable_interrupts(struct phy_device *phydev); 1661 void phy_request_interrupt(struct phy_device *phydev); 1662 void phy_free_interrupt(struct phy_device *phydev); 1663 void phy_print_status(struct phy_device *phydev); 1664 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1665 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1666 void phy_advertise_supported(struct phy_device *phydev); 1667 void phy_support_sym_pause(struct phy_device *phydev); 1668 void phy_support_asym_pause(struct phy_device *phydev); 1669 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1670 bool autoneg); 1671 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1672 bool phy_validate_pause(struct phy_device *phydev, 1673 struct ethtool_pauseparam *pp); 1674 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1675 1676 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1677 const int *delay_values, int size, bool is_rx); 1678 1679 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1680 bool *tx_pause, bool *rx_pause); 1681 1682 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1683 int (*run)(struct phy_device *)); 1684 int phy_register_fixup_for_id(const char *bus_id, 1685 int (*run)(struct phy_device *)); 1686 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1687 int (*run)(struct phy_device *)); 1688 1689 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1690 int phy_unregister_fixup_for_id(const char *bus_id); 1691 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1692 1693 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1694 int phy_get_eee_err(struct phy_device *phydev); 1695 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1696 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1697 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1698 void phy_ethtool_get_wol(struct phy_device *phydev, 1699 struct ethtool_wolinfo *wol); 1700 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1701 struct ethtool_link_ksettings *cmd); 1702 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1703 const struct ethtool_link_ksettings *cmd); 1704 int phy_ethtool_nway_reset(struct net_device *ndev); 1705 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1706 void phy_package_leave(struct phy_device *phydev); 1707 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1708 int addr, size_t priv_size); 1709 1710 #if IS_ENABLED(CONFIG_PHYLIB) 1711 int __init mdio_bus_init(void); 1712 void mdio_bus_exit(void); 1713 #endif 1714 1715 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1716 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1717 int phy_ethtool_get_stats(struct phy_device *phydev, 1718 struct ethtool_stats *stats, u64 *data); 1719 1720 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1721 { 1722 struct phy_package_shared *shared = phydev->shared; 1723 1724 if (!shared) 1725 return -EIO; 1726 1727 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1728 } 1729 1730 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1731 { 1732 struct phy_package_shared *shared = phydev->shared; 1733 1734 if (!shared) 1735 return -EIO; 1736 1737 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1738 } 1739 1740 static inline int phy_package_write(struct phy_device *phydev, 1741 u32 regnum, u16 val) 1742 { 1743 struct phy_package_shared *shared = phydev->shared; 1744 1745 if (!shared) 1746 return -EIO; 1747 1748 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1749 } 1750 1751 static inline int __phy_package_write(struct phy_device *phydev, 1752 u32 regnum, u16 val) 1753 { 1754 struct phy_package_shared *shared = phydev->shared; 1755 1756 if (!shared) 1757 return -EIO; 1758 1759 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1760 } 1761 1762 static inline bool __phy_package_set_once(struct phy_device *phydev, 1763 unsigned int b) 1764 { 1765 struct phy_package_shared *shared = phydev->shared; 1766 1767 if (!shared) 1768 return false; 1769 1770 return !test_and_set_bit(b, &shared->flags); 1771 } 1772 1773 static inline bool phy_package_init_once(struct phy_device *phydev) 1774 { 1775 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1776 } 1777 1778 static inline bool phy_package_probe_once(struct phy_device *phydev) 1779 { 1780 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1781 } 1782 1783 extern struct bus_type mdio_bus_type; 1784 1785 struct mdio_board_info { 1786 const char *bus_id; 1787 char modalias[MDIO_NAME_SIZE]; 1788 int mdio_addr; 1789 const void *platform_data; 1790 }; 1791 1792 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1793 int mdiobus_register_board_info(const struct mdio_board_info *info, 1794 unsigned int n); 1795 #else 1796 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1797 unsigned int n) 1798 { 1799 return 0; 1800 } 1801 #endif 1802 1803 1804 /** 1805 * phy_module_driver() - Helper macro for registering PHY drivers 1806 * @__phy_drivers: array of PHY drivers to register 1807 * @__count: Numbers of members in array 1808 * 1809 * Helper macro for PHY drivers which do not do anything special in module 1810 * init/exit. Each module may only use this macro once, and calling it 1811 * replaces module_init() and module_exit(). 1812 */ 1813 #define phy_module_driver(__phy_drivers, __count) \ 1814 static int __init phy_module_init(void) \ 1815 { \ 1816 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1817 } \ 1818 module_init(phy_module_init); \ 1819 static void __exit phy_module_exit(void) \ 1820 { \ 1821 phy_drivers_unregister(__phy_drivers, __count); \ 1822 } \ 1823 module_exit(phy_module_exit) 1824 1825 #define module_phy_driver(__phy_drivers) \ 1826 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1827 1828 bool phy_driver_is_genphy(struct phy_device *phydev); 1829 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1830 1831 #endif /* __PHY_H */ 1832