1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 35 SUPPORTED_TP | \ 36 SUPPORTED_MII) 37 38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 39 SUPPORTED_10baseT_Full) 40 41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 42 SUPPORTED_100baseT_Full) 43 44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 45 SUPPORTED_1000baseT_Full) 46 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 57 58 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 59 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 60 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 61 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 62 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 63 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 64 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 65 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 66 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 67 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 68 69 extern const int phy_basic_ports_array[3]; 70 extern const int phy_fibre_port_array[1]; 71 extern const int phy_all_ports_features_array[7]; 72 extern const int phy_10_100_features_array[4]; 73 extern const int phy_basic_t1_features_array[3]; 74 extern const int phy_basic_t1s_p2mp_features_array[2]; 75 extern const int phy_gbit_features_array[2]; 76 extern const int phy_10gbit_features_array[1]; 77 78 /* 79 * Set phydev->irq to PHY_POLL if interrupts are not supported, 80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 81 * the attached MAC driver handles the interrupt 82 */ 83 #define PHY_POLL -1 84 #define PHY_MAC_INTERRUPT -2 85 86 #define PHY_IS_INTERNAL 0x00000001 87 #define PHY_RST_AFTER_CLK_EN 0x00000002 88 #define PHY_POLL_CABLE_TEST 0x00000004 89 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 90 #define MDIO_DEVICE_IS_PHY 0x80000000 91 92 /** 93 * enum phy_interface_t - Interface Mode definitions 94 * 95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 96 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 97 * @PHY_INTERFACE_MODE_MII: Media-independent interface 98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 100 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 101 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 102 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 103 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 104 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 106 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 107 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 108 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 109 * @PHY_INTERFACE_MODE_SMII: Serial MII 110 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 111 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 112 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 113 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 114 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 115 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 116 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 117 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 118 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 119 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 120 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 121 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 122 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 123 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 124 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 125 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 126 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 127 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 128 * @PHY_INTERFACE_MODE_MAX: Book keeping 129 * 130 * Describes the interface between the MAC and PHY. 131 */ 132 typedef enum { 133 PHY_INTERFACE_MODE_NA, 134 PHY_INTERFACE_MODE_INTERNAL, 135 PHY_INTERFACE_MODE_MII, 136 PHY_INTERFACE_MODE_GMII, 137 PHY_INTERFACE_MODE_SGMII, 138 PHY_INTERFACE_MODE_TBI, 139 PHY_INTERFACE_MODE_REVMII, 140 PHY_INTERFACE_MODE_RMII, 141 PHY_INTERFACE_MODE_REVRMII, 142 PHY_INTERFACE_MODE_RGMII, 143 PHY_INTERFACE_MODE_RGMII_ID, 144 PHY_INTERFACE_MODE_RGMII_RXID, 145 PHY_INTERFACE_MODE_RGMII_TXID, 146 PHY_INTERFACE_MODE_RTBI, 147 PHY_INTERFACE_MODE_SMII, 148 PHY_INTERFACE_MODE_XGMII, 149 PHY_INTERFACE_MODE_XLGMII, 150 PHY_INTERFACE_MODE_MOCA, 151 PHY_INTERFACE_MODE_PSGMII, 152 PHY_INTERFACE_MODE_QSGMII, 153 PHY_INTERFACE_MODE_TRGMII, 154 PHY_INTERFACE_MODE_100BASEX, 155 PHY_INTERFACE_MODE_1000BASEX, 156 PHY_INTERFACE_MODE_2500BASEX, 157 PHY_INTERFACE_MODE_5GBASER, 158 PHY_INTERFACE_MODE_RXAUI, 159 PHY_INTERFACE_MODE_XAUI, 160 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 161 PHY_INTERFACE_MODE_10GBASER, 162 PHY_INTERFACE_MODE_25GBASER, 163 PHY_INTERFACE_MODE_USXGMII, 164 /* 10GBASE-KR - with Clause 73 AN */ 165 PHY_INTERFACE_MODE_10GKR, 166 PHY_INTERFACE_MODE_QUSGMII, 167 PHY_INTERFACE_MODE_1000BASEKX, 168 PHY_INTERFACE_MODE_MAX, 169 } phy_interface_t; 170 171 /* PHY interface mode bitmap handling */ 172 #define DECLARE_PHY_INTERFACE_MASK(name) \ 173 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 174 175 static inline void phy_interface_zero(unsigned long *intf) 176 { 177 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 178 } 179 180 static inline bool phy_interface_empty(const unsigned long *intf) 181 { 182 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 186 const unsigned long *b) 187 { 188 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 189 } 190 191 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 192 const unsigned long *b) 193 { 194 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 195 } 196 197 static inline void phy_interface_set_rgmii(unsigned long *intf) 198 { 199 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 200 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 201 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 202 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 203 } 204 205 /* 206 * phy_supported_speeds - return all speeds currently supported by a PHY device 207 */ 208 unsigned int phy_supported_speeds(struct phy_device *phy, 209 unsigned int *speeds, 210 unsigned int size); 211 212 /** 213 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 214 * @interface: enum phy_interface_t value 215 * 216 * Description: maps enum &phy_interface_t defined in this file 217 * into the device tree binding of 'phy-mode', so that Ethernet 218 * device driver can get PHY interface from device tree. 219 */ 220 static inline const char *phy_modes(phy_interface_t interface) 221 { 222 switch (interface) { 223 case PHY_INTERFACE_MODE_NA: 224 return ""; 225 case PHY_INTERFACE_MODE_INTERNAL: 226 return "internal"; 227 case PHY_INTERFACE_MODE_MII: 228 return "mii"; 229 case PHY_INTERFACE_MODE_GMII: 230 return "gmii"; 231 case PHY_INTERFACE_MODE_SGMII: 232 return "sgmii"; 233 case PHY_INTERFACE_MODE_TBI: 234 return "tbi"; 235 case PHY_INTERFACE_MODE_REVMII: 236 return "rev-mii"; 237 case PHY_INTERFACE_MODE_RMII: 238 return "rmii"; 239 case PHY_INTERFACE_MODE_REVRMII: 240 return "rev-rmii"; 241 case PHY_INTERFACE_MODE_RGMII: 242 return "rgmii"; 243 case PHY_INTERFACE_MODE_RGMII_ID: 244 return "rgmii-id"; 245 case PHY_INTERFACE_MODE_RGMII_RXID: 246 return "rgmii-rxid"; 247 case PHY_INTERFACE_MODE_RGMII_TXID: 248 return "rgmii-txid"; 249 case PHY_INTERFACE_MODE_RTBI: 250 return "rtbi"; 251 case PHY_INTERFACE_MODE_SMII: 252 return "smii"; 253 case PHY_INTERFACE_MODE_XGMII: 254 return "xgmii"; 255 case PHY_INTERFACE_MODE_XLGMII: 256 return "xlgmii"; 257 case PHY_INTERFACE_MODE_MOCA: 258 return "moca"; 259 case PHY_INTERFACE_MODE_PSGMII: 260 return "psgmii"; 261 case PHY_INTERFACE_MODE_QSGMII: 262 return "qsgmii"; 263 case PHY_INTERFACE_MODE_TRGMII: 264 return "trgmii"; 265 case PHY_INTERFACE_MODE_1000BASEX: 266 return "1000base-x"; 267 case PHY_INTERFACE_MODE_1000BASEKX: 268 return "1000base-kx"; 269 case PHY_INTERFACE_MODE_2500BASEX: 270 return "2500base-x"; 271 case PHY_INTERFACE_MODE_5GBASER: 272 return "5gbase-r"; 273 case PHY_INTERFACE_MODE_RXAUI: 274 return "rxaui"; 275 case PHY_INTERFACE_MODE_XAUI: 276 return "xaui"; 277 case PHY_INTERFACE_MODE_10GBASER: 278 return "10gbase-r"; 279 case PHY_INTERFACE_MODE_25GBASER: 280 return "25gbase-r"; 281 case PHY_INTERFACE_MODE_USXGMII: 282 return "usxgmii"; 283 case PHY_INTERFACE_MODE_10GKR: 284 return "10gbase-kr"; 285 case PHY_INTERFACE_MODE_100BASEX: 286 return "100base-x"; 287 case PHY_INTERFACE_MODE_QUSGMII: 288 return "qusgmii"; 289 default: 290 return "unknown"; 291 } 292 } 293 294 #define PHY_INIT_TIMEOUT 100000 295 #define PHY_FORCE_TIMEOUT 10 296 297 #define PHY_MAX_ADDR 32 298 299 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 300 #define PHY_ID_FMT "%s:%02x" 301 302 #define MII_BUS_ID_SIZE 61 303 304 struct device; 305 struct kernel_hwtstamp_config; 306 struct phylink; 307 struct sfp_bus; 308 struct sfp_upstream_ops; 309 struct sk_buff; 310 311 /** 312 * struct mdio_bus_stats - Statistics counters for MDIO busses 313 * @transfers: Total number of transfers, i.e. @writes + @reads 314 * @errors: Number of MDIO transfers that returned an error 315 * @writes: Number of write transfers 316 * @reads: Number of read transfers 317 * @syncp: Synchronisation for incrementing statistics 318 */ 319 struct mdio_bus_stats { 320 u64_stats_t transfers; 321 u64_stats_t errors; 322 u64_stats_t writes; 323 u64_stats_t reads; 324 /* Must be last, add new statistics above */ 325 struct u64_stats_sync syncp; 326 }; 327 328 /** 329 * struct phy_package_shared - Shared information in PHY packages 330 * @addr: Common PHY address used to combine PHYs in one package 331 * @refcnt: Number of PHYs connected to this shared data 332 * @flags: Initialization of PHY package 333 * @priv_size: Size of the shared private data @priv 334 * @priv: Driver private data shared across a PHY package 335 * 336 * Represents a shared structure between different phydev's in the same 337 * package, for example a quad PHY. See phy_package_join() and 338 * phy_package_leave(). 339 */ 340 struct phy_package_shared { 341 int addr; 342 refcount_t refcnt; 343 unsigned long flags; 344 size_t priv_size; 345 346 /* private data pointer */ 347 /* note that this pointer is shared between different phydevs and 348 * the user has to take care of appropriate locking. It is allocated 349 * and freed automatically by phy_package_join() and 350 * phy_package_leave(). 351 */ 352 void *priv; 353 }; 354 355 /* used as bit number in atomic bitops */ 356 #define PHY_SHARED_F_INIT_DONE 0 357 #define PHY_SHARED_F_PROBE_DONE 1 358 359 /** 360 * struct mii_bus - Represents an MDIO bus 361 * 362 * @owner: Who owns this device 363 * @name: User friendly name for this MDIO device, or driver name 364 * @id: Unique identifier for this bus, typical from bus hierarchy 365 * @priv: Driver private data 366 * 367 * The Bus class for PHYs. Devices which provide access to 368 * PHYs should register using this structure 369 */ 370 struct mii_bus { 371 struct module *owner; 372 const char *name; 373 char id[MII_BUS_ID_SIZE]; 374 void *priv; 375 /** @read: Perform a read transfer on the bus */ 376 int (*read)(struct mii_bus *bus, int addr, int regnum); 377 /** @write: Perform a write transfer on the bus */ 378 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 379 /** @read_c45: Perform a C45 read transfer on the bus */ 380 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 381 /** @write_c45: Perform a C45 write transfer on the bus */ 382 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 383 int regnum, u16 val); 384 /** @reset: Perform a reset of the bus */ 385 int (*reset)(struct mii_bus *bus); 386 387 /** @stats: Statistic counters per device on the bus */ 388 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 389 390 /** 391 * @mdio_lock: A lock to ensure that only one thing can read/write 392 * the MDIO bus at a time 393 */ 394 struct mutex mdio_lock; 395 396 /** @parent: Parent device of this bus */ 397 struct device *parent; 398 /** @state: State of bus structure */ 399 enum { 400 MDIOBUS_ALLOCATED = 1, 401 MDIOBUS_REGISTERED, 402 MDIOBUS_UNREGISTERED, 403 MDIOBUS_RELEASED, 404 } state; 405 406 /** @dev: Kernel device representation */ 407 struct device dev; 408 409 /** @mdio_map: list of all MDIO devices on bus */ 410 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 411 412 /** @phy_mask: PHY addresses to be ignored when probing */ 413 u32 phy_mask; 414 415 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 416 u32 phy_ignore_ta_mask; 417 418 /** 419 * @irq: An array of interrupts, each PHY's interrupt at the index 420 * matching its address 421 */ 422 int irq[PHY_MAX_ADDR]; 423 424 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 425 int reset_delay_us; 426 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 427 int reset_post_delay_us; 428 /** @reset_gpiod: Reset GPIO descriptor pointer */ 429 struct gpio_desc *reset_gpiod; 430 431 /** @shared_lock: protect access to the shared element */ 432 struct mutex shared_lock; 433 434 /** @shared: shared state across different PHYs */ 435 struct phy_package_shared *shared[PHY_MAX_ADDR]; 436 }; 437 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 438 439 struct mii_bus *mdiobus_alloc_size(size_t size); 440 441 /** 442 * mdiobus_alloc - Allocate an MDIO bus structure 443 * 444 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 445 * for the driver to register the bus. 446 */ 447 static inline struct mii_bus *mdiobus_alloc(void) 448 { 449 return mdiobus_alloc_size(0); 450 } 451 452 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 453 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 454 struct module *owner); 455 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 456 #define devm_mdiobus_register(dev, bus) \ 457 __devm_mdiobus_register(dev, bus, THIS_MODULE) 458 459 void mdiobus_unregister(struct mii_bus *bus); 460 void mdiobus_free(struct mii_bus *bus); 461 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 462 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 463 { 464 return devm_mdiobus_alloc_size(dev, 0); 465 } 466 467 struct mii_bus *mdio_find_bus(const char *mdio_name); 468 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 469 470 #define PHY_INTERRUPT_DISABLED false 471 #define PHY_INTERRUPT_ENABLED true 472 473 /** 474 * enum phy_state - PHY state machine states: 475 * 476 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 477 * should be called if and only if the PHY is in this state, 478 * given that the PHY device exists. 479 * - PHY driver probe function will set the state to @PHY_READY 480 * 481 * @PHY_READY: PHY is ready to send and receive packets, but the 482 * controller is not. By default, PHYs which do not implement 483 * probe will be set to this state by phy_probe(). 484 * - start will set the state to UP 485 * 486 * @PHY_UP: The PHY and attached device are ready to do work. 487 * Interrupts should be started here. 488 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 489 * 490 * @PHY_NOLINK: PHY is up, but not currently plugged in. 491 * - irq or timer will set @PHY_RUNNING if link comes back 492 * - phy_stop moves to @PHY_HALTED 493 * 494 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 495 * and/or receiving packets 496 * - irq or timer will set @PHY_NOLINK if link goes down 497 * - phy_stop moves to @PHY_HALTED 498 * 499 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 500 * is not expected to work, carrier will be indicated as down. PHY will be 501 * poll once per second, or on interrupt for it current state. 502 * Once complete, move to UP to restart the PHY. 503 * - phy_stop aborts the running test and moves to @PHY_HALTED 504 * 505 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 506 * - phy_start moves to @PHY_UP 507 * 508 * @PHY_ERROR: PHY is up, but is in an error state. 509 * - phy_stop moves to @PHY_HALTED 510 */ 511 enum phy_state { 512 PHY_DOWN = 0, 513 PHY_READY, 514 PHY_HALTED, 515 PHY_ERROR, 516 PHY_UP, 517 PHY_RUNNING, 518 PHY_NOLINK, 519 PHY_CABLETEST, 520 }; 521 522 #define MDIO_MMD_NUM 32 523 524 /** 525 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 526 * @devices_in_package: IEEE 802.3 devices in package register value. 527 * @mmds_present: bit vector of MMDs present. 528 * @device_ids: The device identifer for each present device. 529 */ 530 struct phy_c45_device_ids { 531 u32 devices_in_package; 532 u32 mmds_present; 533 u32 device_ids[MDIO_MMD_NUM]; 534 }; 535 536 struct macsec_context; 537 struct macsec_ops; 538 539 /** 540 * struct phy_device - An instance of a PHY 541 * 542 * @mdio: MDIO bus this PHY is on 543 * @drv: Pointer to the driver for this PHY instance 544 * @devlink: Create a link between phy dev and mac dev, if the external phy 545 * used by current mac interface is managed by another mac interface. 546 * @phy_id: UID for this device found during discovery 547 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 548 * @is_c45: Set to true if this PHY uses clause 45 addressing. 549 * @is_internal: Set to true if this PHY is internal to a MAC. 550 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 551 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 552 * @has_fixups: Set to true if this PHY has fixups/quirks. 553 * @suspended: Set to true if this PHY has been suspended successfully. 554 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 555 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 556 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 557 * @downshifted_rate: Set true if link speed has been downshifted. 558 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 559 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 560 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 561 * enabled. 562 * @state: State of the PHY for management purposes 563 * @dev_flags: Device-specific flags used by the PHY driver. 564 * 565 * - Bits [15:0] are free to use by the PHY driver to communicate 566 * driver specific behavior. 567 * - Bits [23:16] are currently reserved for future use. 568 * - Bits [31:24] are reserved for defining generic 569 * PHY driver behavior. 570 * @irq: IRQ number of the PHY's interrupt (-1 if none) 571 * @phy_timer: The timer for handling the state machine 572 * @phylink: Pointer to phylink instance for this PHY 573 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 574 * @sfp_bus: SFP bus attached to this PHY's fiber port 575 * @attached_dev: The attached enet driver's device instance ptr 576 * @adjust_link: Callback for the enet controller to respond to changes: in the 577 * link state. 578 * @phy_link_change: Callback for phylink for notification of link change 579 * @macsec_ops: MACsec offloading ops. 580 * 581 * @speed: Current link speed 582 * @duplex: Current duplex 583 * @port: Current port 584 * @pause: Current pause 585 * @asym_pause: Current asymmetric pause 586 * @supported: Combined MAC/PHY supported linkmodes 587 * @advertising: Currently advertised linkmodes 588 * @adv_old: Saved advertised while power saving for WoL 589 * @supported_eee: supported PHY EEE linkmodes 590 * @advertising_eee: Currently advertised EEE linkmodes 591 * @eee_enabled: Flag indicating whether the EEE feature is enabled 592 * @lp_advertising: Current link partner advertised linkmodes 593 * @host_interfaces: PHY interface modes supported by host 594 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 595 * @autoneg: Flag autoneg being used 596 * @rate_matching: Current rate matching mode 597 * @link: Current link state 598 * @autoneg_complete: Flag auto negotiation of the link has completed 599 * @mdix: Current crossover 600 * @mdix_ctrl: User setting of crossover 601 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 602 * @interrupts: Flag interrupts have been enabled 603 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 604 * handling shall be postponed until PHY has resumed 605 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 606 * requiring a rerun of the interrupt handler after resume 607 * @interface: enum phy_interface_t value 608 * @skb: Netlink message for cable diagnostics 609 * @nest: Netlink nest used for cable diagnostics 610 * @ehdr: nNtlink header for cable diagnostics 611 * @phy_led_triggers: Array of LED triggers 612 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 613 * @led_link_trigger: LED trigger for link up/down 614 * @last_triggered: last LED trigger for link speed 615 * @leds: list of PHY LED structures 616 * @master_slave_set: User requested master/slave configuration 617 * @master_slave_get: Current master/slave advertisement 618 * @master_slave_state: Current master/slave configuration 619 * @mii_ts: Pointer to time stamper callbacks 620 * @psec: Pointer to Power Sourcing Equipment control struct 621 * @lock: Mutex for serialization access to PHY 622 * @state_queue: Work queue for state machine 623 * @link_down_events: Number of times link was lost 624 * @shared: Pointer to private data shared by phys in one package 625 * @priv: Pointer to driver private data 626 * 627 * interrupts currently only supports enabled or disabled, 628 * but could be changed in the future to support enabling 629 * and disabling specific interrupts 630 * 631 * Contains some infrastructure for polling and interrupt 632 * handling, as well as handling shifts in PHY hardware state 633 */ 634 struct phy_device { 635 struct mdio_device mdio; 636 637 /* Information about the PHY type */ 638 /* And management functions */ 639 struct phy_driver *drv; 640 641 struct device_link *devlink; 642 643 u32 phy_id; 644 645 struct phy_c45_device_ids c45_ids; 646 unsigned is_c45:1; 647 unsigned is_internal:1; 648 unsigned is_pseudo_fixed_link:1; 649 unsigned is_gigabit_capable:1; 650 unsigned has_fixups:1; 651 unsigned suspended:1; 652 unsigned suspended_by_mdio_bus:1; 653 unsigned sysfs_links:1; 654 unsigned loopback_enabled:1; 655 unsigned downshifted_rate:1; 656 unsigned is_on_sfp_module:1; 657 unsigned mac_managed_pm:1; 658 unsigned wol_enabled:1; 659 660 unsigned autoneg:1; 661 /* The most recently read link state */ 662 unsigned link:1; 663 unsigned autoneg_complete:1; 664 665 /* Interrupts are enabled */ 666 unsigned interrupts:1; 667 unsigned irq_suspended:1; 668 unsigned irq_rerun:1; 669 670 int rate_matching; 671 672 enum phy_state state; 673 674 u32 dev_flags; 675 676 phy_interface_t interface; 677 678 /* 679 * forced speed & duplex (no autoneg) 680 * partner speed & duplex & pause (autoneg) 681 */ 682 int speed; 683 int duplex; 684 int port; 685 int pause; 686 int asym_pause; 687 u8 master_slave_get; 688 u8 master_slave_set; 689 u8 master_slave_state; 690 691 /* Union of PHY and Attached devices' supported link modes */ 692 /* See ethtool.h for more info */ 693 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 694 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 695 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 696 /* used with phy_speed_down */ 697 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 698 /* used for eee validation */ 699 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 700 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 701 bool eee_enabled; 702 703 /* Host supported PHY interface types. Should be ignored if empty. */ 704 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 705 706 /* Energy efficient ethernet modes which should be prohibited */ 707 u32 eee_broken_modes; 708 709 #ifdef CONFIG_LED_TRIGGER_PHY 710 struct phy_led_trigger *phy_led_triggers; 711 unsigned int phy_num_led_triggers; 712 struct phy_led_trigger *last_triggered; 713 714 struct phy_led_trigger *led_link_trigger; 715 #endif 716 struct list_head leds; 717 718 /* 719 * Interrupt number for this PHY 720 * -1 means no interrupt 721 */ 722 int irq; 723 724 /* private data pointer */ 725 /* For use by PHYs to maintain extra state */ 726 void *priv; 727 728 /* shared data pointer */ 729 /* For use by PHYs inside the same package that need a shared state. */ 730 struct phy_package_shared *shared; 731 732 /* Reporting cable test results */ 733 struct sk_buff *skb; 734 void *ehdr; 735 struct nlattr *nest; 736 737 /* Interrupt and Polling infrastructure */ 738 struct delayed_work state_queue; 739 740 struct mutex lock; 741 742 /* This may be modified under the rtnl lock */ 743 bool sfp_bus_attached; 744 struct sfp_bus *sfp_bus; 745 struct phylink *phylink; 746 struct net_device *attached_dev; 747 struct mii_timestamper *mii_ts; 748 struct pse_control *psec; 749 750 u8 mdix; 751 u8 mdix_ctrl; 752 753 int pma_extable; 754 755 unsigned int link_down_events; 756 757 void (*phy_link_change)(struct phy_device *phydev, bool up); 758 void (*adjust_link)(struct net_device *dev); 759 760 #if IS_ENABLED(CONFIG_MACSEC) 761 /* MACsec management functions */ 762 const struct macsec_ops *macsec_ops; 763 #endif 764 }; 765 766 /* Generic phy_device::dev_flags */ 767 #define PHY_F_NO_IRQ 0x80000000 768 769 static inline struct phy_device *to_phy_device(const struct device *dev) 770 { 771 return container_of(to_mdio_device(dev), struct phy_device, mdio); 772 } 773 774 /** 775 * struct phy_tdr_config - Configuration of a TDR raw test 776 * 777 * @first: Distance for first data collection point 778 * @last: Distance for last data collection point 779 * @step: Step between data collection points 780 * @pair: Bitmap of cable pairs to collect data for 781 * 782 * A structure containing possible configuration parameters 783 * for a TDR cable test. The driver does not need to implement 784 * all the parameters, but should report what is actually used. 785 * All distances are in centimeters. 786 */ 787 struct phy_tdr_config { 788 u32 first; 789 u32 last; 790 u32 step; 791 s8 pair; 792 }; 793 #define PHY_PAIR_ALL -1 794 795 /** 796 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 797 * Avoidance) Reconciliation Sublayer. 798 * 799 * @version: read-only PLCA register map version. -1 = not available. Ignored 800 * when setting the configuration. Format is the same as reported by the PLCA 801 * IDVER register (31.CA00). -1 = not available. 802 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 803 * set. 0 = disabled, anything else = enabled. 804 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 805 * Allowed values [0 .. 254]. 255 = node disabled. 806 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 807 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 808 * set. Allowed values [1 .. 255]. 809 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 810 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 811 * more details. The to_timer shall be set equal over all nodes. 812 * -1 = not available / don't set. Allowed values [0 .. 255]. 813 * @burst_cnt: controls how many additional frames a node is allowed to send in 814 * single transmit opportunity (TO). The default value of 0 means that the 815 * node is allowed exactly one frame per TO. A value of 1 allows two frames 816 * per TO, and so on. -1 = not available / don't set. 817 * Allowed values [0 .. 255]. 818 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 819 * frame before interrupting the burst. This value should be set to a value 820 * greater than the MAC inter-packet gap (which is typically 96 bits). 821 * -1 = not available / don't set. Allowed values [0 .. 255]. 822 * 823 * A structure containing configuration parameters for setting/getting the PLCA 824 * RS configuration. The driver does not need to implement all the parameters, 825 * but should report what is actually used. 826 */ 827 struct phy_plca_cfg { 828 int version; 829 int enabled; 830 int node_id; 831 int node_cnt; 832 int to_tmr; 833 int burst_cnt; 834 int burst_tmr; 835 }; 836 837 /** 838 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 839 * Avoidance) Reconciliation Sublayer. 840 * 841 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 842 * register(31.CA03), indicating BEACON activity. 843 * 844 * A structure containing status information of the PLCA RS configuration. 845 * The driver does not need to implement all the parameters, but should report 846 * what is actually used. 847 */ 848 struct phy_plca_status { 849 bool pst; 850 }; 851 852 /** 853 * struct phy_led: An LED driven by the PHY 854 * 855 * @list: List of LEDs 856 * @phydev: PHY this LED is attached to 857 * @led_cdev: Standard LED class structure 858 * @index: Number of the LED 859 */ 860 struct phy_led { 861 struct list_head list; 862 struct phy_device *phydev; 863 struct led_classdev led_cdev; 864 u8 index; 865 }; 866 867 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 868 869 /** 870 * struct phy_driver - Driver structure for a particular PHY type 871 * 872 * @mdiodrv: Data common to all MDIO devices 873 * @phy_id: The result of reading the UID registers of this PHY 874 * type, and ANDing them with the phy_id_mask. This driver 875 * only works for PHYs with IDs which match this field 876 * @name: The friendly name of this PHY type 877 * @phy_id_mask: Defines the important bits of the phy_id 878 * @features: A mandatory list of features (speed, duplex, etc) 879 * supported by this PHY 880 * @flags: A bitfield defining certain other features this PHY 881 * supports (like interrupts) 882 * @driver_data: Static driver data 883 * 884 * All functions are optional. If config_aneg or read_status 885 * are not implemented, the phy core uses the genphy versions. 886 * Note that none of these functions should be called from 887 * interrupt time. The goal is for the bus read/write functions 888 * to be able to block when the bus transaction is happening, 889 * and be freed up by an interrupt (The MPC85xx has this ability, 890 * though it is not currently supported in the driver). 891 */ 892 struct phy_driver { 893 struct mdio_driver_common mdiodrv; 894 u32 phy_id; 895 char *name; 896 u32 phy_id_mask; 897 const unsigned long * const features; 898 u32 flags; 899 const void *driver_data; 900 901 /** 902 * @soft_reset: Called to issue a PHY software reset 903 */ 904 int (*soft_reset)(struct phy_device *phydev); 905 906 /** 907 * @config_init: Called to initialize the PHY, 908 * including after a reset 909 */ 910 int (*config_init)(struct phy_device *phydev); 911 912 /** 913 * @probe: Called during discovery. Used to set 914 * up device-specific structures, if any 915 */ 916 int (*probe)(struct phy_device *phydev); 917 918 /** 919 * @get_features: Probe the hardware to determine what 920 * abilities it has. Should only set phydev->supported. 921 */ 922 int (*get_features)(struct phy_device *phydev); 923 924 /** 925 * @get_rate_matching: Get the supported type of rate matching for a 926 * particular phy interface. This is used by phy consumers to determine 927 * whether to advertise lower-speed modes for that interface. It is 928 * assumed that if a rate matching mode is supported on an interface, 929 * then that interface's rate can be adapted to all slower link speeds 930 * supported by the phy. If the interface is not supported, this should 931 * return %RATE_MATCH_NONE. 932 */ 933 int (*get_rate_matching)(struct phy_device *phydev, 934 phy_interface_t iface); 935 936 /* PHY Power Management */ 937 /** @suspend: Suspend the hardware, saving state if needed */ 938 int (*suspend)(struct phy_device *phydev); 939 /** @resume: Resume the hardware, restoring state if needed */ 940 int (*resume)(struct phy_device *phydev); 941 942 /** 943 * @config_aneg: Configures the advertisement and resets 944 * autonegotiation if phydev->autoneg is on, 945 * forces the speed to the current settings in phydev 946 * if phydev->autoneg is off 947 */ 948 int (*config_aneg)(struct phy_device *phydev); 949 950 /** @aneg_done: Determines the auto negotiation result */ 951 int (*aneg_done)(struct phy_device *phydev); 952 953 /** @read_status: Determines the negotiated speed and duplex */ 954 int (*read_status)(struct phy_device *phydev); 955 956 /** 957 * @config_intr: Enables or disables interrupts. 958 * It should also clear any pending interrupts prior to enabling the 959 * IRQs and after disabling them. 960 */ 961 int (*config_intr)(struct phy_device *phydev); 962 963 /** @handle_interrupt: Override default interrupt handling */ 964 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 965 966 /** @remove: Clears up any memory if needed */ 967 void (*remove)(struct phy_device *phydev); 968 969 /** 970 * @match_phy_device: Returns true if this is a suitable 971 * driver for the given phydev. If NULL, matching is based on 972 * phy_id and phy_id_mask. 973 */ 974 int (*match_phy_device)(struct phy_device *phydev); 975 976 /** 977 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 978 * register changes to enable Wake on LAN, so set_wol is 979 * provided to be called in the ethernet driver's set_wol 980 * function. 981 */ 982 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 983 984 /** 985 * @get_wol: See set_wol, but for checking whether Wake on LAN 986 * is enabled. 987 */ 988 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 989 990 /** 991 * @link_change_notify: Called to inform a PHY device driver 992 * when the core is about to change the link state. This 993 * callback is supposed to be used as fixup hook for drivers 994 * that need to take action when the link state 995 * changes. Drivers are by no means allowed to mess with the 996 * PHY device structure in their implementations. 997 */ 998 void (*link_change_notify)(struct phy_device *dev); 999 1000 /** 1001 * @read_mmd: PHY specific driver override for reading a MMD 1002 * register. This function is optional for PHY specific 1003 * drivers. When not provided, the default MMD read function 1004 * will be used by phy_read_mmd(), which will use either a 1005 * direct read for Clause 45 PHYs or an indirect read for 1006 * Clause 22 PHYs. devnum is the MMD device number within the 1007 * PHY device, regnum is the register within the selected MMD 1008 * device. 1009 */ 1010 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1011 1012 /** 1013 * @write_mmd: PHY specific driver override for writing a MMD 1014 * register. This function is optional for PHY specific 1015 * drivers. When not provided, the default MMD write function 1016 * will be used by phy_write_mmd(), which will use either a 1017 * direct write for Clause 45 PHYs, or an indirect write for 1018 * Clause 22 PHYs. devnum is the MMD device number within the 1019 * PHY device, regnum is the register within the selected MMD 1020 * device. val is the value to be written. 1021 */ 1022 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1023 u16 val); 1024 1025 /** @read_page: Return the current PHY register page number */ 1026 int (*read_page)(struct phy_device *dev); 1027 /** @write_page: Set the current PHY register page number */ 1028 int (*write_page)(struct phy_device *dev, int page); 1029 1030 /** 1031 * @module_info: Get the size and type of the eeprom contained 1032 * within a plug-in module 1033 */ 1034 int (*module_info)(struct phy_device *dev, 1035 struct ethtool_modinfo *modinfo); 1036 1037 /** 1038 * @module_eeprom: Get the eeprom information from the plug-in 1039 * module 1040 */ 1041 int (*module_eeprom)(struct phy_device *dev, 1042 struct ethtool_eeprom *ee, u8 *data); 1043 1044 /** @cable_test_start: Start a cable test */ 1045 int (*cable_test_start)(struct phy_device *dev); 1046 1047 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1048 int (*cable_test_tdr_start)(struct phy_device *dev, 1049 const struct phy_tdr_config *config); 1050 1051 /** 1052 * @cable_test_get_status: Once per second, or on interrupt, 1053 * request the status of the test. 1054 */ 1055 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1056 1057 /* Get statistics from the PHY using ethtool */ 1058 /** @get_sset_count: Number of statistic counters */ 1059 int (*get_sset_count)(struct phy_device *dev); 1060 /** @get_strings: Names of the statistic counters */ 1061 void (*get_strings)(struct phy_device *dev, u8 *data); 1062 /** @get_stats: Return the statistic counter values */ 1063 void (*get_stats)(struct phy_device *dev, 1064 struct ethtool_stats *stats, u64 *data); 1065 1066 /* Get and Set PHY tunables */ 1067 /** @get_tunable: Return the value of a tunable */ 1068 int (*get_tunable)(struct phy_device *dev, 1069 struct ethtool_tunable *tuna, void *data); 1070 /** @set_tunable: Set the value of a tunable */ 1071 int (*set_tunable)(struct phy_device *dev, 1072 struct ethtool_tunable *tuna, 1073 const void *data); 1074 /** @set_loopback: Set the loopback mood of the PHY */ 1075 int (*set_loopback)(struct phy_device *dev, bool enable); 1076 /** @get_sqi: Get the signal quality indication */ 1077 int (*get_sqi)(struct phy_device *dev); 1078 /** @get_sqi_max: Get the maximum signal quality indication */ 1079 int (*get_sqi_max)(struct phy_device *dev); 1080 1081 /* PLCA RS interface */ 1082 /** @get_plca_cfg: Return the current PLCA configuration */ 1083 int (*get_plca_cfg)(struct phy_device *dev, 1084 struct phy_plca_cfg *plca_cfg); 1085 /** @set_plca_cfg: Set the PLCA configuration */ 1086 int (*set_plca_cfg)(struct phy_device *dev, 1087 const struct phy_plca_cfg *plca_cfg); 1088 /** @get_plca_status: Return the current PLCA status info */ 1089 int (*get_plca_status)(struct phy_device *dev, 1090 struct phy_plca_status *plca_st); 1091 1092 /** 1093 * @led_brightness_set: Set a PHY LED brightness. Index 1094 * indicates which of the PHYs led should be set. Value 1095 * follows the standard LED class meaning, e.g. LED_OFF, 1096 * LED_HALF, LED_FULL. 1097 */ 1098 int (*led_brightness_set)(struct phy_device *dev, 1099 u8 index, enum led_brightness value); 1100 1101 /** 1102 * @led_blink_set: Set a PHY LED brightness. Index indicates 1103 * which of the PHYs led should be configured to blink. Delays 1104 * are in milliseconds and if both are zero then a sensible 1105 * default should be chosen. The call should adjust the 1106 * timings in that case and if it can't match the values 1107 * specified exactly. 1108 */ 1109 int (*led_blink_set)(struct phy_device *dev, u8 index, 1110 unsigned long *delay_on, 1111 unsigned long *delay_off); 1112 /** 1113 * @led_hw_is_supported: Can the HW support the given rules. 1114 * @dev: PHY device which has the LED 1115 * @index: Which LED of the PHY device 1116 * @rules The core is interested in these rules 1117 * 1118 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1119 */ 1120 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1121 unsigned long rules); 1122 /** 1123 * @led_hw_control_set: Set the HW to control the LED 1124 * @dev: PHY device which has the LED 1125 * @index: Which LED of the PHY device 1126 * @rules The rules used to control the LED 1127 * 1128 * Returns 0, or a an error code. 1129 */ 1130 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1131 unsigned long rules); 1132 /** 1133 * @led_hw_control_get: Get how the HW is controlling the LED 1134 * @dev: PHY device which has the LED 1135 * @index: Which LED of the PHY device 1136 * @rules Pointer to the rules used to control the LED 1137 * 1138 * Set *@rules to how the HW is currently blinking. Returns 0 1139 * on success, or a error code if the current blinking cannot 1140 * be represented in rules, or some other error happens. 1141 */ 1142 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1143 unsigned long *rules); 1144 1145 }; 1146 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1147 struct phy_driver, mdiodrv) 1148 1149 #define PHY_ANY_ID "MATCH ANY PHY" 1150 #define PHY_ANY_UID 0xffffffff 1151 1152 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1153 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1154 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1155 1156 /** 1157 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1158 * @id1: first PHY ID 1159 * @id2: second PHY ID 1160 * @mask: the PHY ID mask, set bits are significant in matching 1161 * 1162 * Return true if the bits from @id1 and @id2 specified by @mask match. 1163 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1164 */ 1165 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1166 { 1167 return !((id1 ^ id2) & mask); 1168 } 1169 1170 /** 1171 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1172 * @phydev: the PHY device 1173 * @id: the PHY ID to be matched 1174 * 1175 * Compare the @phydev clause 22 ID with the provided @id and return true or 1176 * false depending whether it matches, using the bound driver mask. The 1177 * @phydev must be bound to a driver. 1178 */ 1179 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1180 { 1181 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1182 } 1183 1184 /* A Structure for boards to register fixups with the PHY Lib */ 1185 struct phy_fixup { 1186 struct list_head list; 1187 char bus_id[MII_BUS_ID_SIZE + 3]; 1188 u32 phy_uid; 1189 u32 phy_uid_mask; 1190 int (*run)(struct phy_device *phydev); 1191 }; 1192 1193 const char *phy_speed_to_str(int speed); 1194 const char *phy_duplex_to_str(unsigned int duplex); 1195 const char *phy_rate_matching_to_str(int rate_matching); 1196 1197 int phy_interface_num_ports(phy_interface_t interface); 1198 1199 /* A structure for mapping a particular speed and duplex 1200 * combination to a particular SUPPORTED and ADVERTISED value 1201 */ 1202 struct phy_setting { 1203 u32 speed; 1204 u8 duplex; 1205 u8 bit; 1206 }; 1207 1208 const struct phy_setting * 1209 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1210 bool exact); 1211 size_t phy_speeds(unsigned int *speeds, size_t size, 1212 unsigned long *mask); 1213 void of_set_phy_supported(struct phy_device *phydev); 1214 void of_set_phy_eee_broken(struct phy_device *phydev); 1215 int phy_speed_down_core(struct phy_device *phydev); 1216 1217 /** 1218 * phy_is_started - Convenience function to check whether PHY is started 1219 * @phydev: The phy_device struct 1220 */ 1221 static inline bool phy_is_started(struct phy_device *phydev) 1222 { 1223 return phydev->state >= PHY_UP; 1224 } 1225 1226 void phy_resolve_aneg_pause(struct phy_device *phydev); 1227 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1228 void phy_check_downshift(struct phy_device *phydev); 1229 1230 /** 1231 * phy_read - Convenience function for reading a given PHY register 1232 * @phydev: the phy_device struct 1233 * @regnum: register number to read 1234 * 1235 * NOTE: MUST NOT be called from interrupt context, 1236 * because the bus read/write functions may wait for an interrupt 1237 * to conclude the operation. 1238 */ 1239 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1240 { 1241 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1242 } 1243 1244 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1245 timeout_us, sleep_before_read) \ 1246 ({ \ 1247 int __ret, __val; \ 1248 __ret = read_poll_timeout(__val = phy_read, val, \ 1249 __val < 0 || (cond), \ 1250 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1251 if (__val < 0) \ 1252 __ret = __val; \ 1253 if (__ret) \ 1254 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1255 __ret; \ 1256 }) 1257 1258 /** 1259 * __phy_read - convenience function for reading a given PHY register 1260 * @phydev: the phy_device struct 1261 * @regnum: register number to read 1262 * 1263 * The caller must have taken the MDIO bus lock. 1264 */ 1265 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1266 { 1267 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1268 } 1269 1270 /** 1271 * phy_write - Convenience function for writing a given PHY register 1272 * @phydev: the phy_device struct 1273 * @regnum: register number to write 1274 * @val: value to write to @regnum 1275 * 1276 * NOTE: MUST NOT be called from interrupt context, 1277 * because the bus read/write functions may wait for an interrupt 1278 * to conclude the operation. 1279 */ 1280 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1281 { 1282 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1283 } 1284 1285 /** 1286 * __phy_write - Convenience function for writing a given PHY register 1287 * @phydev: the phy_device struct 1288 * @regnum: register number to write 1289 * @val: value to write to @regnum 1290 * 1291 * The caller must have taken the MDIO bus lock. 1292 */ 1293 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1294 { 1295 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1296 val); 1297 } 1298 1299 /** 1300 * __phy_modify_changed() - Convenience function for modifying a PHY register 1301 * @phydev: a pointer to a &struct phy_device 1302 * @regnum: register number 1303 * @mask: bit mask of bits to clear 1304 * @set: bit mask of bits to set 1305 * 1306 * Unlocked helper function which allows a PHY register to be modified as 1307 * new register value = (old register value & ~mask) | set 1308 * 1309 * Returns negative errno, 0 if there was no change, and 1 in case of change 1310 */ 1311 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1312 u16 mask, u16 set) 1313 { 1314 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1315 regnum, mask, set); 1316 } 1317 1318 /* 1319 * phy_read_mmd - Convenience function for reading a register 1320 * from an MMD on a given PHY. 1321 */ 1322 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1323 1324 /** 1325 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1326 * condition is met or a timeout occurs 1327 * 1328 * @phydev: The phy_device struct 1329 * @devaddr: The MMD to read from 1330 * @regnum: The register on the MMD to read 1331 * @val: Variable to read the register into 1332 * @cond: Break condition (usually involving @val) 1333 * @sleep_us: Maximum time to sleep between reads in us (0 1334 * tight-loops). Should be less than ~20ms since usleep_range 1335 * is used (see Documentation/timers/timers-howto.rst). 1336 * @timeout_us: Timeout in us, 0 means never timeout 1337 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1338 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1339 * case, the last read value at @args is stored in @val. Must not 1340 * be called from atomic context if sleep_us or timeout_us are used. 1341 */ 1342 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1343 sleep_us, timeout_us, sleep_before_read) \ 1344 ({ \ 1345 int __ret, __val; \ 1346 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1347 __val < 0 || (cond), \ 1348 sleep_us, timeout_us, sleep_before_read, \ 1349 phydev, devaddr, regnum); \ 1350 if (__val < 0) \ 1351 __ret = __val; \ 1352 if (__ret) \ 1353 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1354 __ret; \ 1355 }) 1356 1357 /* 1358 * __phy_read_mmd - Convenience function for reading a register 1359 * from an MMD on a given PHY. 1360 */ 1361 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1362 1363 /* 1364 * phy_write_mmd - Convenience function for writing a register 1365 * on an MMD on a given PHY. 1366 */ 1367 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1368 1369 /* 1370 * __phy_write_mmd - Convenience function for writing a register 1371 * on an MMD on a given PHY. 1372 */ 1373 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1374 1375 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1376 u16 set); 1377 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1378 u16 set); 1379 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1380 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1381 1382 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1383 u16 mask, u16 set); 1384 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1385 u16 mask, u16 set); 1386 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1387 u16 mask, u16 set); 1388 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1389 u16 mask, u16 set); 1390 1391 /** 1392 * __phy_set_bits - Convenience function for setting bits in a PHY register 1393 * @phydev: the phy_device struct 1394 * @regnum: register number to write 1395 * @val: bits to set 1396 * 1397 * The caller must have taken the MDIO bus lock. 1398 */ 1399 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1400 { 1401 return __phy_modify(phydev, regnum, 0, val); 1402 } 1403 1404 /** 1405 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1406 * @phydev: the phy_device struct 1407 * @regnum: register number to write 1408 * @val: bits to clear 1409 * 1410 * The caller must have taken the MDIO bus lock. 1411 */ 1412 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1413 u16 val) 1414 { 1415 return __phy_modify(phydev, regnum, val, 0); 1416 } 1417 1418 /** 1419 * phy_set_bits - Convenience function for setting bits in a PHY register 1420 * @phydev: the phy_device struct 1421 * @regnum: register number to write 1422 * @val: bits to set 1423 */ 1424 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1425 { 1426 return phy_modify(phydev, regnum, 0, val); 1427 } 1428 1429 /** 1430 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1431 * @phydev: the phy_device struct 1432 * @regnum: register number to write 1433 * @val: bits to clear 1434 */ 1435 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1436 { 1437 return phy_modify(phydev, regnum, val, 0); 1438 } 1439 1440 /** 1441 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1442 * on MMD 1443 * @phydev: the phy_device struct 1444 * @devad: the MMD containing register to modify 1445 * @regnum: register number to modify 1446 * @val: bits to set 1447 * 1448 * The caller must have taken the MDIO bus lock. 1449 */ 1450 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1451 u32 regnum, u16 val) 1452 { 1453 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1454 } 1455 1456 /** 1457 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1458 * on MMD 1459 * @phydev: the phy_device struct 1460 * @devad: the MMD containing register to modify 1461 * @regnum: register number to modify 1462 * @val: bits to clear 1463 * 1464 * The caller must have taken the MDIO bus lock. 1465 */ 1466 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1467 u32 regnum, u16 val) 1468 { 1469 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1470 } 1471 1472 /** 1473 * phy_set_bits_mmd - Convenience function for setting bits in a register 1474 * on MMD 1475 * @phydev: the phy_device struct 1476 * @devad: the MMD containing register to modify 1477 * @regnum: register number to modify 1478 * @val: bits to set 1479 */ 1480 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1481 u32 regnum, u16 val) 1482 { 1483 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1484 } 1485 1486 /** 1487 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1488 * on MMD 1489 * @phydev: the phy_device struct 1490 * @devad: the MMD containing register to modify 1491 * @regnum: register number to modify 1492 * @val: bits to clear 1493 */ 1494 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1495 u32 regnum, u16 val) 1496 { 1497 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1498 } 1499 1500 /** 1501 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1502 * @phydev: the phy_device struct 1503 * 1504 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1505 * PHY_MAC_INTERRUPT 1506 */ 1507 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1508 { 1509 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1510 } 1511 1512 /** 1513 * phy_polling_mode - Convenience function for testing whether polling is 1514 * used to detect PHY status changes 1515 * @phydev: the phy_device struct 1516 */ 1517 static inline bool phy_polling_mode(struct phy_device *phydev) 1518 { 1519 if (phydev->state == PHY_CABLETEST) 1520 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1521 return true; 1522 1523 return phydev->irq == PHY_POLL; 1524 } 1525 1526 /** 1527 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1528 * @phydev: the phy_device struct 1529 */ 1530 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1531 { 1532 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1533 } 1534 1535 /** 1536 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1537 * @phydev: the phy_device struct 1538 */ 1539 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1540 { 1541 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1542 } 1543 1544 /** 1545 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1546 * PTP hardware clock capabilities. 1547 * @phydev: the phy_device struct 1548 */ 1549 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1550 { 1551 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1552 } 1553 1554 /** 1555 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1556 * @phydev: the phy_device struct 1557 */ 1558 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1559 { 1560 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1561 } 1562 1563 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1564 { 1565 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1566 } 1567 1568 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1569 int type) 1570 { 1571 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1572 } 1573 1574 static inline int phy_ts_info(struct phy_device *phydev, 1575 struct ethtool_ts_info *tsinfo) 1576 { 1577 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1578 } 1579 1580 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1581 int type) 1582 { 1583 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1584 } 1585 1586 /** 1587 * phy_is_internal - Convenience function for testing if a PHY is internal 1588 * @phydev: the phy_device struct 1589 */ 1590 static inline bool phy_is_internal(struct phy_device *phydev) 1591 { 1592 return phydev->is_internal; 1593 } 1594 1595 /** 1596 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1597 * @phydev: the phy_device struct 1598 */ 1599 static inline bool phy_on_sfp(struct phy_device *phydev) 1600 { 1601 return phydev->is_on_sfp_module; 1602 } 1603 1604 /** 1605 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1606 * PHY interface mode is RGMII (all variants) 1607 * @mode: the &phy_interface_t enum 1608 */ 1609 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1610 { 1611 return mode >= PHY_INTERFACE_MODE_RGMII && 1612 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1613 }; 1614 1615 /** 1616 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1617 * negotiation 1618 * @mode: one of &enum phy_interface_t 1619 * 1620 * Returns true if the PHY interface mode uses the 16-bit negotiation 1621 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1622 */ 1623 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1624 { 1625 return mode == PHY_INTERFACE_MODE_1000BASEX || 1626 mode == PHY_INTERFACE_MODE_2500BASEX; 1627 } 1628 1629 /** 1630 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1631 * is RGMII (all variants) 1632 * @phydev: the phy_device struct 1633 */ 1634 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1635 { 1636 return phy_interface_mode_is_rgmii(phydev->interface); 1637 }; 1638 1639 /** 1640 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1641 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1642 * @phydev: the phy_device struct 1643 */ 1644 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1645 { 1646 return phydev->is_pseudo_fixed_link; 1647 } 1648 1649 int phy_save_page(struct phy_device *phydev); 1650 int phy_select_page(struct phy_device *phydev, int page); 1651 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1652 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1653 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1654 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1655 u16 mask, u16 set); 1656 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1657 u16 mask, u16 set); 1658 1659 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1660 bool is_c45, 1661 struct phy_c45_device_ids *c45_ids); 1662 #if IS_ENABLED(CONFIG_PHYLIB) 1663 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1664 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1665 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1666 struct phy_device *device_phy_find_device(struct device *dev); 1667 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1668 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1669 int phy_device_register(struct phy_device *phy); 1670 void phy_device_free(struct phy_device *phydev); 1671 #else 1672 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1673 { 1674 return 0; 1675 } 1676 static inline 1677 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1678 { 1679 return 0; 1680 } 1681 1682 static inline 1683 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1684 { 1685 return NULL; 1686 } 1687 1688 static inline struct phy_device *device_phy_find_device(struct device *dev) 1689 { 1690 return NULL; 1691 } 1692 1693 static inline 1694 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1695 { 1696 return NULL; 1697 } 1698 1699 static inline 1700 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1701 { 1702 return NULL; 1703 } 1704 1705 static inline int phy_device_register(struct phy_device *phy) 1706 { 1707 return 0; 1708 } 1709 1710 static inline void phy_device_free(struct phy_device *phydev) { } 1711 #endif /* CONFIG_PHYLIB */ 1712 void phy_device_remove(struct phy_device *phydev); 1713 int phy_get_c45_ids(struct phy_device *phydev); 1714 int phy_init_hw(struct phy_device *phydev); 1715 int phy_suspend(struct phy_device *phydev); 1716 int phy_resume(struct phy_device *phydev); 1717 int __phy_resume(struct phy_device *phydev); 1718 int phy_loopback(struct phy_device *phydev, bool enable); 1719 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1720 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1721 int phy_sfp_probe(struct phy_device *phydev, 1722 const struct sfp_upstream_ops *ops); 1723 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1724 phy_interface_t interface); 1725 struct phy_device *phy_find_first(struct mii_bus *bus); 1726 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1727 u32 flags, phy_interface_t interface); 1728 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1729 void (*handler)(struct net_device *), 1730 phy_interface_t interface); 1731 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1732 void (*handler)(struct net_device *), 1733 phy_interface_t interface); 1734 void phy_disconnect(struct phy_device *phydev); 1735 void phy_detach(struct phy_device *phydev); 1736 void phy_start(struct phy_device *phydev); 1737 void phy_stop(struct phy_device *phydev); 1738 int phy_config_aneg(struct phy_device *phydev); 1739 int phy_start_aneg(struct phy_device *phydev); 1740 int phy_aneg_done(struct phy_device *phydev); 1741 int phy_speed_down(struct phy_device *phydev, bool sync); 1742 int phy_speed_up(struct phy_device *phydev); 1743 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1744 1745 int phy_restart_aneg(struct phy_device *phydev); 1746 int phy_reset_after_clk_enable(struct phy_device *phydev); 1747 1748 #if IS_ENABLED(CONFIG_PHYLIB) 1749 int phy_start_cable_test(struct phy_device *phydev, 1750 struct netlink_ext_ack *extack); 1751 int phy_start_cable_test_tdr(struct phy_device *phydev, 1752 struct netlink_ext_ack *extack, 1753 const struct phy_tdr_config *config); 1754 #else 1755 static inline 1756 int phy_start_cable_test(struct phy_device *phydev, 1757 struct netlink_ext_ack *extack) 1758 { 1759 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1760 return -EOPNOTSUPP; 1761 } 1762 static inline 1763 int phy_start_cable_test_tdr(struct phy_device *phydev, 1764 struct netlink_ext_ack *extack, 1765 const struct phy_tdr_config *config) 1766 { 1767 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1768 return -EOPNOTSUPP; 1769 } 1770 #endif 1771 1772 static inline void phy_device_reset(struct phy_device *phydev, int value) 1773 { 1774 mdio_device_reset(&phydev->mdio, value); 1775 } 1776 1777 #define phydev_err(_phydev, format, args...) \ 1778 dev_err(&_phydev->mdio.dev, format, ##args) 1779 1780 #define phydev_err_probe(_phydev, err, format, args...) \ 1781 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1782 1783 #define phydev_info(_phydev, format, args...) \ 1784 dev_info(&_phydev->mdio.dev, format, ##args) 1785 1786 #define phydev_warn(_phydev, format, args...) \ 1787 dev_warn(&_phydev->mdio.dev, format, ##args) 1788 1789 #define phydev_dbg(_phydev, format, args...) \ 1790 dev_dbg(&_phydev->mdio.dev, format, ##args) 1791 1792 static inline const char *phydev_name(const struct phy_device *phydev) 1793 { 1794 return dev_name(&phydev->mdio.dev); 1795 } 1796 1797 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1798 { 1799 mutex_lock(&phydev->mdio.bus->mdio_lock); 1800 } 1801 1802 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1803 { 1804 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1805 } 1806 1807 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1808 __printf(2, 3); 1809 char *phy_attached_info_irq(struct phy_device *phydev) 1810 __malloc; 1811 void phy_attached_info(struct phy_device *phydev); 1812 1813 /* Clause 22 PHY */ 1814 int genphy_read_abilities(struct phy_device *phydev); 1815 int genphy_setup_forced(struct phy_device *phydev); 1816 int genphy_restart_aneg(struct phy_device *phydev); 1817 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1818 int genphy_config_eee_advert(struct phy_device *phydev); 1819 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1820 int genphy_aneg_done(struct phy_device *phydev); 1821 int genphy_update_link(struct phy_device *phydev); 1822 int genphy_read_lpa(struct phy_device *phydev); 1823 int genphy_read_status_fixed(struct phy_device *phydev); 1824 int genphy_read_status(struct phy_device *phydev); 1825 int genphy_read_master_slave(struct phy_device *phydev); 1826 int genphy_suspend(struct phy_device *phydev); 1827 int genphy_resume(struct phy_device *phydev); 1828 int genphy_loopback(struct phy_device *phydev, bool enable); 1829 int genphy_soft_reset(struct phy_device *phydev); 1830 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1831 1832 static inline int genphy_config_aneg(struct phy_device *phydev) 1833 { 1834 return __genphy_config_aneg(phydev, false); 1835 } 1836 1837 static inline int genphy_no_config_intr(struct phy_device *phydev) 1838 { 1839 return 0; 1840 } 1841 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1842 u16 regnum); 1843 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1844 u16 regnum, u16 val); 1845 1846 /* Clause 37 */ 1847 int genphy_c37_config_aneg(struct phy_device *phydev); 1848 int genphy_c37_read_status(struct phy_device *phydev); 1849 1850 /* Clause 45 PHY */ 1851 int genphy_c45_restart_aneg(struct phy_device *phydev); 1852 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1853 int genphy_c45_aneg_done(struct phy_device *phydev); 1854 int genphy_c45_read_link(struct phy_device *phydev); 1855 int genphy_c45_read_lpa(struct phy_device *phydev); 1856 int genphy_c45_read_pma(struct phy_device *phydev); 1857 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1858 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1859 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1860 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1861 int genphy_c45_read_mdix(struct phy_device *phydev); 1862 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1863 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1864 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1865 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1866 int genphy_c45_read_status(struct phy_device *phydev); 1867 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1868 int genphy_c45_config_aneg(struct phy_device *phydev); 1869 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1870 int genphy_c45_pma_resume(struct phy_device *phydev); 1871 int genphy_c45_pma_suspend(struct phy_device *phydev); 1872 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1873 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1874 struct phy_plca_cfg *plca_cfg); 1875 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1876 const struct phy_plca_cfg *plca_cfg); 1877 int genphy_c45_plca_get_status(struct phy_device *phydev, 1878 struct phy_plca_status *plca_st); 1879 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1880 unsigned long *lp, bool *is_enabled); 1881 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1882 struct ethtool_eee *data); 1883 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1884 struct ethtool_eee *data); 1885 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1886 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1887 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1888 1889 /* Generic C45 PHY driver */ 1890 extern struct phy_driver genphy_c45_driver; 1891 1892 /* The gen10g_* functions are the old Clause 45 stub */ 1893 int gen10g_config_aneg(struct phy_device *phydev); 1894 1895 static inline int phy_read_status(struct phy_device *phydev) 1896 { 1897 if (!phydev->drv) 1898 return -EIO; 1899 1900 if (phydev->drv->read_status) 1901 return phydev->drv->read_status(phydev); 1902 else 1903 return genphy_read_status(phydev); 1904 } 1905 1906 void phy_driver_unregister(struct phy_driver *drv); 1907 void phy_drivers_unregister(struct phy_driver *drv, int n); 1908 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1909 int phy_drivers_register(struct phy_driver *new_driver, int n, 1910 struct module *owner); 1911 void phy_error(struct phy_device *phydev); 1912 void phy_state_machine(struct work_struct *work); 1913 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1914 void phy_trigger_machine(struct phy_device *phydev); 1915 void phy_mac_interrupt(struct phy_device *phydev); 1916 void phy_start_machine(struct phy_device *phydev); 1917 void phy_stop_machine(struct phy_device *phydev); 1918 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1919 struct ethtool_link_ksettings *cmd); 1920 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1921 const struct ethtool_link_ksettings *cmd); 1922 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1923 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1924 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1925 int phy_disable_interrupts(struct phy_device *phydev); 1926 void phy_request_interrupt(struct phy_device *phydev); 1927 void phy_free_interrupt(struct phy_device *phydev); 1928 void phy_print_status(struct phy_device *phydev); 1929 int phy_get_rate_matching(struct phy_device *phydev, 1930 phy_interface_t iface); 1931 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1932 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1933 void phy_advertise_supported(struct phy_device *phydev); 1934 void phy_support_sym_pause(struct phy_device *phydev); 1935 void phy_support_asym_pause(struct phy_device *phydev); 1936 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1937 bool autoneg); 1938 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1939 bool phy_validate_pause(struct phy_device *phydev, 1940 struct ethtool_pauseparam *pp); 1941 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1942 1943 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1944 const int *delay_values, int size, bool is_rx); 1945 1946 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1947 bool *tx_pause, bool *rx_pause); 1948 1949 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1950 int (*run)(struct phy_device *)); 1951 int phy_register_fixup_for_id(const char *bus_id, 1952 int (*run)(struct phy_device *)); 1953 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1954 int (*run)(struct phy_device *)); 1955 1956 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1957 int phy_unregister_fixup_for_id(const char *bus_id); 1958 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1959 1960 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1961 int phy_get_eee_err(struct phy_device *phydev); 1962 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1963 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1964 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1965 void phy_ethtool_get_wol(struct phy_device *phydev, 1966 struct ethtool_wolinfo *wol); 1967 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1968 struct ethtool_link_ksettings *cmd); 1969 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1970 const struct ethtool_link_ksettings *cmd); 1971 int phy_ethtool_nway_reset(struct net_device *ndev); 1972 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1973 void phy_package_leave(struct phy_device *phydev); 1974 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1975 int addr, size_t priv_size); 1976 1977 int __init mdio_bus_init(void); 1978 void mdio_bus_exit(void); 1979 1980 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1981 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1982 int phy_ethtool_get_stats(struct phy_device *phydev, 1983 struct ethtool_stats *stats, u64 *data); 1984 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 1985 struct phy_plca_cfg *plca_cfg); 1986 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 1987 const struct phy_plca_cfg *plca_cfg, 1988 struct netlink_ext_ack *extack); 1989 int phy_ethtool_get_plca_status(struct phy_device *phydev, 1990 struct phy_plca_status *plca_st); 1991 1992 int __phy_hwtstamp_get(struct phy_device *phydev, 1993 struct kernel_hwtstamp_config *config); 1994 int __phy_hwtstamp_set(struct phy_device *phydev, 1995 struct kernel_hwtstamp_config *config, 1996 struct netlink_ext_ack *extack); 1997 1998 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1999 { 2000 struct phy_package_shared *shared = phydev->shared; 2001 2002 if (!shared) 2003 return -EIO; 2004 2005 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 2006 } 2007 2008 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 2009 { 2010 struct phy_package_shared *shared = phydev->shared; 2011 2012 if (!shared) 2013 return -EIO; 2014 2015 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 2016 } 2017 2018 static inline int phy_package_write(struct phy_device *phydev, 2019 u32 regnum, u16 val) 2020 { 2021 struct phy_package_shared *shared = phydev->shared; 2022 2023 if (!shared) 2024 return -EIO; 2025 2026 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 2027 } 2028 2029 static inline int __phy_package_write(struct phy_device *phydev, 2030 u32 regnum, u16 val) 2031 { 2032 struct phy_package_shared *shared = phydev->shared; 2033 2034 if (!shared) 2035 return -EIO; 2036 2037 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 2038 } 2039 2040 static inline bool __phy_package_set_once(struct phy_device *phydev, 2041 unsigned int b) 2042 { 2043 struct phy_package_shared *shared = phydev->shared; 2044 2045 if (!shared) 2046 return false; 2047 2048 return !test_and_set_bit(b, &shared->flags); 2049 } 2050 2051 static inline bool phy_package_init_once(struct phy_device *phydev) 2052 { 2053 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2054 } 2055 2056 static inline bool phy_package_probe_once(struct phy_device *phydev) 2057 { 2058 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2059 } 2060 2061 extern struct bus_type mdio_bus_type; 2062 2063 struct mdio_board_info { 2064 const char *bus_id; 2065 char modalias[MDIO_NAME_SIZE]; 2066 int mdio_addr; 2067 const void *platform_data; 2068 }; 2069 2070 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2071 int mdiobus_register_board_info(const struct mdio_board_info *info, 2072 unsigned int n); 2073 #else 2074 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2075 unsigned int n) 2076 { 2077 return 0; 2078 } 2079 #endif 2080 2081 2082 /** 2083 * phy_module_driver() - Helper macro for registering PHY drivers 2084 * @__phy_drivers: array of PHY drivers to register 2085 * @__count: Numbers of members in array 2086 * 2087 * Helper macro for PHY drivers which do not do anything special in module 2088 * init/exit. Each module may only use this macro once, and calling it 2089 * replaces module_init() and module_exit(). 2090 */ 2091 #define phy_module_driver(__phy_drivers, __count) \ 2092 static int __init phy_module_init(void) \ 2093 { \ 2094 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2095 } \ 2096 module_init(phy_module_init); \ 2097 static void __exit phy_module_exit(void) \ 2098 { \ 2099 phy_drivers_unregister(__phy_drivers, __count); \ 2100 } \ 2101 module_exit(phy_module_exit) 2102 2103 #define module_phy_driver(__phy_drivers) \ 2104 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2105 2106 bool phy_driver_is_genphy(struct phy_device *phydev); 2107 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2108 2109 #endif /* __PHY_H */ 2110