1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 35 SUPPORTED_TP | \ 36 SUPPORTED_MII) 37 38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 39 SUPPORTED_10baseT_Full) 40 41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 42 SUPPORTED_100baseT_Full) 43 44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 45 SUPPORTED_1000baseT_Full) 46 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 57 58 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 59 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 60 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 61 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 62 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 63 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 64 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 65 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 66 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 67 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 68 69 extern const int phy_basic_ports_array[3]; 70 extern const int phy_fibre_port_array[1]; 71 extern const int phy_all_ports_features_array[7]; 72 extern const int phy_10_100_features_array[4]; 73 extern const int phy_basic_t1_features_array[3]; 74 extern const int phy_basic_t1s_p2mp_features_array[2]; 75 extern const int phy_gbit_features_array[2]; 76 extern const int phy_10gbit_features_array[1]; 77 78 /* 79 * Set phydev->irq to PHY_POLL if interrupts are not supported, 80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 81 * the attached MAC driver handles the interrupt 82 */ 83 #define PHY_POLL -1 84 #define PHY_MAC_INTERRUPT -2 85 86 #define PHY_IS_INTERNAL 0x00000001 87 #define PHY_RST_AFTER_CLK_EN 0x00000002 88 #define PHY_POLL_CABLE_TEST 0x00000004 89 #define MDIO_DEVICE_IS_PHY 0x80000000 90 91 /** 92 * enum phy_interface_t - Interface Mode definitions 93 * 94 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 95 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 96 * @PHY_INTERFACE_MODE_MII: Media-independent interface 97 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 98 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 99 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 100 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 101 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 102 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 103 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 104 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 105 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 106 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 107 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 108 * @PHY_INTERFACE_MODE_SMII: Serial MII 109 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 110 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 111 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 112 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 113 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 114 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 115 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 116 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 117 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 118 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 119 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 120 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 121 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 122 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 123 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 124 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 125 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 126 * @PHY_INTERFACE_MODE_MAX: Book keeping 127 * 128 * Describes the interface between the MAC and PHY. 129 */ 130 typedef enum { 131 PHY_INTERFACE_MODE_NA, 132 PHY_INTERFACE_MODE_INTERNAL, 133 PHY_INTERFACE_MODE_MII, 134 PHY_INTERFACE_MODE_GMII, 135 PHY_INTERFACE_MODE_SGMII, 136 PHY_INTERFACE_MODE_TBI, 137 PHY_INTERFACE_MODE_REVMII, 138 PHY_INTERFACE_MODE_RMII, 139 PHY_INTERFACE_MODE_REVRMII, 140 PHY_INTERFACE_MODE_RGMII, 141 PHY_INTERFACE_MODE_RGMII_ID, 142 PHY_INTERFACE_MODE_RGMII_RXID, 143 PHY_INTERFACE_MODE_RGMII_TXID, 144 PHY_INTERFACE_MODE_RTBI, 145 PHY_INTERFACE_MODE_SMII, 146 PHY_INTERFACE_MODE_XGMII, 147 PHY_INTERFACE_MODE_XLGMII, 148 PHY_INTERFACE_MODE_MOCA, 149 PHY_INTERFACE_MODE_QSGMII, 150 PHY_INTERFACE_MODE_TRGMII, 151 PHY_INTERFACE_MODE_100BASEX, 152 PHY_INTERFACE_MODE_1000BASEX, 153 PHY_INTERFACE_MODE_2500BASEX, 154 PHY_INTERFACE_MODE_5GBASER, 155 PHY_INTERFACE_MODE_RXAUI, 156 PHY_INTERFACE_MODE_XAUI, 157 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 158 PHY_INTERFACE_MODE_10GBASER, 159 PHY_INTERFACE_MODE_25GBASER, 160 PHY_INTERFACE_MODE_USXGMII, 161 /* 10GBASE-KR - with Clause 73 AN */ 162 PHY_INTERFACE_MODE_10GKR, 163 PHY_INTERFACE_MODE_QUSGMII, 164 PHY_INTERFACE_MODE_1000BASEKX, 165 PHY_INTERFACE_MODE_MAX, 166 } phy_interface_t; 167 168 /* PHY interface mode bitmap handling */ 169 #define DECLARE_PHY_INTERFACE_MASK(name) \ 170 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 171 172 static inline void phy_interface_zero(unsigned long *intf) 173 { 174 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 175 } 176 177 static inline bool phy_interface_empty(const unsigned long *intf) 178 { 179 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 180 } 181 182 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 183 const unsigned long *b) 184 { 185 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 186 } 187 188 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 189 const unsigned long *b) 190 { 191 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 192 } 193 194 static inline void phy_interface_set_rgmii(unsigned long *intf) 195 { 196 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 197 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 198 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 199 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 200 } 201 202 /* 203 * phy_supported_speeds - return all speeds currently supported by a PHY device 204 */ 205 unsigned int phy_supported_speeds(struct phy_device *phy, 206 unsigned int *speeds, 207 unsigned int size); 208 209 /** 210 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 211 * @interface: enum phy_interface_t value 212 * 213 * Description: maps enum &phy_interface_t defined in this file 214 * into the device tree binding of 'phy-mode', so that Ethernet 215 * device driver can get PHY interface from device tree. 216 */ 217 static inline const char *phy_modes(phy_interface_t interface) 218 { 219 switch (interface) { 220 case PHY_INTERFACE_MODE_NA: 221 return ""; 222 case PHY_INTERFACE_MODE_INTERNAL: 223 return "internal"; 224 case PHY_INTERFACE_MODE_MII: 225 return "mii"; 226 case PHY_INTERFACE_MODE_GMII: 227 return "gmii"; 228 case PHY_INTERFACE_MODE_SGMII: 229 return "sgmii"; 230 case PHY_INTERFACE_MODE_TBI: 231 return "tbi"; 232 case PHY_INTERFACE_MODE_REVMII: 233 return "rev-mii"; 234 case PHY_INTERFACE_MODE_RMII: 235 return "rmii"; 236 case PHY_INTERFACE_MODE_REVRMII: 237 return "rev-rmii"; 238 case PHY_INTERFACE_MODE_RGMII: 239 return "rgmii"; 240 case PHY_INTERFACE_MODE_RGMII_ID: 241 return "rgmii-id"; 242 case PHY_INTERFACE_MODE_RGMII_RXID: 243 return "rgmii-rxid"; 244 case PHY_INTERFACE_MODE_RGMII_TXID: 245 return "rgmii-txid"; 246 case PHY_INTERFACE_MODE_RTBI: 247 return "rtbi"; 248 case PHY_INTERFACE_MODE_SMII: 249 return "smii"; 250 case PHY_INTERFACE_MODE_XGMII: 251 return "xgmii"; 252 case PHY_INTERFACE_MODE_XLGMII: 253 return "xlgmii"; 254 case PHY_INTERFACE_MODE_MOCA: 255 return "moca"; 256 case PHY_INTERFACE_MODE_QSGMII: 257 return "qsgmii"; 258 case PHY_INTERFACE_MODE_TRGMII: 259 return "trgmii"; 260 case PHY_INTERFACE_MODE_1000BASEX: 261 return "1000base-x"; 262 case PHY_INTERFACE_MODE_1000BASEKX: 263 return "1000base-kx"; 264 case PHY_INTERFACE_MODE_2500BASEX: 265 return "2500base-x"; 266 case PHY_INTERFACE_MODE_5GBASER: 267 return "5gbase-r"; 268 case PHY_INTERFACE_MODE_RXAUI: 269 return "rxaui"; 270 case PHY_INTERFACE_MODE_XAUI: 271 return "xaui"; 272 case PHY_INTERFACE_MODE_10GBASER: 273 return "10gbase-r"; 274 case PHY_INTERFACE_MODE_25GBASER: 275 return "25gbase-r"; 276 case PHY_INTERFACE_MODE_USXGMII: 277 return "usxgmii"; 278 case PHY_INTERFACE_MODE_10GKR: 279 return "10gbase-kr"; 280 case PHY_INTERFACE_MODE_100BASEX: 281 return "100base-x"; 282 case PHY_INTERFACE_MODE_QUSGMII: 283 return "qusgmii"; 284 default: 285 return "unknown"; 286 } 287 } 288 289 #define PHY_INIT_TIMEOUT 100000 290 #define PHY_FORCE_TIMEOUT 10 291 292 #define PHY_MAX_ADDR 32 293 294 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 295 #define PHY_ID_FMT "%s:%02x" 296 297 #define MII_BUS_ID_SIZE 61 298 299 struct device; 300 struct phylink; 301 struct sfp_bus; 302 struct sfp_upstream_ops; 303 struct sk_buff; 304 305 /** 306 * struct mdio_bus_stats - Statistics counters for MDIO busses 307 * @transfers: Total number of transfers, i.e. @writes + @reads 308 * @errors: Number of MDIO transfers that returned an error 309 * @writes: Number of write transfers 310 * @reads: Number of read transfers 311 * @syncp: Synchronisation for incrementing statistics 312 */ 313 struct mdio_bus_stats { 314 u64_stats_t transfers; 315 u64_stats_t errors; 316 u64_stats_t writes; 317 u64_stats_t reads; 318 /* Must be last, add new statistics above */ 319 struct u64_stats_sync syncp; 320 }; 321 322 /** 323 * struct phy_package_shared - Shared information in PHY packages 324 * @addr: Common PHY address used to combine PHYs in one package 325 * @refcnt: Number of PHYs connected to this shared data 326 * @flags: Initialization of PHY package 327 * @priv_size: Size of the shared private data @priv 328 * @priv: Driver private data shared across a PHY package 329 * 330 * Represents a shared structure between different phydev's in the same 331 * package, for example a quad PHY. See phy_package_join() and 332 * phy_package_leave(). 333 */ 334 struct phy_package_shared { 335 int addr; 336 refcount_t refcnt; 337 unsigned long flags; 338 size_t priv_size; 339 340 /* private data pointer */ 341 /* note that this pointer is shared between different phydevs and 342 * the user has to take care of appropriate locking. It is allocated 343 * and freed automatically by phy_package_join() and 344 * phy_package_leave(). 345 */ 346 void *priv; 347 }; 348 349 /* used as bit number in atomic bitops */ 350 #define PHY_SHARED_F_INIT_DONE 0 351 #define PHY_SHARED_F_PROBE_DONE 1 352 353 /** 354 * struct mii_bus - Represents an MDIO bus 355 * 356 * @owner: Who owns this device 357 * @name: User friendly name for this MDIO device, or driver name 358 * @id: Unique identifier for this bus, typical from bus hierarchy 359 * @priv: Driver private data 360 * 361 * The Bus class for PHYs. Devices which provide access to 362 * PHYs should register using this structure 363 */ 364 struct mii_bus { 365 struct module *owner; 366 const char *name; 367 char id[MII_BUS_ID_SIZE]; 368 void *priv; 369 /** @read: Perform a read transfer on the bus */ 370 int (*read)(struct mii_bus *bus, int addr, int regnum); 371 /** @write: Perform a write transfer on the bus */ 372 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 373 /** @read_c45: Perform a C45 read transfer on the bus */ 374 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 375 /** @write_c45: Perform a C45 write transfer on the bus */ 376 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 377 int regnum, u16 val); 378 /** @reset: Perform a reset of the bus */ 379 int (*reset)(struct mii_bus *bus); 380 381 /** @stats: Statistic counters per device on the bus */ 382 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 383 384 /** 385 * @mdio_lock: A lock to ensure that only one thing can read/write 386 * the MDIO bus at a time 387 */ 388 struct mutex mdio_lock; 389 390 /** @parent: Parent device of this bus */ 391 struct device *parent; 392 /** @state: State of bus structure */ 393 enum { 394 MDIOBUS_ALLOCATED = 1, 395 MDIOBUS_REGISTERED, 396 MDIOBUS_UNREGISTERED, 397 MDIOBUS_RELEASED, 398 } state; 399 400 /** @dev: Kernel device representation */ 401 struct device dev; 402 403 /** @mdio_map: list of all MDIO devices on bus */ 404 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 405 406 /** @phy_mask: PHY addresses to be ignored when probing */ 407 u32 phy_mask; 408 409 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 410 u32 phy_ignore_ta_mask; 411 412 /** 413 * @irq: An array of interrupts, each PHY's interrupt at the index 414 * matching its address 415 */ 416 int irq[PHY_MAX_ADDR]; 417 418 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 419 int reset_delay_us; 420 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 421 int reset_post_delay_us; 422 /** @reset_gpiod: Reset GPIO descriptor pointer */ 423 struct gpio_desc *reset_gpiod; 424 425 /** @shared_lock: protect access to the shared element */ 426 struct mutex shared_lock; 427 428 /** @shared: shared state across different PHYs */ 429 struct phy_package_shared *shared[PHY_MAX_ADDR]; 430 }; 431 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 432 433 struct mii_bus *mdiobus_alloc_size(size_t size); 434 435 /** 436 * mdiobus_alloc - Allocate an MDIO bus structure 437 * 438 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 439 * for the driver to register the bus. 440 */ 441 static inline struct mii_bus *mdiobus_alloc(void) 442 { 443 return mdiobus_alloc_size(0); 444 } 445 446 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 447 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 448 struct module *owner); 449 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 450 #define devm_mdiobus_register(dev, bus) \ 451 __devm_mdiobus_register(dev, bus, THIS_MODULE) 452 453 void mdiobus_unregister(struct mii_bus *bus); 454 void mdiobus_free(struct mii_bus *bus); 455 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 456 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 457 { 458 return devm_mdiobus_alloc_size(dev, 0); 459 } 460 461 struct mii_bus *mdio_find_bus(const char *mdio_name); 462 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 463 464 #define PHY_INTERRUPT_DISABLED false 465 #define PHY_INTERRUPT_ENABLED true 466 467 /** 468 * enum phy_state - PHY state machine states: 469 * 470 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 471 * should be called if and only if the PHY is in this state, 472 * given that the PHY device exists. 473 * - PHY driver probe function will set the state to @PHY_READY 474 * 475 * @PHY_READY: PHY is ready to send and receive packets, but the 476 * controller is not. By default, PHYs which do not implement 477 * probe will be set to this state by phy_probe(). 478 * - start will set the state to UP 479 * 480 * @PHY_UP: The PHY and attached device are ready to do work. 481 * Interrupts should be started here. 482 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 483 * 484 * @PHY_NOLINK: PHY is up, but not currently plugged in. 485 * - irq or timer will set @PHY_RUNNING if link comes back 486 * - phy_stop moves to @PHY_HALTED 487 * 488 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 489 * and/or receiving packets 490 * - irq or timer will set @PHY_NOLINK if link goes down 491 * - phy_stop moves to @PHY_HALTED 492 * 493 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 494 * is not expected to work, carrier will be indicated as down. PHY will be 495 * poll once per second, or on interrupt for it current state. 496 * Once complete, move to UP to restart the PHY. 497 * - phy_stop aborts the running test and moves to @PHY_HALTED 498 * 499 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 500 * PHY is in an error state. 501 * - phy_start moves to @PHY_UP 502 */ 503 enum phy_state { 504 PHY_DOWN = 0, 505 PHY_READY, 506 PHY_HALTED, 507 PHY_UP, 508 PHY_RUNNING, 509 PHY_NOLINK, 510 PHY_CABLETEST, 511 }; 512 513 #define MDIO_MMD_NUM 32 514 515 /** 516 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 517 * @devices_in_package: IEEE 802.3 devices in package register value. 518 * @mmds_present: bit vector of MMDs present. 519 * @device_ids: The device identifer for each present device. 520 */ 521 struct phy_c45_device_ids { 522 u32 devices_in_package; 523 u32 mmds_present; 524 u32 device_ids[MDIO_MMD_NUM]; 525 }; 526 527 struct macsec_context; 528 struct macsec_ops; 529 530 /** 531 * struct phy_device - An instance of a PHY 532 * 533 * @mdio: MDIO bus this PHY is on 534 * @drv: Pointer to the driver for this PHY instance 535 * @devlink: Create a link between phy dev and mac dev, if the external phy 536 * used by current mac interface is managed by another mac interface. 537 * @phy_id: UID for this device found during discovery 538 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 539 * @is_c45: Set to true if this PHY uses clause 45 addressing. 540 * @is_internal: Set to true if this PHY is internal to a MAC. 541 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 542 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 543 * @has_fixups: Set to true if this PHY has fixups/quirks. 544 * @suspended: Set to true if this PHY has been suspended successfully. 545 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 546 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 547 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 548 * @downshifted_rate: Set true if link speed has been downshifted. 549 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 550 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 551 * @state: State of the PHY for management purposes 552 * @dev_flags: Device-specific flags used by the PHY driver. 553 * 554 * - Bits [15:0] are free to use by the PHY driver to communicate 555 * driver specific behavior. 556 * - Bits [23:16] are currently reserved for future use. 557 * - Bits [31:24] are reserved for defining generic 558 * PHY driver behavior. 559 * @irq: IRQ number of the PHY's interrupt (-1 if none) 560 * @phy_timer: The timer for handling the state machine 561 * @phylink: Pointer to phylink instance for this PHY 562 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 563 * @sfp_bus: SFP bus attached to this PHY's fiber port 564 * @attached_dev: The attached enet driver's device instance ptr 565 * @adjust_link: Callback for the enet controller to respond to changes: in the 566 * link state. 567 * @phy_link_change: Callback for phylink for notification of link change 568 * @macsec_ops: MACsec offloading ops. 569 * 570 * @speed: Current link speed 571 * @duplex: Current duplex 572 * @port: Current port 573 * @pause: Current pause 574 * @asym_pause: Current asymmetric pause 575 * @supported: Combined MAC/PHY supported linkmodes 576 * @advertising: Currently advertised linkmodes 577 * @adv_old: Saved advertised while power saving for WoL 578 * @supported_eee: supported PHY EEE linkmodes 579 * @advertising_eee: Currently advertised EEE linkmodes 580 * @eee_enabled: Flag indicating whether the EEE feature is enabled 581 * @lp_advertising: Current link partner advertised linkmodes 582 * @host_interfaces: PHY interface modes supported by host 583 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 584 * @autoneg: Flag autoneg being used 585 * @rate_matching: Current rate matching mode 586 * @link: Current link state 587 * @autoneg_complete: Flag auto negotiation of the link has completed 588 * @mdix: Current crossover 589 * @mdix_ctrl: User setting of crossover 590 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 591 * @interrupts: Flag interrupts have been enabled 592 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 593 * handling shall be postponed until PHY has resumed 594 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 595 * requiring a rerun of the interrupt handler after resume 596 * @interface: enum phy_interface_t value 597 * @skb: Netlink message for cable diagnostics 598 * @nest: Netlink nest used for cable diagnostics 599 * @ehdr: nNtlink header for cable diagnostics 600 * @phy_led_triggers: Array of LED triggers 601 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 602 * @led_link_trigger: LED trigger for link up/down 603 * @last_triggered: last LED trigger for link speed 604 * @leds: list of PHY LED structures 605 * @master_slave_set: User requested master/slave configuration 606 * @master_slave_get: Current master/slave advertisement 607 * @master_slave_state: Current master/slave configuration 608 * @mii_ts: Pointer to time stamper callbacks 609 * @psec: Pointer to Power Sourcing Equipment control struct 610 * @lock: Mutex for serialization access to PHY 611 * @state_queue: Work queue for state machine 612 * @link_down_events: Number of times link was lost 613 * @shared: Pointer to private data shared by phys in one package 614 * @priv: Pointer to driver private data 615 * 616 * interrupts currently only supports enabled or disabled, 617 * but could be changed in the future to support enabling 618 * and disabling specific interrupts 619 * 620 * Contains some infrastructure for polling and interrupt 621 * handling, as well as handling shifts in PHY hardware state 622 */ 623 struct phy_device { 624 struct mdio_device mdio; 625 626 /* Information about the PHY type */ 627 /* And management functions */ 628 struct phy_driver *drv; 629 630 struct device_link *devlink; 631 632 u32 phy_id; 633 634 struct phy_c45_device_ids c45_ids; 635 unsigned is_c45:1; 636 unsigned is_internal:1; 637 unsigned is_pseudo_fixed_link:1; 638 unsigned is_gigabit_capable:1; 639 unsigned has_fixups:1; 640 unsigned suspended:1; 641 unsigned suspended_by_mdio_bus:1; 642 unsigned sysfs_links:1; 643 unsigned loopback_enabled:1; 644 unsigned downshifted_rate:1; 645 unsigned is_on_sfp_module:1; 646 unsigned mac_managed_pm:1; 647 648 unsigned autoneg:1; 649 /* The most recently read link state */ 650 unsigned link:1; 651 unsigned autoneg_complete:1; 652 653 /* Interrupts are enabled */ 654 unsigned interrupts:1; 655 unsigned irq_suspended:1; 656 unsigned irq_rerun:1; 657 658 int rate_matching; 659 660 enum phy_state state; 661 662 u32 dev_flags; 663 664 phy_interface_t interface; 665 666 /* 667 * forced speed & duplex (no autoneg) 668 * partner speed & duplex & pause (autoneg) 669 */ 670 int speed; 671 int duplex; 672 int port; 673 int pause; 674 int asym_pause; 675 u8 master_slave_get; 676 u8 master_slave_set; 677 u8 master_slave_state; 678 679 /* Union of PHY and Attached devices' supported link modes */ 680 /* See ethtool.h for more info */ 681 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 682 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 683 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 684 /* used with phy_speed_down */ 685 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 686 /* used for eee validation */ 687 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 688 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 689 bool eee_enabled; 690 691 /* Host supported PHY interface types. Should be ignored if empty. */ 692 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 693 694 /* Energy efficient ethernet modes which should be prohibited */ 695 u32 eee_broken_modes; 696 697 #ifdef CONFIG_LED_TRIGGER_PHY 698 struct phy_led_trigger *phy_led_triggers; 699 unsigned int phy_num_led_triggers; 700 struct phy_led_trigger *last_triggered; 701 702 struct phy_led_trigger *led_link_trigger; 703 #endif 704 struct list_head leds; 705 706 /* 707 * Interrupt number for this PHY 708 * -1 means no interrupt 709 */ 710 int irq; 711 712 /* private data pointer */ 713 /* For use by PHYs to maintain extra state */ 714 void *priv; 715 716 /* shared data pointer */ 717 /* For use by PHYs inside the same package that need a shared state. */ 718 struct phy_package_shared *shared; 719 720 /* Reporting cable test results */ 721 struct sk_buff *skb; 722 void *ehdr; 723 struct nlattr *nest; 724 725 /* Interrupt and Polling infrastructure */ 726 struct delayed_work state_queue; 727 728 struct mutex lock; 729 730 /* This may be modified under the rtnl lock */ 731 bool sfp_bus_attached; 732 struct sfp_bus *sfp_bus; 733 struct phylink *phylink; 734 struct net_device *attached_dev; 735 struct mii_timestamper *mii_ts; 736 struct pse_control *psec; 737 738 u8 mdix; 739 u8 mdix_ctrl; 740 741 int pma_extable; 742 743 unsigned int link_down_events; 744 745 void (*phy_link_change)(struct phy_device *phydev, bool up); 746 void (*adjust_link)(struct net_device *dev); 747 748 #if IS_ENABLED(CONFIG_MACSEC) 749 /* MACsec management functions */ 750 const struct macsec_ops *macsec_ops; 751 #endif 752 }; 753 754 /* Generic phy_device::dev_flags */ 755 #define PHY_F_NO_IRQ 0x80000000 756 757 static inline struct phy_device *to_phy_device(const struct device *dev) 758 { 759 return container_of(to_mdio_device(dev), struct phy_device, mdio); 760 } 761 762 /** 763 * struct phy_tdr_config - Configuration of a TDR raw test 764 * 765 * @first: Distance for first data collection point 766 * @last: Distance for last data collection point 767 * @step: Step between data collection points 768 * @pair: Bitmap of cable pairs to collect data for 769 * 770 * A structure containing possible configuration parameters 771 * for a TDR cable test. The driver does not need to implement 772 * all the parameters, but should report what is actually used. 773 * All distances are in centimeters. 774 */ 775 struct phy_tdr_config { 776 u32 first; 777 u32 last; 778 u32 step; 779 s8 pair; 780 }; 781 #define PHY_PAIR_ALL -1 782 783 /** 784 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 785 * Avoidance) Reconciliation Sublayer. 786 * 787 * @version: read-only PLCA register map version. -1 = not available. Ignored 788 * when setting the configuration. Format is the same as reported by the PLCA 789 * IDVER register (31.CA00). -1 = not available. 790 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 791 * set. 0 = disabled, anything else = enabled. 792 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 793 * Allowed values [0 .. 254]. 255 = node disabled. 794 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 795 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 796 * set. Allowed values [1 .. 255]. 797 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 798 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 799 * more details. The to_timer shall be set equal over all nodes. 800 * -1 = not available / don't set. Allowed values [0 .. 255]. 801 * @burst_cnt: controls how many additional frames a node is allowed to send in 802 * single transmit opportunity (TO). The default value of 0 means that the 803 * node is allowed exactly one frame per TO. A value of 1 allows two frames 804 * per TO, and so on. -1 = not available / don't set. 805 * Allowed values [0 .. 255]. 806 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 807 * frame before interrupting the burst. This value should be set to a value 808 * greater than the MAC inter-packet gap (which is typically 96 bits). 809 * -1 = not available / don't set. Allowed values [0 .. 255]. 810 * 811 * A structure containing configuration parameters for setting/getting the PLCA 812 * RS configuration. The driver does not need to implement all the parameters, 813 * but should report what is actually used. 814 */ 815 struct phy_plca_cfg { 816 int version; 817 int enabled; 818 int node_id; 819 int node_cnt; 820 int to_tmr; 821 int burst_cnt; 822 int burst_tmr; 823 }; 824 825 /** 826 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 827 * Avoidance) Reconciliation Sublayer. 828 * 829 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 830 * register(31.CA03), indicating BEACON activity. 831 * 832 * A structure containing status information of the PLCA RS configuration. 833 * The driver does not need to implement all the parameters, but should report 834 * what is actually used. 835 */ 836 struct phy_plca_status { 837 bool pst; 838 }; 839 840 /** 841 * struct phy_led: An LED driven by the PHY 842 * 843 * @list: List of LEDs 844 * @phydev: PHY this LED is attached to 845 * @led_cdev: Standard LED class structure 846 * @index: Number of the LED 847 */ 848 struct phy_led { 849 struct list_head list; 850 struct phy_device *phydev; 851 struct led_classdev led_cdev; 852 u8 index; 853 }; 854 855 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 856 857 /** 858 * struct phy_driver - Driver structure for a particular PHY type 859 * 860 * @mdiodrv: Data common to all MDIO devices 861 * @phy_id: The result of reading the UID registers of this PHY 862 * type, and ANDing them with the phy_id_mask. This driver 863 * only works for PHYs with IDs which match this field 864 * @name: The friendly name of this PHY type 865 * @phy_id_mask: Defines the important bits of the phy_id 866 * @features: A mandatory list of features (speed, duplex, etc) 867 * supported by this PHY 868 * @flags: A bitfield defining certain other features this PHY 869 * supports (like interrupts) 870 * @driver_data: Static driver data 871 * 872 * All functions are optional. If config_aneg or read_status 873 * are not implemented, the phy core uses the genphy versions. 874 * Note that none of these functions should be called from 875 * interrupt time. The goal is for the bus read/write functions 876 * to be able to block when the bus transaction is happening, 877 * and be freed up by an interrupt (The MPC85xx has this ability, 878 * though it is not currently supported in the driver). 879 */ 880 struct phy_driver { 881 struct mdio_driver_common mdiodrv; 882 u32 phy_id; 883 char *name; 884 u32 phy_id_mask; 885 const unsigned long * const features; 886 u32 flags; 887 const void *driver_data; 888 889 /** 890 * @soft_reset: Called to issue a PHY software reset 891 */ 892 int (*soft_reset)(struct phy_device *phydev); 893 894 /** 895 * @config_init: Called to initialize the PHY, 896 * including after a reset 897 */ 898 int (*config_init)(struct phy_device *phydev); 899 900 /** 901 * @probe: Called during discovery. Used to set 902 * up device-specific structures, if any 903 */ 904 int (*probe)(struct phy_device *phydev); 905 906 /** 907 * @get_features: Probe the hardware to determine what 908 * abilities it has. Should only set phydev->supported. 909 */ 910 int (*get_features)(struct phy_device *phydev); 911 912 /** 913 * @get_rate_matching: Get the supported type of rate matching for a 914 * particular phy interface. This is used by phy consumers to determine 915 * whether to advertise lower-speed modes for that interface. It is 916 * assumed that if a rate matching mode is supported on an interface, 917 * then that interface's rate can be adapted to all slower link speeds 918 * supported by the phy. If the interface is not supported, this should 919 * return %RATE_MATCH_NONE. 920 */ 921 int (*get_rate_matching)(struct phy_device *phydev, 922 phy_interface_t iface); 923 924 /* PHY Power Management */ 925 /** @suspend: Suspend the hardware, saving state if needed */ 926 int (*suspend)(struct phy_device *phydev); 927 /** @resume: Resume the hardware, restoring state if needed */ 928 int (*resume)(struct phy_device *phydev); 929 930 /** 931 * @config_aneg: Configures the advertisement and resets 932 * autonegotiation if phydev->autoneg is on, 933 * forces the speed to the current settings in phydev 934 * if phydev->autoneg is off 935 */ 936 int (*config_aneg)(struct phy_device *phydev); 937 938 /** @aneg_done: Determines the auto negotiation result */ 939 int (*aneg_done)(struct phy_device *phydev); 940 941 /** @read_status: Determines the negotiated speed and duplex */ 942 int (*read_status)(struct phy_device *phydev); 943 944 /** 945 * @config_intr: Enables or disables interrupts. 946 * It should also clear any pending interrupts prior to enabling the 947 * IRQs and after disabling them. 948 */ 949 int (*config_intr)(struct phy_device *phydev); 950 951 /** @handle_interrupt: Override default interrupt handling */ 952 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 953 954 /** @remove: Clears up any memory if needed */ 955 void (*remove)(struct phy_device *phydev); 956 957 /** 958 * @match_phy_device: Returns true if this is a suitable 959 * driver for the given phydev. If NULL, matching is based on 960 * phy_id and phy_id_mask. 961 */ 962 int (*match_phy_device)(struct phy_device *phydev); 963 964 /** 965 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 966 * register changes to enable Wake on LAN, so set_wol is 967 * provided to be called in the ethernet driver's set_wol 968 * function. 969 */ 970 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 971 972 /** 973 * @get_wol: See set_wol, but for checking whether Wake on LAN 974 * is enabled. 975 */ 976 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 977 978 /** 979 * @link_change_notify: Called to inform a PHY device driver 980 * when the core is about to change the link state. This 981 * callback is supposed to be used as fixup hook for drivers 982 * that need to take action when the link state 983 * changes. Drivers are by no means allowed to mess with the 984 * PHY device structure in their implementations. 985 */ 986 void (*link_change_notify)(struct phy_device *dev); 987 988 /** 989 * @read_mmd: PHY specific driver override for reading a MMD 990 * register. This function is optional for PHY specific 991 * drivers. When not provided, the default MMD read function 992 * will be used by phy_read_mmd(), which will use either a 993 * direct read for Clause 45 PHYs or an indirect read for 994 * Clause 22 PHYs. devnum is the MMD device number within the 995 * PHY device, regnum is the register within the selected MMD 996 * device. 997 */ 998 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 999 1000 /** 1001 * @write_mmd: PHY specific driver override for writing a MMD 1002 * register. This function is optional for PHY specific 1003 * drivers. When not provided, the default MMD write function 1004 * will be used by phy_write_mmd(), which will use either a 1005 * direct write for Clause 45 PHYs, or an indirect write for 1006 * Clause 22 PHYs. devnum is the MMD device number within the 1007 * PHY device, regnum is the register within the selected MMD 1008 * device. val is the value to be written. 1009 */ 1010 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1011 u16 val); 1012 1013 /** @read_page: Return the current PHY register page number */ 1014 int (*read_page)(struct phy_device *dev); 1015 /** @write_page: Set the current PHY register page number */ 1016 int (*write_page)(struct phy_device *dev, int page); 1017 1018 /** 1019 * @module_info: Get the size and type of the eeprom contained 1020 * within a plug-in module 1021 */ 1022 int (*module_info)(struct phy_device *dev, 1023 struct ethtool_modinfo *modinfo); 1024 1025 /** 1026 * @module_eeprom: Get the eeprom information from the plug-in 1027 * module 1028 */ 1029 int (*module_eeprom)(struct phy_device *dev, 1030 struct ethtool_eeprom *ee, u8 *data); 1031 1032 /** @cable_test_start: Start a cable test */ 1033 int (*cable_test_start)(struct phy_device *dev); 1034 1035 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1036 int (*cable_test_tdr_start)(struct phy_device *dev, 1037 const struct phy_tdr_config *config); 1038 1039 /** 1040 * @cable_test_get_status: Once per second, or on interrupt, 1041 * request the status of the test. 1042 */ 1043 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1044 1045 /* Get statistics from the PHY using ethtool */ 1046 /** @get_sset_count: Number of statistic counters */ 1047 int (*get_sset_count)(struct phy_device *dev); 1048 /** @get_strings: Names of the statistic counters */ 1049 void (*get_strings)(struct phy_device *dev, u8 *data); 1050 /** @get_stats: Return the statistic counter values */ 1051 void (*get_stats)(struct phy_device *dev, 1052 struct ethtool_stats *stats, u64 *data); 1053 1054 /* Get and Set PHY tunables */ 1055 /** @get_tunable: Return the value of a tunable */ 1056 int (*get_tunable)(struct phy_device *dev, 1057 struct ethtool_tunable *tuna, void *data); 1058 /** @set_tunable: Set the value of a tunable */ 1059 int (*set_tunable)(struct phy_device *dev, 1060 struct ethtool_tunable *tuna, 1061 const void *data); 1062 /** @set_loopback: Set the loopback mood of the PHY */ 1063 int (*set_loopback)(struct phy_device *dev, bool enable); 1064 /** @get_sqi: Get the signal quality indication */ 1065 int (*get_sqi)(struct phy_device *dev); 1066 /** @get_sqi_max: Get the maximum signal quality indication */ 1067 int (*get_sqi_max)(struct phy_device *dev); 1068 1069 /* PLCA RS interface */ 1070 /** @get_plca_cfg: Return the current PLCA configuration */ 1071 int (*get_plca_cfg)(struct phy_device *dev, 1072 struct phy_plca_cfg *plca_cfg); 1073 /** @set_plca_cfg: Set the PLCA configuration */ 1074 int (*set_plca_cfg)(struct phy_device *dev, 1075 const struct phy_plca_cfg *plca_cfg); 1076 /** @get_plca_status: Return the current PLCA status info */ 1077 int (*get_plca_status)(struct phy_device *dev, 1078 struct phy_plca_status *plca_st); 1079 1080 /** 1081 * @led_brightness_set: Set a PHY LED brightness. Index 1082 * indicates which of the PHYs led should be set. Value 1083 * follows the standard LED class meaning, e.g. LED_OFF, 1084 * LED_HALF, LED_FULL. 1085 */ 1086 int (*led_brightness_set)(struct phy_device *dev, 1087 u8 index, enum led_brightness value); 1088 1089 /** 1090 * @led_blink_set: Set a PHY LED brightness. Index indicates 1091 * which of the PHYs led should be configured to blink. Delays 1092 * are in milliseconds and if both are zero then a sensible 1093 * default should be chosen. The call should adjust the 1094 * timings in that case and if it can't match the values 1095 * specified exactly. 1096 */ 1097 int (*led_blink_set)(struct phy_device *dev, u8 index, 1098 unsigned long *delay_on, 1099 unsigned long *delay_off); 1100 }; 1101 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1102 struct phy_driver, mdiodrv) 1103 1104 #define PHY_ANY_ID "MATCH ANY PHY" 1105 #define PHY_ANY_UID 0xffffffff 1106 1107 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1108 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1109 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1110 1111 /* A Structure for boards to register fixups with the PHY Lib */ 1112 struct phy_fixup { 1113 struct list_head list; 1114 char bus_id[MII_BUS_ID_SIZE + 3]; 1115 u32 phy_uid; 1116 u32 phy_uid_mask; 1117 int (*run)(struct phy_device *phydev); 1118 }; 1119 1120 const char *phy_speed_to_str(int speed); 1121 const char *phy_duplex_to_str(unsigned int duplex); 1122 const char *phy_rate_matching_to_str(int rate_matching); 1123 1124 int phy_interface_num_ports(phy_interface_t interface); 1125 1126 /* A structure for mapping a particular speed and duplex 1127 * combination to a particular SUPPORTED and ADVERTISED value 1128 */ 1129 struct phy_setting { 1130 u32 speed; 1131 u8 duplex; 1132 u8 bit; 1133 }; 1134 1135 const struct phy_setting * 1136 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1137 bool exact); 1138 size_t phy_speeds(unsigned int *speeds, size_t size, 1139 unsigned long *mask); 1140 void of_set_phy_supported(struct phy_device *phydev); 1141 void of_set_phy_eee_broken(struct phy_device *phydev); 1142 int phy_speed_down_core(struct phy_device *phydev); 1143 1144 /** 1145 * phy_is_started - Convenience function to check whether PHY is started 1146 * @phydev: The phy_device struct 1147 */ 1148 static inline bool phy_is_started(struct phy_device *phydev) 1149 { 1150 return phydev->state >= PHY_UP; 1151 } 1152 1153 void phy_resolve_aneg_pause(struct phy_device *phydev); 1154 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1155 void phy_check_downshift(struct phy_device *phydev); 1156 1157 /** 1158 * phy_read - Convenience function for reading a given PHY register 1159 * @phydev: the phy_device struct 1160 * @regnum: register number to read 1161 * 1162 * NOTE: MUST NOT be called from interrupt context, 1163 * because the bus read/write functions may wait for an interrupt 1164 * to conclude the operation. 1165 */ 1166 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1167 { 1168 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1169 } 1170 1171 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1172 timeout_us, sleep_before_read) \ 1173 ({ \ 1174 int __ret = read_poll_timeout(phy_read, val, val < 0 || (cond), \ 1175 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1176 if (val < 0) \ 1177 __ret = val; \ 1178 if (__ret) \ 1179 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1180 __ret; \ 1181 }) 1182 1183 /** 1184 * __phy_read - convenience function for reading a given PHY register 1185 * @phydev: the phy_device struct 1186 * @regnum: register number to read 1187 * 1188 * The caller must have taken the MDIO bus lock. 1189 */ 1190 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1191 { 1192 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1193 } 1194 1195 /** 1196 * phy_write - Convenience function for writing a given PHY register 1197 * @phydev: the phy_device struct 1198 * @regnum: register number to write 1199 * @val: value to write to @regnum 1200 * 1201 * NOTE: MUST NOT be called from interrupt context, 1202 * because the bus read/write functions may wait for an interrupt 1203 * to conclude the operation. 1204 */ 1205 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1206 { 1207 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1208 } 1209 1210 /** 1211 * __phy_write - Convenience function for writing a given PHY register 1212 * @phydev: the phy_device struct 1213 * @regnum: register number to write 1214 * @val: value to write to @regnum 1215 * 1216 * The caller must have taken the MDIO bus lock. 1217 */ 1218 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1219 { 1220 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1221 val); 1222 } 1223 1224 /** 1225 * __phy_modify_changed() - Convenience function for modifying a PHY register 1226 * @phydev: a pointer to a &struct phy_device 1227 * @regnum: register number 1228 * @mask: bit mask of bits to clear 1229 * @set: bit mask of bits to set 1230 * 1231 * Unlocked helper function which allows a PHY register to be modified as 1232 * new register value = (old register value & ~mask) | set 1233 * 1234 * Returns negative errno, 0 if there was no change, and 1 in case of change 1235 */ 1236 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1237 u16 mask, u16 set) 1238 { 1239 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1240 regnum, mask, set); 1241 } 1242 1243 /* 1244 * phy_read_mmd - Convenience function for reading a register 1245 * from an MMD on a given PHY. 1246 */ 1247 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1248 1249 /** 1250 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1251 * condition is met or a timeout occurs 1252 * 1253 * @phydev: The phy_device struct 1254 * @devaddr: The MMD to read from 1255 * @regnum: The register on the MMD to read 1256 * @val: Variable to read the register into 1257 * @cond: Break condition (usually involving @val) 1258 * @sleep_us: Maximum time to sleep between reads in us (0 1259 * tight-loops). Should be less than ~20ms since usleep_range 1260 * is used (see Documentation/timers/timers-howto.rst). 1261 * @timeout_us: Timeout in us, 0 means never timeout 1262 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1263 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1264 * case, the last read value at @args is stored in @val. Must not 1265 * be called from atomic context if sleep_us or timeout_us are used. 1266 */ 1267 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1268 sleep_us, timeout_us, sleep_before_read) \ 1269 ({ \ 1270 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1271 sleep_us, timeout_us, sleep_before_read, \ 1272 phydev, devaddr, regnum); \ 1273 if (val < 0) \ 1274 __ret = val; \ 1275 if (__ret) \ 1276 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1277 __ret; \ 1278 }) 1279 1280 /* 1281 * __phy_read_mmd - Convenience function for reading a register 1282 * from an MMD on a given PHY. 1283 */ 1284 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1285 1286 /* 1287 * phy_write_mmd - Convenience function for writing a register 1288 * on an MMD on a given PHY. 1289 */ 1290 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1291 1292 /* 1293 * __phy_write_mmd - Convenience function for writing a register 1294 * on an MMD on a given PHY. 1295 */ 1296 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1297 1298 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1299 u16 set); 1300 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1301 u16 set); 1302 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1303 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1304 1305 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1306 u16 mask, u16 set); 1307 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1308 u16 mask, u16 set); 1309 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1310 u16 mask, u16 set); 1311 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1312 u16 mask, u16 set); 1313 1314 /** 1315 * __phy_set_bits - Convenience function for setting bits in a PHY register 1316 * @phydev: the phy_device struct 1317 * @regnum: register number to write 1318 * @val: bits to set 1319 * 1320 * The caller must have taken the MDIO bus lock. 1321 */ 1322 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1323 { 1324 return __phy_modify(phydev, regnum, 0, val); 1325 } 1326 1327 /** 1328 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1329 * @phydev: the phy_device struct 1330 * @regnum: register number to write 1331 * @val: bits to clear 1332 * 1333 * The caller must have taken the MDIO bus lock. 1334 */ 1335 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1336 u16 val) 1337 { 1338 return __phy_modify(phydev, regnum, val, 0); 1339 } 1340 1341 /** 1342 * phy_set_bits - Convenience function for setting bits in a PHY register 1343 * @phydev: the phy_device struct 1344 * @regnum: register number to write 1345 * @val: bits to set 1346 */ 1347 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1348 { 1349 return phy_modify(phydev, regnum, 0, val); 1350 } 1351 1352 /** 1353 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1354 * @phydev: the phy_device struct 1355 * @regnum: register number to write 1356 * @val: bits to clear 1357 */ 1358 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1359 { 1360 return phy_modify(phydev, regnum, val, 0); 1361 } 1362 1363 /** 1364 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1365 * on MMD 1366 * @phydev: the phy_device struct 1367 * @devad: the MMD containing register to modify 1368 * @regnum: register number to modify 1369 * @val: bits to set 1370 * 1371 * The caller must have taken the MDIO bus lock. 1372 */ 1373 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1374 u32 regnum, u16 val) 1375 { 1376 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1377 } 1378 1379 /** 1380 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1381 * on MMD 1382 * @phydev: the phy_device struct 1383 * @devad: the MMD containing register to modify 1384 * @regnum: register number to modify 1385 * @val: bits to clear 1386 * 1387 * The caller must have taken the MDIO bus lock. 1388 */ 1389 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1390 u32 regnum, u16 val) 1391 { 1392 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1393 } 1394 1395 /** 1396 * phy_set_bits_mmd - Convenience function for setting bits in a register 1397 * on MMD 1398 * @phydev: the phy_device struct 1399 * @devad: the MMD containing register to modify 1400 * @regnum: register number to modify 1401 * @val: bits to set 1402 */ 1403 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1404 u32 regnum, u16 val) 1405 { 1406 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1407 } 1408 1409 /** 1410 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1411 * on MMD 1412 * @phydev: the phy_device struct 1413 * @devad: the MMD containing register to modify 1414 * @regnum: register number to modify 1415 * @val: bits to clear 1416 */ 1417 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1418 u32 regnum, u16 val) 1419 { 1420 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1421 } 1422 1423 /** 1424 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1425 * @phydev: the phy_device struct 1426 * 1427 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1428 * PHY_MAC_INTERRUPT 1429 */ 1430 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1431 { 1432 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1433 } 1434 1435 /** 1436 * phy_polling_mode - Convenience function for testing whether polling is 1437 * used to detect PHY status changes 1438 * @phydev: the phy_device struct 1439 */ 1440 static inline bool phy_polling_mode(struct phy_device *phydev) 1441 { 1442 if (phydev->state == PHY_CABLETEST) 1443 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1444 return true; 1445 1446 return phydev->irq == PHY_POLL; 1447 } 1448 1449 /** 1450 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1451 * @phydev: the phy_device struct 1452 */ 1453 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1454 { 1455 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1456 } 1457 1458 /** 1459 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1460 * @phydev: the phy_device struct 1461 */ 1462 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1463 { 1464 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1465 } 1466 1467 /** 1468 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1469 * PTP hardware clock capabilities. 1470 * @phydev: the phy_device struct 1471 */ 1472 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1473 { 1474 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1475 } 1476 1477 /** 1478 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1479 * @phydev: the phy_device struct 1480 */ 1481 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1482 { 1483 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1484 } 1485 1486 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1487 { 1488 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1489 } 1490 1491 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1492 int type) 1493 { 1494 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1495 } 1496 1497 static inline int phy_ts_info(struct phy_device *phydev, 1498 struct ethtool_ts_info *tsinfo) 1499 { 1500 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1501 } 1502 1503 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1504 int type) 1505 { 1506 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1507 } 1508 1509 /** 1510 * phy_is_internal - Convenience function for testing if a PHY is internal 1511 * @phydev: the phy_device struct 1512 */ 1513 static inline bool phy_is_internal(struct phy_device *phydev) 1514 { 1515 return phydev->is_internal; 1516 } 1517 1518 /** 1519 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1520 * @phydev: the phy_device struct 1521 */ 1522 static inline bool phy_on_sfp(struct phy_device *phydev) 1523 { 1524 return phydev->is_on_sfp_module; 1525 } 1526 1527 /** 1528 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1529 * PHY interface mode is RGMII (all variants) 1530 * @mode: the &phy_interface_t enum 1531 */ 1532 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1533 { 1534 return mode >= PHY_INTERFACE_MODE_RGMII && 1535 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1536 }; 1537 1538 /** 1539 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1540 * negotiation 1541 * @mode: one of &enum phy_interface_t 1542 * 1543 * Returns true if the PHY interface mode uses the 16-bit negotiation 1544 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1545 */ 1546 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1547 { 1548 return mode == PHY_INTERFACE_MODE_1000BASEX || 1549 mode == PHY_INTERFACE_MODE_2500BASEX; 1550 } 1551 1552 /** 1553 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1554 * is RGMII (all variants) 1555 * @phydev: the phy_device struct 1556 */ 1557 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1558 { 1559 return phy_interface_mode_is_rgmii(phydev->interface); 1560 }; 1561 1562 /** 1563 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1564 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1565 * @phydev: the phy_device struct 1566 */ 1567 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1568 { 1569 return phydev->is_pseudo_fixed_link; 1570 } 1571 1572 int phy_save_page(struct phy_device *phydev); 1573 int phy_select_page(struct phy_device *phydev, int page); 1574 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1575 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1576 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1577 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1578 u16 mask, u16 set); 1579 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1580 u16 mask, u16 set); 1581 1582 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1583 bool is_c45, 1584 struct phy_c45_device_ids *c45_ids); 1585 #if IS_ENABLED(CONFIG_PHYLIB) 1586 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1587 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1588 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1589 struct phy_device *device_phy_find_device(struct device *dev); 1590 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1591 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1592 int phy_device_register(struct phy_device *phy); 1593 void phy_device_free(struct phy_device *phydev); 1594 #else 1595 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1596 { 1597 return 0; 1598 } 1599 static inline 1600 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1601 { 1602 return 0; 1603 } 1604 1605 static inline 1606 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1607 { 1608 return NULL; 1609 } 1610 1611 static inline struct phy_device *device_phy_find_device(struct device *dev) 1612 { 1613 return NULL; 1614 } 1615 1616 static inline 1617 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1618 { 1619 return NULL; 1620 } 1621 1622 static inline 1623 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1624 { 1625 return NULL; 1626 } 1627 1628 static inline int phy_device_register(struct phy_device *phy) 1629 { 1630 return 0; 1631 } 1632 1633 static inline void phy_device_free(struct phy_device *phydev) { } 1634 #endif /* CONFIG_PHYLIB */ 1635 void phy_device_remove(struct phy_device *phydev); 1636 int phy_get_c45_ids(struct phy_device *phydev); 1637 int phy_init_hw(struct phy_device *phydev); 1638 int phy_suspend(struct phy_device *phydev); 1639 int phy_resume(struct phy_device *phydev); 1640 int __phy_resume(struct phy_device *phydev); 1641 int phy_loopback(struct phy_device *phydev, bool enable); 1642 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1643 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1644 int phy_sfp_probe(struct phy_device *phydev, 1645 const struct sfp_upstream_ops *ops); 1646 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1647 phy_interface_t interface); 1648 struct phy_device *phy_find_first(struct mii_bus *bus); 1649 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1650 u32 flags, phy_interface_t interface); 1651 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1652 void (*handler)(struct net_device *), 1653 phy_interface_t interface); 1654 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1655 void (*handler)(struct net_device *), 1656 phy_interface_t interface); 1657 void phy_disconnect(struct phy_device *phydev); 1658 void phy_detach(struct phy_device *phydev); 1659 void phy_start(struct phy_device *phydev); 1660 void phy_stop(struct phy_device *phydev); 1661 int phy_config_aneg(struct phy_device *phydev); 1662 int phy_start_aneg(struct phy_device *phydev); 1663 int phy_aneg_done(struct phy_device *phydev); 1664 int phy_speed_down(struct phy_device *phydev, bool sync); 1665 int phy_speed_up(struct phy_device *phydev); 1666 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1667 1668 int phy_restart_aneg(struct phy_device *phydev); 1669 int phy_reset_after_clk_enable(struct phy_device *phydev); 1670 1671 #if IS_ENABLED(CONFIG_PHYLIB) 1672 int phy_start_cable_test(struct phy_device *phydev, 1673 struct netlink_ext_ack *extack); 1674 int phy_start_cable_test_tdr(struct phy_device *phydev, 1675 struct netlink_ext_ack *extack, 1676 const struct phy_tdr_config *config); 1677 #else 1678 static inline 1679 int phy_start_cable_test(struct phy_device *phydev, 1680 struct netlink_ext_ack *extack) 1681 { 1682 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1683 return -EOPNOTSUPP; 1684 } 1685 static inline 1686 int phy_start_cable_test_tdr(struct phy_device *phydev, 1687 struct netlink_ext_ack *extack, 1688 const struct phy_tdr_config *config) 1689 { 1690 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1691 return -EOPNOTSUPP; 1692 } 1693 #endif 1694 1695 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1696 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1697 u16 cm); 1698 1699 static inline void phy_device_reset(struct phy_device *phydev, int value) 1700 { 1701 mdio_device_reset(&phydev->mdio, value); 1702 } 1703 1704 #define phydev_err(_phydev, format, args...) \ 1705 dev_err(&_phydev->mdio.dev, format, ##args) 1706 1707 #define phydev_err_probe(_phydev, err, format, args...) \ 1708 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1709 1710 #define phydev_info(_phydev, format, args...) \ 1711 dev_info(&_phydev->mdio.dev, format, ##args) 1712 1713 #define phydev_warn(_phydev, format, args...) \ 1714 dev_warn(&_phydev->mdio.dev, format, ##args) 1715 1716 #define phydev_dbg(_phydev, format, args...) \ 1717 dev_dbg(&_phydev->mdio.dev, format, ##args) 1718 1719 static inline const char *phydev_name(const struct phy_device *phydev) 1720 { 1721 return dev_name(&phydev->mdio.dev); 1722 } 1723 1724 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1725 { 1726 mutex_lock(&phydev->mdio.bus->mdio_lock); 1727 } 1728 1729 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1730 { 1731 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1732 } 1733 1734 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1735 __printf(2, 3); 1736 char *phy_attached_info_irq(struct phy_device *phydev) 1737 __malloc; 1738 void phy_attached_info(struct phy_device *phydev); 1739 1740 /* Clause 22 PHY */ 1741 int genphy_read_abilities(struct phy_device *phydev); 1742 int genphy_setup_forced(struct phy_device *phydev); 1743 int genphy_restart_aneg(struct phy_device *phydev); 1744 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1745 int genphy_config_eee_advert(struct phy_device *phydev); 1746 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1747 int genphy_aneg_done(struct phy_device *phydev); 1748 int genphy_update_link(struct phy_device *phydev); 1749 int genphy_read_lpa(struct phy_device *phydev); 1750 int genphy_read_status_fixed(struct phy_device *phydev); 1751 int genphy_read_status(struct phy_device *phydev); 1752 int genphy_read_master_slave(struct phy_device *phydev); 1753 int genphy_suspend(struct phy_device *phydev); 1754 int genphy_resume(struct phy_device *phydev); 1755 int genphy_loopback(struct phy_device *phydev, bool enable); 1756 int genphy_soft_reset(struct phy_device *phydev); 1757 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1758 1759 static inline int genphy_config_aneg(struct phy_device *phydev) 1760 { 1761 return __genphy_config_aneg(phydev, false); 1762 } 1763 1764 static inline int genphy_no_config_intr(struct phy_device *phydev) 1765 { 1766 return 0; 1767 } 1768 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1769 u16 regnum); 1770 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1771 u16 regnum, u16 val); 1772 1773 /* Clause 37 */ 1774 int genphy_c37_config_aneg(struct phy_device *phydev); 1775 int genphy_c37_read_status(struct phy_device *phydev); 1776 1777 /* Clause 45 PHY */ 1778 int genphy_c45_restart_aneg(struct phy_device *phydev); 1779 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1780 int genphy_c45_aneg_done(struct phy_device *phydev); 1781 int genphy_c45_read_link(struct phy_device *phydev); 1782 int genphy_c45_read_lpa(struct phy_device *phydev); 1783 int genphy_c45_read_pma(struct phy_device *phydev); 1784 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1785 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1786 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1787 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1788 int genphy_c45_read_mdix(struct phy_device *phydev); 1789 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1790 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1791 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1792 int genphy_c45_read_status(struct phy_device *phydev); 1793 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1794 int genphy_c45_config_aneg(struct phy_device *phydev); 1795 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1796 int genphy_c45_pma_resume(struct phy_device *phydev); 1797 int genphy_c45_pma_suspend(struct phy_device *phydev); 1798 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1799 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1800 struct phy_plca_cfg *plca_cfg); 1801 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1802 const struct phy_plca_cfg *plca_cfg); 1803 int genphy_c45_plca_get_status(struct phy_device *phydev, 1804 struct phy_plca_status *plca_st); 1805 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1806 unsigned long *lp, bool *is_enabled); 1807 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1808 struct ethtool_eee *data); 1809 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1810 struct ethtool_eee *data); 1811 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1812 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1813 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1814 1815 /* Generic C45 PHY driver */ 1816 extern struct phy_driver genphy_c45_driver; 1817 1818 /* The gen10g_* functions are the old Clause 45 stub */ 1819 int gen10g_config_aneg(struct phy_device *phydev); 1820 1821 static inline int phy_read_status(struct phy_device *phydev) 1822 { 1823 if (!phydev->drv) 1824 return -EIO; 1825 1826 if (phydev->drv->read_status) 1827 return phydev->drv->read_status(phydev); 1828 else 1829 return genphy_read_status(phydev); 1830 } 1831 1832 void phy_driver_unregister(struct phy_driver *drv); 1833 void phy_drivers_unregister(struct phy_driver *drv, int n); 1834 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1835 int phy_drivers_register(struct phy_driver *new_driver, int n, 1836 struct module *owner); 1837 void phy_error(struct phy_device *phydev); 1838 void phy_state_machine(struct work_struct *work); 1839 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1840 void phy_trigger_machine(struct phy_device *phydev); 1841 void phy_mac_interrupt(struct phy_device *phydev); 1842 void phy_start_machine(struct phy_device *phydev); 1843 void phy_stop_machine(struct phy_device *phydev); 1844 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1845 struct ethtool_link_ksettings *cmd); 1846 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1847 const struct ethtool_link_ksettings *cmd); 1848 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1849 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1850 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1851 int phy_disable_interrupts(struct phy_device *phydev); 1852 void phy_request_interrupt(struct phy_device *phydev); 1853 void phy_free_interrupt(struct phy_device *phydev); 1854 void phy_print_status(struct phy_device *phydev); 1855 int phy_get_rate_matching(struct phy_device *phydev, 1856 phy_interface_t iface); 1857 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1858 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1859 void phy_advertise_supported(struct phy_device *phydev); 1860 void phy_support_sym_pause(struct phy_device *phydev); 1861 void phy_support_asym_pause(struct phy_device *phydev); 1862 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1863 bool autoneg); 1864 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1865 bool phy_validate_pause(struct phy_device *phydev, 1866 struct ethtool_pauseparam *pp); 1867 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1868 1869 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1870 const int *delay_values, int size, bool is_rx); 1871 1872 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1873 bool *tx_pause, bool *rx_pause); 1874 1875 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1876 int (*run)(struct phy_device *)); 1877 int phy_register_fixup_for_id(const char *bus_id, 1878 int (*run)(struct phy_device *)); 1879 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1880 int (*run)(struct phy_device *)); 1881 1882 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1883 int phy_unregister_fixup_for_id(const char *bus_id); 1884 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1885 1886 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1887 int phy_get_eee_err(struct phy_device *phydev); 1888 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1889 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1890 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1891 void phy_ethtool_get_wol(struct phy_device *phydev, 1892 struct ethtool_wolinfo *wol); 1893 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1894 struct ethtool_link_ksettings *cmd); 1895 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1896 const struct ethtool_link_ksettings *cmd); 1897 int phy_ethtool_nway_reset(struct net_device *ndev); 1898 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1899 void phy_package_leave(struct phy_device *phydev); 1900 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1901 int addr, size_t priv_size); 1902 1903 #if IS_ENABLED(CONFIG_PHYLIB) 1904 int __init mdio_bus_init(void); 1905 void mdio_bus_exit(void); 1906 #endif 1907 1908 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1909 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1910 int phy_ethtool_get_stats(struct phy_device *phydev, 1911 struct ethtool_stats *stats, u64 *data); 1912 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 1913 struct phy_plca_cfg *plca_cfg); 1914 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 1915 const struct phy_plca_cfg *plca_cfg, 1916 struct netlink_ext_ack *extack); 1917 int phy_ethtool_get_plca_status(struct phy_device *phydev, 1918 struct phy_plca_status *plca_st); 1919 1920 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1921 { 1922 struct phy_package_shared *shared = phydev->shared; 1923 1924 if (!shared) 1925 return -EIO; 1926 1927 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1928 } 1929 1930 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1931 { 1932 struct phy_package_shared *shared = phydev->shared; 1933 1934 if (!shared) 1935 return -EIO; 1936 1937 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1938 } 1939 1940 static inline int phy_package_write(struct phy_device *phydev, 1941 u32 regnum, u16 val) 1942 { 1943 struct phy_package_shared *shared = phydev->shared; 1944 1945 if (!shared) 1946 return -EIO; 1947 1948 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1949 } 1950 1951 static inline int __phy_package_write(struct phy_device *phydev, 1952 u32 regnum, u16 val) 1953 { 1954 struct phy_package_shared *shared = phydev->shared; 1955 1956 if (!shared) 1957 return -EIO; 1958 1959 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1960 } 1961 1962 static inline bool __phy_package_set_once(struct phy_device *phydev, 1963 unsigned int b) 1964 { 1965 struct phy_package_shared *shared = phydev->shared; 1966 1967 if (!shared) 1968 return false; 1969 1970 return !test_and_set_bit(b, &shared->flags); 1971 } 1972 1973 static inline bool phy_package_init_once(struct phy_device *phydev) 1974 { 1975 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1976 } 1977 1978 static inline bool phy_package_probe_once(struct phy_device *phydev) 1979 { 1980 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1981 } 1982 1983 extern struct bus_type mdio_bus_type; 1984 1985 struct mdio_board_info { 1986 const char *bus_id; 1987 char modalias[MDIO_NAME_SIZE]; 1988 int mdio_addr; 1989 const void *platform_data; 1990 }; 1991 1992 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1993 int mdiobus_register_board_info(const struct mdio_board_info *info, 1994 unsigned int n); 1995 #else 1996 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1997 unsigned int n) 1998 { 1999 return 0; 2000 } 2001 #endif 2002 2003 2004 /** 2005 * phy_module_driver() - Helper macro for registering PHY drivers 2006 * @__phy_drivers: array of PHY drivers to register 2007 * @__count: Numbers of members in array 2008 * 2009 * Helper macro for PHY drivers which do not do anything special in module 2010 * init/exit. Each module may only use this macro once, and calling it 2011 * replaces module_init() and module_exit(). 2012 */ 2013 #define phy_module_driver(__phy_drivers, __count) \ 2014 static int __init phy_module_init(void) \ 2015 { \ 2016 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2017 } \ 2018 module_init(phy_module_init); \ 2019 static void __exit phy_module_exit(void) \ 2020 { \ 2021 phy_drivers_unregister(__phy_drivers, __count); \ 2022 } \ 2023 module_exit(phy_module_exit) 2024 2025 #define module_phy_driver(__phy_drivers) \ 2026 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2027 2028 bool phy_driver_is_genphy(struct phy_device *phydev); 2029 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2030 2031 #endif /* __PHY_H */ 2032