1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/mdio.h> 19 #include <linux/mii.h> 20 #include <linux/module.h> 21 #include <linux/timer.h> 22 #include <linux/workqueue.h> 23 #include <linux/mod_devicetable.h> 24 25 #include <linux/atomic.h> 26 27 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 28 SUPPORTED_TP | \ 29 SUPPORTED_MII) 30 31 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 32 SUPPORTED_10baseT_Full) 33 34 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 35 SUPPORTED_100baseT_Full) 36 37 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 38 SUPPORTED_1000baseT_Full) 39 40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 48 49 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 50 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 51 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 52 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 53 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 54 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 55 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 56 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 57 58 extern const int phy_basic_ports_array[3]; 59 extern const int phy_fibre_port_array[1]; 60 extern const int phy_all_ports_features_array[7]; 61 extern const int phy_10_100_features_array[4]; 62 extern const int phy_basic_t1_features_array[2]; 63 extern const int phy_gbit_features_array[2]; 64 extern const int phy_10gbit_features_array[1]; 65 66 /* 67 * Set phydev->irq to PHY_POLL if interrupts are not supported, 68 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 69 * the attached driver handles the interrupt 70 */ 71 #define PHY_POLL -1 72 #define PHY_IGNORE_INTERRUPT -2 73 74 #define PHY_IS_INTERNAL 0x00000001 75 #define PHY_RST_AFTER_CLK_EN 0x00000002 76 #define MDIO_DEVICE_IS_PHY 0x80000000 77 78 /* Interface Mode definitions */ 79 typedef enum { 80 PHY_INTERFACE_MODE_NA, 81 PHY_INTERFACE_MODE_INTERNAL, 82 PHY_INTERFACE_MODE_MII, 83 PHY_INTERFACE_MODE_GMII, 84 PHY_INTERFACE_MODE_SGMII, 85 PHY_INTERFACE_MODE_TBI, 86 PHY_INTERFACE_MODE_REVMII, 87 PHY_INTERFACE_MODE_RMII, 88 PHY_INTERFACE_MODE_RGMII, 89 PHY_INTERFACE_MODE_RGMII_ID, 90 PHY_INTERFACE_MODE_RGMII_RXID, 91 PHY_INTERFACE_MODE_RGMII_TXID, 92 PHY_INTERFACE_MODE_RTBI, 93 PHY_INTERFACE_MODE_SMII, 94 PHY_INTERFACE_MODE_XGMII, 95 PHY_INTERFACE_MODE_MOCA, 96 PHY_INTERFACE_MODE_QSGMII, 97 PHY_INTERFACE_MODE_TRGMII, 98 PHY_INTERFACE_MODE_1000BASEX, 99 PHY_INTERFACE_MODE_2500BASEX, 100 PHY_INTERFACE_MODE_RXAUI, 101 PHY_INTERFACE_MODE_XAUI, 102 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ 103 PHY_INTERFACE_MODE_10GKR, 104 PHY_INTERFACE_MODE_USXGMII, 105 PHY_INTERFACE_MODE_MAX, 106 } phy_interface_t; 107 108 /** 109 * phy_supported_speeds - return all speeds currently supported by a phy device 110 * @phy: The phy device to return supported speeds of. 111 * @speeds: buffer to store supported speeds in. 112 * @size: size of speeds buffer. 113 * 114 * Description: Returns the number of supported speeds, and fills 115 * the speeds buffer with the supported speeds. If speeds buffer is 116 * too small to contain all currently supported speeds, will return as 117 * many speeds as can fit. 118 */ 119 unsigned int phy_supported_speeds(struct phy_device *phy, 120 unsigned int *speeds, 121 unsigned int size); 122 123 /** 124 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 125 * @interface: enum phy_interface_t value 126 * 127 * Description: maps 'enum phy_interface_t' defined in this file 128 * into the device tree binding of 'phy-mode', so that Ethernet 129 * device driver can get phy interface from device tree. 130 */ 131 static inline const char *phy_modes(phy_interface_t interface) 132 { 133 switch (interface) { 134 case PHY_INTERFACE_MODE_NA: 135 return ""; 136 case PHY_INTERFACE_MODE_INTERNAL: 137 return "internal"; 138 case PHY_INTERFACE_MODE_MII: 139 return "mii"; 140 case PHY_INTERFACE_MODE_GMII: 141 return "gmii"; 142 case PHY_INTERFACE_MODE_SGMII: 143 return "sgmii"; 144 case PHY_INTERFACE_MODE_TBI: 145 return "tbi"; 146 case PHY_INTERFACE_MODE_REVMII: 147 return "rev-mii"; 148 case PHY_INTERFACE_MODE_RMII: 149 return "rmii"; 150 case PHY_INTERFACE_MODE_RGMII: 151 return "rgmii"; 152 case PHY_INTERFACE_MODE_RGMII_ID: 153 return "rgmii-id"; 154 case PHY_INTERFACE_MODE_RGMII_RXID: 155 return "rgmii-rxid"; 156 case PHY_INTERFACE_MODE_RGMII_TXID: 157 return "rgmii-txid"; 158 case PHY_INTERFACE_MODE_RTBI: 159 return "rtbi"; 160 case PHY_INTERFACE_MODE_SMII: 161 return "smii"; 162 case PHY_INTERFACE_MODE_XGMII: 163 return "xgmii"; 164 case PHY_INTERFACE_MODE_MOCA: 165 return "moca"; 166 case PHY_INTERFACE_MODE_QSGMII: 167 return "qsgmii"; 168 case PHY_INTERFACE_MODE_TRGMII: 169 return "trgmii"; 170 case PHY_INTERFACE_MODE_1000BASEX: 171 return "1000base-x"; 172 case PHY_INTERFACE_MODE_2500BASEX: 173 return "2500base-x"; 174 case PHY_INTERFACE_MODE_RXAUI: 175 return "rxaui"; 176 case PHY_INTERFACE_MODE_XAUI: 177 return "xaui"; 178 case PHY_INTERFACE_MODE_10GKR: 179 return "10gbase-kr"; 180 case PHY_INTERFACE_MODE_USXGMII: 181 return "usxgmii"; 182 default: 183 return "unknown"; 184 } 185 } 186 187 188 #define PHY_INIT_TIMEOUT 100000 189 #define PHY_FORCE_TIMEOUT 10 190 191 #define PHY_MAX_ADDR 32 192 193 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 194 #define PHY_ID_FMT "%s:%02x" 195 196 #define MII_BUS_ID_SIZE 61 197 198 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 199 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 200 #define MII_ADDR_C45 (1<<30) 201 #define MII_DEVADDR_C45_SHIFT 16 202 #define MII_REGADDR_C45_MASK GENMASK(15, 0) 203 204 struct device; 205 struct phylink; 206 struct sfp_bus; 207 struct sfp_upstream_ops; 208 struct sk_buff; 209 210 /* 211 * The Bus class for PHYs. Devices which provide access to 212 * PHYs should register using this structure 213 */ 214 struct mii_bus { 215 struct module *owner; 216 const char *name; 217 char id[MII_BUS_ID_SIZE]; 218 void *priv; 219 int (*read)(struct mii_bus *bus, int addr, int regnum); 220 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 221 int (*reset)(struct mii_bus *bus); 222 223 /* 224 * A lock to ensure that only one thing can read/write 225 * the MDIO bus at a time 226 */ 227 struct mutex mdio_lock; 228 229 struct device *parent; 230 enum { 231 MDIOBUS_ALLOCATED = 1, 232 MDIOBUS_REGISTERED, 233 MDIOBUS_UNREGISTERED, 234 MDIOBUS_RELEASED, 235 } state; 236 struct device dev; 237 238 /* list of all PHYs on bus */ 239 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 240 241 /* PHY addresses to be ignored when probing */ 242 u32 phy_mask; 243 244 /* PHY addresses to ignore the TA/read failure */ 245 u32 phy_ignore_ta_mask; 246 247 /* 248 * An array of interrupts, each PHY's interrupt at the index 249 * matching its address 250 */ 251 int irq[PHY_MAX_ADDR]; 252 253 /* GPIO reset pulse width in microseconds */ 254 int reset_delay_us; 255 /* RESET GPIO descriptor pointer */ 256 struct gpio_desc *reset_gpiod; 257 }; 258 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 259 260 struct mii_bus *mdiobus_alloc_size(size_t); 261 static inline struct mii_bus *mdiobus_alloc(void) 262 { 263 return mdiobus_alloc_size(0); 264 } 265 266 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 267 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 268 void mdiobus_unregister(struct mii_bus *bus); 269 void mdiobus_free(struct mii_bus *bus); 270 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 271 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 272 { 273 return devm_mdiobus_alloc_size(dev, 0); 274 } 275 276 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 277 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 278 279 #define PHY_INTERRUPT_DISABLED false 280 #define PHY_INTERRUPT_ENABLED true 281 282 /* PHY state machine states: 283 * 284 * DOWN: PHY device and driver are not ready for anything. probe 285 * should be called if and only if the PHY is in this state, 286 * given that the PHY device exists. 287 * - PHY driver probe function will set the state to READY 288 * 289 * READY: PHY is ready to send and receive packets, but the 290 * controller is not. By default, PHYs which do not implement 291 * probe will be set to this state by phy_probe(). 292 * - start will set the state to UP 293 * 294 * UP: The PHY and attached device are ready to do work. 295 * Interrupts should be started here. 296 * - timer moves to NOLINK or RUNNING 297 * 298 * NOLINK: PHY is up, but not currently plugged in. 299 * - irq or timer will set RUNNING if link comes back 300 * - phy_stop moves to HALTED 301 * 302 * RUNNING: PHY is currently up, running, and possibly sending 303 * and/or receiving packets 304 * - irq or timer will set NOLINK if link goes down 305 * - phy_stop moves to HALTED 306 * 307 * HALTED: PHY is up, but no polling or interrupts are done. Or 308 * PHY is in an error state. 309 * - phy_start moves to UP 310 */ 311 enum phy_state { 312 PHY_DOWN = 0, 313 PHY_READY, 314 PHY_HALTED, 315 PHY_UP, 316 PHY_RUNNING, 317 PHY_NOLINK, 318 }; 319 320 /** 321 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 322 * @devices_in_package: Bit vector of devices present. 323 * @device_ids: The device identifer for each present device. 324 */ 325 struct phy_c45_device_ids { 326 u32 devices_in_package; 327 u32 device_ids[8]; 328 }; 329 330 /* phy_device: An instance of a PHY 331 * 332 * drv: Pointer to the driver for this PHY instance 333 * phy_id: UID for this device found during discovery 334 * c45_ids: 802.3-c45 Device Identifers if is_c45. 335 * is_c45: Set to true if this phy uses clause 45 addressing. 336 * is_internal: Set to true if this phy is internal to a MAC. 337 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 338 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 339 * has_fixups: Set to true if this phy has fixups/quirks. 340 * suspended: Set to true if this phy has been suspended successfully. 341 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 342 * loopback_enabled: Set true if this phy has been loopbacked successfully. 343 * state: state of the PHY for management purposes 344 * dev_flags: Device-specific flags used by the PHY driver. 345 * irq: IRQ number of the PHY's interrupt (-1 if none) 346 * phy_timer: The timer for handling the state machine 347 * sfp_bus_attached: flag indicating whether the SFP bus has been attached 348 * sfp_bus: SFP bus attached to this PHY's fiber port 349 * attached_dev: The attached enet driver's device instance ptr 350 * adjust_link: Callback for the enet controller to respond to 351 * changes in the link state. 352 * 353 * speed, duplex, pause, supported, advertising, lp_advertising, 354 * and autoneg are used like in mii_if_info 355 * 356 * interrupts currently only supports enabled or disabled, 357 * but could be changed in the future to support enabling 358 * and disabling specific interrupts 359 * 360 * Contains some infrastructure for polling and interrupt 361 * handling, as well as handling shifts in PHY hardware state 362 */ 363 struct phy_device { 364 struct mdio_device mdio; 365 366 /* Information about the PHY type */ 367 /* And management functions */ 368 struct phy_driver *drv; 369 370 u32 phy_id; 371 372 struct phy_c45_device_ids c45_ids; 373 unsigned is_c45:1; 374 unsigned is_internal:1; 375 unsigned is_pseudo_fixed_link:1; 376 unsigned is_gigabit_capable:1; 377 unsigned has_fixups:1; 378 unsigned suspended:1; 379 unsigned sysfs_links:1; 380 unsigned loopback_enabled:1; 381 382 unsigned autoneg:1; 383 /* The most recently read link state */ 384 unsigned link:1; 385 unsigned autoneg_complete:1; 386 387 /* Interrupts are enabled */ 388 unsigned interrupts:1; 389 390 enum phy_state state; 391 392 u32 dev_flags; 393 394 phy_interface_t interface; 395 396 /* 397 * forced speed & duplex (no autoneg) 398 * partner speed & duplex & pause (autoneg) 399 */ 400 int speed; 401 int duplex; 402 int pause; 403 int asym_pause; 404 405 /* Union of PHY and Attached devices' supported link modes */ 406 /* See ethtool.h for more info */ 407 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 408 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 409 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 410 /* used with phy_speed_down */ 411 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 412 413 /* Energy efficient ethernet modes which should be prohibited */ 414 u32 eee_broken_modes; 415 416 #ifdef CONFIG_LED_TRIGGER_PHY 417 struct phy_led_trigger *phy_led_triggers; 418 unsigned int phy_num_led_triggers; 419 struct phy_led_trigger *last_triggered; 420 421 struct phy_led_trigger *led_link_trigger; 422 #endif 423 424 /* 425 * Interrupt number for this PHY 426 * -1 means no interrupt 427 */ 428 int irq; 429 430 /* private data pointer */ 431 /* For use by PHYs to maintain extra state */ 432 void *priv; 433 434 /* Interrupt and Polling infrastructure */ 435 struct delayed_work state_queue; 436 437 struct mutex lock; 438 439 /* This may be modified under the rtnl lock */ 440 bool sfp_bus_attached; 441 struct sfp_bus *sfp_bus; 442 struct phylink *phylink; 443 struct net_device *attached_dev; 444 445 u8 mdix; 446 u8 mdix_ctrl; 447 448 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 449 void (*adjust_link)(struct net_device *dev); 450 }; 451 #define to_phy_device(d) container_of(to_mdio_device(d), \ 452 struct phy_device, mdio) 453 454 /* struct phy_driver: Driver structure for a particular PHY type 455 * 456 * driver_data: static driver data 457 * phy_id: The result of reading the UID registers of this PHY 458 * type, and ANDing them with the phy_id_mask. This driver 459 * only works for PHYs with IDs which match this field 460 * name: The friendly name of this PHY type 461 * phy_id_mask: Defines the important bits of the phy_id 462 * features: A mandatory list of features (speed, duplex, etc) 463 * supported by this PHY 464 * flags: A bitfield defining certain other features this PHY 465 * supports (like interrupts) 466 * 467 * All functions are optional. If config_aneg or read_status 468 * are not implemented, the phy core uses the genphy versions. 469 * Note that none of these functions should be called from 470 * interrupt time. The goal is for the bus read/write functions 471 * to be able to block when the bus transaction is happening, 472 * and be freed up by an interrupt (The MPC85xx has this ability, 473 * though it is not currently supported in the driver). 474 */ 475 struct phy_driver { 476 struct mdio_driver_common mdiodrv; 477 u32 phy_id; 478 char *name; 479 u32 phy_id_mask; 480 const unsigned long * const features; 481 u32 flags; 482 const void *driver_data; 483 484 /* 485 * Called to issue a PHY software reset 486 */ 487 int (*soft_reset)(struct phy_device *phydev); 488 489 /* 490 * Called to initialize the PHY, 491 * including after a reset 492 */ 493 int (*config_init)(struct phy_device *phydev); 494 495 /* 496 * Called during discovery. Used to set 497 * up device-specific structures, if any 498 */ 499 int (*probe)(struct phy_device *phydev); 500 501 /* 502 * Probe the hardware to determine what abilities it has. 503 * Should only set phydev->supported. 504 */ 505 int (*get_features)(struct phy_device *phydev); 506 507 /* PHY Power Management */ 508 int (*suspend)(struct phy_device *phydev); 509 int (*resume)(struct phy_device *phydev); 510 511 /* 512 * Configures the advertisement and resets 513 * autonegotiation if phydev->autoneg is on, 514 * forces the speed to the current settings in phydev 515 * if phydev->autoneg is off 516 */ 517 int (*config_aneg)(struct phy_device *phydev); 518 519 /* Determines the auto negotiation result */ 520 int (*aneg_done)(struct phy_device *phydev); 521 522 /* Determines the negotiated speed and duplex */ 523 int (*read_status)(struct phy_device *phydev); 524 525 /* Clears any pending interrupts */ 526 int (*ack_interrupt)(struct phy_device *phydev); 527 528 /* Enables or disables interrupts */ 529 int (*config_intr)(struct phy_device *phydev); 530 531 /* 532 * Checks if the PHY generated an interrupt. 533 * For multi-PHY devices with shared PHY interrupt pin 534 */ 535 int (*did_interrupt)(struct phy_device *phydev); 536 537 /* Override default interrupt handling */ 538 int (*handle_interrupt)(struct phy_device *phydev); 539 540 /* Clears up any memory if needed */ 541 void (*remove)(struct phy_device *phydev); 542 543 /* Returns true if this is a suitable driver for the given 544 * phydev. If NULL, matching is based on phy_id and 545 * phy_id_mask. 546 */ 547 int (*match_phy_device)(struct phy_device *phydev); 548 549 /* Handles ethtool queries for hardware time stamping. */ 550 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); 551 552 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ 553 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); 554 555 /* 556 * Requests a Rx timestamp for 'skb'. If the skb is accepted, 557 * the phy driver promises to deliver it using netif_rx() as 558 * soon as a timestamp becomes available. One of the 559 * PTP_CLASS_ values is passed in 'type'. The function must 560 * return true if the skb is accepted for delivery. 561 */ 562 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 563 564 /* 565 * Requests a Tx timestamp for 'skb'. The phy driver promises 566 * to deliver it using skb_complete_tx_timestamp() as soon as a 567 * timestamp becomes available. One of the PTP_CLASS_ values 568 * is passed in 'type'. 569 */ 570 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 571 572 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 573 * enable Wake on LAN, so set_wol is provided to be called in the 574 * ethernet driver's set_wol function. */ 575 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 576 577 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 578 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 579 580 /* 581 * Called to inform a PHY device driver when the core is about to 582 * change the link state. This callback is supposed to be used as 583 * fixup hook for drivers that need to take action when the link 584 * state changes. Drivers are by no means allowed to mess with the 585 * PHY device structure in their implementations. 586 */ 587 void (*link_change_notify)(struct phy_device *dev); 588 589 /* 590 * Phy specific driver override for reading a MMD register. 591 * This function is optional for PHY specific drivers. When 592 * not provided, the default MMD read function will be used 593 * by phy_read_mmd(), which will use either a direct read for 594 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 595 * devnum is the MMD device number within the PHY device, 596 * regnum is the register within the selected MMD device. 597 */ 598 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 599 600 /* 601 * Phy specific driver override for writing a MMD register. 602 * This function is optional for PHY specific drivers. When 603 * not provided, the default MMD write function will be used 604 * by phy_write_mmd(), which will use either a direct write for 605 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 606 * devnum is the MMD device number within the PHY device, 607 * regnum is the register within the selected MMD device. 608 * val is the value to be written. 609 */ 610 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 611 u16 val); 612 613 int (*read_page)(struct phy_device *dev); 614 int (*write_page)(struct phy_device *dev, int page); 615 616 /* Get the size and type of the eeprom contained within a plug-in 617 * module */ 618 int (*module_info)(struct phy_device *dev, 619 struct ethtool_modinfo *modinfo); 620 621 /* Get the eeprom information from the plug-in module */ 622 int (*module_eeprom)(struct phy_device *dev, 623 struct ethtool_eeprom *ee, u8 *data); 624 625 /* Get statistics from the phy using ethtool */ 626 int (*get_sset_count)(struct phy_device *dev); 627 void (*get_strings)(struct phy_device *dev, u8 *data); 628 void (*get_stats)(struct phy_device *dev, 629 struct ethtool_stats *stats, u64 *data); 630 631 /* Get and Set PHY tunables */ 632 int (*get_tunable)(struct phy_device *dev, 633 struct ethtool_tunable *tuna, void *data); 634 int (*set_tunable)(struct phy_device *dev, 635 struct ethtool_tunable *tuna, 636 const void *data); 637 int (*set_loopback)(struct phy_device *dev, bool enable); 638 }; 639 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 640 struct phy_driver, mdiodrv) 641 642 #define PHY_ANY_ID "MATCH ANY PHY" 643 #define PHY_ANY_UID 0xffffffff 644 645 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 646 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 647 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 648 649 /* A Structure for boards to register fixups with the PHY Lib */ 650 struct phy_fixup { 651 struct list_head list; 652 char bus_id[MII_BUS_ID_SIZE + 3]; 653 u32 phy_uid; 654 u32 phy_uid_mask; 655 int (*run)(struct phy_device *phydev); 656 }; 657 658 const char *phy_speed_to_str(int speed); 659 const char *phy_duplex_to_str(unsigned int duplex); 660 661 /* A structure for mapping a particular speed and duplex 662 * combination to a particular SUPPORTED and ADVERTISED value 663 */ 664 struct phy_setting { 665 u32 speed; 666 u8 duplex; 667 u8 bit; 668 }; 669 670 const struct phy_setting * 671 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 672 bool exact); 673 size_t phy_speeds(unsigned int *speeds, size_t size, 674 unsigned long *mask); 675 void of_set_phy_supported(struct phy_device *phydev); 676 void of_set_phy_eee_broken(struct phy_device *phydev); 677 int phy_speed_down_core(struct phy_device *phydev); 678 679 /** 680 * phy_is_started - Convenience function to check whether PHY is started 681 * @phydev: The phy_device struct 682 */ 683 static inline bool phy_is_started(struct phy_device *phydev) 684 { 685 return phydev->state >= PHY_UP; 686 } 687 688 void phy_resolve_aneg_pause(struct phy_device *phydev); 689 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 690 691 /** 692 * phy_read - Convenience function for reading a given PHY register 693 * @phydev: the phy_device struct 694 * @regnum: register number to read 695 * 696 * NOTE: MUST NOT be called from interrupt context, 697 * because the bus read/write functions may wait for an interrupt 698 * to conclude the operation. 699 */ 700 static inline int phy_read(struct phy_device *phydev, u32 regnum) 701 { 702 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 703 } 704 705 /** 706 * __phy_read - convenience function for reading a given PHY register 707 * @phydev: the phy_device struct 708 * @regnum: register number to read 709 * 710 * The caller must have taken the MDIO bus lock. 711 */ 712 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 713 { 714 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 715 } 716 717 /** 718 * phy_write - Convenience function for writing a given PHY register 719 * @phydev: the phy_device struct 720 * @regnum: register number to write 721 * @val: value to write to @regnum 722 * 723 * NOTE: MUST NOT be called from interrupt context, 724 * because the bus read/write functions may wait for an interrupt 725 * to conclude the operation. 726 */ 727 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 728 { 729 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 730 } 731 732 /** 733 * __phy_write - Convenience function for writing a given PHY register 734 * @phydev: the phy_device struct 735 * @regnum: register number to write 736 * @val: value to write to @regnum 737 * 738 * The caller must have taken the MDIO bus lock. 739 */ 740 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 741 { 742 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 743 val); 744 } 745 746 /** 747 * phy_read_mmd - Convenience function for reading a register 748 * from an MMD on a given PHY. 749 * @phydev: The phy_device struct 750 * @devad: The MMD to read from 751 * @regnum: The register on the MMD to read 752 * 753 * Same rules as for phy_read(); 754 */ 755 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 756 757 /** 758 * __phy_read_mmd - Convenience function for reading a register 759 * from an MMD on a given PHY. 760 * @phydev: The phy_device struct 761 * @devad: The MMD to read from 762 * @regnum: The register on the MMD to read 763 * 764 * Same rules as for __phy_read(); 765 */ 766 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 767 768 /** 769 * phy_write_mmd - Convenience function for writing a register 770 * on an MMD on a given PHY. 771 * @phydev: The phy_device struct 772 * @devad: The MMD to write to 773 * @regnum: The register on the MMD to read 774 * @val: value to write to @regnum 775 * 776 * Same rules as for phy_write(); 777 */ 778 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 779 780 /** 781 * __phy_write_mmd - Convenience function for writing a register 782 * on an MMD on a given PHY. 783 * @phydev: The phy_device struct 784 * @devad: The MMD to write to 785 * @regnum: The register on the MMD to read 786 * @val: value to write to @regnum 787 * 788 * Same rules as for __phy_write(); 789 */ 790 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 791 792 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 793 u16 set); 794 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 795 u16 set); 796 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 797 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 798 799 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 800 u16 mask, u16 set); 801 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 802 u16 mask, u16 set); 803 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 804 u16 mask, u16 set); 805 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 806 u16 mask, u16 set); 807 808 /** 809 * __phy_set_bits - Convenience function for setting bits in a PHY register 810 * @phydev: the phy_device struct 811 * @regnum: register number to write 812 * @val: bits to set 813 * 814 * The caller must have taken the MDIO bus lock. 815 */ 816 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 817 { 818 return __phy_modify(phydev, regnum, 0, val); 819 } 820 821 /** 822 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 823 * @phydev: the phy_device struct 824 * @regnum: register number to write 825 * @val: bits to clear 826 * 827 * The caller must have taken the MDIO bus lock. 828 */ 829 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 830 u16 val) 831 { 832 return __phy_modify(phydev, regnum, val, 0); 833 } 834 835 /** 836 * phy_set_bits - Convenience function for setting bits in a PHY register 837 * @phydev: the phy_device struct 838 * @regnum: register number to write 839 * @val: bits to set 840 */ 841 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 842 { 843 return phy_modify(phydev, regnum, 0, val); 844 } 845 846 /** 847 * phy_clear_bits - Convenience function for clearing bits in a PHY register 848 * @phydev: the phy_device struct 849 * @regnum: register number to write 850 * @val: bits to clear 851 */ 852 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 853 { 854 return phy_modify(phydev, regnum, val, 0); 855 } 856 857 /** 858 * __phy_set_bits_mmd - Convenience function for setting bits in a register 859 * on MMD 860 * @phydev: the phy_device struct 861 * @devad: the MMD containing register to modify 862 * @regnum: register number to modify 863 * @val: bits to set 864 * 865 * The caller must have taken the MDIO bus lock. 866 */ 867 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 868 u32 regnum, u16 val) 869 { 870 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 871 } 872 873 /** 874 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 875 * on MMD 876 * @phydev: the phy_device struct 877 * @devad: the MMD containing register to modify 878 * @regnum: register number to modify 879 * @val: bits to clear 880 * 881 * The caller must have taken the MDIO bus lock. 882 */ 883 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 884 u32 regnum, u16 val) 885 { 886 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 887 } 888 889 /** 890 * phy_set_bits_mmd - Convenience function for setting bits in a register 891 * on MMD 892 * @phydev: the phy_device struct 893 * @devad: the MMD containing register to modify 894 * @regnum: register number to modify 895 * @val: bits to set 896 */ 897 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 898 u32 regnum, u16 val) 899 { 900 return phy_modify_mmd(phydev, devad, regnum, 0, val); 901 } 902 903 /** 904 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 905 * on MMD 906 * @phydev: the phy_device struct 907 * @devad: the MMD containing register to modify 908 * @regnum: register number to modify 909 * @val: bits to clear 910 */ 911 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 912 u32 regnum, u16 val) 913 { 914 return phy_modify_mmd(phydev, devad, regnum, val, 0); 915 } 916 917 /** 918 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 919 * @phydev: the phy_device struct 920 * 921 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 922 * PHY_IGNORE_INTERRUPT 923 */ 924 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 925 { 926 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 927 } 928 929 /** 930 * phy_polling_mode - Convenience function for testing whether polling is 931 * used to detect PHY status changes 932 * @phydev: the phy_device struct 933 */ 934 static inline bool phy_polling_mode(struct phy_device *phydev) 935 { 936 return phydev->irq == PHY_POLL; 937 } 938 939 /** 940 * phy_is_internal - Convenience function for testing if a PHY is internal 941 * @phydev: the phy_device struct 942 */ 943 static inline bool phy_is_internal(struct phy_device *phydev) 944 { 945 return phydev->is_internal; 946 } 947 948 /** 949 * phy_interface_mode_is_rgmii - Convenience function for testing if a 950 * PHY interface mode is RGMII (all variants) 951 * @mode: the phy_interface_t enum 952 */ 953 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 954 { 955 return mode >= PHY_INTERFACE_MODE_RGMII && 956 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 957 }; 958 959 /** 960 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 961 * negotiation 962 * @mode: one of &enum phy_interface_t 963 * 964 * Returns true if the phy interface mode uses the 16-bit negotiation 965 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 966 */ 967 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 968 { 969 return mode == PHY_INTERFACE_MODE_1000BASEX || 970 mode == PHY_INTERFACE_MODE_2500BASEX; 971 } 972 973 /** 974 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 975 * is RGMII (all variants) 976 * @phydev: the phy_device struct 977 */ 978 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 979 { 980 return phy_interface_mode_is_rgmii(phydev->interface); 981 }; 982 983 /* 984 * phy_is_pseudo_fixed_link - Convenience function for testing if this 985 * PHY is the CPU port facing side of an Ethernet switch, or similar. 986 * @phydev: the phy_device struct 987 */ 988 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 989 { 990 return phydev->is_pseudo_fixed_link; 991 } 992 993 int phy_save_page(struct phy_device *phydev); 994 int phy_select_page(struct phy_device *phydev, int page); 995 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 996 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 997 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 998 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 999 u16 mask, u16 set); 1000 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1001 u16 mask, u16 set); 1002 1003 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, 1004 bool is_c45, 1005 struct phy_c45_device_ids *c45_ids); 1006 #if IS_ENABLED(CONFIG_PHYLIB) 1007 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1008 int phy_device_register(struct phy_device *phy); 1009 void phy_device_free(struct phy_device *phydev); 1010 #else 1011 static inline 1012 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1013 { 1014 return NULL; 1015 } 1016 1017 static inline int phy_device_register(struct phy_device *phy) 1018 { 1019 return 0; 1020 } 1021 1022 static inline void phy_device_free(struct phy_device *phydev) { } 1023 #endif /* CONFIG_PHYLIB */ 1024 void phy_device_remove(struct phy_device *phydev); 1025 int phy_init_hw(struct phy_device *phydev); 1026 int phy_suspend(struct phy_device *phydev); 1027 int phy_resume(struct phy_device *phydev); 1028 int __phy_resume(struct phy_device *phydev); 1029 int phy_loopback(struct phy_device *phydev, bool enable); 1030 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1031 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1032 int phy_sfp_probe(struct phy_device *phydev, 1033 const struct sfp_upstream_ops *ops); 1034 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1035 phy_interface_t interface); 1036 struct phy_device *phy_find_first(struct mii_bus *bus); 1037 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1038 u32 flags, phy_interface_t interface); 1039 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1040 void (*handler)(struct net_device *), 1041 phy_interface_t interface); 1042 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1043 void (*handler)(struct net_device *), 1044 phy_interface_t interface); 1045 void phy_disconnect(struct phy_device *phydev); 1046 void phy_detach(struct phy_device *phydev); 1047 void phy_start(struct phy_device *phydev); 1048 void phy_stop(struct phy_device *phydev); 1049 int phy_start_aneg(struct phy_device *phydev); 1050 int phy_aneg_done(struct phy_device *phydev); 1051 int phy_speed_down(struct phy_device *phydev, bool sync); 1052 int phy_speed_up(struct phy_device *phydev); 1053 1054 int phy_restart_aneg(struct phy_device *phydev); 1055 int phy_reset_after_clk_enable(struct phy_device *phydev); 1056 1057 static inline void phy_device_reset(struct phy_device *phydev, int value) 1058 { 1059 mdio_device_reset(&phydev->mdio, value); 1060 } 1061 1062 #define phydev_err(_phydev, format, args...) \ 1063 dev_err(&_phydev->mdio.dev, format, ##args) 1064 1065 #define phydev_info(_phydev, format, args...) \ 1066 dev_info(&_phydev->mdio.dev, format, ##args) 1067 1068 #define phydev_warn(_phydev, format, args...) \ 1069 dev_warn(&_phydev->mdio.dev, format, ##args) 1070 1071 #define phydev_dbg(_phydev, format, args...) \ 1072 dev_dbg(&_phydev->mdio.dev, format, ##args) 1073 1074 static inline const char *phydev_name(const struct phy_device *phydev) 1075 { 1076 return dev_name(&phydev->mdio.dev); 1077 } 1078 1079 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1080 { 1081 mutex_lock(&phydev->mdio.bus->mdio_lock); 1082 } 1083 1084 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1085 { 1086 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1087 } 1088 1089 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1090 __printf(2, 3); 1091 void phy_attached_info(struct phy_device *phydev); 1092 1093 /* Clause 22 PHY */ 1094 int genphy_read_abilities(struct phy_device *phydev); 1095 int genphy_setup_forced(struct phy_device *phydev); 1096 int genphy_restart_aneg(struct phy_device *phydev); 1097 int genphy_config_eee_advert(struct phy_device *phydev); 1098 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1099 int genphy_aneg_done(struct phy_device *phydev); 1100 int genphy_update_link(struct phy_device *phydev); 1101 int genphy_read_lpa(struct phy_device *phydev); 1102 int genphy_read_status(struct phy_device *phydev); 1103 int genphy_suspend(struct phy_device *phydev); 1104 int genphy_resume(struct phy_device *phydev); 1105 int genphy_loopback(struct phy_device *phydev, bool enable); 1106 int genphy_soft_reset(struct phy_device *phydev); 1107 1108 static inline int genphy_config_aneg(struct phy_device *phydev) 1109 { 1110 return __genphy_config_aneg(phydev, false); 1111 } 1112 1113 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1114 { 1115 return 0; 1116 } 1117 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1118 { 1119 return 0; 1120 } 1121 static inline int genphy_no_config_intr(struct phy_device *phydev) 1122 { 1123 return 0; 1124 } 1125 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1126 u16 regnum); 1127 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1128 u16 regnum, u16 val); 1129 1130 /* Clause 37 */ 1131 int genphy_c37_config_aneg(struct phy_device *phydev); 1132 int genphy_c37_read_status(struct phy_device *phydev); 1133 1134 /* Clause 45 PHY */ 1135 int genphy_c45_restart_aneg(struct phy_device *phydev); 1136 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1137 int genphy_c45_aneg_done(struct phy_device *phydev); 1138 int genphy_c45_read_link(struct phy_device *phydev); 1139 int genphy_c45_read_lpa(struct phy_device *phydev); 1140 int genphy_c45_read_pma(struct phy_device *phydev); 1141 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1142 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1143 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1144 int genphy_c45_read_mdix(struct phy_device *phydev); 1145 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1146 int genphy_c45_read_status(struct phy_device *phydev); 1147 int genphy_c45_config_aneg(struct phy_device *phydev); 1148 1149 /* The gen10g_* functions are the old Clause 45 stub */ 1150 int gen10g_config_aneg(struct phy_device *phydev); 1151 1152 static inline int phy_read_status(struct phy_device *phydev) 1153 { 1154 if (!phydev->drv) 1155 return -EIO; 1156 1157 if (phydev->drv->read_status) 1158 return phydev->drv->read_status(phydev); 1159 else 1160 return genphy_read_status(phydev); 1161 } 1162 1163 void phy_driver_unregister(struct phy_driver *drv); 1164 void phy_drivers_unregister(struct phy_driver *drv, int n); 1165 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1166 int phy_drivers_register(struct phy_driver *new_driver, int n, 1167 struct module *owner); 1168 void phy_state_machine(struct work_struct *work); 1169 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1170 void phy_mac_interrupt(struct phy_device *phydev); 1171 void phy_start_machine(struct phy_device *phydev); 1172 void phy_stop_machine(struct phy_device *phydev); 1173 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1174 struct ethtool_link_ksettings *cmd); 1175 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1176 const struct ethtool_link_ksettings *cmd); 1177 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1178 void phy_request_interrupt(struct phy_device *phydev); 1179 void phy_free_interrupt(struct phy_device *phydev); 1180 void phy_print_status(struct phy_device *phydev); 1181 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1182 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1183 void phy_advertise_supported(struct phy_device *phydev); 1184 void phy_support_sym_pause(struct phy_device *phydev); 1185 void phy_support_asym_pause(struct phy_device *phydev); 1186 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1187 bool autoneg); 1188 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1189 bool phy_validate_pause(struct phy_device *phydev, 1190 struct ethtool_pauseparam *pp); 1191 1192 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1193 int (*run)(struct phy_device *)); 1194 int phy_register_fixup_for_id(const char *bus_id, 1195 int (*run)(struct phy_device *)); 1196 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1197 int (*run)(struct phy_device *)); 1198 1199 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1200 int phy_unregister_fixup_for_id(const char *bus_id); 1201 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1202 1203 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1204 int phy_get_eee_err(struct phy_device *phydev); 1205 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1206 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1207 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1208 void phy_ethtool_get_wol(struct phy_device *phydev, 1209 struct ethtool_wolinfo *wol); 1210 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1211 struct ethtool_link_ksettings *cmd); 1212 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1213 const struct ethtool_link_ksettings *cmd); 1214 int phy_ethtool_nway_reset(struct net_device *ndev); 1215 1216 #if IS_ENABLED(CONFIG_PHYLIB) 1217 int __init mdio_bus_init(void); 1218 void mdio_bus_exit(void); 1219 #endif 1220 1221 /* Inline function for use within net/core/ethtool.c (built-in) */ 1222 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1223 { 1224 if (!phydev->drv) 1225 return -EIO; 1226 1227 mutex_lock(&phydev->lock); 1228 phydev->drv->get_strings(phydev, data); 1229 mutex_unlock(&phydev->lock); 1230 1231 return 0; 1232 } 1233 1234 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1235 { 1236 int ret; 1237 1238 if (!phydev->drv) 1239 return -EIO; 1240 1241 if (phydev->drv->get_sset_count && 1242 phydev->drv->get_strings && 1243 phydev->drv->get_stats) { 1244 mutex_lock(&phydev->lock); 1245 ret = phydev->drv->get_sset_count(phydev); 1246 mutex_unlock(&phydev->lock); 1247 1248 return ret; 1249 } 1250 1251 return -EOPNOTSUPP; 1252 } 1253 1254 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1255 struct ethtool_stats *stats, u64 *data) 1256 { 1257 if (!phydev->drv) 1258 return -EIO; 1259 1260 mutex_lock(&phydev->lock); 1261 phydev->drv->get_stats(phydev, stats, data); 1262 mutex_unlock(&phydev->lock); 1263 1264 return 0; 1265 } 1266 1267 extern struct bus_type mdio_bus_type; 1268 1269 struct mdio_board_info { 1270 const char *bus_id; 1271 char modalias[MDIO_NAME_SIZE]; 1272 int mdio_addr; 1273 const void *platform_data; 1274 }; 1275 1276 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1277 int mdiobus_register_board_info(const struct mdio_board_info *info, 1278 unsigned int n); 1279 #else 1280 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1281 unsigned int n) 1282 { 1283 return 0; 1284 } 1285 #endif 1286 1287 1288 /** 1289 * module_phy_driver() - Helper macro for registering PHY drivers 1290 * @__phy_drivers: array of PHY drivers to register 1291 * 1292 * Helper macro for PHY drivers which do not do anything special in module 1293 * init/exit. Each module may only use this macro once, and calling it 1294 * replaces module_init() and module_exit(). 1295 */ 1296 #define phy_module_driver(__phy_drivers, __count) \ 1297 static int __init phy_module_init(void) \ 1298 { \ 1299 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1300 } \ 1301 module_init(phy_module_init); \ 1302 static void __exit phy_module_exit(void) \ 1303 { \ 1304 phy_drivers_unregister(__phy_drivers, __count); \ 1305 } \ 1306 module_exit(phy_module_exit) 1307 1308 #define module_phy_driver(__phy_drivers) \ 1309 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1310 1311 bool phy_driver_is_genphy(struct phy_device *phydev); 1312 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1313 1314 #endif /* __PHY_H */ 1315