1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/netlink.h> 19 #include <linux/mdio.h> 20 #include <linux/mii.h> 21 #include <linux/mii_timestamper.h> 22 #include <linux/module.h> 23 #include <linux/timer.h> 24 #include <linux/workqueue.h> 25 #include <linux/mod_devicetable.h> 26 #include <linux/u64_stats_sync.h> 27 #include <linux/irqreturn.h> 28 #include <linux/iopoll.h> 29 #include <linux/refcount.h> 30 31 #include <linux/atomic.h> 32 33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 54 55 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 56 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 57 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 58 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 59 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 60 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 61 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 62 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 63 64 extern const int phy_basic_ports_array[3]; 65 extern const int phy_fibre_port_array[1]; 66 extern const int phy_all_ports_features_array[7]; 67 extern const int phy_10_100_features_array[4]; 68 extern const int phy_basic_t1_features_array[2]; 69 extern const int phy_gbit_features_array[2]; 70 extern const int phy_10gbit_features_array[1]; 71 72 /* 73 * Set phydev->irq to PHY_POLL if interrupts are not supported, 74 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 75 * the attached MAC driver handles the interrupt 76 */ 77 #define PHY_POLL -1 78 #define PHY_MAC_INTERRUPT -2 79 80 #define PHY_IS_INTERNAL 0x00000001 81 #define PHY_RST_AFTER_CLK_EN 0x00000002 82 #define PHY_POLL_CABLE_TEST 0x00000004 83 #define MDIO_DEVICE_IS_PHY 0x80000000 84 85 /** 86 * enum phy_interface_t - Interface Mode definitions 87 * 88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 90 * @PHY_INTERFACE_MODE_MII: Median-independent interface 91 * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface 92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 96 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 97 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 98 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 99 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 100 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 101 * @PHY_INTERFACE_MODE_SMII: ??? MII 102 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 103 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 104 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 105 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 106 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 107 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 108 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 109 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 110 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 111 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 112 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 113 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 114 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 115 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 116 * @PHY_INTERFACE_MODE_MAX: Book keeping 117 * 118 * Describes the interface between the MAC and PHY. 119 */ 120 typedef enum { 121 PHY_INTERFACE_MODE_NA, 122 PHY_INTERFACE_MODE_INTERNAL, 123 PHY_INTERFACE_MODE_MII, 124 PHY_INTERFACE_MODE_GMII, 125 PHY_INTERFACE_MODE_SGMII, 126 PHY_INTERFACE_MODE_TBI, 127 PHY_INTERFACE_MODE_REVMII, 128 PHY_INTERFACE_MODE_RMII, 129 PHY_INTERFACE_MODE_RGMII, 130 PHY_INTERFACE_MODE_RGMII_ID, 131 PHY_INTERFACE_MODE_RGMII_RXID, 132 PHY_INTERFACE_MODE_RGMII_TXID, 133 PHY_INTERFACE_MODE_RTBI, 134 PHY_INTERFACE_MODE_SMII, 135 PHY_INTERFACE_MODE_XGMII, 136 PHY_INTERFACE_MODE_XLGMII, 137 PHY_INTERFACE_MODE_MOCA, 138 PHY_INTERFACE_MODE_QSGMII, 139 PHY_INTERFACE_MODE_TRGMII, 140 PHY_INTERFACE_MODE_100BASEX, 141 PHY_INTERFACE_MODE_1000BASEX, 142 PHY_INTERFACE_MODE_2500BASEX, 143 PHY_INTERFACE_MODE_5GBASER, 144 PHY_INTERFACE_MODE_RXAUI, 145 PHY_INTERFACE_MODE_XAUI, 146 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 147 PHY_INTERFACE_MODE_10GBASER, 148 PHY_INTERFACE_MODE_USXGMII, 149 /* 10GBASE-KR - with Clause 73 AN */ 150 PHY_INTERFACE_MODE_10GKR, 151 PHY_INTERFACE_MODE_MAX, 152 } phy_interface_t; 153 154 /* 155 * phy_supported_speeds - return all speeds currently supported by a PHY device 156 */ 157 unsigned int phy_supported_speeds(struct phy_device *phy, 158 unsigned int *speeds, 159 unsigned int size); 160 161 /** 162 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 163 * @interface: enum phy_interface_t value 164 * 165 * Description: maps enum &phy_interface_t defined in this file 166 * into the device tree binding of 'phy-mode', so that Ethernet 167 * device driver can get PHY interface from device tree. 168 */ 169 static inline const char *phy_modes(phy_interface_t interface) 170 { 171 switch (interface) { 172 case PHY_INTERFACE_MODE_NA: 173 return ""; 174 case PHY_INTERFACE_MODE_INTERNAL: 175 return "internal"; 176 case PHY_INTERFACE_MODE_MII: 177 return "mii"; 178 case PHY_INTERFACE_MODE_GMII: 179 return "gmii"; 180 case PHY_INTERFACE_MODE_SGMII: 181 return "sgmii"; 182 case PHY_INTERFACE_MODE_TBI: 183 return "tbi"; 184 case PHY_INTERFACE_MODE_REVMII: 185 return "rev-mii"; 186 case PHY_INTERFACE_MODE_RMII: 187 return "rmii"; 188 case PHY_INTERFACE_MODE_RGMII: 189 return "rgmii"; 190 case PHY_INTERFACE_MODE_RGMII_ID: 191 return "rgmii-id"; 192 case PHY_INTERFACE_MODE_RGMII_RXID: 193 return "rgmii-rxid"; 194 case PHY_INTERFACE_MODE_RGMII_TXID: 195 return "rgmii-txid"; 196 case PHY_INTERFACE_MODE_RTBI: 197 return "rtbi"; 198 case PHY_INTERFACE_MODE_SMII: 199 return "smii"; 200 case PHY_INTERFACE_MODE_XGMII: 201 return "xgmii"; 202 case PHY_INTERFACE_MODE_XLGMII: 203 return "xlgmii"; 204 case PHY_INTERFACE_MODE_MOCA: 205 return "moca"; 206 case PHY_INTERFACE_MODE_QSGMII: 207 return "qsgmii"; 208 case PHY_INTERFACE_MODE_TRGMII: 209 return "trgmii"; 210 case PHY_INTERFACE_MODE_1000BASEX: 211 return "1000base-x"; 212 case PHY_INTERFACE_MODE_2500BASEX: 213 return "2500base-x"; 214 case PHY_INTERFACE_MODE_5GBASER: 215 return "5gbase-r"; 216 case PHY_INTERFACE_MODE_RXAUI: 217 return "rxaui"; 218 case PHY_INTERFACE_MODE_XAUI: 219 return "xaui"; 220 case PHY_INTERFACE_MODE_10GBASER: 221 return "10gbase-r"; 222 case PHY_INTERFACE_MODE_USXGMII: 223 return "usxgmii"; 224 case PHY_INTERFACE_MODE_10GKR: 225 return "10gbase-kr"; 226 case PHY_INTERFACE_MODE_100BASEX: 227 return "100base-x"; 228 default: 229 return "unknown"; 230 } 231 } 232 233 234 #define PHY_INIT_TIMEOUT 100000 235 #define PHY_FORCE_TIMEOUT 10 236 237 #define PHY_MAX_ADDR 32 238 239 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 240 #define PHY_ID_FMT "%s:%02x" 241 242 #define MII_BUS_ID_SIZE 61 243 244 struct device; 245 struct phylink; 246 struct sfp_bus; 247 struct sfp_upstream_ops; 248 struct sk_buff; 249 250 /** 251 * struct mdio_bus_stats - Statistics counters for MDIO busses 252 * @transfers: Total number of transfers, i.e. @writes + @reads 253 * @errors: Number of MDIO transfers that returned an error 254 * @writes: Number of write transfers 255 * @reads: Number of read transfers 256 * @syncp: Synchronisation for incrementing statistics 257 */ 258 struct mdio_bus_stats { 259 u64_stats_t transfers; 260 u64_stats_t errors; 261 u64_stats_t writes; 262 u64_stats_t reads; 263 /* Must be last, add new statistics above */ 264 struct u64_stats_sync syncp; 265 }; 266 267 /** 268 * struct phy_package_shared - Shared information in PHY packages 269 * @addr: Common PHY address used to combine PHYs in one package 270 * @refcnt: Number of PHYs connected to this shared data 271 * @flags: Initialization of PHY package 272 * @priv_size: Size of the shared private data @priv 273 * @priv: Driver private data shared across a PHY package 274 * 275 * Represents a shared structure between different phydev's in the same 276 * package, for example a quad PHY. See phy_package_join() and 277 * phy_package_leave(). 278 */ 279 struct phy_package_shared { 280 int addr; 281 refcount_t refcnt; 282 unsigned long flags; 283 size_t priv_size; 284 285 /* private data pointer */ 286 /* note that this pointer is shared between different phydevs and 287 * the user has to take care of appropriate locking. It is allocated 288 * and freed automatically by phy_package_join() and 289 * phy_package_leave(). 290 */ 291 void *priv; 292 }; 293 294 /* used as bit number in atomic bitops */ 295 #define PHY_SHARED_F_INIT_DONE 0 296 #define PHY_SHARED_F_PROBE_DONE 1 297 298 /** 299 * struct mii_bus - Represents an MDIO bus 300 * 301 * @owner: Who owns this device 302 * @name: User friendly name for this MDIO device, or driver name 303 * @id: Unique identifier for this bus, typical from bus hierarchy 304 * @priv: Driver private data 305 * 306 * The Bus class for PHYs. Devices which provide access to 307 * PHYs should register using this structure 308 */ 309 struct mii_bus { 310 struct module *owner; 311 const char *name; 312 char id[MII_BUS_ID_SIZE]; 313 void *priv; 314 /** @read: Perform a read transfer on the bus */ 315 int (*read)(struct mii_bus *bus, int addr, int regnum); 316 /** @write: Perform a write transfer on the bus */ 317 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 318 /** @reset: Perform a reset of the bus */ 319 int (*reset)(struct mii_bus *bus); 320 321 /** @stats: Statistic counters per device on the bus */ 322 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 323 324 /** 325 * @mdio_lock: A lock to ensure that only one thing can read/write 326 * the MDIO bus at a time 327 */ 328 struct mutex mdio_lock; 329 330 /** @parent: Parent device of this bus */ 331 struct device *parent; 332 /** @state: State of bus structure */ 333 enum { 334 MDIOBUS_ALLOCATED = 1, 335 MDIOBUS_REGISTERED, 336 MDIOBUS_UNREGISTERED, 337 MDIOBUS_RELEASED, 338 } state; 339 340 /** @dev: Kernel device representation */ 341 struct device dev; 342 343 /** @mdio_map: list of all MDIO devices on bus */ 344 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 345 346 /** @phy_mask: PHY addresses to be ignored when probing */ 347 u32 phy_mask; 348 349 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 350 u32 phy_ignore_ta_mask; 351 352 /** 353 * @irq: An array of interrupts, each PHY's interrupt at the index 354 * matching its address 355 */ 356 int irq[PHY_MAX_ADDR]; 357 358 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 359 int reset_delay_us; 360 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 361 int reset_post_delay_us; 362 /** @reset_gpiod: Reset GPIO descriptor pointer */ 363 struct gpio_desc *reset_gpiod; 364 365 /** @probe_capabilities: bus capabilities, used for probing */ 366 enum { 367 MDIOBUS_NO_CAP = 0, 368 MDIOBUS_C22, 369 MDIOBUS_C45, 370 MDIOBUS_C22_C45, 371 } probe_capabilities; 372 373 /** @shared_lock: protect access to the shared element */ 374 struct mutex shared_lock; 375 376 /** @shared: shared state across different PHYs */ 377 struct phy_package_shared *shared[PHY_MAX_ADDR]; 378 }; 379 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 380 381 struct mii_bus *mdiobus_alloc_size(size_t size); 382 383 /** 384 * mdiobus_alloc - Allocate an MDIO bus structure 385 * 386 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 387 * for the driver to register the bus. 388 */ 389 static inline struct mii_bus *mdiobus_alloc(void) 390 { 391 return mdiobus_alloc_size(0); 392 } 393 394 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 395 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 396 struct module *owner); 397 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 398 #define devm_mdiobus_register(dev, bus) \ 399 __devm_mdiobus_register(dev, bus, THIS_MODULE) 400 401 void mdiobus_unregister(struct mii_bus *bus); 402 void mdiobus_free(struct mii_bus *bus); 403 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 404 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 405 { 406 return devm_mdiobus_alloc_size(dev, 0); 407 } 408 409 struct mii_bus *mdio_find_bus(const char *mdio_name); 410 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 411 412 #define PHY_INTERRUPT_DISABLED false 413 #define PHY_INTERRUPT_ENABLED true 414 415 /** 416 * enum phy_state - PHY state machine states: 417 * 418 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 419 * should be called if and only if the PHY is in this state, 420 * given that the PHY device exists. 421 * - PHY driver probe function will set the state to @PHY_READY 422 * 423 * @PHY_READY: PHY is ready to send and receive packets, but the 424 * controller is not. By default, PHYs which do not implement 425 * probe will be set to this state by phy_probe(). 426 * - start will set the state to UP 427 * 428 * @PHY_UP: The PHY and attached device are ready to do work. 429 * Interrupts should be started here. 430 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 431 * 432 * @PHY_NOLINK: PHY is up, but not currently plugged in. 433 * - irq or timer will set @PHY_RUNNING if link comes back 434 * - phy_stop moves to @PHY_HALTED 435 * 436 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 437 * and/or receiving packets 438 * - irq or timer will set @PHY_NOLINK if link goes down 439 * - phy_stop moves to @PHY_HALTED 440 * 441 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 442 * is not expected to work, carrier will be indicated as down. PHY will be 443 * poll once per second, or on interrupt for it current state. 444 * Once complete, move to UP to restart the PHY. 445 * - phy_stop aborts the running test and moves to @PHY_HALTED 446 * 447 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 448 * PHY is in an error state. 449 * - phy_start moves to @PHY_UP 450 */ 451 enum phy_state { 452 PHY_DOWN = 0, 453 PHY_READY, 454 PHY_HALTED, 455 PHY_UP, 456 PHY_RUNNING, 457 PHY_NOLINK, 458 PHY_CABLETEST, 459 }; 460 461 #define MDIO_MMD_NUM 32 462 463 /** 464 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 465 * @devices_in_package: IEEE 802.3 devices in package register value. 466 * @mmds_present: bit vector of MMDs present. 467 * @device_ids: The device identifer for each present device. 468 */ 469 struct phy_c45_device_ids { 470 u32 devices_in_package; 471 u32 mmds_present; 472 u32 device_ids[MDIO_MMD_NUM]; 473 }; 474 475 struct macsec_context; 476 struct macsec_ops; 477 478 /** 479 * struct phy_device - An instance of a PHY 480 * 481 * @mdio: MDIO bus this PHY is on 482 * @drv: Pointer to the driver for this PHY instance 483 * @phy_id: UID for this device found during discovery 484 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 485 * @is_c45: Set to true if this PHY uses clause 45 addressing. 486 * @is_internal: Set to true if this PHY is internal to a MAC. 487 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 488 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 489 * @has_fixups: Set to true if this PHY has fixups/quirks. 490 * @suspended: Set to true if this PHY has been suspended successfully. 491 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 492 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 493 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 494 * @downshifted_rate: Set true if link speed has been downshifted. 495 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 496 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 497 * @state: State of the PHY for management purposes 498 * @dev_flags: Device-specific flags used by the PHY driver. 499 * @irq: IRQ number of the PHY's interrupt (-1 if none) 500 * @phy_timer: The timer for handling the state machine 501 * @phylink: Pointer to phylink instance for this PHY 502 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 503 * @sfp_bus: SFP bus attached to this PHY's fiber port 504 * @attached_dev: The attached enet driver's device instance ptr 505 * @adjust_link: Callback for the enet controller to respond to changes: in the 506 * link state. 507 * @phy_link_change: Callback for phylink for notification of link change 508 * @macsec_ops: MACsec offloading ops. 509 * 510 * @speed: Current link speed 511 * @duplex: Current duplex 512 * @port: Current port 513 * @pause: Current pause 514 * @asym_pause: Current asymmetric pause 515 * @supported: Combined MAC/PHY supported linkmodes 516 * @advertising: Currently advertised linkmodes 517 * @adv_old: Saved advertised while power saving for WoL 518 * @lp_advertising: Current link partner advertised linkmodes 519 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 520 * @autoneg: Flag autoneg being used 521 * @link: Current link state 522 * @autoneg_complete: Flag auto negotiation of the link has completed 523 * @mdix: Current crossover 524 * @mdix_ctrl: User setting of crossover 525 * @interrupts: Flag interrupts have been enabled 526 * @interface: enum phy_interface_t value 527 * @skb: Netlink message for cable diagnostics 528 * @nest: Netlink nest used for cable diagnostics 529 * @ehdr: nNtlink header for cable diagnostics 530 * @phy_led_triggers: Array of LED triggers 531 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 532 * @led_link_trigger: LED trigger for link up/down 533 * @last_triggered: last LED trigger for link speed 534 * @master_slave_set: User requested master/slave configuration 535 * @master_slave_get: Current master/slave advertisement 536 * @master_slave_state: Current master/slave configuration 537 * @mii_ts: Pointer to time stamper callbacks 538 * @lock: Mutex for serialization access to PHY 539 * @state_queue: Work queue for state machine 540 * @shared: Pointer to private data shared by phys in one package 541 * @priv: Pointer to driver private data 542 * 543 * interrupts currently only supports enabled or disabled, 544 * but could be changed in the future to support enabling 545 * and disabling specific interrupts 546 * 547 * Contains some infrastructure for polling and interrupt 548 * handling, as well as handling shifts in PHY hardware state 549 */ 550 struct phy_device { 551 struct mdio_device mdio; 552 553 /* Information about the PHY type */ 554 /* And management functions */ 555 struct phy_driver *drv; 556 557 u32 phy_id; 558 559 struct phy_c45_device_ids c45_ids; 560 unsigned is_c45:1; 561 unsigned is_internal:1; 562 unsigned is_pseudo_fixed_link:1; 563 unsigned is_gigabit_capable:1; 564 unsigned has_fixups:1; 565 unsigned suspended:1; 566 unsigned suspended_by_mdio_bus:1; 567 unsigned sysfs_links:1; 568 unsigned loopback_enabled:1; 569 unsigned downshifted_rate:1; 570 unsigned is_on_sfp_module:1; 571 unsigned mac_managed_pm:1; 572 573 unsigned autoneg:1; 574 /* The most recently read link state */ 575 unsigned link:1; 576 unsigned autoneg_complete:1; 577 578 /* Interrupts are enabled */ 579 unsigned interrupts:1; 580 581 enum phy_state state; 582 583 u32 dev_flags; 584 585 phy_interface_t interface; 586 587 /* 588 * forced speed & duplex (no autoneg) 589 * partner speed & duplex & pause (autoneg) 590 */ 591 int speed; 592 int duplex; 593 int port; 594 int pause; 595 int asym_pause; 596 u8 master_slave_get; 597 u8 master_slave_set; 598 u8 master_slave_state; 599 600 /* Union of PHY and Attached devices' supported link modes */ 601 /* See ethtool.h for more info */ 602 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 603 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 604 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 605 /* used with phy_speed_down */ 606 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 607 608 /* Energy efficient ethernet modes which should be prohibited */ 609 u32 eee_broken_modes; 610 611 #ifdef CONFIG_LED_TRIGGER_PHY 612 struct phy_led_trigger *phy_led_triggers; 613 unsigned int phy_num_led_triggers; 614 struct phy_led_trigger *last_triggered; 615 616 struct phy_led_trigger *led_link_trigger; 617 #endif 618 619 /* 620 * Interrupt number for this PHY 621 * -1 means no interrupt 622 */ 623 int irq; 624 625 /* private data pointer */ 626 /* For use by PHYs to maintain extra state */ 627 void *priv; 628 629 /* shared data pointer */ 630 /* For use by PHYs inside the same package that need a shared state. */ 631 struct phy_package_shared *shared; 632 633 /* Reporting cable test results */ 634 struct sk_buff *skb; 635 void *ehdr; 636 struct nlattr *nest; 637 638 /* Interrupt and Polling infrastructure */ 639 struct delayed_work state_queue; 640 641 struct mutex lock; 642 643 /* This may be modified under the rtnl lock */ 644 bool sfp_bus_attached; 645 struct sfp_bus *sfp_bus; 646 struct phylink *phylink; 647 struct net_device *attached_dev; 648 struct mii_timestamper *mii_ts; 649 650 u8 mdix; 651 u8 mdix_ctrl; 652 653 void (*phy_link_change)(struct phy_device *phydev, bool up); 654 void (*adjust_link)(struct net_device *dev); 655 656 #if IS_ENABLED(CONFIG_MACSEC) 657 /* MACsec management functions */ 658 const struct macsec_ops *macsec_ops; 659 #endif 660 }; 661 662 static inline struct phy_device *to_phy_device(const struct device *dev) 663 { 664 return container_of(to_mdio_device(dev), struct phy_device, mdio); 665 } 666 667 /** 668 * struct phy_tdr_config - Configuration of a TDR raw test 669 * 670 * @first: Distance for first data collection point 671 * @last: Distance for last data collection point 672 * @step: Step between data collection points 673 * @pair: Bitmap of cable pairs to collect data for 674 * 675 * A structure containing possible configuration parameters 676 * for a TDR cable test. The driver does not need to implement 677 * all the parameters, but should report what is actually used. 678 * All distances are in centimeters. 679 */ 680 struct phy_tdr_config { 681 u32 first; 682 u32 last; 683 u32 step; 684 s8 pair; 685 }; 686 #define PHY_PAIR_ALL -1 687 688 /** 689 * struct phy_driver - Driver structure for a particular PHY type 690 * 691 * @mdiodrv: Data common to all MDIO devices 692 * @phy_id: The result of reading the UID registers of this PHY 693 * type, and ANDing them with the phy_id_mask. This driver 694 * only works for PHYs with IDs which match this field 695 * @name: The friendly name of this PHY type 696 * @phy_id_mask: Defines the important bits of the phy_id 697 * @features: A mandatory list of features (speed, duplex, etc) 698 * supported by this PHY 699 * @flags: A bitfield defining certain other features this PHY 700 * supports (like interrupts) 701 * @driver_data: Static driver data 702 * 703 * All functions are optional. If config_aneg or read_status 704 * are not implemented, the phy core uses the genphy versions. 705 * Note that none of these functions should be called from 706 * interrupt time. The goal is for the bus read/write functions 707 * to be able to block when the bus transaction is happening, 708 * and be freed up by an interrupt (The MPC85xx has this ability, 709 * though it is not currently supported in the driver). 710 */ 711 struct phy_driver { 712 struct mdio_driver_common mdiodrv; 713 u32 phy_id; 714 char *name; 715 u32 phy_id_mask; 716 const unsigned long * const features; 717 u32 flags; 718 const void *driver_data; 719 720 /** 721 * @soft_reset: Called to issue a PHY software reset 722 */ 723 int (*soft_reset)(struct phy_device *phydev); 724 725 /** 726 * @config_init: Called to initialize the PHY, 727 * including after a reset 728 */ 729 int (*config_init)(struct phy_device *phydev); 730 731 /** 732 * @probe: Called during discovery. Used to set 733 * up device-specific structures, if any 734 */ 735 int (*probe)(struct phy_device *phydev); 736 737 /** 738 * @get_features: Probe the hardware to determine what 739 * abilities it has. Should only set phydev->supported. 740 */ 741 int (*get_features)(struct phy_device *phydev); 742 743 /* PHY Power Management */ 744 /** @suspend: Suspend the hardware, saving state if needed */ 745 int (*suspend)(struct phy_device *phydev); 746 /** @resume: Resume the hardware, restoring state if needed */ 747 int (*resume)(struct phy_device *phydev); 748 749 /** 750 * @config_aneg: Configures the advertisement and resets 751 * autonegotiation if phydev->autoneg is on, 752 * forces the speed to the current settings in phydev 753 * if phydev->autoneg is off 754 */ 755 int (*config_aneg)(struct phy_device *phydev); 756 757 /** @aneg_done: Determines the auto negotiation result */ 758 int (*aneg_done)(struct phy_device *phydev); 759 760 /** @read_status: Determines the negotiated speed and duplex */ 761 int (*read_status)(struct phy_device *phydev); 762 763 /** 764 * @config_intr: Enables or disables interrupts. 765 * It should also clear any pending interrupts prior to enabling the 766 * IRQs and after disabling them. 767 */ 768 int (*config_intr)(struct phy_device *phydev); 769 770 /** @handle_interrupt: Override default interrupt handling */ 771 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 772 773 /** @remove: Clears up any memory if needed */ 774 void (*remove)(struct phy_device *phydev); 775 776 /** 777 * @match_phy_device: Returns true if this is a suitable 778 * driver for the given phydev. If NULL, matching is based on 779 * phy_id and phy_id_mask. 780 */ 781 int (*match_phy_device)(struct phy_device *phydev); 782 783 /** 784 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 785 * register changes to enable Wake on LAN, so set_wol is 786 * provided to be called in the ethernet driver's set_wol 787 * function. 788 */ 789 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 790 791 /** 792 * @get_wol: See set_wol, but for checking whether Wake on LAN 793 * is enabled. 794 */ 795 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 796 797 /** 798 * @link_change_notify: Called to inform a PHY device driver 799 * when the core is about to change the link state. This 800 * callback is supposed to be used as fixup hook for drivers 801 * that need to take action when the link state 802 * changes. Drivers are by no means allowed to mess with the 803 * PHY device structure in their implementations. 804 */ 805 void (*link_change_notify)(struct phy_device *dev); 806 807 /** 808 * @read_mmd: PHY specific driver override for reading a MMD 809 * register. This function is optional for PHY specific 810 * drivers. When not provided, the default MMD read function 811 * will be used by phy_read_mmd(), which will use either a 812 * direct read for Clause 45 PHYs or an indirect read for 813 * Clause 22 PHYs. devnum is the MMD device number within the 814 * PHY device, regnum is the register within the selected MMD 815 * device. 816 */ 817 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 818 819 /** 820 * @write_mmd: PHY specific driver override for writing a MMD 821 * register. This function is optional for PHY specific 822 * drivers. When not provided, the default MMD write function 823 * will be used by phy_write_mmd(), which will use either a 824 * direct write for Clause 45 PHYs, or an indirect write for 825 * Clause 22 PHYs. devnum is the MMD device number within the 826 * PHY device, regnum is the register within the selected MMD 827 * device. val is the value to be written. 828 */ 829 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 830 u16 val); 831 832 /** @read_page: Return the current PHY register page number */ 833 int (*read_page)(struct phy_device *dev); 834 /** @write_page: Set the current PHY register page number */ 835 int (*write_page)(struct phy_device *dev, int page); 836 837 /** 838 * @module_info: Get the size and type of the eeprom contained 839 * within a plug-in module 840 */ 841 int (*module_info)(struct phy_device *dev, 842 struct ethtool_modinfo *modinfo); 843 844 /** 845 * @module_eeprom: Get the eeprom information from the plug-in 846 * module 847 */ 848 int (*module_eeprom)(struct phy_device *dev, 849 struct ethtool_eeprom *ee, u8 *data); 850 851 /** @cable_test_start: Start a cable test */ 852 int (*cable_test_start)(struct phy_device *dev); 853 854 /** @cable_test_tdr_start: Start a raw TDR cable test */ 855 int (*cable_test_tdr_start)(struct phy_device *dev, 856 const struct phy_tdr_config *config); 857 858 /** 859 * @cable_test_get_status: Once per second, or on interrupt, 860 * request the status of the test. 861 */ 862 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 863 864 /* Get statistics from the PHY using ethtool */ 865 /** @get_sset_count: Number of statistic counters */ 866 int (*get_sset_count)(struct phy_device *dev); 867 /** @get_strings: Names of the statistic counters */ 868 void (*get_strings)(struct phy_device *dev, u8 *data); 869 /** @get_stats: Return the statistic counter values */ 870 void (*get_stats)(struct phy_device *dev, 871 struct ethtool_stats *stats, u64 *data); 872 873 /* Get and Set PHY tunables */ 874 /** @get_tunable: Return the value of a tunable */ 875 int (*get_tunable)(struct phy_device *dev, 876 struct ethtool_tunable *tuna, void *data); 877 /** @set_tunable: Set the value of a tunable */ 878 int (*set_tunable)(struct phy_device *dev, 879 struct ethtool_tunable *tuna, 880 const void *data); 881 /** @set_loopback: Set the loopback mood of the PHY */ 882 int (*set_loopback)(struct phy_device *dev, bool enable); 883 /** @get_sqi: Get the signal quality indication */ 884 int (*get_sqi)(struct phy_device *dev); 885 /** @get_sqi_max: Get the maximum signal quality indication */ 886 int (*get_sqi_max)(struct phy_device *dev); 887 }; 888 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 889 struct phy_driver, mdiodrv) 890 891 #define PHY_ANY_ID "MATCH ANY PHY" 892 #define PHY_ANY_UID 0xffffffff 893 894 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 895 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 896 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 897 898 /* A Structure for boards to register fixups with the PHY Lib */ 899 struct phy_fixup { 900 struct list_head list; 901 char bus_id[MII_BUS_ID_SIZE + 3]; 902 u32 phy_uid; 903 u32 phy_uid_mask; 904 int (*run)(struct phy_device *phydev); 905 }; 906 907 const char *phy_speed_to_str(int speed); 908 const char *phy_duplex_to_str(unsigned int duplex); 909 910 /* A structure for mapping a particular speed and duplex 911 * combination to a particular SUPPORTED and ADVERTISED value 912 */ 913 struct phy_setting { 914 u32 speed; 915 u8 duplex; 916 u8 bit; 917 }; 918 919 const struct phy_setting * 920 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 921 bool exact); 922 size_t phy_speeds(unsigned int *speeds, size_t size, 923 unsigned long *mask); 924 void of_set_phy_supported(struct phy_device *phydev); 925 void of_set_phy_eee_broken(struct phy_device *phydev); 926 int phy_speed_down_core(struct phy_device *phydev); 927 928 /** 929 * phy_is_started - Convenience function to check whether PHY is started 930 * @phydev: The phy_device struct 931 */ 932 static inline bool phy_is_started(struct phy_device *phydev) 933 { 934 return phydev->state >= PHY_UP; 935 } 936 937 void phy_resolve_aneg_pause(struct phy_device *phydev); 938 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 939 void phy_check_downshift(struct phy_device *phydev); 940 941 /** 942 * phy_read - Convenience function for reading a given PHY register 943 * @phydev: the phy_device struct 944 * @regnum: register number to read 945 * 946 * NOTE: MUST NOT be called from interrupt context, 947 * because the bus read/write functions may wait for an interrupt 948 * to conclude the operation. 949 */ 950 static inline int phy_read(struct phy_device *phydev, u32 regnum) 951 { 952 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 953 } 954 955 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 956 timeout_us, sleep_before_read) \ 957 ({ \ 958 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 959 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 960 if (val < 0) \ 961 __ret = val; \ 962 if (__ret) \ 963 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 964 __ret; \ 965 }) 966 967 968 /** 969 * __phy_read - convenience function for reading a given PHY register 970 * @phydev: the phy_device struct 971 * @regnum: register number to read 972 * 973 * The caller must have taken the MDIO bus lock. 974 */ 975 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 976 { 977 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 978 } 979 980 /** 981 * phy_write - Convenience function for writing a given PHY register 982 * @phydev: the phy_device struct 983 * @regnum: register number to write 984 * @val: value to write to @regnum 985 * 986 * NOTE: MUST NOT be called from interrupt context, 987 * because the bus read/write functions may wait for an interrupt 988 * to conclude the operation. 989 */ 990 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 991 { 992 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 993 } 994 995 /** 996 * __phy_write - Convenience function for writing a given PHY register 997 * @phydev: the phy_device struct 998 * @regnum: register number to write 999 * @val: value to write to @regnum 1000 * 1001 * The caller must have taken the MDIO bus lock. 1002 */ 1003 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1004 { 1005 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1006 val); 1007 } 1008 1009 /** 1010 * __phy_modify_changed() - Convenience function for modifying a PHY register 1011 * @phydev: a pointer to a &struct phy_device 1012 * @regnum: register number 1013 * @mask: bit mask of bits to clear 1014 * @set: bit mask of bits to set 1015 * 1016 * Unlocked helper function which allows a PHY register to be modified as 1017 * new register value = (old register value & ~mask) | set 1018 * 1019 * Returns negative errno, 0 if there was no change, and 1 in case of change 1020 */ 1021 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1022 u16 mask, u16 set) 1023 { 1024 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1025 regnum, mask, set); 1026 } 1027 1028 /* 1029 * phy_read_mmd - Convenience function for reading a register 1030 * from an MMD on a given PHY. 1031 */ 1032 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1033 1034 /** 1035 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1036 * condition is met or a timeout occurs 1037 * 1038 * @phydev: The phy_device struct 1039 * @devaddr: The MMD to read from 1040 * @regnum: The register on the MMD to read 1041 * @val: Variable to read the register into 1042 * @cond: Break condition (usually involving @val) 1043 * @sleep_us: Maximum time to sleep between reads in us (0 1044 * tight-loops). Should be less than ~20ms since usleep_range 1045 * is used (see Documentation/timers/timers-howto.rst). 1046 * @timeout_us: Timeout in us, 0 means never timeout 1047 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1048 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1049 * case, the last read value at @args is stored in @val. Must not 1050 * be called from atomic context if sleep_us or timeout_us are used. 1051 */ 1052 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1053 sleep_us, timeout_us, sleep_before_read) \ 1054 ({ \ 1055 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1056 sleep_us, timeout_us, sleep_before_read, \ 1057 phydev, devaddr, regnum); \ 1058 if (val < 0) \ 1059 __ret = val; \ 1060 if (__ret) \ 1061 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1062 __ret; \ 1063 }) 1064 1065 /* 1066 * __phy_read_mmd - Convenience function for reading a register 1067 * from an MMD on a given PHY. 1068 */ 1069 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1070 1071 /* 1072 * phy_write_mmd - Convenience function for writing a register 1073 * on an MMD on a given PHY. 1074 */ 1075 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1076 1077 /* 1078 * __phy_write_mmd - Convenience function for writing a register 1079 * on an MMD on a given PHY. 1080 */ 1081 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1082 1083 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1084 u16 set); 1085 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1086 u16 set); 1087 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1088 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1089 1090 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1091 u16 mask, u16 set); 1092 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1093 u16 mask, u16 set); 1094 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1095 u16 mask, u16 set); 1096 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1097 u16 mask, u16 set); 1098 1099 /** 1100 * __phy_set_bits - Convenience function for setting bits in a PHY register 1101 * @phydev: the phy_device struct 1102 * @regnum: register number to write 1103 * @val: bits to set 1104 * 1105 * The caller must have taken the MDIO bus lock. 1106 */ 1107 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1108 { 1109 return __phy_modify(phydev, regnum, 0, val); 1110 } 1111 1112 /** 1113 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1114 * @phydev: the phy_device struct 1115 * @regnum: register number to write 1116 * @val: bits to clear 1117 * 1118 * The caller must have taken the MDIO bus lock. 1119 */ 1120 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1121 u16 val) 1122 { 1123 return __phy_modify(phydev, regnum, val, 0); 1124 } 1125 1126 /** 1127 * phy_set_bits - Convenience function for setting bits in a PHY register 1128 * @phydev: the phy_device struct 1129 * @regnum: register number to write 1130 * @val: bits to set 1131 */ 1132 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1133 { 1134 return phy_modify(phydev, regnum, 0, val); 1135 } 1136 1137 /** 1138 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1139 * @phydev: the phy_device struct 1140 * @regnum: register number to write 1141 * @val: bits to clear 1142 */ 1143 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1144 { 1145 return phy_modify(phydev, regnum, val, 0); 1146 } 1147 1148 /** 1149 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1150 * on MMD 1151 * @phydev: the phy_device struct 1152 * @devad: the MMD containing register to modify 1153 * @regnum: register number to modify 1154 * @val: bits to set 1155 * 1156 * The caller must have taken the MDIO bus lock. 1157 */ 1158 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1159 u32 regnum, u16 val) 1160 { 1161 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1162 } 1163 1164 /** 1165 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1166 * on MMD 1167 * @phydev: the phy_device struct 1168 * @devad: the MMD containing register to modify 1169 * @regnum: register number to modify 1170 * @val: bits to clear 1171 * 1172 * The caller must have taken the MDIO bus lock. 1173 */ 1174 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1175 u32 regnum, u16 val) 1176 { 1177 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1178 } 1179 1180 /** 1181 * phy_set_bits_mmd - Convenience function for setting bits in a register 1182 * on MMD 1183 * @phydev: the phy_device struct 1184 * @devad: the MMD containing register to modify 1185 * @regnum: register number to modify 1186 * @val: bits to set 1187 */ 1188 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1189 u32 regnum, u16 val) 1190 { 1191 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1192 } 1193 1194 /** 1195 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1196 * on MMD 1197 * @phydev: the phy_device struct 1198 * @devad: the MMD containing register to modify 1199 * @regnum: register number to modify 1200 * @val: bits to clear 1201 */ 1202 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1203 u32 regnum, u16 val) 1204 { 1205 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1206 } 1207 1208 /** 1209 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1210 * @phydev: the phy_device struct 1211 * 1212 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1213 * PHY_MAC_INTERRUPT 1214 */ 1215 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1216 { 1217 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1218 } 1219 1220 /** 1221 * phy_polling_mode - Convenience function for testing whether polling is 1222 * used to detect PHY status changes 1223 * @phydev: the phy_device struct 1224 */ 1225 static inline bool phy_polling_mode(struct phy_device *phydev) 1226 { 1227 if (phydev->state == PHY_CABLETEST) 1228 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1229 return true; 1230 1231 return phydev->irq == PHY_POLL; 1232 } 1233 1234 /** 1235 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1236 * @phydev: the phy_device struct 1237 */ 1238 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1239 { 1240 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1241 } 1242 1243 /** 1244 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1245 * @phydev: the phy_device struct 1246 */ 1247 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1248 { 1249 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1250 } 1251 1252 /** 1253 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1254 * PTP hardware clock capabilities. 1255 * @phydev: the phy_device struct 1256 */ 1257 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1258 { 1259 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1260 } 1261 1262 /** 1263 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1264 * @phydev: the phy_device struct 1265 */ 1266 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1267 { 1268 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1269 } 1270 1271 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1272 { 1273 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1274 } 1275 1276 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1277 int type) 1278 { 1279 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1280 } 1281 1282 static inline int phy_ts_info(struct phy_device *phydev, 1283 struct ethtool_ts_info *tsinfo) 1284 { 1285 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1286 } 1287 1288 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1289 int type) 1290 { 1291 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1292 } 1293 1294 /** 1295 * phy_is_internal - Convenience function for testing if a PHY is internal 1296 * @phydev: the phy_device struct 1297 */ 1298 static inline bool phy_is_internal(struct phy_device *phydev) 1299 { 1300 return phydev->is_internal; 1301 } 1302 1303 /** 1304 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1305 * @phydev: the phy_device struct 1306 */ 1307 static inline bool phy_on_sfp(struct phy_device *phydev) 1308 { 1309 return phydev->is_on_sfp_module; 1310 } 1311 1312 /** 1313 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1314 * PHY interface mode is RGMII (all variants) 1315 * @mode: the &phy_interface_t enum 1316 */ 1317 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1318 { 1319 return mode >= PHY_INTERFACE_MODE_RGMII && 1320 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1321 }; 1322 1323 /** 1324 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1325 * negotiation 1326 * @mode: one of &enum phy_interface_t 1327 * 1328 * Returns true if the PHY interface mode uses the 16-bit negotiation 1329 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1330 */ 1331 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1332 { 1333 return mode == PHY_INTERFACE_MODE_1000BASEX || 1334 mode == PHY_INTERFACE_MODE_2500BASEX; 1335 } 1336 1337 /** 1338 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1339 * is RGMII (all variants) 1340 * @phydev: the phy_device struct 1341 */ 1342 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1343 { 1344 return phy_interface_mode_is_rgmii(phydev->interface); 1345 }; 1346 1347 /** 1348 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1349 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1350 * @phydev: the phy_device struct 1351 */ 1352 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1353 { 1354 return phydev->is_pseudo_fixed_link; 1355 } 1356 1357 int phy_save_page(struct phy_device *phydev); 1358 int phy_select_page(struct phy_device *phydev, int page); 1359 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1360 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1361 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1362 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1363 u16 mask, u16 set); 1364 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1365 u16 mask, u16 set); 1366 1367 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1368 bool is_c45, 1369 struct phy_c45_device_ids *c45_ids); 1370 #if IS_ENABLED(CONFIG_PHYLIB) 1371 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1372 int phy_device_register(struct phy_device *phy); 1373 void phy_device_free(struct phy_device *phydev); 1374 #else 1375 static inline 1376 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1377 { 1378 return NULL; 1379 } 1380 1381 static inline int phy_device_register(struct phy_device *phy) 1382 { 1383 return 0; 1384 } 1385 1386 static inline void phy_device_free(struct phy_device *phydev) { } 1387 #endif /* CONFIG_PHYLIB */ 1388 void phy_device_remove(struct phy_device *phydev); 1389 int phy_init_hw(struct phy_device *phydev); 1390 int phy_suspend(struct phy_device *phydev); 1391 int phy_resume(struct phy_device *phydev); 1392 int __phy_resume(struct phy_device *phydev); 1393 int phy_loopback(struct phy_device *phydev, bool enable); 1394 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1395 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1396 int phy_sfp_probe(struct phy_device *phydev, 1397 const struct sfp_upstream_ops *ops); 1398 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1399 phy_interface_t interface); 1400 struct phy_device *phy_find_first(struct mii_bus *bus); 1401 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1402 u32 flags, phy_interface_t interface); 1403 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1404 void (*handler)(struct net_device *), 1405 phy_interface_t interface); 1406 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1407 void (*handler)(struct net_device *), 1408 phy_interface_t interface); 1409 void phy_disconnect(struct phy_device *phydev); 1410 void phy_detach(struct phy_device *phydev); 1411 void phy_start(struct phy_device *phydev); 1412 void phy_stop(struct phy_device *phydev); 1413 int phy_config_aneg(struct phy_device *phydev); 1414 int phy_start_aneg(struct phy_device *phydev); 1415 int phy_aneg_done(struct phy_device *phydev); 1416 int phy_speed_down(struct phy_device *phydev, bool sync); 1417 int phy_speed_up(struct phy_device *phydev); 1418 1419 int phy_restart_aneg(struct phy_device *phydev); 1420 int phy_reset_after_clk_enable(struct phy_device *phydev); 1421 1422 #if IS_ENABLED(CONFIG_PHYLIB) 1423 int phy_start_cable_test(struct phy_device *phydev, 1424 struct netlink_ext_ack *extack); 1425 int phy_start_cable_test_tdr(struct phy_device *phydev, 1426 struct netlink_ext_ack *extack, 1427 const struct phy_tdr_config *config); 1428 #else 1429 static inline 1430 int phy_start_cable_test(struct phy_device *phydev, 1431 struct netlink_ext_ack *extack) 1432 { 1433 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1434 return -EOPNOTSUPP; 1435 } 1436 static inline 1437 int phy_start_cable_test_tdr(struct phy_device *phydev, 1438 struct netlink_ext_ack *extack, 1439 const struct phy_tdr_config *config) 1440 { 1441 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1442 return -EOPNOTSUPP; 1443 } 1444 #endif 1445 1446 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1447 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1448 u16 cm); 1449 1450 static inline void phy_device_reset(struct phy_device *phydev, int value) 1451 { 1452 mdio_device_reset(&phydev->mdio, value); 1453 } 1454 1455 #define phydev_err(_phydev, format, args...) \ 1456 dev_err(&_phydev->mdio.dev, format, ##args) 1457 1458 #define phydev_info(_phydev, format, args...) \ 1459 dev_info(&_phydev->mdio.dev, format, ##args) 1460 1461 #define phydev_warn(_phydev, format, args...) \ 1462 dev_warn(&_phydev->mdio.dev, format, ##args) 1463 1464 #define phydev_dbg(_phydev, format, args...) \ 1465 dev_dbg(&_phydev->mdio.dev, format, ##args) 1466 1467 static inline const char *phydev_name(const struct phy_device *phydev) 1468 { 1469 return dev_name(&phydev->mdio.dev); 1470 } 1471 1472 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1473 { 1474 mutex_lock(&phydev->mdio.bus->mdio_lock); 1475 } 1476 1477 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1478 { 1479 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1480 } 1481 1482 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1483 __printf(2, 3); 1484 char *phy_attached_info_irq(struct phy_device *phydev) 1485 __malloc; 1486 void phy_attached_info(struct phy_device *phydev); 1487 1488 /* Clause 22 PHY */ 1489 int genphy_read_abilities(struct phy_device *phydev); 1490 int genphy_setup_forced(struct phy_device *phydev); 1491 int genphy_restart_aneg(struct phy_device *phydev); 1492 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1493 int genphy_config_eee_advert(struct phy_device *phydev); 1494 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1495 int genphy_aneg_done(struct phy_device *phydev); 1496 int genphy_update_link(struct phy_device *phydev); 1497 int genphy_read_lpa(struct phy_device *phydev); 1498 int genphy_read_status_fixed(struct phy_device *phydev); 1499 int genphy_read_status(struct phy_device *phydev); 1500 int genphy_suspend(struct phy_device *phydev); 1501 int genphy_resume(struct phy_device *phydev); 1502 int genphy_loopback(struct phy_device *phydev, bool enable); 1503 int genphy_soft_reset(struct phy_device *phydev); 1504 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1505 1506 static inline int genphy_config_aneg(struct phy_device *phydev) 1507 { 1508 return __genphy_config_aneg(phydev, false); 1509 } 1510 1511 static inline int genphy_no_config_intr(struct phy_device *phydev) 1512 { 1513 return 0; 1514 } 1515 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1516 u16 regnum); 1517 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1518 u16 regnum, u16 val); 1519 1520 /* Clause 37 */ 1521 int genphy_c37_config_aneg(struct phy_device *phydev); 1522 int genphy_c37_read_status(struct phy_device *phydev); 1523 1524 /* Clause 45 PHY */ 1525 int genphy_c45_restart_aneg(struct phy_device *phydev); 1526 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1527 int genphy_c45_aneg_done(struct phy_device *phydev); 1528 int genphy_c45_read_link(struct phy_device *phydev); 1529 int genphy_c45_read_lpa(struct phy_device *phydev); 1530 int genphy_c45_read_pma(struct phy_device *phydev); 1531 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1532 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1533 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1534 int genphy_c45_read_mdix(struct phy_device *phydev); 1535 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1536 int genphy_c45_read_status(struct phy_device *phydev); 1537 int genphy_c45_config_aneg(struct phy_device *phydev); 1538 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1539 int genphy_c45_pma_resume(struct phy_device *phydev); 1540 int genphy_c45_pma_suspend(struct phy_device *phydev); 1541 1542 /* Generic C45 PHY driver */ 1543 extern struct phy_driver genphy_c45_driver; 1544 1545 /* The gen10g_* functions are the old Clause 45 stub */ 1546 int gen10g_config_aneg(struct phy_device *phydev); 1547 1548 static inline int phy_read_status(struct phy_device *phydev) 1549 { 1550 if (!phydev->drv) 1551 return -EIO; 1552 1553 if (phydev->drv->read_status) 1554 return phydev->drv->read_status(phydev); 1555 else 1556 return genphy_read_status(phydev); 1557 } 1558 1559 void phy_driver_unregister(struct phy_driver *drv); 1560 void phy_drivers_unregister(struct phy_driver *drv, int n); 1561 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1562 int phy_drivers_register(struct phy_driver *new_driver, int n, 1563 struct module *owner); 1564 void phy_error(struct phy_device *phydev); 1565 void phy_state_machine(struct work_struct *work); 1566 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1567 void phy_trigger_machine(struct phy_device *phydev); 1568 void phy_mac_interrupt(struct phy_device *phydev); 1569 void phy_start_machine(struct phy_device *phydev); 1570 void phy_stop_machine(struct phy_device *phydev); 1571 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1572 struct ethtool_link_ksettings *cmd); 1573 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1574 const struct ethtool_link_ksettings *cmd); 1575 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1576 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1577 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1578 int phy_disable_interrupts(struct phy_device *phydev); 1579 void phy_request_interrupt(struct phy_device *phydev); 1580 void phy_free_interrupt(struct phy_device *phydev); 1581 void phy_print_status(struct phy_device *phydev); 1582 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1583 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1584 void phy_advertise_supported(struct phy_device *phydev); 1585 void phy_support_sym_pause(struct phy_device *phydev); 1586 void phy_support_asym_pause(struct phy_device *phydev); 1587 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1588 bool autoneg); 1589 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1590 bool phy_validate_pause(struct phy_device *phydev, 1591 struct ethtool_pauseparam *pp); 1592 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1593 1594 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1595 const int *delay_values, int size, bool is_rx); 1596 1597 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1598 bool *tx_pause, bool *rx_pause); 1599 1600 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1601 int (*run)(struct phy_device *)); 1602 int phy_register_fixup_for_id(const char *bus_id, 1603 int (*run)(struct phy_device *)); 1604 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1605 int (*run)(struct phy_device *)); 1606 1607 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1608 int phy_unregister_fixup_for_id(const char *bus_id); 1609 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1610 1611 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1612 int phy_get_eee_err(struct phy_device *phydev); 1613 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1614 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1615 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1616 void phy_ethtool_get_wol(struct phy_device *phydev, 1617 struct ethtool_wolinfo *wol); 1618 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1619 struct ethtool_link_ksettings *cmd); 1620 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1621 const struct ethtool_link_ksettings *cmd); 1622 int phy_ethtool_nway_reset(struct net_device *ndev); 1623 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1624 void phy_package_leave(struct phy_device *phydev); 1625 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1626 int addr, size_t priv_size); 1627 1628 #if IS_ENABLED(CONFIG_PHYLIB) 1629 int __init mdio_bus_init(void); 1630 void mdio_bus_exit(void); 1631 #endif 1632 1633 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1634 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1635 int phy_ethtool_get_stats(struct phy_device *phydev, 1636 struct ethtool_stats *stats, u64 *data); 1637 1638 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1639 { 1640 struct phy_package_shared *shared = phydev->shared; 1641 1642 if (!shared) 1643 return -EIO; 1644 1645 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1646 } 1647 1648 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1649 { 1650 struct phy_package_shared *shared = phydev->shared; 1651 1652 if (!shared) 1653 return -EIO; 1654 1655 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1656 } 1657 1658 static inline int phy_package_write(struct phy_device *phydev, 1659 u32 regnum, u16 val) 1660 { 1661 struct phy_package_shared *shared = phydev->shared; 1662 1663 if (!shared) 1664 return -EIO; 1665 1666 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1667 } 1668 1669 static inline int __phy_package_write(struct phy_device *phydev, 1670 u32 regnum, u16 val) 1671 { 1672 struct phy_package_shared *shared = phydev->shared; 1673 1674 if (!shared) 1675 return -EIO; 1676 1677 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1678 } 1679 1680 static inline bool __phy_package_set_once(struct phy_device *phydev, 1681 unsigned int b) 1682 { 1683 struct phy_package_shared *shared = phydev->shared; 1684 1685 if (!shared) 1686 return false; 1687 1688 return !test_and_set_bit(b, &shared->flags); 1689 } 1690 1691 static inline bool phy_package_init_once(struct phy_device *phydev) 1692 { 1693 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1694 } 1695 1696 static inline bool phy_package_probe_once(struct phy_device *phydev) 1697 { 1698 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1699 } 1700 1701 extern struct bus_type mdio_bus_type; 1702 1703 struct mdio_board_info { 1704 const char *bus_id; 1705 char modalias[MDIO_NAME_SIZE]; 1706 int mdio_addr; 1707 const void *platform_data; 1708 }; 1709 1710 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1711 int mdiobus_register_board_info(const struct mdio_board_info *info, 1712 unsigned int n); 1713 #else 1714 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1715 unsigned int n) 1716 { 1717 return 0; 1718 } 1719 #endif 1720 1721 1722 /** 1723 * phy_module_driver() - Helper macro for registering PHY drivers 1724 * @__phy_drivers: array of PHY drivers to register 1725 * @__count: Numbers of members in array 1726 * 1727 * Helper macro for PHY drivers which do not do anything special in module 1728 * init/exit. Each module may only use this macro once, and calling it 1729 * replaces module_init() and module_exit(). 1730 */ 1731 #define phy_module_driver(__phy_drivers, __count) \ 1732 static int __init phy_module_init(void) \ 1733 { \ 1734 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1735 } \ 1736 module_init(phy_module_init); \ 1737 static void __exit phy_module_exit(void) \ 1738 { \ 1739 phy_drivers_unregister(__phy_drivers, __count); \ 1740 } \ 1741 module_exit(phy_module_exit) 1742 1743 #define module_phy_driver(__phy_drivers) \ 1744 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1745 1746 bool phy_driver_is_genphy(struct phy_device *phydev); 1747 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1748 1749 #endif /* __PHY_H */ 1750