1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/netlink.h> 19 #include <linux/mdio.h> 20 #include <linux/mii.h> 21 #include <linux/mii_timestamper.h> 22 #include <linux/module.h> 23 #include <linux/timer.h> 24 #include <linux/workqueue.h> 25 #include <linux/mod_devicetable.h> 26 #include <linux/u64_stats_sync.h> 27 #include <linux/irqreturn.h> 28 #include <linux/iopoll.h> 29 #include <linux/refcount.h> 30 31 #include <linux/atomic.h> 32 33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 54 55 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 56 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 57 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 58 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 59 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 60 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 61 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 62 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 63 64 extern const int phy_basic_ports_array[3]; 65 extern const int phy_fibre_port_array[1]; 66 extern const int phy_all_ports_features_array[7]; 67 extern const int phy_10_100_features_array[4]; 68 extern const int phy_basic_t1_features_array[2]; 69 extern const int phy_gbit_features_array[2]; 70 extern const int phy_10gbit_features_array[1]; 71 72 /* 73 * Set phydev->irq to PHY_POLL if interrupts are not supported, 74 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 75 * the attached MAC driver handles the interrupt 76 */ 77 #define PHY_POLL -1 78 #define PHY_MAC_INTERRUPT -2 79 80 #define PHY_IS_INTERNAL 0x00000001 81 #define PHY_RST_AFTER_CLK_EN 0x00000002 82 #define PHY_POLL_CABLE_TEST 0x00000004 83 #define MDIO_DEVICE_IS_PHY 0x80000000 84 85 /** 86 * enum phy_interface_t - Interface Mode definitions 87 * 88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 90 * @PHY_INTERFACE_MODE_MII: Median-independent interface 91 * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface 92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 96 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 97 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 98 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 99 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 100 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 101 * @PHY_INTERFACE_MODE_SMII: ??? MII 102 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 103 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 104 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 105 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 106 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 107 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 108 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 109 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 110 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 111 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 112 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 113 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 114 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 115 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 116 * @PHY_INTERFACE_MODE_MAX: Book keeping 117 * 118 * Describes the interface between the MAC and PHY. 119 */ 120 typedef enum { 121 PHY_INTERFACE_MODE_NA, 122 PHY_INTERFACE_MODE_INTERNAL, 123 PHY_INTERFACE_MODE_MII, 124 PHY_INTERFACE_MODE_GMII, 125 PHY_INTERFACE_MODE_SGMII, 126 PHY_INTERFACE_MODE_TBI, 127 PHY_INTERFACE_MODE_REVMII, 128 PHY_INTERFACE_MODE_RMII, 129 PHY_INTERFACE_MODE_RGMII, 130 PHY_INTERFACE_MODE_RGMII_ID, 131 PHY_INTERFACE_MODE_RGMII_RXID, 132 PHY_INTERFACE_MODE_RGMII_TXID, 133 PHY_INTERFACE_MODE_RTBI, 134 PHY_INTERFACE_MODE_SMII, 135 PHY_INTERFACE_MODE_XGMII, 136 PHY_INTERFACE_MODE_XLGMII, 137 PHY_INTERFACE_MODE_MOCA, 138 PHY_INTERFACE_MODE_QSGMII, 139 PHY_INTERFACE_MODE_TRGMII, 140 PHY_INTERFACE_MODE_100BASEX, 141 PHY_INTERFACE_MODE_1000BASEX, 142 PHY_INTERFACE_MODE_2500BASEX, 143 PHY_INTERFACE_MODE_5GBASER, 144 PHY_INTERFACE_MODE_RXAUI, 145 PHY_INTERFACE_MODE_XAUI, 146 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 147 PHY_INTERFACE_MODE_10GBASER, 148 PHY_INTERFACE_MODE_USXGMII, 149 /* 10GBASE-KR - with Clause 73 AN */ 150 PHY_INTERFACE_MODE_10GKR, 151 PHY_INTERFACE_MODE_MAX, 152 } phy_interface_t; 153 154 /* 155 * phy_supported_speeds - return all speeds currently supported by a PHY device 156 */ 157 unsigned int phy_supported_speeds(struct phy_device *phy, 158 unsigned int *speeds, 159 unsigned int size); 160 161 /** 162 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 163 * @interface: enum phy_interface_t value 164 * 165 * Description: maps enum &phy_interface_t defined in this file 166 * into the device tree binding of 'phy-mode', so that Ethernet 167 * device driver can get PHY interface from device tree. 168 */ 169 static inline const char *phy_modes(phy_interface_t interface) 170 { 171 switch (interface) { 172 case PHY_INTERFACE_MODE_NA: 173 return ""; 174 case PHY_INTERFACE_MODE_INTERNAL: 175 return "internal"; 176 case PHY_INTERFACE_MODE_MII: 177 return "mii"; 178 case PHY_INTERFACE_MODE_GMII: 179 return "gmii"; 180 case PHY_INTERFACE_MODE_SGMII: 181 return "sgmii"; 182 case PHY_INTERFACE_MODE_TBI: 183 return "tbi"; 184 case PHY_INTERFACE_MODE_REVMII: 185 return "rev-mii"; 186 case PHY_INTERFACE_MODE_RMII: 187 return "rmii"; 188 case PHY_INTERFACE_MODE_RGMII: 189 return "rgmii"; 190 case PHY_INTERFACE_MODE_RGMII_ID: 191 return "rgmii-id"; 192 case PHY_INTERFACE_MODE_RGMII_RXID: 193 return "rgmii-rxid"; 194 case PHY_INTERFACE_MODE_RGMII_TXID: 195 return "rgmii-txid"; 196 case PHY_INTERFACE_MODE_RTBI: 197 return "rtbi"; 198 case PHY_INTERFACE_MODE_SMII: 199 return "smii"; 200 case PHY_INTERFACE_MODE_XGMII: 201 return "xgmii"; 202 case PHY_INTERFACE_MODE_XLGMII: 203 return "xlgmii"; 204 case PHY_INTERFACE_MODE_MOCA: 205 return "moca"; 206 case PHY_INTERFACE_MODE_QSGMII: 207 return "qsgmii"; 208 case PHY_INTERFACE_MODE_TRGMII: 209 return "trgmii"; 210 case PHY_INTERFACE_MODE_1000BASEX: 211 return "1000base-x"; 212 case PHY_INTERFACE_MODE_2500BASEX: 213 return "2500base-x"; 214 case PHY_INTERFACE_MODE_5GBASER: 215 return "5gbase-r"; 216 case PHY_INTERFACE_MODE_RXAUI: 217 return "rxaui"; 218 case PHY_INTERFACE_MODE_XAUI: 219 return "xaui"; 220 case PHY_INTERFACE_MODE_10GBASER: 221 return "10gbase-r"; 222 case PHY_INTERFACE_MODE_USXGMII: 223 return "usxgmii"; 224 case PHY_INTERFACE_MODE_10GKR: 225 return "10gbase-kr"; 226 case PHY_INTERFACE_MODE_100BASEX: 227 return "100base-x"; 228 default: 229 return "unknown"; 230 } 231 } 232 233 234 #define PHY_INIT_TIMEOUT 100000 235 #define PHY_FORCE_TIMEOUT 10 236 237 #define PHY_MAX_ADDR 32 238 239 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 240 #define PHY_ID_FMT "%s:%02x" 241 242 #define MII_BUS_ID_SIZE 61 243 244 struct device; 245 struct phylink; 246 struct sfp_bus; 247 struct sfp_upstream_ops; 248 struct sk_buff; 249 250 /** 251 * struct mdio_bus_stats - Statistics counters for MDIO busses 252 * @transfers: Total number of transfers, i.e. @writes + @reads 253 * @errors: Number of MDIO transfers that returned an error 254 * @writes: Number of write transfers 255 * @reads: Number of read transfers 256 * @syncp: Synchronisation for incrementing statistics 257 */ 258 struct mdio_bus_stats { 259 u64_stats_t transfers; 260 u64_stats_t errors; 261 u64_stats_t writes; 262 u64_stats_t reads; 263 /* Must be last, add new statistics above */ 264 struct u64_stats_sync syncp; 265 }; 266 267 /** 268 * struct phy_package_shared - Shared information in PHY packages 269 * @addr: Common PHY address used to combine PHYs in one package 270 * @refcnt: Number of PHYs connected to this shared data 271 * @flags: Initialization of PHY package 272 * @priv_size: Size of the shared private data @priv 273 * @priv: Driver private data shared across a PHY package 274 * 275 * Represents a shared structure between different phydev's in the same 276 * package, for example a quad PHY. See phy_package_join() and 277 * phy_package_leave(). 278 */ 279 struct phy_package_shared { 280 int addr; 281 refcount_t refcnt; 282 unsigned long flags; 283 size_t priv_size; 284 285 /* private data pointer */ 286 /* note that this pointer is shared between different phydevs and 287 * the user has to take care of appropriate locking. It is allocated 288 * and freed automatically by phy_package_join() and 289 * phy_package_leave(). 290 */ 291 void *priv; 292 }; 293 294 /* used as bit number in atomic bitops */ 295 #define PHY_SHARED_F_INIT_DONE 0 296 #define PHY_SHARED_F_PROBE_DONE 1 297 298 /** 299 * struct mii_bus - Represents an MDIO bus 300 * 301 * @owner: Who owns this device 302 * @name: User friendly name for this MDIO device, or driver name 303 * @id: Unique identifier for this bus, typical from bus hierarchy 304 * @priv: Driver private data 305 * 306 * The Bus class for PHYs. Devices which provide access to 307 * PHYs should register using this structure 308 */ 309 struct mii_bus { 310 struct module *owner; 311 const char *name; 312 char id[MII_BUS_ID_SIZE]; 313 void *priv; 314 /** @read: Perform a read transfer on the bus */ 315 int (*read)(struct mii_bus *bus, int addr, int regnum); 316 /** @write: Perform a write transfer on the bus */ 317 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 318 /** @reset: Perform a reset of the bus */ 319 int (*reset)(struct mii_bus *bus); 320 321 /** @stats: Statistic counters per device on the bus */ 322 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 323 324 /** 325 * @mdio_lock: A lock to ensure that only one thing can read/write 326 * the MDIO bus at a time 327 */ 328 struct mutex mdio_lock; 329 330 /** @parent: Parent device of this bus */ 331 struct device *parent; 332 /** @state: State of bus structure */ 333 enum { 334 MDIOBUS_ALLOCATED = 1, 335 MDIOBUS_REGISTERED, 336 MDIOBUS_UNREGISTERED, 337 MDIOBUS_RELEASED, 338 } state; 339 340 /** @dev: Kernel device representation */ 341 struct device dev; 342 343 /** @mdio_map: list of all MDIO devices on bus */ 344 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 345 346 /** @phy_mask: PHY addresses to be ignored when probing */ 347 u32 phy_mask; 348 349 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 350 u32 phy_ignore_ta_mask; 351 352 /** 353 * @irq: An array of interrupts, each PHY's interrupt at the index 354 * matching its address 355 */ 356 int irq[PHY_MAX_ADDR]; 357 358 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 359 int reset_delay_us; 360 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 361 int reset_post_delay_us; 362 /** @reset_gpiod: Reset GPIO descriptor pointer */ 363 struct gpio_desc *reset_gpiod; 364 365 /** @probe_capabilities: bus capabilities, used for probing */ 366 enum { 367 MDIOBUS_NO_CAP = 0, 368 MDIOBUS_C22, 369 MDIOBUS_C45, 370 MDIOBUS_C22_C45, 371 } probe_capabilities; 372 373 /** @shared_lock: protect access to the shared element */ 374 struct mutex shared_lock; 375 376 /** @shared: shared state across different PHYs */ 377 struct phy_package_shared *shared[PHY_MAX_ADDR]; 378 }; 379 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 380 381 struct mii_bus *mdiobus_alloc_size(size_t size); 382 383 /** 384 * mdiobus_alloc - Allocate an MDIO bus structure 385 * 386 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 387 * for the driver to register the bus. 388 */ 389 static inline struct mii_bus *mdiobus_alloc(void) 390 { 391 return mdiobus_alloc_size(0); 392 } 393 394 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 395 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 396 struct module *owner); 397 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 398 #define devm_mdiobus_register(dev, bus) \ 399 __devm_mdiobus_register(dev, bus, THIS_MODULE) 400 401 void mdiobus_unregister(struct mii_bus *bus); 402 void mdiobus_free(struct mii_bus *bus); 403 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 404 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 405 { 406 return devm_mdiobus_alloc_size(dev, 0); 407 } 408 409 struct mii_bus *mdio_find_bus(const char *mdio_name); 410 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 411 412 #define PHY_INTERRUPT_DISABLED false 413 #define PHY_INTERRUPT_ENABLED true 414 415 /** 416 * enum phy_state - PHY state machine states: 417 * 418 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 419 * should be called if and only if the PHY is in this state, 420 * given that the PHY device exists. 421 * - PHY driver probe function will set the state to @PHY_READY 422 * 423 * @PHY_READY: PHY is ready to send and receive packets, but the 424 * controller is not. By default, PHYs which do not implement 425 * probe will be set to this state by phy_probe(). 426 * - start will set the state to UP 427 * 428 * @PHY_UP: The PHY and attached device are ready to do work. 429 * Interrupts should be started here. 430 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 431 * 432 * @PHY_NOLINK: PHY is up, but not currently plugged in. 433 * - irq or timer will set @PHY_RUNNING if link comes back 434 * - phy_stop moves to @PHY_HALTED 435 * 436 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 437 * and/or receiving packets 438 * - irq or timer will set @PHY_NOLINK if link goes down 439 * - phy_stop moves to @PHY_HALTED 440 * 441 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 442 * is not expected to work, carrier will be indicated as down. PHY will be 443 * poll once per second, or on interrupt for it current state. 444 * Once complete, move to UP to restart the PHY. 445 * - phy_stop aborts the running test and moves to @PHY_HALTED 446 * 447 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 448 * PHY is in an error state. 449 * - phy_start moves to @PHY_UP 450 */ 451 enum phy_state { 452 PHY_DOWN = 0, 453 PHY_READY, 454 PHY_HALTED, 455 PHY_UP, 456 PHY_RUNNING, 457 PHY_NOLINK, 458 PHY_CABLETEST, 459 }; 460 461 #define MDIO_MMD_NUM 32 462 463 /** 464 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 465 * @devices_in_package: IEEE 802.3 devices in package register value. 466 * @mmds_present: bit vector of MMDs present. 467 * @device_ids: The device identifer for each present device. 468 */ 469 struct phy_c45_device_ids { 470 u32 devices_in_package; 471 u32 mmds_present; 472 u32 device_ids[MDIO_MMD_NUM]; 473 }; 474 475 struct macsec_context; 476 struct macsec_ops; 477 478 /** 479 * struct phy_device - An instance of a PHY 480 * 481 * @mdio: MDIO bus this PHY is on 482 * @drv: Pointer to the driver for this PHY instance 483 * @phy_id: UID for this device found during discovery 484 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 485 * @is_c45: Set to true if this PHY uses clause 45 addressing. 486 * @is_internal: Set to true if this PHY is internal to a MAC. 487 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 488 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 489 * @has_fixups: Set to true if this PHY has fixups/quirks. 490 * @suspended: Set to true if this PHY has been suspended successfully. 491 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 492 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 493 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 494 * @downshifted_rate: Set true if link speed has been downshifted. 495 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 496 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 497 * @state: State of the PHY for management purposes 498 * @dev_flags: Device-specific flags used by the PHY driver. 499 * Bits [15:0] are free to use by the PHY driver to communicate 500 * driver specific behavior. 501 * Bits [23:16] are currently reserved for future use. 502 * Bits [31:24] are reserved for defining generic 503 * PHY driver behavior. 504 * @irq: IRQ number of the PHY's interrupt (-1 if none) 505 * @phy_timer: The timer for handling the state machine 506 * @phylink: Pointer to phylink instance for this PHY 507 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 508 * @sfp_bus: SFP bus attached to this PHY's fiber port 509 * @attached_dev: The attached enet driver's device instance ptr 510 * @adjust_link: Callback for the enet controller to respond to changes: in the 511 * link state. 512 * @phy_link_change: Callback for phylink for notification of link change 513 * @macsec_ops: MACsec offloading ops. 514 * 515 * @speed: Current link speed 516 * @duplex: Current duplex 517 * @port: Current port 518 * @pause: Current pause 519 * @asym_pause: Current asymmetric pause 520 * @supported: Combined MAC/PHY supported linkmodes 521 * @advertising: Currently advertised linkmodes 522 * @adv_old: Saved advertised while power saving for WoL 523 * @lp_advertising: Current link partner advertised linkmodes 524 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 525 * @autoneg: Flag autoneg being used 526 * @link: Current link state 527 * @autoneg_complete: Flag auto negotiation of the link has completed 528 * @mdix: Current crossover 529 * @mdix_ctrl: User setting of crossover 530 * @interrupts: Flag interrupts have been enabled 531 * @interface: enum phy_interface_t value 532 * @skb: Netlink message for cable diagnostics 533 * @nest: Netlink nest used for cable diagnostics 534 * @ehdr: nNtlink header for cable diagnostics 535 * @phy_led_triggers: Array of LED triggers 536 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 537 * @led_link_trigger: LED trigger for link up/down 538 * @last_triggered: last LED trigger for link speed 539 * @master_slave_set: User requested master/slave configuration 540 * @master_slave_get: Current master/slave advertisement 541 * @master_slave_state: Current master/slave configuration 542 * @mii_ts: Pointer to time stamper callbacks 543 * @lock: Mutex for serialization access to PHY 544 * @state_queue: Work queue for state machine 545 * @shared: Pointer to private data shared by phys in one package 546 * @priv: Pointer to driver private data 547 * 548 * interrupts currently only supports enabled or disabled, 549 * but could be changed in the future to support enabling 550 * and disabling specific interrupts 551 * 552 * Contains some infrastructure for polling and interrupt 553 * handling, as well as handling shifts in PHY hardware state 554 */ 555 struct phy_device { 556 struct mdio_device mdio; 557 558 /* Information about the PHY type */ 559 /* And management functions */ 560 struct phy_driver *drv; 561 562 u32 phy_id; 563 564 struct phy_c45_device_ids c45_ids; 565 unsigned is_c45:1; 566 unsigned is_internal:1; 567 unsigned is_pseudo_fixed_link:1; 568 unsigned is_gigabit_capable:1; 569 unsigned has_fixups:1; 570 unsigned suspended:1; 571 unsigned suspended_by_mdio_bus:1; 572 unsigned sysfs_links:1; 573 unsigned loopback_enabled:1; 574 unsigned downshifted_rate:1; 575 unsigned is_on_sfp_module:1; 576 unsigned mac_managed_pm:1; 577 578 unsigned autoneg:1; 579 /* The most recently read link state */ 580 unsigned link:1; 581 unsigned autoneg_complete:1; 582 583 /* Interrupts are enabled */ 584 unsigned interrupts:1; 585 586 enum phy_state state; 587 588 u32 dev_flags; 589 590 phy_interface_t interface; 591 592 /* 593 * forced speed & duplex (no autoneg) 594 * partner speed & duplex & pause (autoneg) 595 */ 596 int speed; 597 int duplex; 598 int port; 599 int pause; 600 int asym_pause; 601 u8 master_slave_get; 602 u8 master_slave_set; 603 u8 master_slave_state; 604 605 /* Union of PHY and Attached devices' supported link modes */ 606 /* See ethtool.h for more info */ 607 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 608 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 609 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 610 /* used with phy_speed_down */ 611 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 612 613 /* Energy efficient ethernet modes which should be prohibited */ 614 u32 eee_broken_modes; 615 616 #ifdef CONFIG_LED_TRIGGER_PHY 617 struct phy_led_trigger *phy_led_triggers; 618 unsigned int phy_num_led_triggers; 619 struct phy_led_trigger *last_triggered; 620 621 struct phy_led_trigger *led_link_trigger; 622 #endif 623 624 /* 625 * Interrupt number for this PHY 626 * -1 means no interrupt 627 */ 628 int irq; 629 630 /* private data pointer */ 631 /* For use by PHYs to maintain extra state */ 632 void *priv; 633 634 /* shared data pointer */ 635 /* For use by PHYs inside the same package that need a shared state. */ 636 struct phy_package_shared *shared; 637 638 /* Reporting cable test results */ 639 struct sk_buff *skb; 640 void *ehdr; 641 struct nlattr *nest; 642 643 /* Interrupt and Polling infrastructure */ 644 struct delayed_work state_queue; 645 646 struct mutex lock; 647 648 /* This may be modified under the rtnl lock */ 649 bool sfp_bus_attached; 650 struct sfp_bus *sfp_bus; 651 struct phylink *phylink; 652 struct net_device *attached_dev; 653 struct mii_timestamper *mii_ts; 654 655 u8 mdix; 656 u8 mdix_ctrl; 657 658 void (*phy_link_change)(struct phy_device *phydev, bool up); 659 void (*adjust_link)(struct net_device *dev); 660 661 #if IS_ENABLED(CONFIG_MACSEC) 662 /* MACsec management functions */ 663 const struct macsec_ops *macsec_ops; 664 #endif 665 }; 666 667 static inline struct phy_device *to_phy_device(const struct device *dev) 668 { 669 return container_of(to_mdio_device(dev), struct phy_device, mdio); 670 } 671 672 /** 673 * struct phy_tdr_config - Configuration of a TDR raw test 674 * 675 * @first: Distance for first data collection point 676 * @last: Distance for last data collection point 677 * @step: Step between data collection points 678 * @pair: Bitmap of cable pairs to collect data for 679 * 680 * A structure containing possible configuration parameters 681 * for a TDR cable test. The driver does not need to implement 682 * all the parameters, but should report what is actually used. 683 * All distances are in centimeters. 684 */ 685 struct phy_tdr_config { 686 u32 first; 687 u32 last; 688 u32 step; 689 s8 pair; 690 }; 691 #define PHY_PAIR_ALL -1 692 693 /** 694 * struct phy_driver - Driver structure for a particular PHY type 695 * 696 * @mdiodrv: Data common to all MDIO devices 697 * @phy_id: The result of reading the UID registers of this PHY 698 * type, and ANDing them with the phy_id_mask. This driver 699 * only works for PHYs with IDs which match this field 700 * @name: The friendly name of this PHY type 701 * @phy_id_mask: Defines the important bits of the phy_id 702 * @features: A mandatory list of features (speed, duplex, etc) 703 * supported by this PHY 704 * @flags: A bitfield defining certain other features this PHY 705 * supports (like interrupts) 706 * @driver_data: Static driver data 707 * 708 * All functions are optional. If config_aneg or read_status 709 * are not implemented, the phy core uses the genphy versions. 710 * Note that none of these functions should be called from 711 * interrupt time. The goal is for the bus read/write functions 712 * to be able to block when the bus transaction is happening, 713 * and be freed up by an interrupt (The MPC85xx has this ability, 714 * though it is not currently supported in the driver). 715 */ 716 struct phy_driver { 717 struct mdio_driver_common mdiodrv; 718 u32 phy_id; 719 char *name; 720 u32 phy_id_mask; 721 const unsigned long * const features; 722 u32 flags; 723 const void *driver_data; 724 725 /** 726 * @soft_reset: Called to issue a PHY software reset 727 */ 728 int (*soft_reset)(struct phy_device *phydev); 729 730 /** 731 * @config_init: Called to initialize the PHY, 732 * including after a reset 733 */ 734 int (*config_init)(struct phy_device *phydev); 735 736 /** 737 * @probe: Called during discovery. Used to set 738 * up device-specific structures, if any 739 */ 740 int (*probe)(struct phy_device *phydev); 741 742 /** 743 * @get_features: Probe the hardware to determine what 744 * abilities it has. Should only set phydev->supported. 745 */ 746 int (*get_features)(struct phy_device *phydev); 747 748 /* PHY Power Management */ 749 /** @suspend: Suspend the hardware, saving state if needed */ 750 int (*suspend)(struct phy_device *phydev); 751 /** @resume: Resume the hardware, restoring state if needed */ 752 int (*resume)(struct phy_device *phydev); 753 754 /** 755 * @config_aneg: Configures the advertisement and resets 756 * autonegotiation if phydev->autoneg is on, 757 * forces the speed to the current settings in phydev 758 * if phydev->autoneg is off 759 */ 760 int (*config_aneg)(struct phy_device *phydev); 761 762 /** @aneg_done: Determines the auto negotiation result */ 763 int (*aneg_done)(struct phy_device *phydev); 764 765 /** @read_status: Determines the negotiated speed and duplex */ 766 int (*read_status)(struct phy_device *phydev); 767 768 /** 769 * @config_intr: Enables or disables interrupts. 770 * It should also clear any pending interrupts prior to enabling the 771 * IRQs and after disabling them. 772 */ 773 int (*config_intr)(struct phy_device *phydev); 774 775 /** @handle_interrupt: Override default interrupt handling */ 776 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 777 778 /** @remove: Clears up any memory if needed */ 779 void (*remove)(struct phy_device *phydev); 780 781 /** 782 * @match_phy_device: Returns true if this is a suitable 783 * driver for the given phydev. If NULL, matching is based on 784 * phy_id and phy_id_mask. 785 */ 786 int (*match_phy_device)(struct phy_device *phydev); 787 788 /** 789 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 790 * register changes to enable Wake on LAN, so set_wol is 791 * provided to be called in the ethernet driver's set_wol 792 * function. 793 */ 794 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 795 796 /** 797 * @get_wol: See set_wol, but for checking whether Wake on LAN 798 * is enabled. 799 */ 800 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 801 802 /** 803 * @link_change_notify: Called to inform a PHY device driver 804 * when the core is about to change the link state. This 805 * callback is supposed to be used as fixup hook for drivers 806 * that need to take action when the link state 807 * changes. Drivers are by no means allowed to mess with the 808 * PHY device structure in their implementations. 809 */ 810 void (*link_change_notify)(struct phy_device *dev); 811 812 /** 813 * @read_mmd: PHY specific driver override for reading a MMD 814 * register. This function is optional for PHY specific 815 * drivers. When not provided, the default MMD read function 816 * will be used by phy_read_mmd(), which will use either a 817 * direct read for Clause 45 PHYs or an indirect read for 818 * Clause 22 PHYs. devnum is the MMD device number within the 819 * PHY device, regnum is the register within the selected MMD 820 * device. 821 */ 822 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 823 824 /** 825 * @write_mmd: PHY specific driver override for writing a MMD 826 * register. This function is optional for PHY specific 827 * drivers. When not provided, the default MMD write function 828 * will be used by phy_write_mmd(), which will use either a 829 * direct write for Clause 45 PHYs, or an indirect write for 830 * Clause 22 PHYs. devnum is the MMD device number within the 831 * PHY device, regnum is the register within the selected MMD 832 * device. val is the value to be written. 833 */ 834 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 835 u16 val); 836 837 /** @read_page: Return the current PHY register page number */ 838 int (*read_page)(struct phy_device *dev); 839 /** @write_page: Set the current PHY register page number */ 840 int (*write_page)(struct phy_device *dev, int page); 841 842 /** 843 * @module_info: Get the size and type of the eeprom contained 844 * within a plug-in module 845 */ 846 int (*module_info)(struct phy_device *dev, 847 struct ethtool_modinfo *modinfo); 848 849 /** 850 * @module_eeprom: Get the eeprom information from the plug-in 851 * module 852 */ 853 int (*module_eeprom)(struct phy_device *dev, 854 struct ethtool_eeprom *ee, u8 *data); 855 856 /** @cable_test_start: Start a cable test */ 857 int (*cable_test_start)(struct phy_device *dev); 858 859 /** @cable_test_tdr_start: Start a raw TDR cable test */ 860 int (*cable_test_tdr_start)(struct phy_device *dev, 861 const struct phy_tdr_config *config); 862 863 /** 864 * @cable_test_get_status: Once per second, or on interrupt, 865 * request the status of the test. 866 */ 867 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 868 869 /* Get statistics from the PHY using ethtool */ 870 /** @get_sset_count: Number of statistic counters */ 871 int (*get_sset_count)(struct phy_device *dev); 872 /** @get_strings: Names of the statistic counters */ 873 void (*get_strings)(struct phy_device *dev, u8 *data); 874 /** @get_stats: Return the statistic counter values */ 875 void (*get_stats)(struct phy_device *dev, 876 struct ethtool_stats *stats, u64 *data); 877 878 /* Get and Set PHY tunables */ 879 /** @get_tunable: Return the value of a tunable */ 880 int (*get_tunable)(struct phy_device *dev, 881 struct ethtool_tunable *tuna, void *data); 882 /** @set_tunable: Set the value of a tunable */ 883 int (*set_tunable)(struct phy_device *dev, 884 struct ethtool_tunable *tuna, 885 const void *data); 886 /** @set_loopback: Set the loopback mood of the PHY */ 887 int (*set_loopback)(struct phy_device *dev, bool enable); 888 /** @get_sqi: Get the signal quality indication */ 889 int (*get_sqi)(struct phy_device *dev); 890 /** @get_sqi_max: Get the maximum signal quality indication */ 891 int (*get_sqi_max)(struct phy_device *dev); 892 }; 893 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 894 struct phy_driver, mdiodrv) 895 896 #define PHY_ANY_ID "MATCH ANY PHY" 897 #define PHY_ANY_UID 0xffffffff 898 899 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 900 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 901 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 902 903 /* A Structure for boards to register fixups with the PHY Lib */ 904 struct phy_fixup { 905 struct list_head list; 906 char bus_id[MII_BUS_ID_SIZE + 3]; 907 u32 phy_uid; 908 u32 phy_uid_mask; 909 int (*run)(struct phy_device *phydev); 910 }; 911 912 const char *phy_speed_to_str(int speed); 913 const char *phy_duplex_to_str(unsigned int duplex); 914 915 /* A structure for mapping a particular speed and duplex 916 * combination to a particular SUPPORTED and ADVERTISED value 917 */ 918 struct phy_setting { 919 u32 speed; 920 u8 duplex; 921 u8 bit; 922 }; 923 924 const struct phy_setting * 925 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 926 bool exact); 927 size_t phy_speeds(unsigned int *speeds, size_t size, 928 unsigned long *mask); 929 void of_set_phy_supported(struct phy_device *phydev); 930 void of_set_phy_eee_broken(struct phy_device *phydev); 931 int phy_speed_down_core(struct phy_device *phydev); 932 933 /** 934 * phy_is_started - Convenience function to check whether PHY is started 935 * @phydev: The phy_device struct 936 */ 937 static inline bool phy_is_started(struct phy_device *phydev) 938 { 939 return phydev->state >= PHY_UP; 940 } 941 942 void phy_resolve_aneg_pause(struct phy_device *phydev); 943 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 944 void phy_check_downshift(struct phy_device *phydev); 945 946 /** 947 * phy_read - Convenience function for reading a given PHY register 948 * @phydev: the phy_device struct 949 * @regnum: register number to read 950 * 951 * NOTE: MUST NOT be called from interrupt context, 952 * because the bus read/write functions may wait for an interrupt 953 * to conclude the operation. 954 */ 955 static inline int phy_read(struct phy_device *phydev, u32 regnum) 956 { 957 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 958 } 959 960 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 961 timeout_us, sleep_before_read) \ 962 ({ \ 963 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 964 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 965 if (val < 0) \ 966 __ret = val; \ 967 if (__ret) \ 968 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 969 __ret; \ 970 }) 971 972 973 /** 974 * __phy_read - convenience function for reading a given PHY register 975 * @phydev: the phy_device struct 976 * @regnum: register number to read 977 * 978 * The caller must have taken the MDIO bus lock. 979 */ 980 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 981 { 982 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 983 } 984 985 /** 986 * phy_write - Convenience function for writing a given PHY register 987 * @phydev: the phy_device struct 988 * @regnum: register number to write 989 * @val: value to write to @regnum 990 * 991 * NOTE: MUST NOT be called from interrupt context, 992 * because the bus read/write functions may wait for an interrupt 993 * to conclude the operation. 994 */ 995 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 996 { 997 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 998 } 999 1000 /** 1001 * __phy_write - Convenience function for writing a given PHY register 1002 * @phydev: the phy_device struct 1003 * @regnum: register number to write 1004 * @val: value to write to @regnum 1005 * 1006 * The caller must have taken the MDIO bus lock. 1007 */ 1008 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1009 { 1010 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1011 val); 1012 } 1013 1014 /** 1015 * __phy_modify_changed() - Convenience function for modifying a PHY register 1016 * @phydev: a pointer to a &struct phy_device 1017 * @regnum: register number 1018 * @mask: bit mask of bits to clear 1019 * @set: bit mask of bits to set 1020 * 1021 * Unlocked helper function which allows a PHY register to be modified as 1022 * new register value = (old register value & ~mask) | set 1023 * 1024 * Returns negative errno, 0 if there was no change, and 1 in case of change 1025 */ 1026 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1027 u16 mask, u16 set) 1028 { 1029 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1030 regnum, mask, set); 1031 } 1032 1033 /* 1034 * phy_read_mmd - Convenience function for reading a register 1035 * from an MMD on a given PHY. 1036 */ 1037 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1038 1039 /** 1040 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1041 * condition is met or a timeout occurs 1042 * 1043 * @phydev: The phy_device struct 1044 * @devaddr: The MMD to read from 1045 * @regnum: The register on the MMD to read 1046 * @val: Variable to read the register into 1047 * @cond: Break condition (usually involving @val) 1048 * @sleep_us: Maximum time to sleep between reads in us (0 1049 * tight-loops). Should be less than ~20ms since usleep_range 1050 * is used (see Documentation/timers/timers-howto.rst). 1051 * @timeout_us: Timeout in us, 0 means never timeout 1052 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1053 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1054 * case, the last read value at @args is stored in @val. Must not 1055 * be called from atomic context if sleep_us or timeout_us are used. 1056 */ 1057 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1058 sleep_us, timeout_us, sleep_before_read) \ 1059 ({ \ 1060 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1061 sleep_us, timeout_us, sleep_before_read, \ 1062 phydev, devaddr, regnum); \ 1063 if (val < 0) \ 1064 __ret = val; \ 1065 if (__ret) \ 1066 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1067 __ret; \ 1068 }) 1069 1070 /* 1071 * __phy_read_mmd - Convenience function for reading a register 1072 * from an MMD on a given PHY. 1073 */ 1074 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1075 1076 /* 1077 * phy_write_mmd - Convenience function for writing a register 1078 * on an MMD on a given PHY. 1079 */ 1080 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1081 1082 /* 1083 * __phy_write_mmd - Convenience function for writing a register 1084 * on an MMD on a given PHY. 1085 */ 1086 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1087 1088 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1089 u16 set); 1090 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1091 u16 set); 1092 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1093 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1094 1095 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1096 u16 mask, u16 set); 1097 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1098 u16 mask, u16 set); 1099 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1100 u16 mask, u16 set); 1101 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1102 u16 mask, u16 set); 1103 1104 /** 1105 * __phy_set_bits - Convenience function for setting bits in a PHY register 1106 * @phydev: the phy_device struct 1107 * @regnum: register number to write 1108 * @val: bits to set 1109 * 1110 * The caller must have taken the MDIO bus lock. 1111 */ 1112 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1113 { 1114 return __phy_modify(phydev, regnum, 0, val); 1115 } 1116 1117 /** 1118 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1119 * @phydev: the phy_device struct 1120 * @regnum: register number to write 1121 * @val: bits to clear 1122 * 1123 * The caller must have taken the MDIO bus lock. 1124 */ 1125 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1126 u16 val) 1127 { 1128 return __phy_modify(phydev, regnum, val, 0); 1129 } 1130 1131 /** 1132 * phy_set_bits - Convenience function for setting bits in a PHY register 1133 * @phydev: the phy_device struct 1134 * @regnum: register number to write 1135 * @val: bits to set 1136 */ 1137 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1138 { 1139 return phy_modify(phydev, regnum, 0, val); 1140 } 1141 1142 /** 1143 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1144 * @phydev: the phy_device struct 1145 * @regnum: register number to write 1146 * @val: bits to clear 1147 */ 1148 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1149 { 1150 return phy_modify(phydev, regnum, val, 0); 1151 } 1152 1153 /** 1154 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1155 * on MMD 1156 * @phydev: the phy_device struct 1157 * @devad: the MMD containing register to modify 1158 * @regnum: register number to modify 1159 * @val: bits to set 1160 * 1161 * The caller must have taken the MDIO bus lock. 1162 */ 1163 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1164 u32 regnum, u16 val) 1165 { 1166 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1167 } 1168 1169 /** 1170 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1171 * on MMD 1172 * @phydev: the phy_device struct 1173 * @devad: the MMD containing register to modify 1174 * @regnum: register number to modify 1175 * @val: bits to clear 1176 * 1177 * The caller must have taken the MDIO bus lock. 1178 */ 1179 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1180 u32 regnum, u16 val) 1181 { 1182 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1183 } 1184 1185 /** 1186 * phy_set_bits_mmd - Convenience function for setting bits in a register 1187 * on MMD 1188 * @phydev: the phy_device struct 1189 * @devad: the MMD containing register to modify 1190 * @regnum: register number to modify 1191 * @val: bits to set 1192 */ 1193 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1194 u32 regnum, u16 val) 1195 { 1196 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1197 } 1198 1199 /** 1200 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1201 * on MMD 1202 * @phydev: the phy_device struct 1203 * @devad: the MMD containing register to modify 1204 * @regnum: register number to modify 1205 * @val: bits to clear 1206 */ 1207 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1208 u32 regnum, u16 val) 1209 { 1210 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1211 } 1212 1213 /** 1214 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1215 * @phydev: the phy_device struct 1216 * 1217 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1218 * PHY_MAC_INTERRUPT 1219 */ 1220 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1221 { 1222 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1223 } 1224 1225 /** 1226 * phy_polling_mode - Convenience function for testing whether polling is 1227 * used to detect PHY status changes 1228 * @phydev: the phy_device struct 1229 */ 1230 static inline bool phy_polling_mode(struct phy_device *phydev) 1231 { 1232 if (phydev->state == PHY_CABLETEST) 1233 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1234 return true; 1235 1236 return phydev->irq == PHY_POLL; 1237 } 1238 1239 /** 1240 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1241 * @phydev: the phy_device struct 1242 */ 1243 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1244 { 1245 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1246 } 1247 1248 /** 1249 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1250 * @phydev: the phy_device struct 1251 */ 1252 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1253 { 1254 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1255 } 1256 1257 /** 1258 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1259 * PTP hardware clock capabilities. 1260 * @phydev: the phy_device struct 1261 */ 1262 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1263 { 1264 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1265 } 1266 1267 /** 1268 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1269 * @phydev: the phy_device struct 1270 */ 1271 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1272 { 1273 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1274 } 1275 1276 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1277 { 1278 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1279 } 1280 1281 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1282 int type) 1283 { 1284 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1285 } 1286 1287 static inline int phy_ts_info(struct phy_device *phydev, 1288 struct ethtool_ts_info *tsinfo) 1289 { 1290 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1291 } 1292 1293 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1294 int type) 1295 { 1296 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1297 } 1298 1299 /** 1300 * phy_is_internal - Convenience function for testing if a PHY is internal 1301 * @phydev: the phy_device struct 1302 */ 1303 static inline bool phy_is_internal(struct phy_device *phydev) 1304 { 1305 return phydev->is_internal; 1306 } 1307 1308 /** 1309 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1310 * @phydev: the phy_device struct 1311 */ 1312 static inline bool phy_on_sfp(struct phy_device *phydev) 1313 { 1314 return phydev->is_on_sfp_module; 1315 } 1316 1317 /** 1318 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1319 * PHY interface mode is RGMII (all variants) 1320 * @mode: the &phy_interface_t enum 1321 */ 1322 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1323 { 1324 return mode >= PHY_INTERFACE_MODE_RGMII && 1325 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1326 }; 1327 1328 /** 1329 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1330 * negotiation 1331 * @mode: one of &enum phy_interface_t 1332 * 1333 * Returns true if the PHY interface mode uses the 16-bit negotiation 1334 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1335 */ 1336 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1337 { 1338 return mode == PHY_INTERFACE_MODE_1000BASEX || 1339 mode == PHY_INTERFACE_MODE_2500BASEX; 1340 } 1341 1342 /** 1343 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1344 * is RGMII (all variants) 1345 * @phydev: the phy_device struct 1346 */ 1347 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1348 { 1349 return phy_interface_mode_is_rgmii(phydev->interface); 1350 }; 1351 1352 /** 1353 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1354 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1355 * @phydev: the phy_device struct 1356 */ 1357 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1358 { 1359 return phydev->is_pseudo_fixed_link; 1360 } 1361 1362 int phy_save_page(struct phy_device *phydev); 1363 int phy_select_page(struct phy_device *phydev, int page); 1364 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1365 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1366 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1367 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1368 u16 mask, u16 set); 1369 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1370 u16 mask, u16 set); 1371 1372 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1373 bool is_c45, 1374 struct phy_c45_device_ids *c45_ids); 1375 #if IS_ENABLED(CONFIG_PHYLIB) 1376 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1377 int phy_device_register(struct phy_device *phy); 1378 void phy_device_free(struct phy_device *phydev); 1379 #else 1380 static inline 1381 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1382 { 1383 return NULL; 1384 } 1385 1386 static inline int phy_device_register(struct phy_device *phy) 1387 { 1388 return 0; 1389 } 1390 1391 static inline void phy_device_free(struct phy_device *phydev) { } 1392 #endif /* CONFIG_PHYLIB */ 1393 void phy_device_remove(struct phy_device *phydev); 1394 int phy_init_hw(struct phy_device *phydev); 1395 int phy_suspend(struct phy_device *phydev); 1396 int phy_resume(struct phy_device *phydev); 1397 int __phy_resume(struct phy_device *phydev); 1398 int phy_loopback(struct phy_device *phydev, bool enable); 1399 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1400 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1401 int phy_sfp_probe(struct phy_device *phydev, 1402 const struct sfp_upstream_ops *ops); 1403 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1404 phy_interface_t interface); 1405 struct phy_device *phy_find_first(struct mii_bus *bus); 1406 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1407 u32 flags, phy_interface_t interface); 1408 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1409 void (*handler)(struct net_device *), 1410 phy_interface_t interface); 1411 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1412 void (*handler)(struct net_device *), 1413 phy_interface_t interface); 1414 void phy_disconnect(struct phy_device *phydev); 1415 void phy_detach(struct phy_device *phydev); 1416 void phy_start(struct phy_device *phydev); 1417 void phy_stop(struct phy_device *phydev); 1418 int phy_config_aneg(struct phy_device *phydev); 1419 int phy_start_aneg(struct phy_device *phydev); 1420 int phy_aneg_done(struct phy_device *phydev); 1421 int phy_speed_down(struct phy_device *phydev, bool sync); 1422 int phy_speed_up(struct phy_device *phydev); 1423 1424 int phy_restart_aneg(struct phy_device *phydev); 1425 int phy_reset_after_clk_enable(struct phy_device *phydev); 1426 1427 #if IS_ENABLED(CONFIG_PHYLIB) 1428 int phy_start_cable_test(struct phy_device *phydev, 1429 struct netlink_ext_ack *extack); 1430 int phy_start_cable_test_tdr(struct phy_device *phydev, 1431 struct netlink_ext_ack *extack, 1432 const struct phy_tdr_config *config); 1433 #else 1434 static inline 1435 int phy_start_cable_test(struct phy_device *phydev, 1436 struct netlink_ext_ack *extack) 1437 { 1438 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1439 return -EOPNOTSUPP; 1440 } 1441 static inline 1442 int phy_start_cable_test_tdr(struct phy_device *phydev, 1443 struct netlink_ext_ack *extack, 1444 const struct phy_tdr_config *config) 1445 { 1446 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1447 return -EOPNOTSUPP; 1448 } 1449 #endif 1450 1451 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1452 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1453 u16 cm); 1454 1455 static inline void phy_device_reset(struct phy_device *phydev, int value) 1456 { 1457 mdio_device_reset(&phydev->mdio, value); 1458 } 1459 1460 #define phydev_err(_phydev, format, args...) \ 1461 dev_err(&_phydev->mdio.dev, format, ##args) 1462 1463 #define phydev_info(_phydev, format, args...) \ 1464 dev_info(&_phydev->mdio.dev, format, ##args) 1465 1466 #define phydev_warn(_phydev, format, args...) \ 1467 dev_warn(&_phydev->mdio.dev, format, ##args) 1468 1469 #define phydev_dbg(_phydev, format, args...) \ 1470 dev_dbg(&_phydev->mdio.dev, format, ##args) 1471 1472 static inline const char *phydev_name(const struct phy_device *phydev) 1473 { 1474 return dev_name(&phydev->mdio.dev); 1475 } 1476 1477 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1478 { 1479 mutex_lock(&phydev->mdio.bus->mdio_lock); 1480 } 1481 1482 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1483 { 1484 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1485 } 1486 1487 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1488 __printf(2, 3); 1489 char *phy_attached_info_irq(struct phy_device *phydev) 1490 __malloc; 1491 void phy_attached_info(struct phy_device *phydev); 1492 1493 /* Clause 22 PHY */ 1494 int genphy_read_abilities(struct phy_device *phydev); 1495 int genphy_setup_forced(struct phy_device *phydev); 1496 int genphy_restart_aneg(struct phy_device *phydev); 1497 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1498 int genphy_config_eee_advert(struct phy_device *phydev); 1499 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1500 int genphy_aneg_done(struct phy_device *phydev); 1501 int genphy_update_link(struct phy_device *phydev); 1502 int genphy_read_lpa(struct phy_device *phydev); 1503 int genphy_read_status_fixed(struct phy_device *phydev); 1504 int genphy_read_status(struct phy_device *phydev); 1505 int genphy_suspend(struct phy_device *phydev); 1506 int genphy_resume(struct phy_device *phydev); 1507 int genphy_loopback(struct phy_device *phydev, bool enable); 1508 int genphy_soft_reset(struct phy_device *phydev); 1509 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1510 1511 static inline int genphy_config_aneg(struct phy_device *phydev) 1512 { 1513 return __genphy_config_aneg(phydev, false); 1514 } 1515 1516 static inline int genphy_no_config_intr(struct phy_device *phydev) 1517 { 1518 return 0; 1519 } 1520 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1521 u16 regnum); 1522 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1523 u16 regnum, u16 val); 1524 1525 /* Clause 37 */ 1526 int genphy_c37_config_aneg(struct phy_device *phydev); 1527 int genphy_c37_read_status(struct phy_device *phydev); 1528 1529 /* Clause 45 PHY */ 1530 int genphy_c45_restart_aneg(struct phy_device *phydev); 1531 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1532 int genphy_c45_aneg_done(struct phy_device *phydev); 1533 int genphy_c45_read_link(struct phy_device *phydev); 1534 int genphy_c45_read_lpa(struct phy_device *phydev); 1535 int genphy_c45_read_pma(struct phy_device *phydev); 1536 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1537 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1538 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1539 int genphy_c45_read_mdix(struct phy_device *phydev); 1540 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1541 int genphy_c45_read_status(struct phy_device *phydev); 1542 int genphy_c45_config_aneg(struct phy_device *phydev); 1543 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1544 int genphy_c45_pma_resume(struct phy_device *phydev); 1545 int genphy_c45_pma_suspend(struct phy_device *phydev); 1546 1547 /* Generic C45 PHY driver */ 1548 extern struct phy_driver genphy_c45_driver; 1549 1550 /* The gen10g_* functions are the old Clause 45 stub */ 1551 int gen10g_config_aneg(struct phy_device *phydev); 1552 1553 static inline int phy_read_status(struct phy_device *phydev) 1554 { 1555 if (!phydev->drv) 1556 return -EIO; 1557 1558 if (phydev->drv->read_status) 1559 return phydev->drv->read_status(phydev); 1560 else 1561 return genphy_read_status(phydev); 1562 } 1563 1564 void phy_driver_unregister(struct phy_driver *drv); 1565 void phy_drivers_unregister(struct phy_driver *drv, int n); 1566 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1567 int phy_drivers_register(struct phy_driver *new_driver, int n, 1568 struct module *owner); 1569 void phy_error(struct phy_device *phydev); 1570 void phy_state_machine(struct work_struct *work); 1571 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1572 void phy_trigger_machine(struct phy_device *phydev); 1573 void phy_mac_interrupt(struct phy_device *phydev); 1574 void phy_start_machine(struct phy_device *phydev); 1575 void phy_stop_machine(struct phy_device *phydev); 1576 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1577 struct ethtool_link_ksettings *cmd); 1578 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1579 const struct ethtool_link_ksettings *cmd); 1580 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1581 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1582 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1583 int phy_disable_interrupts(struct phy_device *phydev); 1584 void phy_request_interrupt(struct phy_device *phydev); 1585 void phy_free_interrupt(struct phy_device *phydev); 1586 void phy_print_status(struct phy_device *phydev); 1587 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1588 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1589 void phy_advertise_supported(struct phy_device *phydev); 1590 void phy_support_sym_pause(struct phy_device *phydev); 1591 void phy_support_asym_pause(struct phy_device *phydev); 1592 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1593 bool autoneg); 1594 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1595 bool phy_validate_pause(struct phy_device *phydev, 1596 struct ethtool_pauseparam *pp); 1597 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1598 1599 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1600 const int *delay_values, int size, bool is_rx); 1601 1602 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1603 bool *tx_pause, bool *rx_pause); 1604 1605 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1606 int (*run)(struct phy_device *)); 1607 int phy_register_fixup_for_id(const char *bus_id, 1608 int (*run)(struct phy_device *)); 1609 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1610 int (*run)(struct phy_device *)); 1611 1612 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1613 int phy_unregister_fixup_for_id(const char *bus_id); 1614 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1615 1616 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1617 int phy_get_eee_err(struct phy_device *phydev); 1618 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1619 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1620 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1621 void phy_ethtool_get_wol(struct phy_device *phydev, 1622 struct ethtool_wolinfo *wol); 1623 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1624 struct ethtool_link_ksettings *cmd); 1625 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1626 const struct ethtool_link_ksettings *cmd); 1627 int phy_ethtool_nway_reset(struct net_device *ndev); 1628 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1629 void phy_package_leave(struct phy_device *phydev); 1630 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1631 int addr, size_t priv_size); 1632 1633 #if IS_ENABLED(CONFIG_PHYLIB) 1634 int __init mdio_bus_init(void); 1635 void mdio_bus_exit(void); 1636 #endif 1637 1638 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1639 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1640 int phy_ethtool_get_stats(struct phy_device *phydev, 1641 struct ethtool_stats *stats, u64 *data); 1642 1643 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1644 { 1645 struct phy_package_shared *shared = phydev->shared; 1646 1647 if (!shared) 1648 return -EIO; 1649 1650 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1651 } 1652 1653 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1654 { 1655 struct phy_package_shared *shared = phydev->shared; 1656 1657 if (!shared) 1658 return -EIO; 1659 1660 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1661 } 1662 1663 static inline int phy_package_write(struct phy_device *phydev, 1664 u32 regnum, u16 val) 1665 { 1666 struct phy_package_shared *shared = phydev->shared; 1667 1668 if (!shared) 1669 return -EIO; 1670 1671 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1672 } 1673 1674 static inline int __phy_package_write(struct phy_device *phydev, 1675 u32 regnum, u16 val) 1676 { 1677 struct phy_package_shared *shared = phydev->shared; 1678 1679 if (!shared) 1680 return -EIO; 1681 1682 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1683 } 1684 1685 static inline bool __phy_package_set_once(struct phy_device *phydev, 1686 unsigned int b) 1687 { 1688 struct phy_package_shared *shared = phydev->shared; 1689 1690 if (!shared) 1691 return false; 1692 1693 return !test_and_set_bit(b, &shared->flags); 1694 } 1695 1696 static inline bool phy_package_init_once(struct phy_device *phydev) 1697 { 1698 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1699 } 1700 1701 static inline bool phy_package_probe_once(struct phy_device *phydev) 1702 { 1703 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1704 } 1705 1706 extern struct bus_type mdio_bus_type; 1707 1708 struct mdio_board_info { 1709 const char *bus_id; 1710 char modalias[MDIO_NAME_SIZE]; 1711 int mdio_addr; 1712 const void *platform_data; 1713 }; 1714 1715 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1716 int mdiobus_register_board_info(const struct mdio_board_info *info, 1717 unsigned int n); 1718 #else 1719 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1720 unsigned int n) 1721 { 1722 return 0; 1723 } 1724 #endif 1725 1726 1727 /** 1728 * phy_module_driver() - Helper macro for registering PHY drivers 1729 * @__phy_drivers: array of PHY drivers to register 1730 * @__count: Numbers of members in array 1731 * 1732 * Helper macro for PHY drivers which do not do anything special in module 1733 * init/exit. Each module may only use this macro once, and calling it 1734 * replaces module_init() and module_exit(). 1735 */ 1736 #define phy_module_driver(__phy_drivers, __count) \ 1737 static int __init phy_module_init(void) \ 1738 { \ 1739 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1740 } \ 1741 module_init(phy_module_init); \ 1742 static void __exit phy_module_exit(void) \ 1743 { \ 1744 phy_drivers_unregister(__phy_drivers, __count); \ 1745 } \ 1746 module_exit(phy_module_exit) 1747 1748 #define module_phy_driver(__phy_drivers) \ 1749 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1750 1751 bool phy_driver_is_genphy(struct phy_device *phydev); 1752 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1753 1754 #endif /* __PHY_H */ 1755