17a846d3cSLi Jun /* SPDX-License-Identifier: GPL-2.0 */ 27a846d3cSLi Jun #ifndef __DT_POWER_DELIVERY_H 37a846d3cSLi Jun #define __DT_POWER_DELIVERY_H 47a846d3cSLi Jun 57a846d3cSLi Jun /* Power delivery Power Data Object definitions */ 67a846d3cSLi Jun #define PDO_TYPE_FIXED 0 77a846d3cSLi Jun #define PDO_TYPE_BATT 1 87a846d3cSLi Jun #define PDO_TYPE_VAR 2 97a846d3cSLi Jun #define PDO_TYPE_APDO 3 107a846d3cSLi Jun 117a846d3cSLi Jun #define PDO_TYPE_SHIFT 30 127a846d3cSLi Jun #define PDO_TYPE_MASK 0x3 137a846d3cSLi Jun 147a846d3cSLi Jun #define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT) 157a846d3cSLi Jun 167a846d3cSLi Jun #define PDO_VOLT_MASK 0x3ff 177a846d3cSLi Jun #define PDO_CURR_MASK 0x3ff 187a846d3cSLi Jun #define PDO_PWR_MASK 0x3ff 197a846d3cSLi Jun 207a846d3cSLi Jun #define PDO_FIXED_DUAL_ROLE (1 << 29) /* Power role swap supported */ 217a846d3cSLi Jun #define PDO_FIXED_SUSPEND (1 << 28) /* USB Suspend supported (Source) */ 227a846d3cSLi Jun #define PDO_FIXED_HIGHER_CAP (1 << 28) /* Requires more than vSafe5V (Sink) */ 237a846d3cSLi Jun #define PDO_FIXED_EXTPOWER (1 << 27) /* Externally powered */ 247a846d3cSLi Jun #define PDO_FIXED_USB_COMM (1 << 26) /* USB communications capable */ 257a846d3cSLi Jun #define PDO_FIXED_DATA_SWAP (1 << 25) /* Data role swap supported */ 267a846d3cSLi Jun #define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */ 277a846d3cSLi Jun #define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */ 287a846d3cSLi Jun 297a846d3cSLi Jun #define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT) 307a846d3cSLi Jun #define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT) 317a846d3cSLi Jun 327a846d3cSLi Jun #define PDO_FIXED(mv, ma, flags) \ 337a846d3cSLi Jun (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \ 347a846d3cSLi Jun PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma)) 357a846d3cSLi Jun 367a846d3cSLi Jun #define VSAFE5V 5000 /* mv units */ 377a846d3cSLi Jun 387a846d3cSLi Jun #define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */ 397a846d3cSLi Jun #define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */ 407a846d3cSLi Jun #define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ 417a846d3cSLi Jun 427a846d3cSLi Jun #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT) 437a846d3cSLi Jun #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT) 447a846d3cSLi Jun #define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT) 457a846d3cSLi Jun 467a846d3cSLi Jun #define PDO_BATT(min_mv, max_mv, max_mw) \ 477a846d3cSLi Jun (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \ 487a846d3cSLi Jun PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw)) 497a846d3cSLi Jun 507a846d3cSLi Jun #define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */ 517a846d3cSLi Jun #define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */ 527a846d3cSLi Jun #define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */ 537a846d3cSLi Jun 547a846d3cSLi Jun #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT) 557a846d3cSLi Jun #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT) 567a846d3cSLi Jun #define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT) 577a846d3cSLi Jun 587a846d3cSLi Jun #define PDO_VAR(min_mv, max_mv, max_ma) \ 597a846d3cSLi Jun (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \ 607a846d3cSLi Jun PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma)) 617a846d3cSLi Jun 6263f59b73SAdam Thomson #define APDO_TYPE_PPS 0 6363f59b73SAdam Thomson 6463f59b73SAdam Thomson #define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */ 6563f59b73SAdam Thomson #define PDO_APDO_TYPE_MASK 0x3 6663f59b73SAdam Thomson 6763f59b73SAdam Thomson #define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT) 6863f59b73SAdam Thomson 6963f59b73SAdam Thomson #define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */ 7063f59b73SAdam Thomson #define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */ 7163f59b73SAdam Thomson #define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */ 7263f59b73SAdam Thomson 7363f59b73SAdam Thomson #define PDO_PPS_APDO_VOLT_MASK 0xff 7463f59b73SAdam Thomson #define PDO_PPS_APDO_CURR_MASK 0x7f 7563f59b73SAdam Thomson 7663f59b73SAdam Thomson #define PDO_PPS_APDO_MIN_VOLT(mv) \ 7763f59b73SAdam Thomson ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT) 7863f59b73SAdam Thomson #define PDO_PPS_APDO_MAX_VOLT(mv) \ 7963f59b73SAdam Thomson ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT) 8063f59b73SAdam Thomson #define PDO_PPS_APDO_MAX_CURR(ma) \ 8163f59b73SAdam Thomson ((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT) 8263f59b73SAdam Thomson 8363f59b73SAdam Thomson #define PDO_PPS_APDO(min_mv, max_mv, max_ma) \ 8463f59b73SAdam Thomson (PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \ 8563f59b73SAdam Thomson PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \ 8663f59b73SAdam Thomson PDO_PPS_APDO_MAX_CURR(max_ma)) 8763f59b73SAdam Thomson 885ed132dbSBadhri Jagan Sridharan /* 895ed132dbSBadhri Jagan Sridharan * Based on "Table 6-14 Fixed Supply PDO - Sink" of "USB Power Delivery Specification Revision 3.0, 905ed132dbSBadhri Jagan Sridharan * Version 1.2" 915ed132dbSBadhri Jagan Sridharan * Initial current capability of the new source when vSafe5V is applied. 925ed132dbSBadhri Jagan Sridharan */ 935ed132dbSBadhri Jagan Sridharan #define FRS_DEFAULT_POWER 1 945ed132dbSBadhri Jagan Sridharan #define FRS_5V_1P5A 2 955ed132dbSBadhri Jagan Sridharan #define FRS_5V_3A 3 96630dce28SKyle Tso 97630dce28SKyle Tso /* 98630dce28SKyle Tso * SVDM Identity Header 99630dce28SKyle Tso * -------------------- 100630dce28SKyle Tso * <31> :: data capable as a USB host 101630dce28SKyle Tso * <30> :: data capable as a USB device 102630dce28SKyle Tso * <29:27> :: product type (UFP / Cable / VPD) 103630dce28SKyle Tso * <26> :: modal operation supported (1b == yes) 104630dce28SKyle Tso * <25:23> :: product type (DFP) (SVDM version 2.0+ only; set to zero in version 1.0) 105630dce28SKyle Tso * <22:21> :: connector type (SVDM version 2.0+ only; set to zero in version 1.0) 106630dce28SKyle Tso * <20:16> :: Reserved, Shall be set to zero 107630dce28SKyle Tso * <15:0> :: USB-IF assigned VID for this cable vendor 108630dce28SKyle Tso */ 109*55b54c26SKyle Tso 110*55b54c26SKyle Tso /* PD Rev2.0 definition */ 111*55b54c26SKyle Tso #define IDH_PTYPE_UNDEF 0 112*55b54c26SKyle Tso 113630dce28SKyle Tso /* SOP Product Type (UFP) */ 114630dce28SKyle Tso #define IDH_PTYPE_NOT_UFP 0 115630dce28SKyle Tso #define IDH_PTYPE_HUB 1 116630dce28SKyle Tso #define IDH_PTYPE_PERIPH 2 117630dce28SKyle Tso #define IDH_PTYPE_PSD 3 118630dce28SKyle Tso #define IDH_PTYPE_AMA 5 119630dce28SKyle Tso 120630dce28SKyle Tso /* SOP' Product Type (Cable Plug / VPD) */ 121630dce28SKyle Tso #define IDH_PTYPE_NOT_CABLE 0 122630dce28SKyle Tso #define IDH_PTYPE_PCABLE 3 123630dce28SKyle Tso #define IDH_PTYPE_ACABLE 4 124630dce28SKyle Tso #define IDH_PTYPE_VPD 6 125630dce28SKyle Tso 126630dce28SKyle Tso /* SOP Product Type (DFP) */ 127630dce28SKyle Tso #define IDH_PTYPE_NOT_DFP 0 128630dce28SKyle Tso #define IDH_PTYPE_DFP_HUB 1 129630dce28SKyle Tso #define IDH_PTYPE_DFP_HOST 2 130630dce28SKyle Tso #define IDH_PTYPE_DFP_PB 3 131630dce28SKyle Tso 132630dce28SKyle Tso #define VDO_IDH(usbh, usbd, ufp_cable, is_modal, dfp, conn, vid) \ 133630dce28SKyle Tso ((usbh) << 31 | (usbd) << 30 | ((ufp_cable) & 0x7) << 27 \ 134630dce28SKyle Tso | (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21 \ 135630dce28SKyle Tso | ((vid) & 0xffff)) 136630dce28SKyle Tso 137630dce28SKyle Tso /* 138630dce28SKyle Tso * Cert Stat VDO 139630dce28SKyle Tso * ------------- 140630dce28SKyle Tso * <31:0> : USB-IF assigned XID for this cable 141630dce28SKyle Tso */ 142630dce28SKyle Tso #define VDO_CERT(xid) ((xid) & 0xffffffff) 143630dce28SKyle Tso 144630dce28SKyle Tso /* 145630dce28SKyle Tso * Product VDO 146630dce28SKyle Tso * ----------- 147630dce28SKyle Tso * <31:16> : USB Product ID 148630dce28SKyle Tso * <15:0> : USB bcdDevice 149630dce28SKyle Tso */ 150630dce28SKyle Tso #define VDO_PRODUCT(pid, bcd) (((pid) & 0xffff) << 16 | ((bcd) & 0xffff)) 151630dce28SKyle Tso 152630dce28SKyle Tso /* 153630dce28SKyle Tso * UFP VDO (PD Revision 3.0+ only) 154630dce28SKyle Tso * -------- 155630dce28SKyle Tso * <31:29> :: UFP VDO version 156630dce28SKyle Tso * <28> :: Reserved 157630dce28SKyle Tso * <27:24> :: Device capability 158630dce28SKyle Tso * <23:22> :: Connector type (10b == receptacle, 11b == captive plug) 159630dce28SKyle Tso * <21:11> :: Reserved 160630dce28SKyle Tso * <10:8> :: Vconn power (AMA only) 161630dce28SKyle Tso * <7> :: Vconn required (AMA only, 0b == no, 1b == yes) 162630dce28SKyle Tso * <6> :: Vbus required (AMA only, 0b == yes, 1b == no) 163630dce28SKyle Tso * <5:3> :: Alternate modes 164630dce28SKyle Tso * <2:0> :: USB highest speed 165630dce28SKyle Tso */ 166630dce28SKyle Tso /* UFP VDO Version */ 167630dce28SKyle Tso #define UFP_VDO_VER1_2 2 168630dce28SKyle Tso 169630dce28SKyle Tso /* Device Capability */ 1709257bd80SKyle Tso #define DEV_USB2_CAPABLE (1 << 0) 1719257bd80SKyle Tso #define DEV_USB2_BILLBOARD (1 << 1) 1729257bd80SKyle Tso #define DEV_USB3_CAPABLE (1 << 2) 1739257bd80SKyle Tso #define DEV_USB4_CAPABLE (1 << 3) 174630dce28SKyle Tso 175630dce28SKyle Tso /* Connector Type */ 176630dce28SKyle Tso #define UFP_RECEPTACLE 2 177630dce28SKyle Tso #define UFP_CAPTIVE 3 178630dce28SKyle Tso 179630dce28SKyle Tso /* Vconn Power (AMA only, set to AMA_VCONN_NOT_REQ if Vconn is not required) */ 180630dce28SKyle Tso #define AMA_VCONN_PWR_1W 0 181630dce28SKyle Tso #define AMA_VCONN_PWR_1W5 1 182630dce28SKyle Tso #define AMA_VCONN_PWR_2W 2 183630dce28SKyle Tso #define AMA_VCONN_PWR_3W 3 184630dce28SKyle Tso #define AMA_VCONN_PWR_4W 4 185630dce28SKyle Tso #define AMA_VCONN_PWR_5W 5 186630dce28SKyle Tso #define AMA_VCONN_PWR_6W 6 187630dce28SKyle Tso 188630dce28SKyle Tso /* Vconn Required (AMA only) */ 189630dce28SKyle Tso #define AMA_VCONN_NOT_REQ 0 190630dce28SKyle Tso #define AMA_VCONN_REQ 1 191630dce28SKyle Tso 192630dce28SKyle Tso /* Vbus Required (AMA only) */ 193630dce28SKyle Tso #define AMA_VBUS_REQ 0 194630dce28SKyle Tso #define AMA_VBUS_NOT_REQ 1 195630dce28SKyle Tso 196630dce28SKyle Tso /* Alternate Modes */ 197630dce28SKyle Tso #define UFP_ALTMODE_NOT_SUPP 0 1989257bd80SKyle Tso #define UFP_ALTMODE_TBT3 (1 << 0) 1999257bd80SKyle Tso #define UFP_ALTMODE_RECFG (1 << 1) 2009257bd80SKyle Tso #define UFP_ALTMODE_NO_RECFG (1 << 2) 201630dce28SKyle Tso 202630dce28SKyle Tso /* USB Highest Speed */ 203630dce28SKyle Tso #define UFP_USB2_ONLY 0 204630dce28SKyle Tso #define UFP_USB32_GEN1 1 205630dce28SKyle Tso #define UFP_USB32_4_GEN2 2 206630dce28SKyle Tso #define UFP_USB4_GEN3 3 207630dce28SKyle Tso 208630dce28SKyle Tso #define VDO_UFP(ver, cap, conn, vcpwr, vcr, vbr, alt, spd) \ 209630dce28SKyle Tso (((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22 \ 210630dce28SKyle Tso | ((vcpwr) & 0x7) << 8 | (vcr) << 7 | (vbr) << 6 | ((alt) & 0x7) << 3 \ 211630dce28SKyle Tso | ((spd) & 0x7)) 212630dce28SKyle Tso 213630dce28SKyle Tso /* 214630dce28SKyle Tso * DFP VDO (PD Revision 3.0+ only) 215630dce28SKyle Tso * -------- 216630dce28SKyle Tso * <31:29> :: DFP VDO version 217630dce28SKyle Tso * <28:27> :: Reserved 218630dce28SKyle Tso * <26:24> :: Host capability 219630dce28SKyle Tso * <23:22> :: Connector type (10b == receptacle, 11b == captive plug) 220630dce28SKyle Tso * <21:5> :: Reserved 221630dce28SKyle Tso * <4:0> :: Port number 222630dce28SKyle Tso */ 223630dce28SKyle Tso #define DFP_VDO_VER1_1 1 2249257bd80SKyle Tso #define HOST_USB2_CAPABLE (1 << 0) 2259257bd80SKyle Tso #define HOST_USB3_CAPABLE (1 << 1) 2269257bd80SKyle Tso #define HOST_USB4_CAPABLE (1 << 2) 227630dce28SKyle Tso #define DFP_RECEPTACLE 2 228630dce28SKyle Tso #define DFP_CAPTIVE 3 229630dce28SKyle Tso 230630dce28SKyle Tso #define VDO_DFP(ver, cap, conn, pnum) \ 231630dce28SKyle Tso (((ver) & 0x7) << 29 | ((cap) & 0x7) << 24 | ((conn) & 0x3) << 22 \ 232630dce28SKyle Tso | ((pnum) & 0x1f)) 233630dce28SKyle Tso 234630dce28SKyle Tso /* 235*55b54c26SKyle Tso * Cable VDO (for both Passive and Active Cable VDO in PD Rev2.0) 236*55b54c26SKyle Tso * --------- 237*55b54c26SKyle Tso * <31:28> :: Cable HW version 238*55b54c26SKyle Tso * <27:24> :: Cable FW version 239*55b54c26SKyle Tso * <23:20> :: Reserved, Shall be set to zero 240*55b54c26SKyle Tso * <19:18> :: type-C to Type-A/B/C/Captive (00b == A, 01 == B, 10 == C, 11 == Captive) 241*55b54c26SKyle Tso * <17> :: Reserved, Shall be set to zero 242*55b54c26SKyle Tso * <16:13> :: cable latency (0001 == <10ns(~1m length)) 243*55b54c26SKyle Tso * <12:11> :: cable termination type (11b == both ends active VCONN req) 244*55b54c26SKyle Tso * <10> :: SSTX1 Directionality support (0b == fixed, 1b == cfgable) 245*55b54c26SKyle Tso * <9> :: SSTX2 Directionality support 246*55b54c26SKyle Tso * <8> :: SSRX1 Directionality support 247*55b54c26SKyle Tso * <7> :: SSRX2 Directionality support 248*55b54c26SKyle Tso * <6:5> :: Vbus current handling capability (01b == 3A, 10b == 5A) 249*55b54c26SKyle Tso * <4> :: Vbus through cable (0b == no, 1b == yes) 250*55b54c26SKyle Tso * <3> :: SOP" controller present? (0b == no, 1b == yes) 251*55b54c26SKyle Tso * <2:0> :: USB SS Signaling support 252*55b54c26SKyle Tso * 253*55b54c26SKyle Tso * Passive Cable VDO (PD Rev3.0+) 254630dce28SKyle Tso * --------- 255630dce28SKyle Tso * <31:28> :: Cable HW version 256630dce28SKyle Tso * <27:24> :: Cable FW version 257630dce28SKyle Tso * <23:21> :: VDO version 258630dce28SKyle Tso * <20> :: Reserved, Shall be set to zero 259630dce28SKyle Tso * <19:18> :: Type-C to Type-C/Captive (10b == C, 11b == Captive) 260630dce28SKyle Tso * <17> :: Reserved, Shall be set to zero 261630dce28SKyle Tso * <16:13> :: cable latency (0001 == <10ns(~1m length)) 262630dce28SKyle Tso * <12:11> :: cable termination type (10b == Vconn not req, 01b == Vconn req) 263630dce28SKyle Tso * <10:9> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V) 264630dce28SKyle Tso * <8:7> :: Reserved, Shall be set to zero 265630dce28SKyle Tso * <6:5> :: Vbus current handling capability (01b == 3A, 10b == 5A) 266630dce28SKyle Tso * <4:3> :: Reserved, Shall be set to zero 267630dce28SKyle Tso * <2:0> :: USB highest speed 268630dce28SKyle Tso * 269*55b54c26SKyle Tso * Active Cable VDO 1 (PD Rev3.0+) 270630dce28SKyle Tso * --------- 271630dce28SKyle Tso * <31:28> :: Cable HW version 272630dce28SKyle Tso * <27:24> :: Cable FW version 273630dce28SKyle Tso * <23:21> :: VDO version 274630dce28SKyle Tso * <20> :: Reserved, Shall be set to zero 275630dce28SKyle Tso * <19:18> :: Connector type (10b == C, 11b == Captive) 276630dce28SKyle Tso * <17> :: Reserved, Shall be set to zero 277630dce28SKyle Tso * <16:13> :: cable latency (0001 == <10ns(~1m length)) 278630dce28SKyle Tso * <12:11> :: cable termination type (10b == one end active, 11b == both ends active VCONN req) 279630dce28SKyle Tso * <10:9> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V) 280630dce28SKyle Tso * <8> :: SBU supported (0b == supported, 1b == not supported) 281630dce28SKyle Tso * <7> :: SBU type (0b == passive, 1b == active) 282630dce28SKyle Tso * <6:5> :: Vbus current handling capability (01b == 3A, 10b == 5A) 283630dce28SKyle Tso * <4> :: Vbus through cable (0b == no, 1b == yes) 284630dce28SKyle Tso * <3> :: SOP" controller present? (0b == no, 1b == yes) 285630dce28SKyle Tso * <2:0> :: USB highest speed 286630dce28SKyle Tso */ 287630dce28SKyle Tso /* Cable VDO Version */ 288630dce28SKyle Tso #define CABLE_VDO_VER1_0 0 289630dce28SKyle Tso #define CABLE_VDO_VER1_3 3 290630dce28SKyle Tso 291*55b54c26SKyle Tso /* Connector Type (_ATYPE and _BTYPE are for PD Rev2.0 only) */ 292*55b54c26SKyle Tso #define CABLE_ATYPE 0 293*55b54c26SKyle Tso #define CABLE_BTYPE 1 294630dce28SKyle Tso #define CABLE_CTYPE 2 295630dce28SKyle Tso #define CABLE_CAPTIVE 3 296630dce28SKyle Tso 297630dce28SKyle Tso /* Cable Latency */ 298630dce28SKyle Tso #define CABLE_LATENCY_1M 1 299630dce28SKyle Tso #define CABLE_LATENCY_2M 2 300630dce28SKyle Tso #define CABLE_LATENCY_3M 3 301630dce28SKyle Tso #define CABLE_LATENCY_4M 4 302630dce28SKyle Tso #define CABLE_LATENCY_5M 5 303630dce28SKyle Tso #define CABLE_LATENCY_6M 6 304630dce28SKyle Tso #define CABLE_LATENCY_7M 7 305630dce28SKyle Tso #define CABLE_LATENCY_7M_PLUS 8 306630dce28SKyle Tso 307630dce28SKyle Tso /* Cable Termination Type */ 308630dce28SKyle Tso #define PCABLE_VCONN_NOT_REQ 0 309630dce28SKyle Tso #define PCABLE_VCONN_REQ 1 310630dce28SKyle Tso #define ACABLE_ONE_END 2 311630dce28SKyle Tso #define ACABLE_BOTH_END 3 312630dce28SKyle Tso 313630dce28SKyle Tso /* Maximum Vbus Voltage */ 314630dce28SKyle Tso #define CABLE_MAX_VBUS_20V 0 315630dce28SKyle Tso #define CABLE_MAX_VBUS_30V 1 316630dce28SKyle Tso #define CABLE_MAX_VBUS_40V 2 317630dce28SKyle Tso #define CABLE_MAX_VBUS_50V 3 318630dce28SKyle Tso 319630dce28SKyle Tso /* Active Cable SBU Supported/Type */ 320630dce28SKyle Tso #define ACABLE_SBU_SUPP 0 321630dce28SKyle Tso #define ACABLE_SBU_NOT_SUPP 1 322630dce28SKyle Tso #define ACABLE_SBU_PASSIVE 0 323630dce28SKyle Tso #define ACABLE_SBU_ACTIVE 1 324630dce28SKyle Tso 325630dce28SKyle Tso /* Vbus Current Handling Capability */ 326630dce28SKyle Tso #define CABLE_CURR_DEF 0 327630dce28SKyle Tso #define CABLE_CURR_3A 1 328630dce28SKyle Tso #define CABLE_CURR_5A 2 329630dce28SKyle Tso 330*55b54c26SKyle Tso /* USB SuperSpeed Signaling Support (PD Rev2.0) */ 331*55b54c26SKyle Tso #define CABLE_USBSS_U2_ONLY 0 332*55b54c26SKyle Tso #define CABLE_USBSS_U31_GEN1 1 333*55b54c26SKyle Tso #define CABLE_USBSS_U31_GEN2 2 334*55b54c26SKyle Tso 335630dce28SKyle Tso /* USB Highest Speed */ 336630dce28SKyle Tso #define CABLE_USB2_ONLY 0 337630dce28SKyle Tso #define CABLE_USB32_GEN1 1 338630dce28SKyle Tso #define CABLE_USB32_4_GEN2 2 339630dce28SKyle Tso #define CABLE_USB4_GEN3 3 340630dce28SKyle Tso 341*55b54c26SKyle Tso #define VDO_CABLE(hw, fw, cbl, lat, term, tx1d, tx2d, rx1d, rx2d, cur, vps, sopp, usbss) \ 342*55b54c26SKyle Tso (((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 | ((cbl) & 0x3) << 18 \ 343*55b54c26SKyle Tso | ((lat) & 0x7) << 13 | ((term) & 0x3) << 11 | (tx1d) << 10 \ 344*55b54c26SKyle Tso | (tx2d) << 9 | (rx1d) << 8 | (rx2d) << 7 | ((cur) & 0x3) << 5 \ 345*55b54c26SKyle Tso | (vps) << 4 | (sopp) << 3 | ((usbss) & 0x7)) 346630dce28SKyle Tso #define VDO_PCABLE(hw, fw, ver, conn, lat, term, vbm, cur, spd) \ 347630dce28SKyle Tso (((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \ 348630dce28SKyle Tso | ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11 \ 349630dce28SKyle Tso | ((vbm) & 0x3) << 9 | ((cur) & 0x3) << 5 | ((spd) & 0x7)) 350630dce28SKyle Tso #define VDO_ACABLE1(hw, fw, ver, conn, lat, term, vbm, sbu, sbut, cur, vbt, sopp, spd) \ 351630dce28SKyle Tso (((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \ 352630dce28SKyle Tso | ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11 \ 353630dce28SKyle Tso | ((vbm) & 0x3) << 9 | (sbu) << 8 | (sbut) << 7 | ((cur) & 0x3) << 5 \ 354630dce28SKyle Tso | (vbt) << 4 | (sopp) << 3 | ((spd) & 0x7)) 355630dce28SKyle Tso 356630dce28SKyle Tso /* 357630dce28SKyle Tso * Active Cable VDO 2 358630dce28SKyle Tso * --------- 359630dce28SKyle Tso * <31:24> :: Maximum operating temperature 360630dce28SKyle Tso * <23:16> :: Shutdown temperature 361630dce28SKyle Tso * <15> :: Reserved, Shall be set to zero 362630dce28SKyle Tso * <14:12> :: U3/CLd power 363630dce28SKyle Tso * <11> :: U3 to U0 transition mode (0b == direct, 1b == through U3S) 364630dce28SKyle Tso * <10> :: Physical connection (0b == copper, 1b == optical) 365630dce28SKyle Tso * <9> :: Active element (0b == redriver, 1b == retimer) 366630dce28SKyle Tso * <8> :: USB4 supported (0b == yes, 1b == no) 367630dce28SKyle Tso * <7:6> :: USB2 hub hops consumed 368630dce28SKyle Tso * <5> :: USB2 supported (0b == yes, 1b == no) 369630dce28SKyle Tso * <4> :: USB3.2 supported (0b == yes, 1b == no) 370630dce28SKyle Tso * <3> :: USB lanes supported (0b == one lane, 1b == two lanes) 371630dce28SKyle Tso * <2> :: Optically isolated active cable (0b == no, 1b == yes) 372630dce28SKyle Tso * <1> :: Reserved, Shall be set to zero 373630dce28SKyle Tso * <0> :: USB gen (0b == gen1, 1b == gen2+) 374630dce28SKyle Tso */ 375630dce28SKyle Tso /* U3/CLd Power*/ 376630dce28SKyle Tso #define ACAB2_U3_CLD_10MW_PLUS 0 377630dce28SKyle Tso #define ACAB2_U3_CLD_10MW 1 378630dce28SKyle Tso #define ACAB2_U3_CLD_5MW 2 379630dce28SKyle Tso #define ACAB2_U3_CLD_1MW 3 380630dce28SKyle Tso #define ACAB2_U3_CLD_500UW 4 381630dce28SKyle Tso #define ACAB2_U3_CLD_200UW 5 382630dce28SKyle Tso #define ACAB2_U3_CLD_50UW 6 383630dce28SKyle Tso 384630dce28SKyle Tso /* Other Active Cable VDO 2 Fields */ 385630dce28SKyle Tso #define ACAB2_U3U0_DIRECT 0 386630dce28SKyle Tso #define ACAB2_U3U0_U3S 1 387630dce28SKyle Tso #define ACAB2_PHY_COPPER 0 388630dce28SKyle Tso #define ACAB2_PHY_OPTICAL 1 389630dce28SKyle Tso #define ACAB2_REDRIVER 0 390630dce28SKyle Tso #define ACAB2_RETIMER 1 391630dce28SKyle Tso #define ACAB2_USB4_SUPP 0 392630dce28SKyle Tso #define ACAB2_USB4_NOT_SUPP 1 393630dce28SKyle Tso #define ACAB2_USB2_SUPP 0 394630dce28SKyle Tso #define ACAB2_USB2_NOT_SUPP 1 395630dce28SKyle Tso #define ACAB2_USB32_SUPP 0 396630dce28SKyle Tso #define ACAB2_USB32_NOT_SUPP 1 397630dce28SKyle Tso #define ACAB2_LANES_ONE 0 398630dce28SKyle Tso #define ACAB2_LANES_TWO 1 399630dce28SKyle Tso #define ACAB2_OPT_ISO_NO 0 400630dce28SKyle Tso #define ACAB2_OPT_ISO_YES 1 401630dce28SKyle Tso #define ACAB2_GEN_1 0 402630dce28SKyle Tso #define ACAB2_GEN_2_PLUS 1 403630dce28SKyle Tso 404630dce28SKyle Tso #define VDO_ACABLE2(mtemp, stemp, u3p, trans, phy, ele, u4, hops, u2, u32, lane, iso, gen) \ 405630dce28SKyle Tso (((mtemp) & 0xff) << 24 | ((stemp) & 0xff) << 16 | ((u3p) & 0x7) << 12 \ 406630dce28SKyle Tso | (trans) << 11 | (phy) << 10 | (ele) << 9 | (u4) << 8 \ 407630dce28SKyle Tso | ((hops) & 0x3) << 6 | (u2) << 5 | (u32) << 4 | (lane) << 3 \ 408630dce28SKyle Tso | (iso) << 2 | (gen)) 409630dce28SKyle Tso 410630dce28SKyle Tso /* 411*55b54c26SKyle Tso * AMA VDO (PD Rev2.0) 412*55b54c26SKyle Tso * --------- 413*55b54c26SKyle Tso * <31:28> :: Cable HW version 414*55b54c26SKyle Tso * <27:24> :: Cable FW version 415*55b54c26SKyle Tso * <23:12> :: Reserved, Shall be set to zero 416*55b54c26SKyle Tso * <11> :: SSTX1 Directionality support (0b == fixed, 1b == cfgable) 417*55b54c26SKyle Tso * <10> :: SSTX2 Directionality support 418*55b54c26SKyle Tso * <9> :: SSRX1 Directionality support 419*55b54c26SKyle Tso * <8> :: SSRX2 Directionality support 420*55b54c26SKyle Tso * <7:5> :: Vconn power 421*55b54c26SKyle Tso * <4> :: Vconn power required 422*55b54c26SKyle Tso * <3> :: Vbus power required 423*55b54c26SKyle Tso * <2:0> :: USB SS Signaling support 424*55b54c26SKyle Tso */ 425*55b54c26SKyle Tso #define VDO_AMA(hw, fw, tx1d, tx2d, rx1d, rx2d, vcpwr, vcr, vbr, usbss) \ 426*55b54c26SKyle Tso (((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 \ 427*55b54c26SKyle Tso | (tx1d) << 11 | (tx2d) << 10 | (rx1d) << 9 | (rx2d) << 8 \ 428*55b54c26SKyle Tso | ((vcpwr) & 0x7) << 5 | (vcr) << 4 | (vbr) << 3 \ 429*55b54c26SKyle Tso | ((usbss) & 0x7)) 430*55b54c26SKyle Tso 431*55b54c26SKyle Tso #define PD_VDO_AMA_VCONN_REQ(vdo) (((vdo) >> 4) & 1) 432*55b54c26SKyle Tso #define PD_VDO_AMA_VBUS_REQ(vdo) (((vdo) >> 3) & 1) 433*55b54c26SKyle Tso 434*55b54c26SKyle Tso #define AMA_USBSS_U2_ONLY 0 435*55b54c26SKyle Tso #define AMA_USBSS_U31_GEN1 1 436*55b54c26SKyle Tso #define AMA_USBSS_U31_GEN2 2 437*55b54c26SKyle Tso #define AMA_USBSS_BBONLY 3 438*55b54c26SKyle Tso 439*55b54c26SKyle Tso /* 440630dce28SKyle Tso * VPD VDO 441630dce28SKyle Tso * --------- 442630dce28SKyle Tso * <31:28> :: HW version 443630dce28SKyle Tso * <27:24> :: FW version 444630dce28SKyle Tso * <23:21> :: VDO version 445630dce28SKyle Tso * <20:17> :: Reserved, Shall be set to zero 446630dce28SKyle Tso * <16:15> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V) 447630dce28SKyle Tso * <14> :: Charge through current support (0b == 3A, 1b == 5A) 448630dce28SKyle Tso * <13> :: Reserved, Shall be set to zero 449630dce28SKyle Tso * <12:7> :: Vbus impedance 450630dce28SKyle Tso * <6:1> :: Ground impedance 451630dce28SKyle Tso * <0> :: Charge through support (0b == no, 1b == yes) 452630dce28SKyle Tso */ 453630dce28SKyle Tso #define VPD_VDO_VER1_0 0 454630dce28SKyle Tso #define VPD_MAX_VBUS_20V 0 455630dce28SKyle Tso #define VPD_MAX_VBUS_30V 1 456630dce28SKyle Tso #define VPD_MAX_VBUS_40V 2 457630dce28SKyle Tso #define VPD_MAX_VBUS_50V 3 458630dce28SKyle Tso #define VPDCT_CURR_3A 0 459630dce28SKyle Tso #define VPDCT_CURR_5A 1 460630dce28SKyle Tso #define VPDCT_NOT_SUPP 0 461630dce28SKyle Tso #define VPDCT_SUPP 1 462630dce28SKyle Tso 463630dce28SKyle Tso #define VDO_VPD(hw, fw, ver, vbm, curr, vbi, gi, ct) \ 464630dce28SKyle Tso (((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \ 465630dce28SKyle Tso | ((vbm) & 0x3) << 15 | (curr) << 14 | ((vbi) & 0x3f) << 7 \ 466630dce28SKyle Tso | ((gi) & 0x3f) << 1 | (ct)) 467630dce28SKyle Tso 4687a846d3cSLi Jun #endif /* __DT_POWER_DELIVERY_H */ 469