1*440b075bSKrzysztof Kozlowski /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 267944950SFinley Xiao #ifndef __DT_BINDINGS_POWER_RK3588_POWER_H__ 367944950SFinley Xiao #define __DT_BINDINGS_POWER_RK3588_POWER_H__ 467944950SFinley Xiao 567944950SFinley Xiao /* VD_LITDSU */ 667944950SFinley Xiao #define RK3588_PD_CPU_0 0 767944950SFinley Xiao #define RK3588_PD_CPU_1 1 867944950SFinley Xiao #define RK3588_PD_CPU_2 2 967944950SFinley Xiao #define RK3588_PD_CPU_3 3 1067944950SFinley Xiao 1167944950SFinley Xiao /* VD_BIGCORE0 */ 1267944950SFinley Xiao #define RK3588_PD_CPU_4 4 1367944950SFinley Xiao #define RK3588_PD_CPU_5 5 1467944950SFinley Xiao 1567944950SFinley Xiao /* VD_BIGCORE1 */ 1667944950SFinley Xiao #define RK3588_PD_CPU_6 6 1767944950SFinley Xiao #define RK3588_PD_CPU_7 7 1867944950SFinley Xiao 1967944950SFinley Xiao /* VD_NPU */ 2067944950SFinley Xiao #define RK3588_PD_NPU 8 2167944950SFinley Xiao #define RK3588_PD_NPUTOP 9 2267944950SFinley Xiao #define RK3588_PD_NPU1 10 2367944950SFinley Xiao #define RK3588_PD_NPU2 11 2467944950SFinley Xiao 2567944950SFinley Xiao /* VD_GPU */ 2667944950SFinley Xiao #define RK3588_PD_GPU 12 2767944950SFinley Xiao 2867944950SFinley Xiao /* VD_VCODEC */ 2967944950SFinley Xiao #define RK3588_PD_VCODEC 13 3067944950SFinley Xiao #define RK3588_PD_RKVDEC0 14 3167944950SFinley Xiao #define RK3588_PD_RKVDEC1 15 3267944950SFinley Xiao #define RK3588_PD_VENC0 16 3367944950SFinley Xiao #define RK3588_PD_VENC1 17 3467944950SFinley Xiao 3567944950SFinley Xiao /* VD_DD01 */ 3667944950SFinley Xiao #define RK3588_PD_DDR01 18 3767944950SFinley Xiao 3867944950SFinley Xiao /* VD_DD23 */ 3967944950SFinley Xiao #define RK3588_PD_DDR23 19 4067944950SFinley Xiao 4167944950SFinley Xiao /* VD_LOGIC */ 4267944950SFinley Xiao #define RK3588_PD_CENTER 20 4367944950SFinley Xiao #define RK3588_PD_VDPU 21 4467944950SFinley Xiao #define RK3588_PD_RGA30 22 4567944950SFinley Xiao #define RK3588_PD_AV1 23 4667944950SFinley Xiao #define RK3588_PD_VOP 24 4767944950SFinley Xiao #define RK3588_PD_VO0 25 4867944950SFinley Xiao #define RK3588_PD_VO1 26 4967944950SFinley Xiao #define RK3588_PD_VI 27 5067944950SFinley Xiao #define RK3588_PD_ISP1 28 5167944950SFinley Xiao #define RK3588_PD_FEC 29 5267944950SFinley Xiao #define RK3588_PD_RGA31 30 5367944950SFinley Xiao #define RK3588_PD_USB 31 5467944950SFinley Xiao #define RK3588_PD_PHP 32 5567944950SFinley Xiao #define RK3588_PD_GMAC 33 5667944950SFinley Xiao #define RK3588_PD_PCIE 34 5767944950SFinley Xiao #define RK3588_PD_NVM 35 5867944950SFinley Xiao #define RK3588_PD_NVM0 36 5967944950SFinley Xiao #define RK3588_PD_SDIO 37 6067944950SFinley Xiao #define RK3588_PD_AUDIO 38 6167944950SFinley Xiao #define RK3588_PD_SECURE 39 6267944950SFinley Xiao #define RK3588_PD_SDMMC 40 6367944950SFinley Xiao #define RK3588_PD_CRYPTO 41 6467944950SFinley Xiao #define RK3588_PD_BUS 42 6567944950SFinley Xiao 6667944950SFinley Xiao /* VD_PMU */ 6767944950SFinley Xiao #define RK3588_PD_PMU1 43 6867944950SFinley Xiao 6967944950SFinley Xiao #endif 70