1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 286e6e64bSElaine Zhang #ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__ 386e6e64bSElaine Zhang #define __DT_BINDINGS_POWER_RK3399_POWER_H__ 486e6e64bSElaine Zhang 586e6e64bSElaine Zhang /* VD_CORE_L */ 686e6e64bSElaine Zhang #define RK3399_PD_A53_L0 0 786e6e64bSElaine Zhang #define RK3399_PD_A53_L1 1 886e6e64bSElaine Zhang #define RK3399_PD_A53_L2 2 986e6e64bSElaine Zhang #define RK3399_PD_A53_L3 3 1086e6e64bSElaine Zhang #define RK3399_PD_SCU_L 4 1186e6e64bSElaine Zhang 1286e6e64bSElaine Zhang /* VD_CORE_B */ 1386e6e64bSElaine Zhang #define RK3399_PD_A72_B0 5 1486e6e64bSElaine Zhang #define RK3399_PD_A72_B1 6 1586e6e64bSElaine Zhang #define RK3399_PD_SCU_B 7 1686e6e64bSElaine Zhang 1786e6e64bSElaine Zhang /* VD_LOGIC */ 1886e6e64bSElaine Zhang #define RK3399_PD_TCPD0 8 1986e6e64bSElaine Zhang #define RK3399_PD_TCPD1 9 2086e6e64bSElaine Zhang #define RK3399_PD_CCI 10 2186e6e64bSElaine Zhang #define RK3399_PD_CCI0 11 2286e6e64bSElaine Zhang #define RK3399_PD_CCI1 12 2386e6e64bSElaine Zhang #define RK3399_PD_PERILP 13 2486e6e64bSElaine Zhang #define RK3399_PD_PERIHP 14 2586e6e64bSElaine Zhang #define RK3399_PD_VIO 15 2686e6e64bSElaine Zhang #define RK3399_PD_VO 16 2786e6e64bSElaine Zhang #define RK3399_PD_VOPB 17 2886e6e64bSElaine Zhang #define RK3399_PD_VOPL 18 2986e6e64bSElaine Zhang #define RK3399_PD_ISP0 19 3086e6e64bSElaine Zhang #define RK3399_PD_ISP1 20 3186e6e64bSElaine Zhang #define RK3399_PD_HDCP 21 3286e6e64bSElaine Zhang #define RK3399_PD_GMAC 22 3386e6e64bSElaine Zhang #define RK3399_PD_EMMC 23 3486e6e64bSElaine Zhang #define RK3399_PD_USB3 24 3586e6e64bSElaine Zhang #define RK3399_PD_EDP 25 3686e6e64bSElaine Zhang #define RK3399_PD_GIC 26 3786e6e64bSElaine Zhang #define RK3399_PD_SD 27 3886e6e64bSElaine Zhang #define RK3399_PD_SDIOAUDIO 28 3986e6e64bSElaine Zhang #define RK3399_PD_ALIVE 29 4086e6e64bSElaine Zhang 4186e6e64bSElaine Zhang /* VD_CENTER */ 4286e6e64bSElaine Zhang #define RK3399_PD_CENTER 30 4386e6e64bSElaine Zhang #define RK3399_PD_VCODEC 31 4486e6e64bSElaine Zhang #define RK3399_PD_VDU 32 4586e6e64bSElaine Zhang #define RK3399_PD_RGA 33 4686e6e64bSElaine Zhang #define RK3399_PD_IEP 34 4786e6e64bSElaine Zhang 4886e6e64bSElaine Zhang /* VD_GPU */ 4986e6e64bSElaine Zhang #define RK3399_PD_GPU 35 5086e6e64bSElaine Zhang 5186e6e64bSElaine Zhang /* VD_PMU */ 5286e6e64bSElaine Zhang #define RK3399_PD_PMU 36 5386e6e64bSElaine Zhang 5486e6e64bSElaine Zhang #endif 55