1*c009ffe6SVinod Koul /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*c009ffe6SVinod Koul /* 3*c009ffe6SVinod Koul * Qualcomm SM8350 interconnect IDs 4*c009ffe6SVinod Koul * 5*c009ffe6SVinod Koul * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 6*c009ffe6SVinod Koul * Copyright (c) 2021, Linaro Limited 7*c009ffe6SVinod Koul */ 8*c009ffe6SVinod Koul 9*c009ffe6SVinod Koul #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8350_H 10*c009ffe6SVinod Koul #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8350_H 11*c009ffe6SVinod Koul 12*c009ffe6SVinod Koul #define MASTER_QSPI_0 0 13*c009ffe6SVinod Koul #define MASTER_QUP_1 1 14*c009ffe6SVinod Koul #define MASTER_A1NOC_CFG 2 15*c009ffe6SVinod Koul #define MASTER_SDCC_4 3 16*c009ffe6SVinod Koul #define MASTER_UFS_MEM 4 17*c009ffe6SVinod Koul #define MASTER_USB3_0 5 18*c009ffe6SVinod Koul #define MASTER_USB3_1 6 19*c009ffe6SVinod Koul #define SLAVE_A1NOC_SNOC 7 20*c009ffe6SVinod Koul #define SLAVE_SERVICE_A1NOC 8 21*c009ffe6SVinod Koul 22*c009ffe6SVinod Koul #define MASTER_QDSS_BAM 0 23*c009ffe6SVinod Koul #define MASTER_QUP_0 1 24*c009ffe6SVinod Koul #define MASTER_QUP_2 2 25*c009ffe6SVinod Koul #define MASTER_A2NOC_CFG 3 26*c009ffe6SVinod Koul #define MASTER_CRYPTO 4 27*c009ffe6SVinod Koul #define MASTER_IPA 5 28*c009ffe6SVinod Koul #define MASTER_PCIE_0 6 29*c009ffe6SVinod Koul #define MASTER_PCIE_1 7 30*c009ffe6SVinod Koul #define MASTER_QDSS_ETR 8 31*c009ffe6SVinod Koul #define MASTER_SDCC_2 9 32*c009ffe6SVinod Koul #define MASTER_UFS_CARD 10 33*c009ffe6SVinod Koul #define SLAVE_A2NOC_SNOC 11 34*c009ffe6SVinod Koul #define SLAVE_ANOC_PCIE_GEM_NOC 12 35*c009ffe6SVinod Koul #define SLAVE_SERVICE_A2NOC 13 36*c009ffe6SVinod Koul 37*c009ffe6SVinod Koul #define MASTER_GEM_NOC_CNOC 0 38*c009ffe6SVinod Koul #define MASTER_GEM_NOC_PCIE_SNOC 1 39*c009ffe6SVinod Koul #define MASTER_QDSS_DAP 2 40*c009ffe6SVinod Koul #define SLAVE_AHB2PHY_SOUTH 3 41*c009ffe6SVinod Koul #define SLAVE_AHB2PHY_NORTH 4 42*c009ffe6SVinod Koul #define SLAVE_AOSS 5 43*c009ffe6SVinod Koul #define SLAVE_APPSS 6 44*c009ffe6SVinod Koul #define SLAVE_CAMERA_CFG 7 45*c009ffe6SVinod Koul #define SLAVE_CLK_CTL 8 46*c009ffe6SVinod Koul #define SLAVE_CDSP_CFG 9 47*c009ffe6SVinod Koul #define SLAVE_RBCPR_CX_CFG 10 48*c009ffe6SVinod Koul #define SLAVE_RBCPR_MMCX_CFG 11 49*c009ffe6SVinod Koul #define SLAVE_RBCPR_MX_CFG 12 50*c009ffe6SVinod Koul #define SLAVE_CRYPTO_0_CFG 13 51*c009ffe6SVinod Koul #define SLAVE_CX_RDPM 14 52*c009ffe6SVinod Koul #define SLAVE_DCC_CFG 15 53*c009ffe6SVinod Koul #define SLAVE_DISPLAY_CFG 16 54*c009ffe6SVinod Koul #define SLAVE_GFX3D_CFG 17 55*c009ffe6SVinod Koul #define SLAVE_HWKM 18 56*c009ffe6SVinod Koul #define SLAVE_IMEM_CFG 19 57*c009ffe6SVinod Koul #define SLAVE_IPA_CFG 20 58*c009ffe6SVinod Koul #define SLAVE_IPC_ROUTER_CFG 21 59*c009ffe6SVinod Koul #define SLAVE_LPASS 22 60*c009ffe6SVinod Koul #define SLAVE_CNOC_MSS 23 61*c009ffe6SVinod Koul #define SLAVE_MX_RDPM 24 62*c009ffe6SVinod Koul #define SLAVE_PCIE_0_CFG 25 63*c009ffe6SVinod Koul #define SLAVE_PCIE_1_CFG 26 64*c009ffe6SVinod Koul #define SLAVE_PDM 27 65*c009ffe6SVinod Koul #define SLAVE_PIMEM_CFG 28 66*c009ffe6SVinod Koul #define SLAVE_PKA_WRAPPER_CFG 29 67*c009ffe6SVinod Koul #define SLAVE_PMU_WRAPPER_CFG 30 68*c009ffe6SVinod Koul #define SLAVE_QDSS_CFG 31 69*c009ffe6SVinod Koul #define SLAVE_QSPI_0 32 70*c009ffe6SVinod Koul #define SLAVE_QUP_0 33 71*c009ffe6SVinod Koul #define SLAVE_QUP_1 34 72*c009ffe6SVinod Koul #define SLAVE_QUP_2 35 73*c009ffe6SVinod Koul #define SLAVE_SDCC_2 36 74*c009ffe6SVinod Koul #define SLAVE_SDCC_4 37 75*c009ffe6SVinod Koul #define SLAVE_SECURITY 38 76*c009ffe6SVinod Koul #define SLAVE_SPSS_CFG 39 77*c009ffe6SVinod Koul #define SLAVE_TCSR 40 78*c009ffe6SVinod Koul #define SLAVE_TLMM 41 79*c009ffe6SVinod Koul #define SLAVE_UFS_CARD_CFG 42 80*c009ffe6SVinod Koul #define SLAVE_UFS_MEM_CFG 43 81*c009ffe6SVinod Koul #define SLAVE_USB3_0 44 82*c009ffe6SVinod Koul #define SLAVE_USB3_1 45 83*c009ffe6SVinod Koul #define SLAVE_VENUS_CFG 46 84*c009ffe6SVinod Koul #define SLAVE_VSENSE_CTRL_CFG 47 85*c009ffe6SVinod Koul #define SLAVE_A1NOC_CFG 48 86*c009ffe6SVinod Koul #define SLAVE_A2NOC_CFG 49 87*c009ffe6SVinod Koul #define SLAVE_DDRSS_CFG 50 88*c009ffe6SVinod Koul #define SLAVE_CNOC_MNOC_CFG 51 89*c009ffe6SVinod Koul #define SLAVE_SNOC_CFG 52 90*c009ffe6SVinod Koul #define SLAVE_BOOT_IMEM 53 91*c009ffe6SVinod Koul #define SLAVE_IMEM 54 92*c009ffe6SVinod Koul #define SLAVE_PIMEM 55 93*c009ffe6SVinod Koul #define SLAVE_SERVICE_CNOC 56 94*c009ffe6SVinod Koul #define SLAVE_PCIE_0 57 95*c009ffe6SVinod Koul #define SLAVE_PCIE_1 58 96*c009ffe6SVinod Koul #define SLAVE_QDSS_STM 59 97*c009ffe6SVinod Koul #define SLAVE_TCU 60 98*c009ffe6SVinod Koul 99*c009ffe6SVinod Koul #define MASTER_CNOC_DC_NOC 0 100*c009ffe6SVinod Koul #define SLAVE_LLCC_CFG 1 101*c009ffe6SVinod Koul #define SLAVE_GEM_NOC_CFG 2 102*c009ffe6SVinod Koul 103*c009ffe6SVinod Koul #define MASTER_GPU_TCU 0 104*c009ffe6SVinod Koul #define MASTER_SYS_TCU 1 105*c009ffe6SVinod Koul #define MASTER_APPSS_PROC 2 106*c009ffe6SVinod Koul #define MASTER_COMPUTE_NOC 3 107*c009ffe6SVinod Koul #define MASTER_GEM_NOC_CFG 4 108*c009ffe6SVinod Koul #define MASTER_GFX3D 5 109*c009ffe6SVinod Koul #define MASTER_MNOC_HF_MEM_NOC 6 110*c009ffe6SVinod Koul #define MASTER_MNOC_SF_MEM_NOC 7 111*c009ffe6SVinod Koul #define MASTER_ANOC_PCIE_GEM_NOC 8 112*c009ffe6SVinod Koul #define MASTER_SNOC_GC_MEM_NOC 9 113*c009ffe6SVinod Koul #define MASTER_SNOC_SF_MEM_NOC 10 114*c009ffe6SVinod Koul #define SLAVE_MSS_PROC_MS_MPU_CFG 11 115*c009ffe6SVinod Koul #define SLAVE_MCDMA_MS_MPU_CFG 12 116*c009ffe6SVinod Koul #define SLAVE_GEM_NOC_CNOC 13 117*c009ffe6SVinod Koul #define SLAVE_LLCC 14 118*c009ffe6SVinod Koul #define SLAVE_MEM_NOC_PCIE_SNOC 15 119*c009ffe6SVinod Koul #define SLAVE_SERVICE_GEM_NOC_1 16 120*c009ffe6SVinod Koul #define SLAVE_SERVICE_GEM_NOC_2 17 121*c009ffe6SVinod Koul #define SLAVE_SERVICE_GEM_NOC 18 122*c009ffe6SVinod Koul #define MASTER_MNOC_HF_MEM_NOC_DISP 19 123*c009ffe6SVinod Koul #define MASTER_MNOC_SF_MEM_NOC_DISP 20 124*c009ffe6SVinod Koul #define SLAVE_LLCC_DISP 21 125*c009ffe6SVinod Koul 126*c009ffe6SVinod Koul #define MASTER_CNOC_LPASS_AG_NOC 0 127*c009ffe6SVinod Koul #define SLAVE_LPASS_CORE_CFG 1 128*c009ffe6SVinod Koul #define SLAVE_LPASS_LPI_CFG 2 129*c009ffe6SVinod Koul #define SLAVE_LPASS_MPU_CFG 3 130*c009ffe6SVinod Koul #define SLAVE_LPASS_TOP_CFG 4 131*c009ffe6SVinod Koul #define SLAVE_SERVICES_LPASS_AML_NOC 5 132*c009ffe6SVinod Koul #define SLAVE_SERVICE_LPASS_AG_NOC 6 133*c009ffe6SVinod Koul 134*c009ffe6SVinod Koul #define MASTER_LLCC 0 135*c009ffe6SVinod Koul #define SLAVE_EBI1 1 136*c009ffe6SVinod Koul #define MASTER_LLCC_DISP 2 137*c009ffe6SVinod Koul #define SLAVE_EBI1_DISP 3 138*c009ffe6SVinod Koul 139*c009ffe6SVinod Koul #define MASTER_CAMNOC_HF 0 140*c009ffe6SVinod Koul #define MASTER_CAMNOC_ICP 1 141*c009ffe6SVinod Koul #define MASTER_CAMNOC_SF 2 142*c009ffe6SVinod Koul #define MASTER_CNOC_MNOC_CFG 3 143*c009ffe6SVinod Koul #define MASTER_VIDEO_P0 4 144*c009ffe6SVinod Koul #define MASTER_VIDEO_P1 5 145*c009ffe6SVinod Koul #define MASTER_VIDEO_PROC 6 146*c009ffe6SVinod Koul #define MASTER_MDP0 7 147*c009ffe6SVinod Koul #define MASTER_MDP1 8 148*c009ffe6SVinod Koul #define MASTER_ROTATOR 9 149*c009ffe6SVinod Koul #define SLAVE_MNOC_HF_MEM_NOC 10 150*c009ffe6SVinod Koul #define SLAVE_MNOC_SF_MEM_NOC 11 151*c009ffe6SVinod Koul #define SLAVE_SERVICE_MNOC 12 152*c009ffe6SVinod Koul #define MASTER_MDP0_DISP 13 153*c009ffe6SVinod Koul #define MASTER_MDP1_DISP 14 154*c009ffe6SVinod Koul #define MASTER_ROTATOR_DISP 15 155*c009ffe6SVinod Koul #define SLAVE_MNOC_HF_MEM_NOC_DISP 16 156*c009ffe6SVinod Koul #define SLAVE_MNOC_SF_MEM_NOC_DISP 17 157*c009ffe6SVinod Koul 158*c009ffe6SVinod Koul #define MASTER_CDSP_NOC_CFG 0 159*c009ffe6SVinod Koul #define MASTER_CDSP_PROC 1 160*c009ffe6SVinod Koul #define SLAVE_CDSP_MEM_NOC 2 161*c009ffe6SVinod Koul #define SLAVE_SERVICE_NSP_NOC 3 162*c009ffe6SVinod Koul 163*c009ffe6SVinod Koul #define MASTER_A1NOC_SNOC 0 164*c009ffe6SVinod Koul #define MASTER_A2NOC_SNOC 1 165*c009ffe6SVinod Koul #define MASTER_SNOC_CFG 2 166*c009ffe6SVinod Koul #define MASTER_PIMEM 3 167*c009ffe6SVinod Koul #define MASTER_GIC 4 168*c009ffe6SVinod Koul #define SLAVE_SNOC_GEM_NOC_GC 5 169*c009ffe6SVinod Koul #define SLAVE_SNOC_GEM_NOC_SF 6 170*c009ffe6SVinod Koul #define SLAVE_SERVICE_SNOC 7 171*c009ffe6SVinod Koul 172*c009ffe6SVinod Koul #endif 173